mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
18231 lines
1.0 MiB
PHP
18231 lines
1.0 MiB
PHP
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/* Capstone Disassembly Engine, https://www.capstone-engine.org */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
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/* Rot127 <unisono@quyllur.org> 2022-2024 */
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/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */
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/* LLVM-commit: <commit> */
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/* LLVM-tag: <tag> */
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/* Do not edit. */
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/* Capstone's LLVM TableGen Backends: */
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/* https://github.com/capstone-engine/llvm-capstone */
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#ifdef GET_INSTRINFO_ENUM
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#undef GET_INSTRINFO_ENUM
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enum {
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AArch64_PHI = 0,
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AArch64_INLINEASM = 1,
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AArch64_INLINEASM_BR = 2,
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AArch64_CFI_INSTRUCTION = 3,
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AArch64_EH_LABEL = 4,
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AArch64_GC_LABEL = 5,
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AArch64_ANNOTATION_LABEL = 6,
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AArch64_KILL = 7,
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AArch64_EXTRACT_SUBREG = 8,
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AArch64_INSERT_SUBREG = 9,
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AArch64_IMPLICIT_DEF = 10,
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AArch64_SUBREG_TO_REG = 11,
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AArch64_COPY_TO_REGCLASS = 12,
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AArch64_DBG_VALUE = 13,
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AArch64_DBG_VALUE_LIST = 14,
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AArch64_DBG_INSTR_REF = 15,
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AArch64_DBG_PHI = 16,
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AArch64_DBG_LABEL = 17,
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AArch64_REG_SEQUENCE = 18,
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AArch64_COPY = 19,
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AArch64_BUNDLE = 20,
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AArch64_LIFETIME_START = 21,
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AArch64_LIFETIME_END = 22,
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AArch64_PSEUDO_PROBE = 23,
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AArch64_ARITH_FENCE = 24,
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AArch64_STACKMAP = 25,
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AArch64_FENTRY_CALL = 26,
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AArch64_PATCHPOINT = 27,
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AArch64_LOAD_STACK_GUARD = 28,
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AArch64_PREALLOCATED_SETUP = 29,
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AArch64_PREALLOCATED_ARG = 30,
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AArch64_STATEPOINT = 31,
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AArch64_LOCAL_ESCAPE = 32,
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AArch64_FAULTING_OP = 33,
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AArch64_PATCHABLE_OP = 34,
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AArch64_PATCHABLE_FUNCTION_ENTER = 35,
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AArch64_PATCHABLE_RET = 36,
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AArch64_PATCHABLE_FUNCTION_EXIT = 37,
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AArch64_PATCHABLE_TAIL_CALL = 38,
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AArch64_PATCHABLE_EVENT_CALL = 39,
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AArch64_PATCHABLE_TYPED_EVENT_CALL = 40,
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AArch64_ICALL_BRANCH_FUNNEL = 41,
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AArch64_MEMBARRIER = 42,
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AArch64_JUMP_TABLE_DEBUG_INFO = 43,
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AArch64_G_ASSERT_SEXT = 44,
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AArch64_G_ASSERT_ZEXT = 45,
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AArch64_G_ASSERT_ALIGN = 46,
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AArch64_G_ADD = 47,
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AArch64_G_SUB = 48,
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AArch64_G_MUL = 49,
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AArch64_G_SDIV = 50,
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AArch64_G_UDIV = 51,
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AArch64_G_SREM = 52,
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AArch64_G_UREM = 53,
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AArch64_G_SDIVREM = 54,
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AArch64_G_UDIVREM = 55,
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AArch64_G_AND = 56,
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AArch64_G_OR = 57,
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AArch64_G_XOR = 58,
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AArch64_G_IMPLICIT_DEF = 59,
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AArch64_G_PHI = 60,
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AArch64_G_FRAME_INDEX = 61,
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AArch64_G_GLOBAL_VALUE = 62,
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AArch64_G_CONSTANT_POOL = 63,
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AArch64_G_EXTRACT = 64,
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AArch64_G_UNMERGE_VALUES = 65,
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AArch64_G_INSERT = 66,
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AArch64_G_MERGE_VALUES = 67,
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AArch64_G_BUILD_VECTOR = 68,
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AArch64_G_BUILD_VECTOR_TRUNC = 69,
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AArch64_G_CONCAT_VECTORS = 70,
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AArch64_G_PTRTOINT = 71,
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AArch64_G_INTTOPTR = 72,
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AArch64_G_BITCAST = 73,
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AArch64_G_FREEZE = 74,
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AArch64_G_CONSTANT_FOLD_BARRIER = 75,
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AArch64_G_INTRINSIC_FPTRUNC_ROUND = 76,
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AArch64_G_INTRINSIC_TRUNC = 77,
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AArch64_G_INTRINSIC_ROUND = 78,
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AArch64_G_INTRINSIC_LRINT = 79,
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AArch64_G_INTRINSIC_ROUNDEVEN = 80,
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AArch64_G_READCYCLECOUNTER = 81,
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AArch64_G_LOAD = 82,
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AArch64_G_SEXTLOAD = 83,
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AArch64_G_ZEXTLOAD = 84,
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AArch64_G_INDEXED_LOAD = 85,
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AArch64_G_INDEXED_SEXTLOAD = 86,
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AArch64_G_INDEXED_ZEXTLOAD = 87,
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AArch64_G_STORE = 88,
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AArch64_G_INDEXED_STORE = 89,
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AArch64_G_ATOMIC_CMPXCHG_WITH_SUCCESS = 90,
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AArch64_G_ATOMIC_CMPXCHG = 91,
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AArch64_G_ATOMICRMW_XCHG = 92,
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AArch64_G_ATOMICRMW_ADD = 93,
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AArch64_G_ATOMICRMW_SUB = 94,
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AArch64_G_ATOMICRMW_AND = 95,
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AArch64_G_ATOMICRMW_NAND = 96,
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AArch64_G_ATOMICRMW_OR = 97,
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AArch64_G_ATOMICRMW_XOR = 98,
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AArch64_G_ATOMICRMW_MAX = 99,
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AArch64_G_ATOMICRMW_MIN = 100,
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AArch64_G_ATOMICRMW_UMAX = 101,
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AArch64_G_ATOMICRMW_UMIN = 102,
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AArch64_G_ATOMICRMW_FADD = 103,
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AArch64_G_ATOMICRMW_FSUB = 104,
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AArch64_G_ATOMICRMW_FMAX = 105,
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AArch64_G_ATOMICRMW_FMIN = 106,
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AArch64_G_ATOMICRMW_UINC_WRAP = 107,
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AArch64_G_ATOMICRMW_UDEC_WRAP = 108,
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AArch64_G_FENCE = 109,
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AArch64_G_PREFETCH = 110,
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AArch64_G_BRCOND = 111,
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AArch64_G_BRINDIRECT = 112,
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AArch64_G_INVOKE_REGION_START = 113,
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AArch64_G_INTRINSIC = 114,
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AArch64_G_INTRINSIC_W_SIDE_EFFECTS = 115,
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AArch64_G_INTRINSIC_CONVERGENT = 116,
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AArch64_G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 117,
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AArch64_G_ANYEXT = 118,
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AArch64_G_TRUNC = 119,
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AArch64_G_CONSTANT = 120,
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AArch64_G_FCONSTANT = 121,
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AArch64_G_VASTART = 122,
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AArch64_G_VAARG = 123,
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AArch64_G_SEXT = 124,
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AArch64_G_SEXT_INREG = 125,
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AArch64_G_ZEXT = 126,
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AArch64_G_SHL = 127,
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AArch64_G_LSHR = 128,
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AArch64_G_ASHR = 129,
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AArch64_G_FSHL = 130,
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AArch64_G_FSHR = 131,
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AArch64_G_ROTR = 132,
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AArch64_G_ROTL = 133,
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AArch64_G_ICMP = 134,
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AArch64_G_FCMP = 135,
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AArch64_G_SELECT = 136,
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AArch64_G_UADDO = 137,
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AArch64_G_UADDE = 138,
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AArch64_G_USUBO = 139,
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AArch64_G_USUBE = 140,
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AArch64_G_SADDO = 141,
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AArch64_G_SADDE = 142,
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AArch64_G_SSUBO = 143,
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AArch64_G_SSUBE = 144,
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AArch64_G_UMULO = 145,
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AArch64_G_SMULO = 146,
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AArch64_G_UMULH = 147,
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AArch64_G_SMULH = 148,
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AArch64_G_UADDSAT = 149,
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AArch64_G_SADDSAT = 150,
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AArch64_G_USUBSAT = 151,
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AArch64_G_SSUBSAT = 152,
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AArch64_G_USHLSAT = 153,
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AArch64_G_SSHLSAT = 154,
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AArch64_G_SMULFIX = 155,
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AArch64_G_UMULFIX = 156,
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AArch64_G_SMULFIXSAT = 157,
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AArch64_G_UMULFIXSAT = 158,
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AArch64_G_SDIVFIX = 159,
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AArch64_G_UDIVFIX = 160,
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AArch64_G_SDIVFIXSAT = 161,
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AArch64_G_UDIVFIXSAT = 162,
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AArch64_G_FADD = 163,
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AArch64_G_FSUB = 164,
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AArch64_G_FMUL = 165,
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AArch64_G_FMA = 166,
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AArch64_G_FMAD = 167,
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AArch64_G_FDIV = 168,
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AArch64_G_FREM = 169,
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AArch64_G_FPOW = 170,
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AArch64_G_FPOWI = 171,
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AArch64_G_FEXP = 172,
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AArch64_G_FEXP2 = 173,
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AArch64_G_FEXP10 = 174,
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AArch64_G_FLOG = 175,
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AArch64_G_FLOG2 = 176,
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AArch64_G_FLOG10 = 177,
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AArch64_G_FLDEXP = 178,
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AArch64_G_FFREXP = 179,
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AArch64_G_FNEG = 180,
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AArch64_G_FPEXT = 181,
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AArch64_G_FPTRUNC = 182,
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AArch64_G_FPTOSI = 183,
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AArch64_G_FPTOUI = 184,
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AArch64_G_SITOFP = 185,
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AArch64_G_UITOFP = 186,
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AArch64_G_FABS = 187,
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AArch64_G_FCOPYSIGN = 188,
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AArch64_G_IS_FPCLASS = 189,
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AArch64_G_FCANONICALIZE = 190,
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AArch64_G_FMINNUM = 191,
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AArch64_G_FMAXNUM = 192,
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AArch64_G_FMINNUM_IEEE = 193,
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AArch64_G_FMAXNUM_IEEE = 194,
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AArch64_G_FMINIMUM = 195,
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AArch64_G_FMAXIMUM = 196,
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AArch64_G_GET_FPENV = 197,
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AArch64_G_SET_FPENV = 198,
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AArch64_G_RESET_FPENV = 199,
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AArch64_G_GET_FPMODE = 200,
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AArch64_G_SET_FPMODE = 201,
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AArch64_G_RESET_FPMODE = 202,
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AArch64_G_PTR_ADD = 203,
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AArch64_G_PTRMASK = 204,
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AArch64_G_SMIN = 205,
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AArch64_G_SMAX = 206,
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AArch64_G_UMIN = 207,
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AArch64_G_UMAX = 208,
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AArch64_G_ABS = 209,
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AArch64_G_LROUND = 210,
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AArch64_G_LLROUND = 211,
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AArch64_G_BR = 212,
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AArch64_G_BRJT = 213,
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AArch64_G_INSERT_VECTOR_ELT = 214,
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AArch64_G_EXTRACT_VECTOR_ELT = 215,
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AArch64_G_SHUFFLE_VECTOR = 216,
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AArch64_G_CTTZ = 217,
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AArch64_G_CTTZ_ZERO_UNDEF = 218,
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AArch64_G_CTLZ = 219,
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AArch64_G_CTLZ_ZERO_UNDEF = 220,
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AArch64_G_CTPOP = 221,
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AArch64_G_BSWAP = 222,
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AArch64_G_BITREVERSE = 223,
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AArch64_G_FCEIL = 224,
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AArch64_G_FCOS = 225,
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AArch64_G_FSIN = 226,
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AArch64_G_FSQRT = 227,
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AArch64_G_FFLOOR = 228,
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AArch64_G_FRINT = 229,
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AArch64_G_FNEARBYINT = 230,
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AArch64_G_ADDRSPACE_CAST = 231,
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AArch64_G_BLOCK_ADDR = 232,
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AArch64_G_JUMP_TABLE = 233,
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AArch64_G_DYN_STACKALLOC = 234,
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AArch64_G_STACKSAVE = 235,
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AArch64_G_STACKRESTORE = 236,
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AArch64_G_STRICT_FADD = 237,
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AArch64_G_STRICT_FSUB = 238,
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AArch64_G_STRICT_FMUL = 239,
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AArch64_G_STRICT_FDIV = 240,
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AArch64_G_STRICT_FREM = 241,
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AArch64_G_STRICT_FMA = 242,
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AArch64_G_STRICT_FSQRT = 243,
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AArch64_G_STRICT_FLDEXP = 244,
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AArch64_G_READ_REGISTER = 245,
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AArch64_G_WRITE_REGISTER = 246,
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AArch64_G_MEMCPY = 247,
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AArch64_G_MEMCPY_INLINE = 248,
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AArch64_G_MEMMOVE = 249,
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AArch64_G_MEMSET = 250,
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AArch64_G_BZERO = 251,
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AArch64_G_VECREDUCE_SEQ_FADD = 252,
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AArch64_G_VECREDUCE_SEQ_FMUL = 253,
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AArch64_G_VECREDUCE_FADD = 254,
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AArch64_G_VECREDUCE_FMUL = 255,
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AArch64_G_VECREDUCE_FMAX = 256,
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AArch64_G_VECREDUCE_FMIN = 257,
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AArch64_G_VECREDUCE_FMAXIMUM = 258,
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AArch64_G_VECREDUCE_FMINIMUM = 259,
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AArch64_G_VECREDUCE_ADD = 260,
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AArch64_G_VECREDUCE_MUL = 261,
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AArch64_G_VECREDUCE_AND = 262,
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AArch64_G_VECREDUCE_OR = 263,
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AArch64_G_VECREDUCE_XOR = 264,
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AArch64_G_VECREDUCE_SMAX = 265,
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AArch64_G_VECREDUCE_SMIN = 266,
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AArch64_G_VECREDUCE_UMAX = 267,
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AArch64_G_VECREDUCE_UMIN = 268,
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AArch64_G_SBFX = 269,
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AArch64_G_UBFX = 270,
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AArch64_ABS_ZPmZ_B_UNDEF = 271,
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AArch64_ABS_ZPmZ_D_UNDEF = 272,
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|
|
AArch64_ABS_ZPmZ_H_UNDEF = 273,
|
||
|
|
AArch64_ABS_ZPmZ_S_UNDEF = 274,
|
||
|
|
AArch64_ADDHA_MPPZ_D_PSEUDO_D = 275,
|
||
|
|
AArch64_ADDHA_MPPZ_S_PSEUDO_S = 276,
|
||
|
|
AArch64_ADDSWrr = 277,
|
||
|
|
AArch64_ADDSXrr = 278,
|
||
|
|
AArch64_ADDVA_MPPZ_D_PSEUDO_D = 279,
|
||
|
|
AArch64_ADDVA_MPPZ_S_PSEUDO_S = 280,
|
||
|
|
AArch64_ADDWrr = 281,
|
||
|
|
AArch64_ADDXrr = 282,
|
||
|
|
AArch64_ADD_VG2_M2Z2Z_D_PSEUDO = 283,
|
||
|
|
AArch64_ADD_VG2_M2Z2Z_S_PSEUDO = 284,
|
||
|
|
AArch64_ADD_VG2_M2ZZ_D_PSEUDO = 285,
|
||
|
|
AArch64_ADD_VG2_M2ZZ_S_PSEUDO = 286,
|
||
|
|
AArch64_ADD_VG2_M2Z_D_PSEUDO = 287,
|
||
|
|
AArch64_ADD_VG2_M2Z_S_PSEUDO = 288,
|
||
|
|
AArch64_ADD_VG4_M4Z4Z_D_PSEUDO = 289,
|
||
|
|
AArch64_ADD_VG4_M4Z4Z_S_PSEUDO = 290,
|
||
|
|
AArch64_ADD_VG4_M4ZZ_D_PSEUDO = 291,
|
||
|
|
AArch64_ADD_VG4_M4ZZ_S_PSEUDO = 292,
|
||
|
|
AArch64_ADD_VG4_M4Z_D_PSEUDO = 293,
|
||
|
|
AArch64_ADD_VG4_M4Z_S_PSEUDO = 294,
|
||
|
|
AArch64_ADD_ZPZZ_B_ZERO = 295,
|
||
|
|
AArch64_ADD_ZPZZ_D_ZERO = 296,
|
||
|
|
AArch64_ADD_ZPZZ_H_ZERO = 297,
|
||
|
|
AArch64_ADD_ZPZZ_S_ZERO = 298,
|
||
|
|
AArch64_ADDlowTLS = 299,
|
||
|
|
AArch64_ADJCALLSTACKDOWN = 300,
|
||
|
|
AArch64_ADJCALLSTACKUP = 301,
|
||
|
|
AArch64_AESIMCrrTied = 302,
|
||
|
|
AArch64_AESMCrrTied = 303,
|
||
|
|
AArch64_ANDSWrr = 304,
|
||
|
|
AArch64_ANDSXrr = 305,
|
||
|
|
AArch64_ANDWrr = 306,
|
||
|
|
AArch64_ANDXrr = 307,
|
||
|
|
AArch64_AND_ZPZZ_B_ZERO = 308,
|
||
|
|
AArch64_AND_ZPZZ_D_ZERO = 309,
|
||
|
|
AArch64_AND_ZPZZ_H_ZERO = 310,
|
||
|
|
AArch64_AND_ZPZZ_S_ZERO = 311,
|
||
|
|
AArch64_ASRD_ZPZI_B_ZERO = 312,
|
||
|
|
AArch64_ASRD_ZPZI_D_ZERO = 313,
|
||
|
|
AArch64_ASRD_ZPZI_H_ZERO = 314,
|
||
|
|
AArch64_ASRD_ZPZI_S_ZERO = 315,
|
||
|
|
AArch64_ASR_ZPZI_B_UNDEF = 316,
|
||
|
|
AArch64_ASR_ZPZI_B_ZERO = 317,
|
||
|
|
AArch64_ASR_ZPZI_D_UNDEF = 318,
|
||
|
|
AArch64_ASR_ZPZI_D_ZERO = 319,
|
||
|
|
AArch64_ASR_ZPZI_H_UNDEF = 320,
|
||
|
|
AArch64_ASR_ZPZI_H_ZERO = 321,
|
||
|
|
AArch64_ASR_ZPZI_S_UNDEF = 322,
|
||
|
|
AArch64_ASR_ZPZI_S_ZERO = 323,
|
||
|
|
AArch64_ASR_ZPZZ_B_UNDEF = 324,
|
||
|
|
AArch64_ASR_ZPZZ_B_ZERO = 325,
|
||
|
|
AArch64_ASR_ZPZZ_D_UNDEF = 326,
|
||
|
|
AArch64_ASR_ZPZZ_D_ZERO = 327,
|
||
|
|
AArch64_ASR_ZPZZ_H_UNDEF = 328,
|
||
|
|
AArch64_ASR_ZPZZ_H_ZERO = 329,
|
||
|
|
AArch64_ASR_ZPZZ_S_UNDEF = 330,
|
||
|
|
AArch64_ASR_ZPZZ_S_ZERO = 331,
|
||
|
|
AArch64_BFADD_VG2_M2Z_H_PSEUDO = 332,
|
||
|
|
AArch64_BFADD_VG4_M4Z_H_PSEUDO = 333,
|
||
|
|
AArch64_BFADD_ZPZZ_UNDEF = 334,
|
||
|
|
AArch64_BFADD_ZPZZ_ZERO = 335,
|
||
|
|
AArch64_BFDOT_VG2_M2Z2Z_HtoS_PSEUDO = 336,
|
||
|
|
AArch64_BFDOT_VG2_M2ZZI_HtoS_PSEUDO = 337,
|
||
|
|
AArch64_BFDOT_VG2_M2ZZ_HtoS_PSEUDO = 338,
|
||
|
|
AArch64_BFDOT_VG4_M4Z4Z_HtoS_PSEUDO = 339,
|
||
|
|
AArch64_BFDOT_VG4_M4ZZI_HtoS_PSEUDO = 340,
|
||
|
|
AArch64_BFDOT_VG4_M4ZZ_HtoS_PSEUDO = 341,
|
||
|
|
AArch64_BFMAXNM_ZPZZ_UNDEF = 342,
|
||
|
|
AArch64_BFMAXNM_ZPZZ_ZERO = 343,
|
||
|
|
AArch64_BFMAX_ZPZZ_UNDEF = 344,
|
||
|
|
AArch64_BFMAX_ZPZZ_ZERO = 345,
|
||
|
|
AArch64_BFMINNM_ZPZZ_UNDEF = 346,
|
||
|
|
AArch64_BFMINNM_ZPZZ_ZERO = 347,
|
||
|
|
AArch64_BFMIN_ZPZZ_UNDEF = 348,
|
||
|
|
AArch64_BFMIN_ZPZZ_ZERO = 349,
|
||
|
|
AArch64_BFMLAL_MZZI_HtoS_PSEUDO = 350,
|
||
|
|
AArch64_BFMLAL_MZZ_HtoS_PSEUDO = 351,
|
||
|
|
AArch64_BFMLAL_VG2_M2Z2Z_HtoS_PSEUDO = 352,
|
||
|
|
AArch64_BFMLAL_VG2_M2ZZI_HtoS_PSEUDO = 353,
|
||
|
|
AArch64_BFMLAL_VG2_M2ZZ_HtoS_PSEUDO = 354,
|
||
|
|
AArch64_BFMLAL_VG4_M4Z4Z_HtoS_PSEUDO = 355,
|
||
|
|
AArch64_BFMLAL_VG4_M4ZZI_HtoS_PSEUDO = 356,
|
||
|
|
AArch64_BFMLAL_VG4_M4ZZ_HtoS_PSEUDO = 357,
|
||
|
|
AArch64_BFMLA_VG2_M2Z2Z_PSEUDO = 358,
|
||
|
|
AArch64_BFMLA_VG4_M4Z4Z_PSEUDO = 359,
|
||
|
|
AArch64_BFMLA_ZPZZZ_UNDEF = 360,
|
||
|
|
AArch64_BFMLSL_MZZI_HtoS_PSEUDO = 361,
|
||
|
|
AArch64_BFMLSL_MZZ_HtoS_PSEUDO = 362,
|
||
|
|
AArch64_BFMLSL_VG2_M2Z2Z_HtoS_PSEUDO = 363,
|
||
|
|
AArch64_BFMLSL_VG2_M2ZZI_HtoS_PSEUDO = 364,
|
||
|
|
AArch64_BFMLSL_VG2_M2ZZ_HtoS_PSEUDO = 365,
|
||
|
|
AArch64_BFMLSL_VG4_M4Z4Z_HtoS_PSEUDO = 366,
|
||
|
|
AArch64_BFMLSL_VG4_M4ZZI_HtoS_PSEUDO = 367,
|
||
|
|
AArch64_BFMLSL_VG4_M4ZZ_HtoS_PSEUDO = 368,
|
||
|
|
AArch64_BFMLS_VG2_M2Z2Z_PSEUDO = 369,
|
||
|
|
AArch64_BFMLS_VG4_M4Z4Z_PSEUDO = 370,
|
||
|
|
AArch64_BFMLS_ZPZZZ_UNDEF = 371,
|
||
|
|
AArch64_BFMOPA_MPPZZ_PSEUDO = 372,
|
||
|
|
AArch64_BFMOPS_MPPZZ_PSEUDO = 373,
|
||
|
|
AArch64_BFMUL_ZPZZ_UNDEF = 374,
|
||
|
|
AArch64_BFMUL_ZPZZ_ZERO = 375,
|
||
|
|
AArch64_BFSUB_VG2_M2Z_H_PSEUDO = 376,
|
||
|
|
AArch64_BFSUB_VG4_M4Z_H_PSEUDO = 377,
|
||
|
|
AArch64_BFSUB_ZPZZ_UNDEF = 378,
|
||
|
|
AArch64_BFSUB_ZPZZ_ZERO = 379,
|
||
|
|
AArch64_BFVDOT_VG2_M2ZZI_HtoS_PSEUDO = 380,
|
||
|
|
AArch64_BICSWrr = 381,
|
||
|
|
AArch64_BICSXrr = 382,
|
||
|
|
AArch64_BICWrr = 383,
|
||
|
|
AArch64_BICXrr = 384,
|
||
|
|
AArch64_BIC_ZPZZ_B_ZERO = 385,
|
||
|
|
AArch64_BIC_ZPZZ_D_ZERO = 386,
|
||
|
|
AArch64_BIC_ZPZZ_H_ZERO = 387,
|
||
|
|
AArch64_BIC_ZPZZ_S_ZERO = 388,
|
||
|
|
AArch64_BLRNoIP = 389,
|
||
|
|
AArch64_BLR_BTI = 390,
|
||
|
|
AArch64_BLR_RVMARKER = 391,
|
||
|
|
AArch64_BLR_X16 = 392,
|
||
|
|
AArch64_BMOPA_MPPZZ_S_PSEUDO = 393,
|
||
|
|
AArch64_BMOPS_MPPZZ_S_PSEUDO = 394,
|
||
|
|
AArch64_BSPv16i8 = 395,
|
||
|
|
AArch64_BSPv8i8 = 396,
|
||
|
|
AArch64_CATCHRET = 397,
|
||
|
|
AArch64_CLEANUPRET = 398,
|
||
|
|
AArch64_CLS_ZPmZ_B_UNDEF = 399,
|
||
|
|
AArch64_CLS_ZPmZ_D_UNDEF = 400,
|
||
|
|
AArch64_CLS_ZPmZ_H_UNDEF = 401,
|
||
|
|
AArch64_CLS_ZPmZ_S_UNDEF = 402,
|
||
|
|
AArch64_CLZ_ZPmZ_B_UNDEF = 403,
|
||
|
|
AArch64_CLZ_ZPmZ_D_UNDEF = 404,
|
||
|
|
AArch64_CLZ_ZPmZ_H_UNDEF = 405,
|
||
|
|
AArch64_CLZ_ZPmZ_S_UNDEF = 406,
|
||
|
|
AArch64_CMP_SWAP_128 = 407,
|
||
|
|
AArch64_CMP_SWAP_128_ACQUIRE = 408,
|
||
|
|
AArch64_CMP_SWAP_128_MONOTONIC = 409,
|
||
|
|
AArch64_CMP_SWAP_128_RELEASE = 410,
|
||
|
|
AArch64_CMP_SWAP_16 = 411,
|
||
|
|
AArch64_CMP_SWAP_32 = 412,
|
||
|
|
AArch64_CMP_SWAP_64 = 413,
|
||
|
|
AArch64_CMP_SWAP_8 = 414,
|
||
|
|
AArch64_CNOT_ZPmZ_B_UNDEF = 415,
|
||
|
|
AArch64_CNOT_ZPmZ_D_UNDEF = 416,
|
||
|
|
AArch64_CNOT_ZPmZ_H_UNDEF = 417,
|
||
|
|
AArch64_CNOT_ZPmZ_S_UNDEF = 418,
|
||
|
|
AArch64_CNT_ZPmZ_B_UNDEF = 419,
|
||
|
|
AArch64_CNT_ZPmZ_D_UNDEF = 420,
|
||
|
|
AArch64_CNT_ZPmZ_H_UNDEF = 421,
|
||
|
|
AArch64_CNT_ZPmZ_S_UNDEF = 422,
|
||
|
|
AArch64_COALESCER_BARRIER_FPR128 = 423,
|
||
|
|
AArch64_COALESCER_BARRIER_FPR16 = 424,
|
||
|
|
AArch64_COALESCER_BARRIER_FPR32 = 425,
|
||
|
|
AArch64_COALESCER_BARRIER_FPR64 = 426,
|
||
|
|
AArch64_EMITBKEY = 427,
|
||
|
|
AArch64_EMITMTETAGGED = 428,
|
||
|
|
AArch64_EONWrr = 429,
|
||
|
|
AArch64_EONXrr = 430,
|
||
|
|
AArch64_EORWrr = 431,
|
||
|
|
AArch64_EORXrr = 432,
|
||
|
|
AArch64_EOR_ZPZZ_B_ZERO = 433,
|
||
|
|
AArch64_EOR_ZPZZ_D_ZERO = 434,
|
||
|
|
AArch64_EOR_ZPZZ_H_ZERO = 435,
|
||
|
|
AArch64_EOR_ZPZZ_S_ZERO = 436,
|
||
|
|
AArch64_F128CSEL = 437,
|
||
|
|
AArch64_FABD_ZPZZ_D_UNDEF = 438,
|
||
|
|
AArch64_FABD_ZPZZ_D_ZERO = 439,
|
||
|
|
AArch64_FABD_ZPZZ_H_UNDEF = 440,
|
||
|
|
AArch64_FABD_ZPZZ_H_ZERO = 441,
|
||
|
|
AArch64_FABD_ZPZZ_S_UNDEF = 442,
|
||
|
|
AArch64_FABD_ZPZZ_S_ZERO = 443,
|
||
|
|
AArch64_FABS_ZPmZ_D_UNDEF = 444,
|
||
|
|
AArch64_FABS_ZPmZ_H_UNDEF = 445,
|
||
|
|
AArch64_FABS_ZPmZ_S_UNDEF = 446,
|
||
|
|
AArch64_FADD_VG2_M2Z_D_PSEUDO = 447,
|
||
|
|
AArch64_FADD_VG2_M2Z_H_PSEUDO = 448,
|
||
|
|
AArch64_FADD_VG2_M2Z_S_PSEUDO = 449,
|
||
|
|
AArch64_FADD_VG4_M4Z_D_PSEUDO = 450,
|
||
|
|
AArch64_FADD_VG4_M4Z_H_PSEUDO = 451,
|
||
|
|
AArch64_FADD_VG4_M4Z_S_PSEUDO = 452,
|
||
|
|
AArch64_FADD_ZPZI_D_UNDEF = 453,
|
||
|
|
AArch64_FADD_ZPZI_D_ZERO = 454,
|
||
|
|
AArch64_FADD_ZPZI_H_UNDEF = 455,
|
||
|
|
AArch64_FADD_ZPZI_H_ZERO = 456,
|
||
|
|
AArch64_FADD_ZPZI_S_UNDEF = 457,
|
||
|
|
AArch64_FADD_ZPZI_S_ZERO = 458,
|
||
|
|
AArch64_FADD_ZPZZ_D_UNDEF = 459,
|
||
|
|
AArch64_FADD_ZPZZ_D_ZERO = 460,
|
||
|
|
AArch64_FADD_ZPZZ_H_UNDEF = 461,
|
||
|
|
AArch64_FADD_ZPZZ_H_ZERO = 462,
|
||
|
|
AArch64_FADD_ZPZZ_S_UNDEF = 463,
|
||
|
|
AArch64_FADD_ZPZZ_S_ZERO = 464,
|
||
|
|
AArch64_FCVTZS_ZPmZ_DtoD_UNDEF = 465,
|
||
|
|
AArch64_FCVTZS_ZPmZ_DtoS_UNDEF = 466,
|
||
|
|
AArch64_FCVTZS_ZPmZ_HtoD_UNDEF = 467,
|
||
|
|
AArch64_FCVTZS_ZPmZ_HtoH_UNDEF = 468,
|
||
|
|
AArch64_FCVTZS_ZPmZ_HtoS_UNDEF = 469,
|
||
|
|
AArch64_FCVTZS_ZPmZ_StoD_UNDEF = 470,
|
||
|
|
AArch64_FCVTZS_ZPmZ_StoS_UNDEF = 471,
|
||
|
|
AArch64_FCVTZU_ZPmZ_DtoD_UNDEF = 472,
|
||
|
|
AArch64_FCVTZU_ZPmZ_DtoS_UNDEF = 473,
|
||
|
|
AArch64_FCVTZU_ZPmZ_HtoD_UNDEF = 474,
|
||
|
|
AArch64_FCVTZU_ZPmZ_HtoH_UNDEF = 475,
|
||
|
|
AArch64_FCVTZU_ZPmZ_HtoS_UNDEF = 476,
|
||
|
|
AArch64_FCVTZU_ZPmZ_StoD_UNDEF = 477,
|
||
|
|
AArch64_FCVTZU_ZPmZ_StoS_UNDEF = 478,
|
||
|
|
AArch64_FCVT_ZPmZ_DtoH_UNDEF = 479,
|
||
|
|
AArch64_FCVT_ZPmZ_DtoS_UNDEF = 480,
|
||
|
|
AArch64_FCVT_ZPmZ_HtoD_UNDEF = 481,
|
||
|
|
AArch64_FCVT_ZPmZ_HtoS_UNDEF = 482,
|
||
|
|
AArch64_FCVT_ZPmZ_StoD_UNDEF = 483,
|
||
|
|
AArch64_FCVT_ZPmZ_StoH_UNDEF = 484,
|
||
|
|
AArch64_FDIVR_ZPZZ_D_ZERO = 485,
|
||
|
|
AArch64_FDIVR_ZPZZ_H_ZERO = 486,
|
||
|
|
AArch64_FDIVR_ZPZZ_S_ZERO = 487,
|
||
|
|
AArch64_FDIV_ZPZZ_D_UNDEF = 488,
|
||
|
|
AArch64_FDIV_ZPZZ_D_ZERO = 489,
|
||
|
|
AArch64_FDIV_ZPZZ_H_UNDEF = 490,
|
||
|
|
AArch64_FDIV_ZPZZ_H_ZERO = 491,
|
||
|
|
AArch64_FDIV_ZPZZ_S_UNDEF = 492,
|
||
|
|
AArch64_FDIV_ZPZZ_S_ZERO = 493,
|
||
|
|
AArch64_FDOT_VG2_M2Z2Z_BtoH_PSEUDO = 494,
|
||
|
|
AArch64_FDOT_VG2_M2Z2Z_BtoS_PSEUDO = 495,
|
||
|
|
AArch64_FDOT_VG2_M2Z2Z_HtoS_PSEUDO = 496,
|
||
|
|
AArch64_FDOT_VG2_M2ZZI_BtoS_PSEUDO = 497,
|
||
|
|
AArch64_FDOT_VG2_M2ZZI_HtoS_PSEUDO = 498,
|
||
|
|
AArch64_FDOT_VG2_M2ZZ_HtoS_PSEUDO = 499,
|
||
|
|
AArch64_FDOT_VG4_M4Z4Z_BtoH_PSEUDO = 500,
|
||
|
|
AArch64_FDOT_VG4_M4Z4Z_BtoS_PSEUDO = 501,
|
||
|
|
AArch64_FDOT_VG4_M4Z4Z_HtoS_PSEUDO = 502,
|
||
|
|
AArch64_FDOT_VG4_M4ZZI_BtoS_PSEUDO = 503,
|
||
|
|
AArch64_FDOT_VG4_M4ZZI_HtoS_PSEUDO = 504,
|
||
|
|
AArch64_FDOT_VG4_M4ZZ_HtoS_PSEUDO = 505,
|
||
|
|
AArch64_FLOGB_ZPZZ_D_ZERO = 506,
|
||
|
|
AArch64_FLOGB_ZPZZ_H_ZERO = 507,
|
||
|
|
AArch64_FLOGB_ZPZZ_S_ZERO = 508,
|
||
|
|
AArch64_FMAXNM_ZPZI_D_UNDEF = 509,
|
||
|
|
AArch64_FMAXNM_ZPZI_D_ZERO = 510,
|
||
|
|
AArch64_FMAXNM_ZPZI_H_UNDEF = 511,
|
||
|
|
AArch64_FMAXNM_ZPZI_H_ZERO = 512,
|
||
|
|
AArch64_FMAXNM_ZPZI_S_UNDEF = 513,
|
||
|
|
AArch64_FMAXNM_ZPZI_S_ZERO = 514,
|
||
|
|
AArch64_FMAXNM_ZPZZ_D_UNDEF = 515,
|
||
|
|
AArch64_FMAXNM_ZPZZ_D_ZERO = 516,
|
||
|
|
AArch64_FMAXNM_ZPZZ_H_UNDEF = 517,
|
||
|
|
AArch64_FMAXNM_ZPZZ_H_ZERO = 518,
|
||
|
|
AArch64_FMAXNM_ZPZZ_S_UNDEF = 519,
|
||
|
|
AArch64_FMAXNM_ZPZZ_S_ZERO = 520,
|
||
|
|
AArch64_FMAX_ZPZI_D_UNDEF = 521,
|
||
|
|
AArch64_FMAX_ZPZI_D_ZERO = 522,
|
||
|
|
AArch64_FMAX_ZPZI_H_UNDEF = 523,
|
||
|
|
AArch64_FMAX_ZPZI_H_ZERO = 524,
|
||
|
|
AArch64_FMAX_ZPZI_S_UNDEF = 525,
|
||
|
|
AArch64_FMAX_ZPZI_S_ZERO = 526,
|
||
|
|
AArch64_FMAX_ZPZZ_D_UNDEF = 527,
|
||
|
|
AArch64_FMAX_ZPZZ_D_ZERO = 528,
|
||
|
|
AArch64_FMAX_ZPZZ_H_UNDEF = 529,
|
||
|
|
AArch64_FMAX_ZPZZ_H_ZERO = 530,
|
||
|
|
AArch64_FMAX_ZPZZ_S_UNDEF = 531,
|
||
|
|
AArch64_FMAX_ZPZZ_S_ZERO = 532,
|
||
|
|
AArch64_FMINNM_ZPZI_D_UNDEF = 533,
|
||
|
|
AArch64_FMINNM_ZPZI_D_ZERO = 534,
|
||
|
|
AArch64_FMINNM_ZPZI_H_UNDEF = 535,
|
||
|
|
AArch64_FMINNM_ZPZI_H_ZERO = 536,
|
||
|
|
AArch64_FMINNM_ZPZI_S_UNDEF = 537,
|
||
|
|
AArch64_FMINNM_ZPZI_S_ZERO = 538,
|
||
|
|
AArch64_FMINNM_ZPZZ_D_UNDEF = 539,
|
||
|
|
AArch64_FMINNM_ZPZZ_D_ZERO = 540,
|
||
|
|
AArch64_FMINNM_ZPZZ_H_UNDEF = 541,
|
||
|
|
AArch64_FMINNM_ZPZZ_H_ZERO = 542,
|
||
|
|
AArch64_FMINNM_ZPZZ_S_UNDEF = 543,
|
||
|
|
AArch64_FMINNM_ZPZZ_S_ZERO = 544,
|
||
|
|
AArch64_FMIN_ZPZI_D_UNDEF = 545,
|
||
|
|
AArch64_FMIN_ZPZI_D_ZERO = 546,
|
||
|
|
AArch64_FMIN_ZPZI_H_UNDEF = 547,
|
||
|
|
AArch64_FMIN_ZPZI_H_ZERO = 548,
|
||
|
|
AArch64_FMIN_ZPZI_S_UNDEF = 549,
|
||
|
|
AArch64_FMIN_ZPZI_S_ZERO = 550,
|
||
|
|
AArch64_FMIN_ZPZZ_D_UNDEF = 551,
|
||
|
|
AArch64_FMIN_ZPZZ_D_ZERO = 552,
|
||
|
|
AArch64_FMIN_ZPZZ_H_UNDEF = 553,
|
||
|
|
AArch64_FMIN_ZPZZ_H_ZERO = 554,
|
||
|
|
AArch64_FMIN_ZPZZ_S_UNDEF = 555,
|
||
|
|
AArch64_FMIN_ZPZZ_S_ZERO = 556,
|
||
|
|
AArch64_FMLALL_MZZI_BtoS_PSEUDO = 557,
|
||
|
|
AArch64_FMLALL_MZZ_BtoS_PSEUDO = 558,
|
||
|
|
AArch64_FMLALL_VG2_M2Z2Z_BtoS_PSEUDO = 559,
|
||
|
|
AArch64_FMLALL_VG2_M2ZZI_BtoS_PSEUDO = 560,
|
||
|
|
AArch64_FMLALL_VG2_M2ZZ_BtoS_PSEUDO = 561,
|
||
|
|
AArch64_FMLALL_VG4_M4Z4Z_BtoS_PSEUDO = 562,
|
||
|
|
AArch64_FMLALL_VG4_M4ZZI_BtoS_PSEUDO = 563,
|
||
|
|
AArch64_FMLALL_VG4_M4ZZ_BtoS_PSEUDO = 564,
|
||
|
|
AArch64_FMLAL_MZZI_HtoS_PSEUDO = 565,
|
||
|
|
AArch64_FMLAL_MZZ_HtoS_PSEUDO = 566,
|
||
|
|
AArch64_FMLAL_VG2_M2Z2Z_BtoH_PSEUDO = 567,
|
||
|
|
AArch64_FMLAL_VG2_M2Z2Z_HtoS_PSEUDO = 568,
|
||
|
|
AArch64_FMLAL_VG2_M2ZZI_HtoS_PSEUDO = 569,
|
||
|
|
AArch64_FMLAL_VG2_M2ZZ_BtoH_PSEUDO = 570,
|
||
|
|
AArch64_FMLAL_VG2_M2ZZ_HtoS_PSEUDO = 571,
|
||
|
|
AArch64_FMLAL_VG4_M4Z4Z_BtoH_PSEUDO = 572,
|
||
|
|
AArch64_FMLAL_VG4_M4Z4Z_HtoS_PSEUDO = 573,
|
||
|
|
AArch64_FMLAL_VG4_M4ZZI_HtoS_PSEUDO = 574,
|
||
|
|
AArch64_FMLAL_VG4_M4ZZ_BtoH_PSEUDO = 575,
|
||
|
|
AArch64_FMLAL_VG4_M4ZZ_HtoS_PSEUDO = 576,
|
||
|
|
AArch64_FMLA_VG2_M2Z2Z_D_PSEUDO = 577,
|
||
|
|
AArch64_FMLA_VG2_M2Z2Z_S_PSEUDO = 578,
|
||
|
|
AArch64_FMLA_VG2_M2Z4Z_H_PSEUDO = 579,
|
||
|
|
AArch64_FMLA_VG2_M2ZZI_D_PSEUDO = 580,
|
||
|
|
AArch64_FMLA_VG2_M2ZZI_S_PSEUDO = 581,
|
||
|
|
AArch64_FMLA_VG2_M2ZZ_D_PSEUDO = 582,
|
||
|
|
AArch64_FMLA_VG2_M2ZZ_S_PSEUDO = 583,
|
||
|
|
AArch64_FMLA_VG4_M4Z4Z_D_PSEUDO = 584,
|
||
|
|
AArch64_FMLA_VG4_M4Z4Z_H_PSEUDO = 585,
|
||
|
|
AArch64_FMLA_VG4_M4Z4Z_S_PSEUDO = 586,
|
||
|
|
AArch64_FMLA_VG4_M4ZZI_D_PSEUDO = 587,
|
||
|
|
AArch64_FMLA_VG4_M4ZZI_S_PSEUDO = 588,
|
||
|
|
AArch64_FMLA_VG4_M4ZZ_D_PSEUDO = 589,
|
||
|
|
AArch64_FMLA_VG4_M4ZZ_S_PSEUDO = 590,
|
||
|
|
AArch64_FMLA_ZPZZZ_D_UNDEF = 591,
|
||
|
|
AArch64_FMLA_ZPZZZ_H_UNDEF = 592,
|
||
|
|
AArch64_FMLA_ZPZZZ_S_UNDEF = 593,
|
||
|
|
AArch64_FMLSL_MZZI_HtoS_PSEUDO = 594,
|
||
|
|
AArch64_FMLSL_MZZ_HtoS_PSEUDO = 595,
|
||
|
|
AArch64_FMLSL_VG2_M2Z2Z_HtoS_PSEUDO = 596,
|
||
|
|
AArch64_FMLSL_VG2_M2ZZI_HtoS_PSEUDO = 597,
|
||
|
|
AArch64_FMLSL_VG2_M2ZZ_HtoS_PSEUDO = 598,
|
||
|
|
AArch64_FMLSL_VG4_M4Z4Z_HtoS_PSEUDO = 599,
|
||
|
|
AArch64_FMLSL_VG4_M4ZZI_HtoS_PSEUDO = 600,
|
||
|
|
AArch64_FMLSL_VG4_M4ZZ_HtoS_PSEUDO = 601,
|
||
|
|
AArch64_FMLS_VG2_M2Z2Z_D_PSEUDO = 602,
|
||
|
|
AArch64_FMLS_VG2_M2Z2Z_H_PSEUDO = 603,
|
||
|
|
AArch64_FMLS_VG2_M2Z2Z_S_PSEUDO = 604,
|
||
|
|
AArch64_FMLS_VG2_M2ZZI_D_PSEUDO = 605,
|
||
|
|
AArch64_FMLS_VG2_M2ZZI_S_PSEUDO = 606,
|
||
|
|
AArch64_FMLS_VG2_M2ZZ_D_PSEUDO = 607,
|
||
|
|
AArch64_FMLS_VG2_M2ZZ_S_PSEUDO = 608,
|
||
|
|
AArch64_FMLS_VG4_M4Z2Z_H_PSEUDO = 609,
|
||
|
|
AArch64_FMLS_VG4_M4Z4Z_D_PSEUDO = 610,
|
||
|
|
AArch64_FMLS_VG4_M4Z4Z_S_PSEUDO = 611,
|
||
|
|
AArch64_FMLS_VG4_M4ZZI_D_PSEUDO = 612,
|
||
|
|
AArch64_FMLS_VG4_M4ZZI_S_PSEUDO = 613,
|
||
|
|
AArch64_FMLS_VG4_M4ZZ_D_PSEUDO = 614,
|
||
|
|
AArch64_FMLS_VG4_M4ZZ_S_PSEUDO = 615,
|
||
|
|
AArch64_FMLS_ZPZZZ_D_UNDEF = 616,
|
||
|
|
AArch64_FMLS_ZPZZZ_H_UNDEF = 617,
|
||
|
|
AArch64_FMLS_ZPZZZ_S_UNDEF = 618,
|
||
|
|
AArch64_FMOPAL_MPPZZ_PSEUDO = 619,
|
||
|
|
AArch64_FMOPA_MPPZZ_BtoS_PSEUDO = 620,
|
||
|
|
AArch64_FMOPA_MPPZZ_D_PSEUDO = 621,
|
||
|
|
AArch64_FMOPA_MPPZZ_S_PSEUDO = 622,
|
||
|
|
AArch64_FMOPSL_MPPZZ_PSEUDO = 623,
|
||
|
|
AArch64_FMOPS_MPPZZ_D_PSEUDO = 624,
|
||
|
|
AArch64_FMOPS_MPPZZ_S_PSEUDO = 625,
|
||
|
|
AArch64_FMOVD0 = 626,
|
||
|
|
AArch64_FMOVH0 = 627,
|
||
|
|
AArch64_FMOVS0 = 628,
|
||
|
|
AArch64_FMULX_ZPZZ_D_UNDEF = 629,
|
||
|
|
AArch64_FMULX_ZPZZ_D_ZERO = 630,
|
||
|
|
AArch64_FMULX_ZPZZ_H_UNDEF = 631,
|
||
|
|
AArch64_FMULX_ZPZZ_H_ZERO = 632,
|
||
|
|
AArch64_FMULX_ZPZZ_S_UNDEF = 633,
|
||
|
|
AArch64_FMULX_ZPZZ_S_ZERO = 634,
|
||
|
|
AArch64_FMUL_ZPZI_D_UNDEF = 635,
|
||
|
|
AArch64_FMUL_ZPZI_D_ZERO = 636,
|
||
|
|
AArch64_FMUL_ZPZI_H_UNDEF = 637,
|
||
|
|
AArch64_FMUL_ZPZI_H_ZERO = 638,
|
||
|
|
AArch64_FMUL_ZPZI_S_UNDEF = 639,
|
||
|
|
AArch64_FMUL_ZPZI_S_ZERO = 640,
|
||
|
|
AArch64_FMUL_ZPZZ_D_UNDEF = 641,
|
||
|
|
AArch64_FMUL_ZPZZ_D_ZERO = 642,
|
||
|
|
AArch64_FMUL_ZPZZ_H_UNDEF = 643,
|
||
|
|
AArch64_FMUL_ZPZZ_H_ZERO = 644,
|
||
|
|
AArch64_FMUL_ZPZZ_S_UNDEF = 645,
|
||
|
|
AArch64_FMUL_ZPZZ_S_ZERO = 646,
|
||
|
|
AArch64_FNEG_ZPmZ_D_UNDEF = 647,
|
||
|
|
AArch64_FNEG_ZPmZ_H_UNDEF = 648,
|
||
|
|
AArch64_FNEG_ZPmZ_S_UNDEF = 649,
|
||
|
|
AArch64_FNMLA_ZPZZZ_D_UNDEF = 650,
|
||
|
|
AArch64_FNMLA_ZPZZZ_H_UNDEF = 651,
|
||
|
|
AArch64_FNMLA_ZPZZZ_S_UNDEF = 652,
|
||
|
|
AArch64_FNMLS_ZPZZZ_D_UNDEF = 653,
|
||
|
|
AArch64_FNMLS_ZPZZZ_H_UNDEF = 654,
|
||
|
|
AArch64_FNMLS_ZPZZZ_S_UNDEF = 655,
|
||
|
|
AArch64_FRECPX_ZPmZ_D_UNDEF = 656,
|
||
|
|
AArch64_FRECPX_ZPmZ_H_UNDEF = 657,
|
||
|
|
AArch64_FRECPX_ZPmZ_S_UNDEF = 658,
|
||
|
|
AArch64_FRINTA_ZPmZ_D_UNDEF = 659,
|
||
|
|
AArch64_FRINTA_ZPmZ_H_UNDEF = 660,
|
||
|
|
AArch64_FRINTA_ZPmZ_S_UNDEF = 661,
|
||
|
|
AArch64_FRINTI_ZPmZ_D_UNDEF = 662,
|
||
|
|
AArch64_FRINTI_ZPmZ_H_UNDEF = 663,
|
||
|
|
AArch64_FRINTI_ZPmZ_S_UNDEF = 664,
|
||
|
|
AArch64_FRINTM_ZPmZ_D_UNDEF = 665,
|
||
|
|
AArch64_FRINTM_ZPmZ_H_UNDEF = 666,
|
||
|
|
AArch64_FRINTM_ZPmZ_S_UNDEF = 667,
|
||
|
|
AArch64_FRINTN_ZPmZ_D_UNDEF = 668,
|
||
|
|
AArch64_FRINTN_ZPmZ_H_UNDEF = 669,
|
||
|
|
AArch64_FRINTN_ZPmZ_S_UNDEF = 670,
|
||
|
|
AArch64_FRINTP_ZPmZ_D_UNDEF = 671,
|
||
|
|
AArch64_FRINTP_ZPmZ_H_UNDEF = 672,
|
||
|
|
AArch64_FRINTP_ZPmZ_S_UNDEF = 673,
|
||
|
|
AArch64_FRINTX_ZPmZ_D_UNDEF = 674,
|
||
|
|
AArch64_FRINTX_ZPmZ_H_UNDEF = 675,
|
||
|
|
AArch64_FRINTX_ZPmZ_S_UNDEF = 676,
|
||
|
|
AArch64_FRINTZ_ZPmZ_D_UNDEF = 677,
|
||
|
|
AArch64_FRINTZ_ZPmZ_H_UNDEF = 678,
|
||
|
|
AArch64_FRINTZ_ZPmZ_S_UNDEF = 679,
|
||
|
|
AArch64_FSQRT_ZPmZ_D_UNDEF = 680,
|
||
|
|
AArch64_FSQRT_ZPmZ_H_UNDEF = 681,
|
||
|
|
AArch64_FSQRT_ZPmZ_S_UNDEF = 682,
|
||
|
|
AArch64_FSUBR_ZPZI_D_UNDEF = 683,
|
||
|
|
AArch64_FSUBR_ZPZI_D_ZERO = 684,
|
||
|
|
AArch64_FSUBR_ZPZI_H_UNDEF = 685,
|
||
|
|
AArch64_FSUBR_ZPZI_H_ZERO = 686,
|
||
|
|
AArch64_FSUBR_ZPZI_S_UNDEF = 687,
|
||
|
|
AArch64_FSUBR_ZPZI_S_ZERO = 688,
|
||
|
|
AArch64_FSUBR_ZPZZ_D_ZERO = 689,
|
||
|
|
AArch64_FSUBR_ZPZZ_H_ZERO = 690,
|
||
|
|
AArch64_FSUBR_ZPZZ_S_ZERO = 691,
|
||
|
|
AArch64_FSUB_VG2_M2Z_D_PSEUDO = 692,
|
||
|
|
AArch64_FSUB_VG2_M2Z_H_PSEUDO = 693,
|
||
|
|
AArch64_FSUB_VG2_M2Z_S_PSEUDO = 694,
|
||
|
|
AArch64_FSUB_VG4_M4Z_D_PSEUDO = 695,
|
||
|
|
AArch64_FSUB_VG4_M4Z_H_PSEUDO = 696,
|
||
|
|
AArch64_FSUB_VG4_M4Z_S_PSEUDO = 697,
|
||
|
|
AArch64_FSUB_ZPZI_D_UNDEF = 698,
|
||
|
|
AArch64_FSUB_ZPZI_D_ZERO = 699,
|
||
|
|
AArch64_FSUB_ZPZI_H_UNDEF = 700,
|
||
|
|
AArch64_FSUB_ZPZI_H_ZERO = 701,
|
||
|
|
AArch64_FSUB_ZPZI_S_UNDEF = 702,
|
||
|
|
AArch64_FSUB_ZPZI_S_ZERO = 703,
|
||
|
|
AArch64_FSUB_ZPZZ_D_UNDEF = 704,
|
||
|
|
AArch64_FSUB_ZPZZ_D_ZERO = 705,
|
||
|
|
AArch64_FSUB_ZPZZ_H_UNDEF = 706,
|
||
|
|
AArch64_FSUB_ZPZZ_H_ZERO = 707,
|
||
|
|
AArch64_FSUB_ZPZZ_S_UNDEF = 708,
|
||
|
|
AArch64_FSUB_ZPZZ_S_ZERO = 709,
|
||
|
|
AArch64_FVDOT_VG2_M2ZZI_HtoS_PSEUDO = 710,
|
||
|
|
AArch64_GLD1B_D = 711,
|
||
|
|
AArch64_GLD1B_D_IMM = 712,
|
||
|
|
AArch64_GLD1B_D_SXTW = 713,
|
||
|
|
AArch64_GLD1B_D_UXTW = 714,
|
||
|
|
AArch64_GLD1B_S_IMM = 715,
|
||
|
|
AArch64_GLD1B_S_SXTW = 716,
|
||
|
|
AArch64_GLD1B_S_UXTW = 717,
|
||
|
|
AArch64_GLD1D = 718,
|
||
|
|
AArch64_GLD1D_IMM = 719,
|
||
|
|
AArch64_GLD1D_SCALED = 720,
|
||
|
|
AArch64_GLD1D_SXTW = 721,
|
||
|
|
AArch64_GLD1D_SXTW_SCALED = 722,
|
||
|
|
AArch64_GLD1D_UXTW = 723,
|
||
|
|
AArch64_GLD1D_UXTW_SCALED = 724,
|
||
|
|
AArch64_GLD1H_D = 725,
|
||
|
|
AArch64_GLD1H_D_IMM = 726,
|
||
|
|
AArch64_GLD1H_D_SCALED = 727,
|
||
|
|
AArch64_GLD1H_D_SXTW = 728,
|
||
|
|
AArch64_GLD1H_D_SXTW_SCALED = 729,
|
||
|
|
AArch64_GLD1H_D_UXTW = 730,
|
||
|
|
AArch64_GLD1H_D_UXTW_SCALED = 731,
|
||
|
|
AArch64_GLD1H_S_IMM = 732,
|
||
|
|
AArch64_GLD1H_S_SXTW = 733,
|
||
|
|
AArch64_GLD1H_S_SXTW_SCALED = 734,
|
||
|
|
AArch64_GLD1H_S_UXTW = 735,
|
||
|
|
AArch64_GLD1H_S_UXTW_SCALED = 736,
|
||
|
|
AArch64_GLD1SB_D = 737,
|
||
|
|
AArch64_GLD1SB_D_IMM = 738,
|
||
|
|
AArch64_GLD1SB_D_SXTW = 739,
|
||
|
|
AArch64_GLD1SB_D_UXTW = 740,
|
||
|
|
AArch64_GLD1SB_S_IMM = 741,
|
||
|
|
AArch64_GLD1SB_S_SXTW = 742,
|
||
|
|
AArch64_GLD1SB_S_UXTW = 743,
|
||
|
|
AArch64_GLD1SH_D = 744,
|
||
|
|
AArch64_GLD1SH_D_IMM = 745,
|
||
|
|
AArch64_GLD1SH_D_SCALED = 746,
|
||
|
|
AArch64_GLD1SH_D_SXTW = 747,
|
||
|
|
AArch64_GLD1SH_D_SXTW_SCALED = 748,
|
||
|
|
AArch64_GLD1SH_D_UXTW = 749,
|
||
|
|
AArch64_GLD1SH_D_UXTW_SCALED = 750,
|
||
|
|
AArch64_GLD1SH_S_IMM = 751,
|
||
|
|
AArch64_GLD1SH_S_SXTW = 752,
|
||
|
|
AArch64_GLD1SH_S_SXTW_SCALED = 753,
|
||
|
|
AArch64_GLD1SH_S_UXTW = 754,
|
||
|
|
AArch64_GLD1SH_S_UXTW_SCALED = 755,
|
||
|
|
AArch64_GLD1SW_D = 756,
|
||
|
|
AArch64_GLD1SW_D_IMM = 757,
|
||
|
|
AArch64_GLD1SW_D_SCALED = 758,
|
||
|
|
AArch64_GLD1SW_D_SXTW = 759,
|
||
|
|
AArch64_GLD1SW_D_SXTW_SCALED = 760,
|
||
|
|
AArch64_GLD1SW_D_UXTW = 761,
|
||
|
|
AArch64_GLD1SW_D_UXTW_SCALED = 762,
|
||
|
|
AArch64_GLD1W_D = 763,
|
||
|
|
AArch64_GLD1W_D_IMM = 764,
|
||
|
|
AArch64_GLD1W_D_SCALED = 765,
|
||
|
|
AArch64_GLD1W_D_SXTW = 766,
|
||
|
|
AArch64_GLD1W_D_SXTW_SCALED = 767,
|
||
|
|
AArch64_GLD1W_D_UXTW = 768,
|
||
|
|
AArch64_GLD1W_D_UXTW_SCALED = 769,
|
||
|
|
AArch64_GLD1W_IMM = 770,
|
||
|
|
AArch64_GLD1W_SXTW = 771,
|
||
|
|
AArch64_GLD1W_SXTW_SCALED = 772,
|
||
|
|
AArch64_GLD1W_UXTW = 773,
|
||
|
|
AArch64_GLD1W_UXTW_SCALED = 774,
|
||
|
|
AArch64_GLDFF1B_D = 775,
|
||
|
|
AArch64_GLDFF1B_D_IMM = 776,
|
||
|
|
AArch64_GLDFF1B_D_SXTW = 777,
|
||
|
|
AArch64_GLDFF1B_D_UXTW = 778,
|
||
|
|
AArch64_GLDFF1B_S_IMM = 779,
|
||
|
|
AArch64_GLDFF1B_S_SXTW = 780,
|
||
|
|
AArch64_GLDFF1B_S_UXTW = 781,
|
||
|
|
AArch64_GLDFF1D = 782,
|
||
|
|
AArch64_GLDFF1D_IMM = 783,
|
||
|
|
AArch64_GLDFF1D_SCALED = 784,
|
||
|
|
AArch64_GLDFF1D_SXTW = 785,
|
||
|
|
AArch64_GLDFF1D_SXTW_SCALED = 786,
|
||
|
|
AArch64_GLDFF1D_UXTW = 787,
|
||
|
|
AArch64_GLDFF1D_UXTW_SCALED = 788,
|
||
|
|
AArch64_GLDFF1H_D = 789,
|
||
|
|
AArch64_GLDFF1H_D_IMM = 790,
|
||
|
|
AArch64_GLDFF1H_D_SCALED = 791,
|
||
|
|
AArch64_GLDFF1H_D_SXTW = 792,
|
||
|
|
AArch64_GLDFF1H_D_SXTW_SCALED = 793,
|
||
|
|
AArch64_GLDFF1H_D_UXTW = 794,
|
||
|
|
AArch64_GLDFF1H_D_UXTW_SCALED = 795,
|
||
|
|
AArch64_GLDFF1H_S_IMM = 796,
|
||
|
|
AArch64_GLDFF1H_S_SXTW = 797,
|
||
|
|
AArch64_GLDFF1H_S_SXTW_SCALED = 798,
|
||
|
|
AArch64_GLDFF1H_S_UXTW = 799,
|
||
|
|
AArch64_GLDFF1H_S_UXTW_SCALED = 800,
|
||
|
|
AArch64_GLDFF1SB_D = 801,
|
||
|
|
AArch64_GLDFF1SB_D_IMM = 802,
|
||
|
|
AArch64_GLDFF1SB_D_SXTW = 803,
|
||
|
|
AArch64_GLDFF1SB_D_UXTW = 804,
|
||
|
|
AArch64_GLDFF1SB_S_IMM = 805,
|
||
|
|
AArch64_GLDFF1SB_S_SXTW = 806,
|
||
|
|
AArch64_GLDFF1SB_S_UXTW = 807,
|
||
|
|
AArch64_GLDFF1SH_D = 808,
|
||
|
|
AArch64_GLDFF1SH_D_IMM = 809,
|
||
|
|
AArch64_GLDFF1SH_D_SCALED = 810,
|
||
|
|
AArch64_GLDFF1SH_D_SXTW = 811,
|
||
|
|
AArch64_GLDFF1SH_D_SXTW_SCALED = 812,
|
||
|
|
AArch64_GLDFF1SH_D_UXTW = 813,
|
||
|
|
AArch64_GLDFF1SH_D_UXTW_SCALED = 814,
|
||
|
|
AArch64_GLDFF1SH_S_IMM = 815,
|
||
|
|
AArch64_GLDFF1SH_S_SXTW = 816,
|
||
|
|
AArch64_GLDFF1SH_S_SXTW_SCALED = 817,
|
||
|
|
AArch64_GLDFF1SH_S_UXTW = 818,
|
||
|
|
AArch64_GLDFF1SH_S_UXTW_SCALED = 819,
|
||
|
|
AArch64_GLDFF1SW_D = 820,
|
||
|
|
AArch64_GLDFF1SW_D_IMM = 821,
|
||
|
|
AArch64_GLDFF1SW_D_SCALED = 822,
|
||
|
|
AArch64_GLDFF1SW_D_SXTW = 823,
|
||
|
|
AArch64_GLDFF1SW_D_SXTW_SCALED = 824,
|
||
|
|
AArch64_GLDFF1SW_D_UXTW = 825,
|
||
|
|
AArch64_GLDFF1SW_D_UXTW_SCALED = 826,
|
||
|
|
AArch64_GLDFF1W_D = 827,
|
||
|
|
AArch64_GLDFF1W_D_IMM = 828,
|
||
|
|
AArch64_GLDFF1W_D_SCALED = 829,
|
||
|
|
AArch64_GLDFF1W_D_SXTW = 830,
|
||
|
|
AArch64_GLDFF1W_D_SXTW_SCALED = 831,
|
||
|
|
AArch64_GLDFF1W_D_UXTW = 832,
|
||
|
|
AArch64_GLDFF1W_D_UXTW_SCALED = 833,
|
||
|
|
AArch64_GLDFF1W_IMM = 834,
|
||
|
|
AArch64_GLDFF1W_SXTW = 835,
|
||
|
|
AArch64_GLDFF1W_SXTW_SCALED = 836,
|
||
|
|
AArch64_GLDFF1W_UXTW = 837,
|
||
|
|
AArch64_GLDFF1W_UXTW_SCALED = 838,
|
||
|
|
AArch64_G_AARCH64_PREFETCH = 839,
|
||
|
|
AArch64_G_ADD_LOW = 840,
|
||
|
|
AArch64_G_BSP = 841,
|
||
|
|
AArch64_G_DUP = 842,
|
||
|
|
AArch64_G_DUPLANE16 = 843,
|
||
|
|
AArch64_G_DUPLANE32 = 844,
|
||
|
|
AArch64_G_DUPLANE64 = 845,
|
||
|
|
AArch64_G_DUPLANE8 = 846,
|
||
|
|
AArch64_G_EXT = 847,
|
||
|
|
AArch64_G_FCMEQ = 848,
|
||
|
|
AArch64_G_FCMEQZ = 849,
|
||
|
|
AArch64_G_FCMGE = 850,
|
||
|
|
AArch64_G_FCMGEZ = 851,
|
||
|
|
AArch64_G_FCMGT = 852,
|
||
|
|
AArch64_G_FCMGTZ = 853,
|
||
|
|
AArch64_G_FCMLEZ = 854,
|
||
|
|
AArch64_G_FCMLTZ = 855,
|
||
|
|
AArch64_G_REV16 = 856,
|
||
|
|
AArch64_G_REV32 = 857,
|
||
|
|
AArch64_G_REV64 = 858,
|
||
|
|
AArch64_G_SADDLP = 859,
|
||
|
|
AArch64_G_SADDLV = 860,
|
||
|
|
AArch64_G_SDOT = 861,
|
||
|
|
AArch64_G_SITOF = 862,
|
||
|
|
AArch64_G_SMULL = 863,
|
||
|
|
AArch64_G_TRN1 = 864,
|
||
|
|
AArch64_G_TRN2 = 865,
|
||
|
|
AArch64_G_UADDLP = 866,
|
||
|
|
AArch64_G_UADDLV = 867,
|
||
|
|
AArch64_G_UDOT = 868,
|
||
|
|
AArch64_G_UITOF = 869,
|
||
|
|
AArch64_G_UMULL = 870,
|
||
|
|
AArch64_G_UZP1 = 871,
|
||
|
|
AArch64_G_UZP2 = 872,
|
||
|
|
AArch64_G_VASHR = 873,
|
||
|
|
AArch64_G_VLSHR = 874,
|
||
|
|
AArch64_G_ZIP1 = 875,
|
||
|
|
AArch64_G_ZIP2 = 876,
|
||
|
|
AArch64_HOM_Epilog = 877,
|
||
|
|
AArch64_HOM_Prolog = 878,
|
||
|
|
AArch64_HWASAN_CHECK_MEMACCESS = 879,
|
||
|
|
AArch64_HWASAN_CHECK_MEMACCESS_SHORTGRANULES = 880,
|
||
|
|
AArch64_INSERT_MXIPZ_H_PSEUDO_B = 881,
|
||
|
|
AArch64_INSERT_MXIPZ_H_PSEUDO_D = 882,
|
||
|
|
AArch64_INSERT_MXIPZ_H_PSEUDO_H = 883,
|
||
|
|
AArch64_INSERT_MXIPZ_H_PSEUDO_Q = 884,
|
||
|
|
AArch64_INSERT_MXIPZ_H_PSEUDO_S = 885,
|
||
|
|
AArch64_INSERT_MXIPZ_V_PSEUDO_B = 886,
|
||
|
|
AArch64_INSERT_MXIPZ_V_PSEUDO_D = 887,
|
||
|
|
AArch64_INSERT_MXIPZ_V_PSEUDO_H = 888,
|
||
|
|
AArch64_INSERT_MXIPZ_V_PSEUDO_Q = 889,
|
||
|
|
AArch64_INSERT_MXIPZ_V_PSEUDO_S = 890,
|
||
|
|
AArch64_IRGstack = 891,
|
||
|
|
AArch64_JumpTableDest16 = 892,
|
||
|
|
AArch64_JumpTableDest32 = 893,
|
||
|
|
AArch64_JumpTableDest8 = 894,
|
||
|
|
AArch64_KCFI_CHECK = 895,
|
||
|
|
AArch64_LD1B_2Z_IMM_PSEUDO = 896,
|
||
|
|
AArch64_LD1B_2Z_PSEUDO = 897,
|
||
|
|
AArch64_LD1B_4Z_IMM_PSEUDO = 898,
|
||
|
|
AArch64_LD1B_4Z_PSEUDO = 899,
|
||
|
|
AArch64_LD1D_2Z_IMM_PSEUDO = 900,
|
||
|
|
AArch64_LD1D_2Z_PSEUDO = 901,
|
||
|
|
AArch64_LD1D_4Z_IMM_PSEUDO = 902,
|
||
|
|
AArch64_LD1D_4Z_PSEUDO = 903,
|
||
|
|
AArch64_LD1H_2Z_IMM_PSEUDO = 904,
|
||
|
|
AArch64_LD1H_2Z_PSEUDO = 905,
|
||
|
|
AArch64_LD1H_4Z_IMM_PSEUDO = 906,
|
||
|
|
AArch64_LD1H_4Z_PSEUDO = 907,
|
||
|
|
AArch64_LD1W_2Z_IMM_PSEUDO = 908,
|
||
|
|
AArch64_LD1W_2Z_PSEUDO = 909,
|
||
|
|
AArch64_LD1W_4Z_IMM_PSEUDO = 910,
|
||
|
|
AArch64_LD1W_4Z_PSEUDO = 911,
|
||
|
|
AArch64_LD1_MXIPXX_H_PSEUDO_B = 912,
|
||
|
|
AArch64_LD1_MXIPXX_H_PSEUDO_D = 913,
|
||
|
|
AArch64_LD1_MXIPXX_H_PSEUDO_H = 914,
|
||
|
|
AArch64_LD1_MXIPXX_H_PSEUDO_Q = 915,
|
||
|
|
AArch64_LD1_MXIPXX_H_PSEUDO_S = 916,
|
||
|
|
AArch64_LD1_MXIPXX_V_PSEUDO_B = 917,
|
||
|
|
AArch64_LD1_MXIPXX_V_PSEUDO_D = 918,
|
||
|
|
AArch64_LD1_MXIPXX_V_PSEUDO_H = 919,
|
||
|
|
AArch64_LD1_MXIPXX_V_PSEUDO_Q = 920,
|
||
|
|
AArch64_LD1_MXIPXX_V_PSEUDO_S = 921,
|
||
|
|
AArch64_LDFF1B = 922,
|
||
|
|
AArch64_LDFF1B_D = 923,
|
||
|
|
AArch64_LDFF1B_H = 924,
|
||
|
|
AArch64_LDFF1B_S = 925,
|
||
|
|
AArch64_LDFF1D = 926,
|
||
|
|
AArch64_LDFF1H = 927,
|
||
|
|
AArch64_LDFF1H_D = 928,
|
||
|
|
AArch64_LDFF1H_S = 929,
|
||
|
|
AArch64_LDFF1SB_D = 930,
|
||
|
|
AArch64_LDFF1SB_H = 931,
|
||
|
|
AArch64_LDFF1SB_S = 932,
|
||
|
|
AArch64_LDFF1SH_D = 933,
|
||
|
|
AArch64_LDFF1SH_S = 934,
|
||
|
|
AArch64_LDFF1SW_D = 935,
|
||
|
|
AArch64_LDFF1W = 936,
|
||
|
|
AArch64_LDFF1W_D = 937,
|
||
|
|
AArch64_LDNF1B_D_IMM = 938,
|
||
|
|
AArch64_LDNF1B_H_IMM = 939,
|
||
|
|
AArch64_LDNF1B_IMM = 940,
|
||
|
|
AArch64_LDNF1B_S_IMM = 941,
|
||
|
|
AArch64_LDNF1D_IMM = 942,
|
||
|
|
AArch64_LDNF1H_D_IMM = 943,
|
||
|
|
AArch64_LDNF1H_IMM = 944,
|
||
|
|
AArch64_LDNF1H_S_IMM = 945,
|
||
|
|
AArch64_LDNF1SB_D_IMM = 946,
|
||
|
|
AArch64_LDNF1SB_H_IMM = 947,
|
||
|
|
AArch64_LDNF1SB_S_IMM = 948,
|
||
|
|
AArch64_LDNF1SH_D_IMM = 949,
|
||
|
|
AArch64_LDNF1SH_S_IMM = 950,
|
||
|
|
AArch64_LDNF1SW_D_IMM = 951,
|
||
|
|
AArch64_LDNF1W_D_IMM = 952,
|
||
|
|
AArch64_LDNF1W_IMM = 953,
|
||
|
|
AArch64_LDNT1B_2Z_IMM_PSEUDO = 954,
|
||
|
|
AArch64_LDNT1B_2Z_PSEUDO = 955,
|
||
|
|
AArch64_LDNT1B_4Z_IMM_PSEUDO = 956,
|
||
|
|
AArch64_LDNT1B_4Z_PSEUDO = 957,
|
||
|
|
AArch64_LDNT1D_2Z_IMM_PSEUDO = 958,
|
||
|
|
AArch64_LDNT1D_2Z_PSEUDO = 959,
|
||
|
|
AArch64_LDNT1D_4Z_IMM_PSEUDO = 960,
|
||
|
|
AArch64_LDNT1D_4Z_PSEUDO = 961,
|
||
|
|
AArch64_LDNT1H_2Z_IMM_PSEUDO = 962,
|
||
|
|
AArch64_LDNT1H_2Z_PSEUDO = 963,
|
||
|
|
AArch64_LDNT1H_4Z_IMM_PSEUDO = 964,
|
||
|
|
AArch64_LDNT1H_4Z_PSEUDO = 965,
|
||
|
|
AArch64_LDNT1W_2Z_IMM_PSEUDO = 966,
|
||
|
|
AArch64_LDNT1W_2Z_PSEUDO = 967,
|
||
|
|
AArch64_LDNT1W_4Z_IMM_PSEUDO = 968,
|
||
|
|
AArch64_LDNT1W_4Z_PSEUDO = 969,
|
||
|
|
AArch64_LDR_PPXI = 970,
|
||
|
|
AArch64_LDR_TX_PSEUDO = 971,
|
||
|
|
AArch64_LDR_ZA_PSEUDO = 972,
|
||
|
|
AArch64_LDR_ZZXI = 973,
|
||
|
|
AArch64_LDR_ZZZXI = 974,
|
||
|
|
AArch64_LDR_ZZZZXI = 975,
|
||
|
|
AArch64_LOADgot = 976,
|
||
|
|
AArch64_LSL_ZPZI_B_UNDEF = 977,
|
||
|
|
AArch64_LSL_ZPZI_B_ZERO = 978,
|
||
|
|
AArch64_LSL_ZPZI_D_UNDEF = 979,
|
||
|
|
AArch64_LSL_ZPZI_D_ZERO = 980,
|
||
|
|
AArch64_LSL_ZPZI_H_UNDEF = 981,
|
||
|
|
AArch64_LSL_ZPZI_H_ZERO = 982,
|
||
|
|
AArch64_LSL_ZPZI_S_UNDEF = 983,
|
||
|
|
AArch64_LSL_ZPZI_S_ZERO = 984,
|
||
|
|
AArch64_LSL_ZPZZ_B_UNDEF = 985,
|
||
|
|
AArch64_LSL_ZPZZ_B_ZERO = 986,
|
||
|
|
AArch64_LSL_ZPZZ_D_UNDEF = 987,
|
||
|
|
AArch64_LSL_ZPZZ_D_ZERO = 988,
|
||
|
|
AArch64_LSL_ZPZZ_H_UNDEF = 989,
|
||
|
|
AArch64_LSL_ZPZZ_H_ZERO = 990,
|
||
|
|
AArch64_LSL_ZPZZ_S_UNDEF = 991,
|
||
|
|
AArch64_LSL_ZPZZ_S_ZERO = 992,
|
||
|
|
AArch64_LSR_ZPZI_B_UNDEF = 993,
|
||
|
|
AArch64_LSR_ZPZI_B_ZERO = 994,
|
||
|
|
AArch64_LSR_ZPZI_D_UNDEF = 995,
|
||
|
|
AArch64_LSR_ZPZI_D_ZERO = 996,
|
||
|
|
AArch64_LSR_ZPZI_H_UNDEF = 997,
|
||
|
|
AArch64_LSR_ZPZI_H_ZERO = 998,
|
||
|
|
AArch64_LSR_ZPZI_S_UNDEF = 999,
|
||
|
|
AArch64_LSR_ZPZI_S_ZERO = 1000,
|
||
|
|
AArch64_LSR_ZPZZ_B_UNDEF = 1001,
|
||
|
|
AArch64_LSR_ZPZZ_B_ZERO = 1002,
|
||
|
|
AArch64_LSR_ZPZZ_D_UNDEF = 1003,
|
||
|
|
AArch64_LSR_ZPZZ_D_ZERO = 1004,
|
||
|
|
AArch64_LSR_ZPZZ_H_UNDEF = 1005,
|
||
|
|
AArch64_LSR_ZPZZ_H_ZERO = 1006,
|
||
|
|
AArch64_LSR_ZPZZ_S_UNDEF = 1007,
|
||
|
|
AArch64_LSR_ZPZZ_S_ZERO = 1008,
|
||
|
|
AArch64_MLA_ZPZZZ_B_UNDEF = 1009,
|
||
|
|
AArch64_MLA_ZPZZZ_D_UNDEF = 1010,
|
||
|
|
AArch64_MLA_ZPZZZ_H_UNDEF = 1011,
|
||
|
|
AArch64_MLA_ZPZZZ_S_UNDEF = 1012,
|
||
|
|
AArch64_MLS_ZPZZZ_B_UNDEF = 1013,
|
||
|
|
AArch64_MLS_ZPZZZ_D_UNDEF = 1014,
|
||
|
|
AArch64_MLS_ZPZZZ_H_UNDEF = 1015,
|
||
|
|
AArch64_MLS_ZPZZZ_S_UNDEF = 1016,
|
||
|
|
AArch64_MOPSMemoryCopyPseudo = 1017,
|
||
|
|
AArch64_MOPSMemoryMovePseudo = 1018,
|
||
|
|
AArch64_MOPSMemorySetPseudo = 1019,
|
||
|
|
AArch64_MOPSMemorySetTaggingPseudo = 1020,
|
||
|
|
AArch64_MOVA_MXI2Z_H_B_PSEUDO = 1021,
|
||
|
|
AArch64_MOVA_MXI2Z_H_D_PSEUDO = 1022,
|
||
|
|
AArch64_MOVA_MXI2Z_H_H_PSEUDO = 1023,
|
||
|
|
AArch64_MOVA_MXI2Z_H_S_PSEUDO = 1024,
|
||
|
|
AArch64_MOVA_MXI2Z_V_B_PSEUDO = 1025,
|
||
|
|
AArch64_MOVA_MXI2Z_V_D_PSEUDO = 1026,
|
||
|
|
AArch64_MOVA_MXI2Z_V_H_PSEUDO = 1027,
|
||
|
|
AArch64_MOVA_MXI2Z_V_S_PSEUDO = 1028,
|
||
|
|
AArch64_MOVA_MXI4Z_H_B_PSEUDO = 1029,
|
||
|
|
AArch64_MOVA_MXI4Z_H_D_PSEUDO = 1030,
|
||
|
|
AArch64_MOVA_MXI4Z_H_H_PSEUDO = 1031,
|
||
|
|
AArch64_MOVA_MXI4Z_H_S_PSEUDO = 1032,
|
||
|
|
AArch64_MOVA_MXI4Z_V_B_PSEUDO = 1033,
|
||
|
|
AArch64_MOVA_MXI4Z_V_D_PSEUDO = 1034,
|
||
|
|
AArch64_MOVA_MXI4Z_V_H_PSEUDO = 1035,
|
||
|
|
AArch64_MOVA_MXI4Z_V_S_PSEUDO = 1036,
|
||
|
|
AArch64_MOVA_VG2_MXI2Z_PSEUDO = 1037,
|
||
|
|
AArch64_MOVA_VG4_MXI4Z_PSEUDO = 1038,
|
||
|
|
AArch64_MOVMCSym = 1039,
|
||
|
|
AArch64_MOVaddr = 1040,
|
||
|
|
AArch64_MOVaddrBA = 1041,
|
||
|
|
AArch64_MOVaddrCP = 1042,
|
||
|
|
AArch64_MOVaddrEXT = 1043,
|
||
|
|
AArch64_MOVaddrJT = 1044,
|
||
|
|
AArch64_MOVaddrTLS = 1045,
|
||
|
|
AArch64_MOVbaseTLS = 1046,
|
||
|
|
AArch64_MOVi32imm = 1047,
|
||
|
|
AArch64_MOVi64imm = 1048,
|
||
|
|
AArch64_MRS_FPCR = 1049,
|
||
|
|
AArch64_MSR_FPCR = 1050,
|
||
|
|
AArch64_MSRpstatePseudo = 1051,
|
||
|
|
AArch64_MUL_ZPZZ_B_UNDEF = 1052,
|
||
|
|
AArch64_MUL_ZPZZ_D_UNDEF = 1053,
|
||
|
|
AArch64_MUL_ZPZZ_H_UNDEF = 1054,
|
||
|
|
AArch64_MUL_ZPZZ_S_UNDEF = 1055,
|
||
|
|
AArch64_NEG_ZPmZ_B_UNDEF = 1056,
|
||
|
|
AArch64_NEG_ZPmZ_D_UNDEF = 1057,
|
||
|
|
AArch64_NEG_ZPmZ_H_UNDEF = 1058,
|
||
|
|
AArch64_NEG_ZPmZ_S_UNDEF = 1059,
|
||
|
|
AArch64_NOT_ZPmZ_B_UNDEF = 1060,
|
||
|
|
AArch64_NOT_ZPmZ_D_UNDEF = 1061,
|
||
|
|
AArch64_NOT_ZPmZ_H_UNDEF = 1062,
|
||
|
|
AArch64_NOT_ZPmZ_S_UNDEF = 1063,
|
||
|
|
AArch64_ORNWrr = 1064,
|
||
|
|
AArch64_ORNXrr = 1065,
|
||
|
|
AArch64_ORRWrr = 1066,
|
||
|
|
AArch64_ORRXrr = 1067,
|
||
|
|
AArch64_ORR_ZPZZ_B_ZERO = 1068,
|
||
|
|
AArch64_ORR_ZPZZ_D_ZERO = 1069,
|
||
|
|
AArch64_ORR_ZPZZ_H_ZERO = 1070,
|
||
|
|
AArch64_ORR_ZPZZ_S_ZERO = 1071,
|
||
|
|
AArch64_PAUTH_EPILOGUE = 1072,
|
||
|
|
AArch64_PAUTH_PROLOGUE = 1073,
|
||
|
|
AArch64_PROBED_STACKALLOC = 1074,
|
||
|
|
AArch64_PROBED_STACKALLOC_DYN = 1075,
|
||
|
|
AArch64_PROBED_STACKALLOC_VAR = 1076,
|
||
|
|
AArch64_PTEST_PP_ANY = 1077,
|
||
|
|
AArch64_RDFFR_P = 1078,
|
||
|
|
AArch64_RDFFR_PPz = 1079,
|
||
|
|
AArch64_RET_ReallyLR = 1080,
|
||
|
|
AArch64_RestoreZAPseudo = 1081,
|
||
|
|
AArch64_SABD_ZPZZ_B_UNDEF = 1082,
|
||
|
|
AArch64_SABD_ZPZZ_D_UNDEF = 1083,
|
||
|
|
AArch64_SABD_ZPZZ_H_UNDEF = 1084,
|
||
|
|
AArch64_SABD_ZPZZ_S_UNDEF = 1085,
|
||
|
|
AArch64_SCVTF_ZPmZ_DtoD_UNDEF = 1086,
|
||
|
|
AArch64_SCVTF_ZPmZ_DtoH_UNDEF = 1087,
|
||
|
|
AArch64_SCVTF_ZPmZ_DtoS_UNDEF = 1088,
|
||
|
|
AArch64_SCVTF_ZPmZ_HtoH_UNDEF = 1089,
|
||
|
|
AArch64_SCVTF_ZPmZ_StoD_UNDEF = 1090,
|
||
|
|
AArch64_SCVTF_ZPmZ_StoH_UNDEF = 1091,
|
||
|
|
AArch64_SCVTF_ZPmZ_StoS_UNDEF = 1092,
|
||
|
|
AArch64_SDIV_ZPZZ_D_UNDEF = 1093,
|
||
|
|
AArch64_SDIV_ZPZZ_S_UNDEF = 1094,
|
||
|
|
AArch64_SDOT_VG2_M2Z2Z_BtoS_PSEUDO = 1095,
|
||
|
|
AArch64_SDOT_VG2_M2Z2Z_HtoD_PSEUDO = 1096,
|
||
|
|
AArch64_SDOT_VG2_M2Z2Z_HtoS_PSEUDO = 1097,
|
||
|
|
AArch64_SDOT_VG2_M2ZZI_BToS_PSEUDO = 1098,
|
||
|
|
AArch64_SDOT_VG2_M2ZZI_HToS_PSEUDO = 1099,
|
||
|
|
AArch64_SDOT_VG2_M2ZZI_HtoD_PSEUDO = 1100,
|
||
|
|
AArch64_SDOT_VG2_M2ZZ_BtoS_PSEUDO = 1101,
|
||
|
|
AArch64_SDOT_VG2_M2ZZ_HtoD_PSEUDO = 1102,
|
||
|
|
AArch64_SDOT_VG2_M2ZZ_HtoS_PSEUDO = 1103,
|
||
|
|
AArch64_SDOT_VG4_M4Z4Z_BtoS_PSEUDO = 1104,
|
||
|
|
AArch64_SDOT_VG4_M4Z4Z_HtoD_PSEUDO = 1105,
|
||
|
|
AArch64_SDOT_VG4_M4Z4Z_HtoS_PSEUDO = 1106,
|
||
|
|
AArch64_SDOT_VG4_M4ZZI_BToS_PSEUDO = 1107,
|
||
|
|
AArch64_SDOT_VG4_M4ZZI_HToS_PSEUDO = 1108,
|
||
|
|
AArch64_SDOT_VG4_M4ZZI_HtoD_PSEUDO = 1109,
|
||
|
|
AArch64_SDOT_VG4_M4ZZ_BtoS_PSEUDO = 1110,
|
||
|
|
AArch64_SDOT_VG4_M4ZZ_HtoD_PSEUDO = 1111,
|
||
|
|
AArch64_SDOT_VG4_M4ZZ_HtoS_PSEUDO = 1112,
|
||
|
|
AArch64_SEH_AddFP = 1113,
|
||
|
|
AArch64_SEH_EpilogEnd = 1114,
|
||
|
|
AArch64_SEH_EpilogStart = 1115,
|
||
|
|
AArch64_SEH_Nop = 1116,
|
||
|
|
AArch64_SEH_PACSignLR = 1117,
|
||
|
|
AArch64_SEH_PrologEnd = 1118,
|
||
|
|
AArch64_SEH_SaveAnyRegQP = 1119,
|
||
|
|
AArch64_SEH_SaveAnyRegQPX = 1120,
|
||
|
|
AArch64_SEH_SaveFPLR = 1121,
|
||
|
|
AArch64_SEH_SaveFPLR_X = 1122,
|
||
|
|
AArch64_SEH_SaveFReg = 1123,
|
||
|
|
AArch64_SEH_SaveFRegP = 1124,
|
||
|
|
AArch64_SEH_SaveFRegP_X = 1125,
|
||
|
|
AArch64_SEH_SaveFReg_X = 1126,
|
||
|
|
AArch64_SEH_SaveReg = 1127,
|
||
|
|
AArch64_SEH_SaveRegP = 1128,
|
||
|
|
AArch64_SEH_SaveRegP_X = 1129,
|
||
|
|
AArch64_SEH_SaveReg_X = 1130,
|
||
|
|
AArch64_SEH_SetFP = 1131,
|
||
|
|
AArch64_SEH_StackAlloc = 1132,
|
||
|
|
AArch64_SMAX_ZPZZ_B_UNDEF = 1133,
|
||
|
|
AArch64_SMAX_ZPZZ_D_UNDEF = 1134,
|
||
|
|
AArch64_SMAX_ZPZZ_H_UNDEF = 1135,
|
||
|
|
AArch64_SMAX_ZPZZ_S_UNDEF = 1136,
|
||
|
|
AArch64_SMIN_ZPZZ_B_UNDEF = 1137,
|
||
|
|
AArch64_SMIN_ZPZZ_D_UNDEF = 1138,
|
||
|
|
AArch64_SMIN_ZPZZ_H_UNDEF = 1139,
|
||
|
|
AArch64_SMIN_ZPZZ_S_UNDEF = 1140,
|
||
|
|
AArch64_SMLALL_MZZI_BtoS_PSEUDO = 1141,
|
||
|
|
AArch64_SMLALL_MZZI_HtoD_PSEUDO = 1142,
|
||
|
|
AArch64_SMLALL_MZZ_BtoS_PSEUDO = 1143,
|
||
|
|
AArch64_SMLALL_MZZ_HtoD_PSEUDO = 1144,
|
||
|
|
AArch64_SMLALL_VG2_M2Z2Z_BtoS_PSEUDO = 1145,
|
||
|
|
AArch64_SMLALL_VG2_M2Z2Z_HtoD_PSEUDO = 1146,
|
||
|
|
AArch64_SMLALL_VG2_M2ZZI_BtoS_PSEUDO = 1147,
|
||
|
|
AArch64_SMLALL_VG2_M2ZZI_HtoD_PSEUDO = 1148,
|
||
|
|
AArch64_SMLALL_VG2_M2ZZ_BtoS_PSEUDO = 1149,
|
||
|
|
AArch64_SMLALL_VG2_M2ZZ_HtoD_PSEUDO = 1150,
|
||
|
|
AArch64_SMLALL_VG4_M4Z4Z_BtoS_PSEUDO = 1151,
|
||
|
|
AArch64_SMLALL_VG4_M4Z4Z_HtoD_PSEUDO = 1152,
|
||
|
|
AArch64_SMLALL_VG4_M4ZZI_BtoS_PSEUDO = 1153,
|
||
|
|
AArch64_SMLALL_VG4_M4ZZI_HtoD_PSEUDO = 1154,
|
||
|
|
AArch64_SMLALL_VG4_M4ZZ_BtoS_PSEUDO = 1155,
|
||
|
|
AArch64_SMLALL_VG4_M4ZZ_HtoD_PSEUDO = 1156,
|
||
|
|
AArch64_SMLAL_MZZI_HtoS_PSEUDO = 1157,
|
||
|
|
AArch64_SMLAL_MZZ_HtoS_PSEUDO = 1158,
|
||
|
|
AArch64_SMLAL_VG2_M2Z2Z_HtoS_PSEUDO = 1159,
|
||
|
|
AArch64_SMLAL_VG2_M2ZZI_S_PSEUDO = 1160,
|
||
|
|
AArch64_SMLAL_VG2_M2ZZ_HtoS_PSEUDO = 1161,
|
||
|
|
AArch64_SMLAL_VG4_M4Z4Z_HtoS_PSEUDO = 1162,
|
||
|
|
AArch64_SMLAL_VG4_M4ZZI_HtoS_PSEUDO = 1163,
|
||
|
|
AArch64_SMLAL_VG4_M4ZZ_HtoS_PSEUDO = 1164,
|
||
|
|
AArch64_SMLSLL_MZZI_BtoS_PSEUDO = 1165,
|
||
|
|
AArch64_SMLSLL_MZZI_HtoD_PSEUDO = 1166,
|
||
|
|
AArch64_SMLSLL_MZZ_BtoS_PSEUDO = 1167,
|
||
|
|
AArch64_SMLSLL_MZZ_HtoD_PSEUDO = 1168,
|
||
|
|
AArch64_SMLSLL_VG2_M2Z2Z_BtoS_PSEUDO = 1169,
|
||
|
|
AArch64_SMLSLL_VG2_M2Z2Z_HtoD_PSEUDO = 1170,
|
||
|
|
AArch64_SMLSLL_VG2_M2ZZI_BtoS_PSEUDO = 1171,
|
||
|
|
AArch64_SMLSLL_VG2_M2ZZI_HtoD_PSEUDO = 1172,
|
||
|
|
AArch64_SMLSLL_VG2_M2ZZ_BtoS_PSEUDO = 1173,
|
||
|
|
AArch64_SMLSLL_VG2_M2ZZ_HtoD_PSEUDO = 1174,
|
||
|
|
AArch64_SMLSLL_VG4_M4Z4Z_BtoS_PSEUDO = 1175,
|
||
|
|
AArch64_SMLSLL_VG4_M4Z4Z_HtoD_PSEUDO = 1176,
|
||
|
|
AArch64_SMLSLL_VG4_M4ZZI_BtoS_PSEUDO = 1177,
|
||
|
|
AArch64_SMLSLL_VG4_M4ZZI_HtoD_PSEUDO = 1178,
|
||
|
|
AArch64_SMLSLL_VG4_M4ZZ_BtoS_PSEUDO = 1179,
|
||
|
|
AArch64_SMLSLL_VG4_M4ZZ_HtoD_PSEUDO = 1180,
|
||
|
|
AArch64_SMLSL_MZZI_HtoS_PSEUDO = 1181,
|
||
|
|
AArch64_SMLSL_MZZ_HtoS_PSEUDO = 1182,
|
||
|
|
AArch64_SMLSL_VG2_M2Z2Z_HtoS_PSEUDO = 1183,
|
||
|
|
AArch64_SMLSL_VG2_M2ZZI_S_PSEUDO = 1184,
|
||
|
|
AArch64_SMLSL_VG2_M2ZZ_HtoS_PSEUDO = 1185,
|
||
|
|
AArch64_SMLSL_VG4_M4Z4Z_HtoS_PSEUDO = 1186,
|
||
|
|
AArch64_SMLSL_VG4_M4ZZI_HtoS_PSEUDO = 1187,
|
||
|
|
AArch64_SMLSL_VG4_M4ZZ_HtoS_PSEUDO = 1188,
|
||
|
|
AArch64_SMOPA_MPPZZ_D_PSEUDO = 1189,
|
||
|
|
AArch64_SMOPA_MPPZZ_HtoS_PSEUDO = 1190,
|
||
|
|
AArch64_SMOPA_MPPZZ_S_PSEUDO = 1191,
|
||
|
|
AArch64_SMOPS_MPPZZ_D_PSEUDO = 1192,
|
||
|
|
AArch64_SMOPS_MPPZZ_HtoS_PSEUDO = 1193,
|
||
|
|
AArch64_SMOPS_MPPZZ_S_PSEUDO = 1194,
|
||
|
|
AArch64_SMULH_ZPZZ_B_UNDEF = 1195,
|
||
|
|
AArch64_SMULH_ZPZZ_D_UNDEF = 1196,
|
||
|
|
AArch64_SMULH_ZPZZ_H_UNDEF = 1197,
|
||
|
|
AArch64_SMULH_ZPZZ_S_UNDEF = 1198,
|
||
|
|
AArch64_SPACE = 1199,
|
||
|
|
AArch64_SQABS_ZPmZ_B_UNDEF = 1200,
|
||
|
|
AArch64_SQABS_ZPmZ_D_UNDEF = 1201,
|
||
|
|
AArch64_SQABS_ZPmZ_H_UNDEF = 1202,
|
||
|
|
AArch64_SQABS_ZPmZ_S_UNDEF = 1203,
|
||
|
|
AArch64_SQNEG_ZPmZ_B_UNDEF = 1204,
|
||
|
|
AArch64_SQNEG_ZPmZ_D_UNDEF = 1205,
|
||
|
|
AArch64_SQNEG_ZPmZ_H_UNDEF = 1206,
|
||
|
|
AArch64_SQNEG_ZPmZ_S_UNDEF = 1207,
|
||
|
|
AArch64_SQRSHL_ZPZZ_B_UNDEF = 1208,
|
||
|
|
AArch64_SQRSHL_ZPZZ_D_UNDEF = 1209,
|
||
|
|
AArch64_SQRSHL_ZPZZ_H_UNDEF = 1210,
|
||
|
|
AArch64_SQRSHL_ZPZZ_S_UNDEF = 1211,
|
||
|
|
AArch64_SQSHLU_ZPZI_B_ZERO = 1212,
|
||
|
|
AArch64_SQSHLU_ZPZI_D_ZERO = 1213,
|
||
|
|
AArch64_SQSHLU_ZPZI_H_ZERO = 1214,
|
||
|
|
AArch64_SQSHLU_ZPZI_S_ZERO = 1215,
|
||
|
|
AArch64_SQSHL_ZPZI_B_ZERO = 1216,
|
||
|
|
AArch64_SQSHL_ZPZI_D_ZERO = 1217,
|
||
|
|
AArch64_SQSHL_ZPZI_H_ZERO = 1218,
|
||
|
|
AArch64_SQSHL_ZPZI_S_ZERO = 1219,
|
||
|
|
AArch64_SQSHL_ZPZZ_B_UNDEF = 1220,
|
||
|
|
AArch64_SQSHL_ZPZZ_D_UNDEF = 1221,
|
||
|
|
AArch64_SQSHL_ZPZZ_H_UNDEF = 1222,
|
||
|
|
AArch64_SQSHL_ZPZZ_S_UNDEF = 1223,
|
||
|
|
AArch64_SRSHL_ZPZZ_B_UNDEF = 1224,
|
||
|
|
AArch64_SRSHL_ZPZZ_D_UNDEF = 1225,
|
||
|
|
AArch64_SRSHL_ZPZZ_H_UNDEF = 1226,
|
||
|
|
AArch64_SRSHL_ZPZZ_S_UNDEF = 1227,
|
||
|
|
AArch64_SRSHR_ZPZI_B_ZERO = 1228,
|
||
|
|
AArch64_SRSHR_ZPZI_D_ZERO = 1229,
|
||
|
|
AArch64_SRSHR_ZPZI_H_ZERO = 1230,
|
||
|
|
AArch64_SRSHR_ZPZI_S_ZERO = 1231,
|
||
|
|
AArch64_STGloop = 1232,
|
||
|
|
AArch64_STGloop_wback = 1233,
|
||
|
|
AArch64_STR_PPXI = 1234,
|
||
|
|
AArch64_STR_TX_PSEUDO = 1235,
|
||
|
|
AArch64_STR_ZZXI = 1236,
|
||
|
|
AArch64_STR_ZZZXI = 1237,
|
||
|
|
AArch64_STR_ZZZZXI = 1238,
|
||
|
|
AArch64_STZGloop = 1239,
|
||
|
|
AArch64_STZGloop_wback = 1240,
|
||
|
|
AArch64_SUBR_ZPZZ_B_ZERO = 1241,
|
||
|
|
AArch64_SUBR_ZPZZ_D_ZERO = 1242,
|
||
|
|
AArch64_SUBR_ZPZZ_H_ZERO = 1243,
|
||
|
|
AArch64_SUBR_ZPZZ_S_ZERO = 1244,
|
||
|
|
AArch64_SUBSWrr = 1245,
|
||
|
|
AArch64_SUBSXrr = 1246,
|
||
|
|
AArch64_SUBWrr = 1247,
|
||
|
|
AArch64_SUBXrr = 1248,
|
||
|
|
AArch64_SUB_VG2_M2Z2Z_D_PSEUDO = 1249,
|
||
|
|
AArch64_SUB_VG2_M2Z2Z_S_PSEUDO = 1250,
|
||
|
|
AArch64_SUB_VG2_M2ZZ_D_PSEUDO = 1251,
|
||
|
|
AArch64_SUB_VG2_M2ZZ_S_PSEUDO = 1252,
|
||
|
|
AArch64_SUB_VG2_M2Z_D_PSEUDO = 1253,
|
||
|
|
AArch64_SUB_VG2_M2Z_S_PSEUDO = 1254,
|
||
|
|
AArch64_SUB_VG4_M4Z4Z_D_PSEUDO = 1255,
|
||
|
|
AArch64_SUB_VG4_M4Z4Z_S_PSEUDO = 1256,
|
||
|
|
AArch64_SUB_VG4_M4ZZ_D_PSEUDO = 1257,
|
||
|
|
AArch64_SUB_VG4_M4ZZ_S_PSEUDO = 1258,
|
||
|
|
AArch64_SUB_VG4_M4Z_D_PSEUDO = 1259,
|
||
|
|
AArch64_SUB_VG4_M4Z_S_PSEUDO = 1260,
|
||
|
|
AArch64_SUB_ZPZZ_B_ZERO = 1261,
|
||
|
|
AArch64_SUB_ZPZZ_D_ZERO = 1262,
|
||
|
|
AArch64_SUB_ZPZZ_H_ZERO = 1263,
|
||
|
|
AArch64_SUB_ZPZZ_S_ZERO = 1264,
|
||
|
|
AArch64_SUDOT_VG2_M2ZZI_BToS_PSEUDO = 1265,
|
||
|
|
AArch64_SUDOT_VG2_M2ZZ_BToS_PSEUDO = 1266,
|
||
|
|
AArch64_SUDOT_VG4_M4ZZI_BToS_PSEUDO = 1267,
|
||
|
|
AArch64_SUDOT_VG4_M4ZZ_BToS_PSEUDO = 1268,
|
||
|
|
AArch64_SUMLALL_MZZI_BtoS_PSEUDO = 1269,
|
||
|
|
AArch64_SUMLALL_VG2_M2ZZI_BtoS_PSEUDO = 1270,
|
||
|
|
AArch64_SUMLALL_VG2_M2ZZ_BtoS_PSEUDO = 1271,
|
||
|
|
AArch64_SUMLALL_VG4_M4ZZI_BtoS_PSEUDO = 1272,
|
||
|
|
AArch64_SUMLALL_VG4_M4ZZ_BtoS_PSEUDO = 1273,
|
||
|
|
AArch64_SUMOPA_MPPZZ_D_PSEUDO = 1274,
|
||
|
|
AArch64_SUMOPA_MPPZZ_S_PSEUDO = 1275,
|
||
|
|
AArch64_SUMOPS_MPPZZ_D_PSEUDO = 1276,
|
||
|
|
AArch64_SUMOPS_MPPZZ_S_PSEUDO = 1277,
|
||
|
|
AArch64_SUVDOT_VG4_M4ZZI_BToS_PSEUDO = 1278,
|
||
|
|
AArch64_SVDOT_VG2_M2ZZI_HtoS_PSEUDO = 1279,
|
||
|
|
AArch64_SVDOT_VG4_M4ZZI_BtoS_PSEUDO = 1280,
|
||
|
|
AArch64_SVDOT_VG4_M4ZZI_HtoD_PSEUDO = 1281,
|
||
|
|
AArch64_SXTB_ZPmZ_D_UNDEF = 1282,
|
||
|
|
AArch64_SXTB_ZPmZ_H_UNDEF = 1283,
|
||
|
|
AArch64_SXTB_ZPmZ_S_UNDEF = 1284,
|
||
|
|
AArch64_SXTH_ZPmZ_D_UNDEF = 1285,
|
||
|
|
AArch64_SXTH_ZPmZ_S_UNDEF = 1286,
|
||
|
|
AArch64_SXTW_ZPmZ_D_UNDEF = 1287,
|
||
|
|
AArch64_SpeculationBarrierISBDSBEndBB = 1288,
|
||
|
|
AArch64_SpeculationBarrierSBEndBB = 1289,
|
||
|
|
AArch64_SpeculationSafeValueW = 1290,
|
||
|
|
AArch64_SpeculationSafeValueX = 1291,
|
||
|
|
AArch64_StoreSwiftAsyncContext = 1292,
|
||
|
|
AArch64_TAGPstack = 1293,
|
||
|
|
AArch64_TCRETURNdi = 1294,
|
||
|
|
AArch64_TCRETURNri = 1295,
|
||
|
|
AArch64_TCRETURNriALL = 1296,
|
||
|
|
AArch64_TCRETURNriBTI = 1297,
|
||
|
|
AArch64_TLSDESCCALL = 1298,
|
||
|
|
AArch64_TLSDESC_CALLSEQ = 1299,
|
||
|
|
AArch64_UABD_ZPZZ_B_UNDEF = 1300,
|
||
|
|
AArch64_UABD_ZPZZ_D_UNDEF = 1301,
|
||
|
|
AArch64_UABD_ZPZZ_H_UNDEF = 1302,
|
||
|
|
AArch64_UABD_ZPZZ_S_UNDEF = 1303,
|
||
|
|
AArch64_UCVTF_ZPmZ_DtoD_UNDEF = 1304,
|
||
|
|
AArch64_UCVTF_ZPmZ_DtoH_UNDEF = 1305,
|
||
|
|
AArch64_UCVTF_ZPmZ_DtoS_UNDEF = 1306,
|
||
|
|
AArch64_UCVTF_ZPmZ_HtoH_UNDEF = 1307,
|
||
|
|
AArch64_UCVTF_ZPmZ_StoD_UNDEF = 1308,
|
||
|
|
AArch64_UCVTF_ZPmZ_StoH_UNDEF = 1309,
|
||
|
|
AArch64_UCVTF_ZPmZ_StoS_UNDEF = 1310,
|
||
|
|
AArch64_UDIV_ZPZZ_D_UNDEF = 1311,
|
||
|
|
AArch64_UDIV_ZPZZ_S_UNDEF = 1312,
|
||
|
|
AArch64_UDOT_VG2_M2Z2Z_BtoS_PSEUDO = 1313,
|
||
|
|
AArch64_UDOT_VG2_M2Z2Z_HtoD_PSEUDO = 1314,
|
||
|
|
AArch64_UDOT_VG2_M2Z2Z_HtoS_PSEUDO = 1315,
|
||
|
|
AArch64_UDOT_VG2_M2ZZI_BToS_PSEUDO = 1316,
|
||
|
|
AArch64_UDOT_VG2_M2ZZI_HToS_PSEUDO = 1317,
|
||
|
|
AArch64_UDOT_VG2_M2ZZI_HtoD_PSEUDO = 1318,
|
||
|
|
AArch64_UDOT_VG2_M2ZZ_BtoS_PSEUDO = 1319,
|
||
|
|
AArch64_UDOT_VG2_M2ZZ_HtoD_PSEUDO = 1320,
|
||
|
|
AArch64_UDOT_VG2_M2ZZ_HtoS_PSEUDO = 1321,
|
||
|
|
AArch64_UDOT_VG4_M4Z4Z_BtoS_PSEUDO = 1322,
|
||
|
|
AArch64_UDOT_VG4_M4Z4Z_HtoD_PSEUDO = 1323,
|
||
|
|
AArch64_UDOT_VG4_M4Z4Z_HtoS_PSEUDO = 1324,
|
||
|
|
AArch64_UDOT_VG4_M4ZZI_BtoS_PSEUDO = 1325,
|
||
|
|
AArch64_UDOT_VG4_M4ZZI_HToS_PSEUDO = 1326,
|
||
|
|
AArch64_UDOT_VG4_M4ZZI_HtoD_PSEUDO = 1327,
|
||
|
|
AArch64_UDOT_VG4_M4ZZ_BtoS_PSEUDO = 1328,
|
||
|
|
AArch64_UDOT_VG4_M4ZZ_HtoD_PSEUDO = 1329,
|
||
|
|
AArch64_UDOT_VG4_M4ZZ_HtoS_PSEUDO = 1330,
|
||
|
|
AArch64_UMAX_ZPZZ_B_UNDEF = 1331,
|
||
|
|
AArch64_UMAX_ZPZZ_D_UNDEF = 1332,
|
||
|
|
AArch64_UMAX_ZPZZ_H_UNDEF = 1333,
|
||
|
|
AArch64_UMAX_ZPZZ_S_UNDEF = 1334,
|
||
|
|
AArch64_UMIN_ZPZZ_B_UNDEF = 1335,
|
||
|
|
AArch64_UMIN_ZPZZ_D_UNDEF = 1336,
|
||
|
|
AArch64_UMIN_ZPZZ_H_UNDEF = 1337,
|
||
|
|
AArch64_UMIN_ZPZZ_S_UNDEF = 1338,
|
||
|
|
AArch64_UMLALL_MZZI_BtoS_PSEUDO = 1339,
|
||
|
|
AArch64_UMLALL_MZZI_HtoD_PSEUDO = 1340,
|
||
|
|
AArch64_UMLALL_MZZ_BtoS_PSEUDO = 1341,
|
||
|
|
AArch64_UMLALL_MZZ_HtoD_PSEUDO = 1342,
|
||
|
|
AArch64_UMLALL_VG2_M2Z2Z_BtoS_PSEUDO = 1343,
|
||
|
|
AArch64_UMLALL_VG2_M2Z2Z_HtoD_PSEUDO = 1344,
|
||
|
|
AArch64_UMLALL_VG2_M2ZZI_BtoS_PSEUDO = 1345,
|
||
|
|
AArch64_UMLALL_VG2_M2ZZI_HtoD_PSEUDO = 1346,
|
||
|
|
AArch64_UMLALL_VG2_M2ZZ_BtoS_PSEUDO = 1347,
|
||
|
|
AArch64_UMLALL_VG2_M2ZZ_HtoD_PSEUDO = 1348,
|
||
|
|
AArch64_UMLALL_VG4_M4Z4Z_BtoS_PSEUDO = 1349,
|
||
|
|
AArch64_UMLALL_VG4_M4Z4Z_HtoD_PSEUDO = 1350,
|
||
|
|
AArch64_UMLALL_VG4_M4ZZI_BtoS_PSEUDO = 1351,
|
||
|
|
AArch64_UMLALL_VG4_M4ZZI_HtoD_PSEUDO = 1352,
|
||
|
|
AArch64_UMLALL_VG4_M4ZZ_BtoS_PSEUDO = 1353,
|
||
|
|
AArch64_UMLALL_VG4_M4ZZ_HtoD_PSEUDO = 1354,
|
||
|
|
AArch64_UMLAL_MZZI_HtoS_PSEUDO = 1355,
|
||
|
|
AArch64_UMLAL_MZZ_HtoS_PSEUDO = 1356,
|
||
|
|
AArch64_UMLAL_VG2_M2Z2Z_HtoS_PSEUDO = 1357,
|
||
|
|
AArch64_UMLAL_VG2_M2ZZI_S_PSEUDO = 1358,
|
||
|
|
AArch64_UMLAL_VG2_M2ZZ_HtoS_PSEUDO = 1359,
|
||
|
|
AArch64_UMLAL_VG4_M4Z4Z_HtoS_PSEUDO = 1360,
|
||
|
|
AArch64_UMLAL_VG4_M4ZZI_HtoS_PSEUDO = 1361,
|
||
|
|
AArch64_UMLAL_VG4_M4ZZ_HtoS_PSEUDO = 1362,
|
||
|
|
AArch64_UMLSLL_MZZI_BtoS_PSEUDO = 1363,
|
||
|
|
AArch64_UMLSLL_MZZI_HtoD_PSEUDO = 1364,
|
||
|
|
AArch64_UMLSLL_MZZ_BtoS_PSEUDO = 1365,
|
||
|
|
AArch64_UMLSLL_MZZ_HtoD_PSEUDO = 1366,
|
||
|
|
AArch64_UMLSLL_VG2_M2Z2Z_BtoS_PSEUDO = 1367,
|
||
|
|
AArch64_UMLSLL_VG2_M2Z2Z_HtoD_PSEUDO = 1368,
|
||
|
|
AArch64_UMLSLL_VG2_M2ZZI_BtoS_PSEUDO = 1369,
|
||
|
|
AArch64_UMLSLL_VG2_M2ZZI_HtoD_PSEUDO = 1370,
|
||
|
|
AArch64_UMLSLL_VG2_M2ZZ_BtoS_PSEUDO = 1371,
|
||
|
|
AArch64_UMLSLL_VG2_M2ZZ_HtoD_PSEUDO = 1372,
|
||
|
|
AArch64_UMLSLL_VG4_M4Z4Z_BtoS_PSEUDO = 1373,
|
||
|
|
AArch64_UMLSLL_VG4_M4Z4Z_HtoD_PSEUDO = 1374,
|
||
|
|
AArch64_UMLSLL_VG4_M4ZZI_BtoS_PSEUDO = 1375,
|
||
|
|
AArch64_UMLSLL_VG4_M4ZZI_HtoD_PSEUDO = 1376,
|
||
|
|
AArch64_UMLSLL_VG4_M4ZZ_BtoS_PSEUDO = 1377,
|
||
|
|
AArch64_UMLSLL_VG4_M4ZZ_HtoD_PSEUDO = 1378,
|
||
|
|
AArch64_UMLSL_MZZI_HtoS_PSEUDO = 1379,
|
||
|
|
AArch64_UMLSL_MZZ_HtoS_PSEUDO = 1380,
|
||
|
|
AArch64_UMLSL_VG2_M2Z2Z_HtoS_PSEUDO = 1381,
|
||
|
|
AArch64_UMLSL_VG2_M2ZZI_S_PSEUDO = 1382,
|
||
|
|
AArch64_UMLSL_VG2_M2ZZ_HtoS_PSEUDO = 1383,
|
||
|
|
AArch64_UMLSL_VG4_M4Z4Z_HtoS_PSEUDO = 1384,
|
||
|
|
AArch64_UMLSL_VG4_M4ZZI_HtoS_PSEUDO = 1385,
|
||
|
|
AArch64_UMLSL_VG4_M4ZZ_HtoS_PSEUDO = 1386,
|
||
|
|
AArch64_UMOPA_MPPZZ_D_PSEUDO = 1387,
|
||
|
|
AArch64_UMOPA_MPPZZ_HtoS_PSEUDO = 1388,
|
||
|
|
AArch64_UMOPA_MPPZZ_S_PSEUDO = 1389,
|
||
|
|
AArch64_UMOPS_MPPZZ_D_PSEUDO = 1390,
|
||
|
|
AArch64_UMOPS_MPPZZ_HtoS_PSEUDO = 1391,
|
||
|
|
AArch64_UMOPS_MPPZZ_S_PSEUDO = 1392,
|
||
|
|
AArch64_UMULH_ZPZZ_B_UNDEF = 1393,
|
||
|
|
AArch64_UMULH_ZPZZ_D_UNDEF = 1394,
|
||
|
|
AArch64_UMULH_ZPZZ_H_UNDEF = 1395,
|
||
|
|
AArch64_UMULH_ZPZZ_S_UNDEF = 1396,
|
||
|
|
AArch64_UQRSHL_ZPZZ_B_UNDEF = 1397,
|
||
|
|
AArch64_UQRSHL_ZPZZ_D_UNDEF = 1398,
|
||
|
|
AArch64_UQRSHL_ZPZZ_H_UNDEF = 1399,
|
||
|
|
AArch64_UQRSHL_ZPZZ_S_UNDEF = 1400,
|
||
|
|
AArch64_UQSHL_ZPZI_B_ZERO = 1401,
|
||
|
|
AArch64_UQSHL_ZPZI_D_ZERO = 1402,
|
||
|
|
AArch64_UQSHL_ZPZI_H_ZERO = 1403,
|
||
|
|
AArch64_UQSHL_ZPZI_S_ZERO = 1404,
|
||
|
|
AArch64_UQSHL_ZPZZ_B_UNDEF = 1405,
|
||
|
|
AArch64_UQSHL_ZPZZ_D_UNDEF = 1406,
|
||
|
|
AArch64_UQSHL_ZPZZ_H_UNDEF = 1407,
|
||
|
|
AArch64_UQSHL_ZPZZ_S_UNDEF = 1408,
|
||
|
|
AArch64_URECPE_ZPmZ_S_UNDEF = 1409,
|
||
|
|
AArch64_URSHL_ZPZZ_B_UNDEF = 1410,
|
||
|
|
AArch64_URSHL_ZPZZ_D_UNDEF = 1411,
|
||
|
|
AArch64_URSHL_ZPZZ_H_UNDEF = 1412,
|
||
|
|
AArch64_URSHL_ZPZZ_S_UNDEF = 1413,
|
||
|
|
AArch64_URSHR_ZPZI_B_ZERO = 1414,
|
||
|
|
AArch64_URSHR_ZPZI_D_ZERO = 1415,
|
||
|
|
AArch64_URSHR_ZPZI_H_ZERO = 1416,
|
||
|
|
AArch64_URSHR_ZPZI_S_ZERO = 1417,
|
||
|
|
AArch64_URSQRTE_ZPmZ_S_UNDEF = 1418,
|
||
|
|
AArch64_USDOT_VG2_M2Z2Z_BToS_PSEUDO = 1419,
|
||
|
|
AArch64_USDOT_VG2_M2ZZI_BToS_PSEUDO = 1420,
|
||
|
|
AArch64_USDOT_VG2_M2ZZ_BToS_PSEUDO = 1421,
|
||
|
|
AArch64_USDOT_VG4_M4Z4Z_BToS_PSEUDO = 1422,
|
||
|
|
AArch64_USDOT_VG4_M4ZZI_BToS_PSEUDO = 1423,
|
||
|
|
AArch64_USDOT_VG4_M4ZZ_BToS_PSEUDO = 1424,
|
||
|
|
AArch64_USMLALL_MZZI_BtoS_PSEUDO = 1425,
|
||
|
|
AArch64_USMLALL_MZZ_BtoS_PSEUDO = 1426,
|
||
|
|
AArch64_USMLALL_VG2_M2Z2Z_BtoS_PSEUDO = 1427,
|
||
|
|
AArch64_USMLALL_VG2_M2ZZI_BtoS_PSEUDO = 1428,
|
||
|
|
AArch64_USMLALL_VG2_M2ZZ_BtoS_PSEUDO = 1429,
|
||
|
|
AArch64_USMLALL_VG4_M4Z4Z_BtoS_PSEUDO = 1430,
|
||
|
|
AArch64_USMLALL_VG4_M4ZZI_BtoS_PSEUDO = 1431,
|
||
|
|
AArch64_USMLALL_VG4_M4ZZ_BtoS_PSEUDO = 1432,
|
||
|
|
AArch64_USMOPA_MPPZZ_D_PSEUDO = 1433,
|
||
|
|
AArch64_USMOPA_MPPZZ_S_PSEUDO = 1434,
|
||
|
|
AArch64_USMOPS_MPPZZ_D_PSEUDO = 1435,
|
||
|
|
AArch64_USMOPS_MPPZZ_S_PSEUDO = 1436,
|
||
|
|
AArch64_USVDOT_VG4_M4ZZI_BToS_PSEUDO = 1437,
|
||
|
|
AArch64_UVDOT_VG2_M2ZZI_HtoS_PSEUDO = 1438,
|
||
|
|
AArch64_UVDOT_VG4_M4ZZI_BtoS_PSEUDO = 1439,
|
||
|
|
AArch64_UVDOT_VG4_M4ZZI_HtoD_PSEUDO = 1440,
|
||
|
|
AArch64_UXTB_ZPmZ_D_UNDEF = 1441,
|
||
|
|
AArch64_UXTB_ZPmZ_H_UNDEF = 1442,
|
||
|
|
AArch64_UXTB_ZPmZ_S_UNDEF = 1443,
|
||
|
|
AArch64_UXTH_ZPmZ_D_UNDEF = 1444,
|
||
|
|
AArch64_UXTH_ZPmZ_S_UNDEF = 1445,
|
||
|
|
AArch64_UXTW_ZPmZ_D_UNDEF = 1446,
|
||
|
|
AArch64_ZERO_M_PSEUDO = 1447,
|
||
|
|
AArch64_ZERO_T_PSEUDO = 1448,
|
||
|
|
AArch64_ABSWr = 1449,
|
||
|
|
AArch64_ABSXr = 1450,
|
||
|
|
AArch64_ABS_ZPmZ_B = 1451,
|
||
|
|
AArch64_ABS_ZPmZ_D = 1452,
|
||
|
|
AArch64_ABS_ZPmZ_H = 1453,
|
||
|
|
AArch64_ABS_ZPmZ_S = 1454,
|
||
|
|
AArch64_ABSv16i8 = 1455,
|
||
|
|
AArch64_ABSv1i64 = 1456,
|
||
|
|
AArch64_ABSv2i32 = 1457,
|
||
|
|
AArch64_ABSv2i64 = 1458,
|
||
|
|
AArch64_ABSv4i16 = 1459,
|
||
|
|
AArch64_ABSv4i32 = 1460,
|
||
|
|
AArch64_ABSv8i16 = 1461,
|
||
|
|
AArch64_ABSv8i8 = 1462,
|
||
|
|
AArch64_ADCLB_ZZZ_D = 1463,
|
||
|
|
AArch64_ADCLB_ZZZ_S = 1464,
|
||
|
|
AArch64_ADCLT_ZZZ_D = 1465,
|
||
|
|
AArch64_ADCLT_ZZZ_S = 1466,
|
||
|
|
AArch64_ADCSWr = 1467,
|
||
|
|
AArch64_ADCSXr = 1468,
|
||
|
|
AArch64_ADCWr = 1469,
|
||
|
|
AArch64_ADCXr = 1470,
|
||
|
|
AArch64_ADDG = 1471,
|
||
|
|
AArch64_ADDHA_MPPZ_D = 1472,
|
||
|
|
AArch64_ADDHA_MPPZ_S = 1473,
|
||
|
|
AArch64_ADDHNB_ZZZ_B = 1474,
|
||
|
|
AArch64_ADDHNB_ZZZ_H = 1475,
|
||
|
|
AArch64_ADDHNB_ZZZ_S = 1476,
|
||
|
|
AArch64_ADDHNT_ZZZ_B = 1477,
|
||
|
|
AArch64_ADDHNT_ZZZ_H = 1478,
|
||
|
|
AArch64_ADDHNT_ZZZ_S = 1479,
|
||
|
|
AArch64_ADDHNv2i64_v2i32 = 1480,
|
||
|
|
AArch64_ADDHNv2i64_v4i32 = 1481,
|
||
|
|
AArch64_ADDHNv4i32_v4i16 = 1482,
|
||
|
|
AArch64_ADDHNv4i32_v8i16 = 1483,
|
||
|
|
AArch64_ADDHNv8i16_v16i8 = 1484,
|
||
|
|
AArch64_ADDHNv8i16_v8i8 = 1485,
|
||
|
|
AArch64_ADDPL_XXI = 1486,
|
||
|
|
AArch64_ADDPT_shift = 1487,
|
||
|
|
AArch64_ADDP_ZPmZ_B = 1488,
|
||
|
|
AArch64_ADDP_ZPmZ_D = 1489,
|
||
|
|
AArch64_ADDP_ZPmZ_H = 1490,
|
||
|
|
AArch64_ADDP_ZPmZ_S = 1491,
|
||
|
|
AArch64_ADDPv16i8 = 1492,
|
||
|
|
AArch64_ADDPv2i32 = 1493,
|
||
|
|
AArch64_ADDPv2i64 = 1494,
|
||
|
|
AArch64_ADDPv2i64p = 1495,
|
||
|
|
AArch64_ADDPv4i16 = 1496,
|
||
|
|
AArch64_ADDPv4i32 = 1497,
|
||
|
|
AArch64_ADDPv8i16 = 1498,
|
||
|
|
AArch64_ADDPv8i8 = 1499,
|
||
|
|
AArch64_ADDQV_VPZ_B = 1500,
|
||
|
|
AArch64_ADDQV_VPZ_D = 1501,
|
||
|
|
AArch64_ADDQV_VPZ_H = 1502,
|
||
|
|
AArch64_ADDQV_VPZ_S = 1503,
|
||
|
|
AArch64_ADDSPL_XXI = 1504,
|
||
|
|
AArch64_ADDSVL_XXI = 1505,
|
||
|
|
AArch64_ADDSWri = 1506,
|
||
|
|
AArch64_ADDSWrs = 1507,
|
||
|
|
AArch64_ADDSWrx = 1508,
|
||
|
|
AArch64_ADDSXri = 1509,
|
||
|
|
AArch64_ADDSXrs = 1510,
|
||
|
|
AArch64_ADDSXrx = 1511,
|
||
|
|
AArch64_ADDSXrx64 = 1512,
|
||
|
|
AArch64_ADDVA_MPPZ_D = 1513,
|
||
|
|
AArch64_ADDVA_MPPZ_S = 1514,
|
||
|
|
AArch64_ADDVL_XXI = 1515,
|
||
|
|
AArch64_ADDVv16i8v = 1516,
|
||
|
|
AArch64_ADDVv4i16v = 1517,
|
||
|
|
AArch64_ADDVv4i32v = 1518,
|
||
|
|
AArch64_ADDVv8i16v = 1519,
|
||
|
|
AArch64_ADDVv8i8v = 1520,
|
||
|
|
AArch64_ADDWri = 1521,
|
||
|
|
AArch64_ADDWrs = 1522,
|
||
|
|
AArch64_ADDWrx = 1523,
|
||
|
|
AArch64_ADDXri = 1524,
|
||
|
|
AArch64_ADDXrs = 1525,
|
||
|
|
AArch64_ADDXrx = 1526,
|
||
|
|
AArch64_ADDXrx64 = 1527,
|
||
|
|
AArch64_ADD_VG2_2ZZ_B = 1528,
|
||
|
|
AArch64_ADD_VG2_2ZZ_D = 1529,
|
||
|
|
AArch64_ADD_VG2_2ZZ_H = 1530,
|
||
|
|
AArch64_ADD_VG2_2ZZ_S = 1531,
|
||
|
|
AArch64_ADD_VG2_M2Z2Z_D = 1532,
|
||
|
|
AArch64_ADD_VG2_M2Z2Z_S = 1533,
|
||
|
|
AArch64_ADD_VG2_M2ZZ_D = 1534,
|
||
|
|
AArch64_ADD_VG2_M2ZZ_S = 1535,
|
||
|
|
AArch64_ADD_VG2_M2Z_D = 1536,
|
||
|
|
AArch64_ADD_VG2_M2Z_S = 1537,
|
||
|
|
AArch64_ADD_VG4_4ZZ_B = 1538,
|
||
|
|
AArch64_ADD_VG4_4ZZ_D = 1539,
|
||
|
|
AArch64_ADD_VG4_4ZZ_H = 1540,
|
||
|
|
AArch64_ADD_VG4_4ZZ_S = 1541,
|
||
|
|
AArch64_ADD_VG4_M4Z4Z_D = 1542,
|
||
|
|
AArch64_ADD_VG4_M4Z4Z_S = 1543,
|
||
|
|
AArch64_ADD_VG4_M4ZZ_D = 1544,
|
||
|
|
AArch64_ADD_VG4_M4ZZ_S = 1545,
|
||
|
|
AArch64_ADD_VG4_M4Z_D = 1546,
|
||
|
|
AArch64_ADD_VG4_M4Z_S = 1547,
|
||
|
|
AArch64_ADD_ZI_B = 1548,
|
||
|
|
AArch64_ADD_ZI_D = 1549,
|
||
|
|
AArch64_ADD_ZI_H = 1550,
|
||
|
|
AArch64_ADD_ZI_S = 1551,
|
||
|
|
AArch64_ADD_ZPmZ_B = 1552,
|
||
|
|
AArch64_ADD_ZPmZ_CPA = 1553,
|
||
|
|
AArch64_ADD_ZPmZ_D = 1554,
|
||
|
|
AArch64_ADD_ZPmZ_H = 1555,
|
||
|
|
AArch64_ADD_ZPmZ_S = 1556,
|
||
|
|
AArch64_ADD_ZZZ_B = 1557,
|
||
|
|
AArch64_ADD_ZZZ_CPA = 1558,
|
||
|
|
AArch64_ADD_ZZZ_D = 1559,
|
||
|
|
AArch64_ADD_ZZZ_H = 1560,
|
||
|
|
AArch64_ADD_ZZZ_S = 1561,
|
||
|
|
AArch64_ADDv16i8 = 1562,
|
||
|
|
AArch64_ADDv1i64 = 1563,
|
||
|
|
AArch64_ADDv2i32 = 1564,
|
||
|
|
AArch64_ADDv2i64 = 1565,
|
||
|
|
AArch64_ADDv4i16 = 1566,
|
||
|
|
AArch64_ADDv4i32 = 1567,
|
||
|
|
AArch64_ADDv8i16 = 1568,
|
||
|
|
AArch64_ADDv8i8 = 1569,
|
||
|
|
AArch64_ADR = 1570,
|
||
|
|
AArch64_ADRP = 1571,
|
||
|
|
AArch64_ADR_LSL_ZZZ_D_0 = 1572,
|
||
|
|
AArch64_ADR_LSL_ZZZ_D_1 = 1573,
|
||
|
|
AArch64_ADR_LSL_ZZZ_D_2 = 1574,
|
||
|
|
AArch64_ADR_LSL_ZZZ_D_3 = 1575,
|
||
|
|
AArch64_ADR_LSL_ZZZ_S_0 = 1576,
|
||
|
|
AArch64_ADR_LSL_ZZZ_S_1 = 1577,
|
||
|
|
AArch64_ADR_LSL_ZZZ_S_2 = 1578,
|
||
|
|
AArch64_ADR_LSL_ZZZ_S_3 = 1579,
|
||
|
|
AArch64_ADR_SXTW_ZZZ_D_0 = 1580,
|
||
|
|
AArch64_ADR_SXTW_ZZZ_D_1 = 1581,
|
||
|
|
AArch64_ADR_SXTW_ZZZ_D_2 = 1582,
|
||
|
|
AArch64_ADR_SXTW_ZZZ_D_3 = 1583,
|
||
|
|
AArch64_ADR_UXTW_ZZZ_D_0 = 1584,
|
||
|
|
AArch64_ADR_UXTW_ZZZ_D_1 = 1585,
|
||
|
|
AArch64_ADR_UXTW_ZZZ_D_2 = 1586,
|
||
|
|
AArch64_ADR_UXTW_ZZZ_D_3 = 1587,
|
||
|
|
AArch64_AESD_ZZZ_B = 1588,
|
||
|
|
AArch64_AESDrr = 1589,
|
||
|
|
AArch64_AESE_ZZZ_B = 1590,
|
||
|
|
AArch64_AESErr = 1591,
|
||
|
|
AArch64_AESIMC_ZZ_B = 1592,
|
||
|
|
AArch64_AESIMCrr = 1593,
|
||
|
|
AArch64_AESMC_ZZ_B = 1594,
|
||
|
|
AArch64_AESMCrr = 1595,
|
||
|
|
AArch64_ANDQV_VPZ_B = 1596,
|
||
|
|
AArch64_ANDQV_VPZ_D = 1597,
|
||
|
|
AArch64_ANDQV_VPZ_H = 1598,
|
||
|
|
AArch64_ANDQV_VPZ_S = 1599,
|
||
|
|
AArch64_ANDSWri = 1600,
|
||
|
|
AArch64_ANDSWrs = 1601,
|
||
|
|
AArch64_ANDSXri = 1602,
|
||
|
|
AArch64_ANDSXrs = 1603,
|
||
|
|
AArch64_ANDS_PPzPP = 1604,
|
||
|
|
AArch64_ANDV_VPZ_B = 1605,
|
||
|
|
AArch64_ANDV_VPZ_D = 1606,
|
||
|
|
AArch64_ANDV_VPZ_H = 1607,
|
||
|
|
AArch64_ANDV_VPZ_S = 1608,
|
||
|
|
AArch64_ANDWri = 1609,
|
||
|
|
AArch64_ANDWrs = 1610,
|
||
|
|
AArch64_ANDXri = 1611,
|
||
|
|
AArch64_ANDXrs = 1612,
|
||
|
|
AArch64_AND_PPzPP = 1613,
|
||
|
|
AArch64_AND_ZI = 1614,
|
||
|
|
AArch64_AND_ZPmZ_B = 1615,
|
||
|
|
AArch64_AND_ZPmZ_D = 1616,
|
||
|
|
AArch64_AND_ZPmZ_H = 1617,
|
||
|
|
AArch64_AND_ZPmZ_S = 1618,
|
||
|
|
AArch64_AND_ZZZ = 1619,
|
||
|
|
AArch64_ANDv16i8 = 1620,
|
||
|
|
AArch64_ANDv8i8 = 1621,
|
||
|
|
AArch64_ASRD_ZPmI_B = 1622,
|
||
|
|
AArch64_ASRD_ZPmI_D = 1623,
|
||
|
|
AArch64_ASRD_ZPmI_H = 1624,
|
||
|
|
AArch64_ASRD_ZPmI_S = 1625,
|
||
|
|
AArch64_ASRR_ZPmZ_B = 1626,
|
||
|
|
AArch64_ASRR_ZPmZ_D = 1627,
|
||
|
|
AArch64_ASRR_ZPmZ_H = 1628,
|
||
|
|
AArch64_ASRR_ZPmZ_S = 1629,
|
||
|
|
AArch64_ASRVWr = 1630,
|
||
|
|
AArch64_ASRVXr = 1631,
|
||
|
|
AArch64_ASR_WIDE_ZPmZ_B = 1632,
|
||
|
|
AArch64_ASR_WIDE_ZPmZ_H = 1633,
|
||
|
|
AArch64_ASR_WIDE_ZPmZ_S = 1634,
|
||
|
|
AArch64_ASR_WIDE_ZZZ_B = 1635,
|
||
|
|
AArch64_ASR_WIDE_ZZZ_H = 1636,
|
||
|
|
AArch64_ASR_WIDE_ZZZ_S = 1637,
|
||
|
|
AArch64_ASR_ZPmI_B = 1638,
|
||
|
|
AArch64_ASR_ZPmI_D = 1639,
|
||
|
|
AArch64_ASR_ZPmI_H = 1640,
|
||
|
|
AArch64_ASR_ZPmI_S = 1641,
|
||
|
|
AArch64_ASR_ZPmZ_B = 1642,
|
||
|
|
AArch64_ASR_ZPmZ_D = 1643,
|
||
|
|
AArch64_ASR_ZPmZ_H = 1644,
|
||
|
|
AArch64_ASR_ZPmZ_S = 1645,
|
||
|
|
AArch64_ASR_ZZI_B = 1646,
|
||
|
|
AArch64_ASR_ZZI_D = 1647,
|
||
|
|
AArch64_ASR_ZZI_H = 1648,
|
||
|
|
AArch64_ASR_ZZI_S = 1649,
|
||
|
|
AArch64_AUTDA = 1650,
|
||
|
|
AArch64_AUTDB = 1651,
|
||
|
|
AArch64_AUTDZA = 1652,
|
||
|
|
AArch64_AUTDZB = 1653,
|
||
|
|
AArch64_AUTIA = 1654,
|
||
|
|
AArch64_AUTIA1716 = 1655,
|
||
|
|
AArch64_AUTIA171615 = 1656,
|
||
|
|
AArch64_AUTIASP = 1657,
|
||
|
|
AArch64_AUTIASPPCi = 1658,
|
||
|
|
AArch64_AUTIASPPCr = 1659,
|
||
|
|
AArch64_AUTIAZ = 1660,
|
||
|
|
AArch64_AUTIB = 1661,
|
||
|
|
AArch64_AUTIB1716 = 1662,
|
||
|
|
AArch64_AUTIB171615 = 1663,
|
||
|
|
AArch64_AUTIBSP = 1664,
|
||
|
|
AArch64_AUTIBSPPCi = 1665,
|
||
|
|
AArch64_AUTIBSPPCr = 1666,
|
||
|
|
AArch64_AUTIBZ = 1667,
|
||
|
|
AArch64_AUTIZA = 1668,
|
||
|
|
AArch64_AUTIZB = 1669,
|
||
|
|
AArch64_AXFLAG = 1670,
|
||
|
|
AArch64_B = 1671,
|
||
|
|
AArch64_BCAX = 1672,
|
||
|
|
AArch64_BCAX_ZZZZ = 1673,
|
||
|
|
AArch64_BCcc = 1674,
|
||
|
|
AArch64_BDEP_ZZZ_B = 1675,
|
||
|
|
AArch64_BDEP_ZZZ_D = 1676,
|
||
|
|
AArch64_BDEP_ZZZ_H = 1677,
|
||
|
|
AArch64_BDEP_ZZZ_S = 1678,
|
||
|
|
AArch64_BEXT_ZZZ_B = 1679,
|
||
|
|
AArch64_BEXT_ZZZ_D = 1680,
|
||
|
|
AArch64_BEXT_ZZZ_H = 1681,
|
||
|
|
AArch64_BEXT_ZZZ_S = 1682,
|
||
|
|
AArch64_BF16DOTlanev4bf16 = 1683,
|
||
|
|
AArch64_BF16DOTlanev8bf16 = 1684,
|
||
|
|
AArch64_BF1CVTL2v8f16 = 1685,
|
||
|
|
AArch64_BF1CVTLT_ZZ_BtoH = 1686,
|
||
|
|
AArch64_BF1CVTL_2ZZ_BtoH_NAME = 1687,
|
||
|
|
AArch64_BF1CVTLv8f16 = 1688,
|
||
|
|
AArch64_BF1CVT_2ZZ_BtoH_NAME = 1689,
|
||
|
|
AArch64_BF1CVT_ZZ_BtoH = 1690,
|
||
|
|
AArch64_BF2CVTL2v8f16 = 1691,
|
||
|
|
AArch64_BF2CVTLT_ZZ_BtoH = 1692,
|
||
|
|
AArch64_BF2CVTL_2ZZ_BtoH_NAME = 1693,
|
||
|
|
AArch64_BF2CVTLv8f16 = 1694,
|
||
|
|
AArch64_BF2CVT_2ZZ_BtoH_NAME = 1695,
|
||
|
|
AArch64_BF2CVT_ZZ_BtoH = 1696,
|
||
|
|
AArch64_BFADD_VG2_M2Z_H = 1697,
|
||
|
|
AArch64_BFADD_VG4_M4Z_H = 1698,
|
||
|
|
AArch64_BFADD_ZPmZZ = 1699,
|
||
|
|
AArch64_BFADD_ZZZ = 1700,
|
||
|
|
AArch64_BFCLAMP_VG2_2ZZZ_H = 1701,
|
||
|
|
AArch64_BFCLAMP_VG4_4ZZZ_H = 1702,
|
||
|
|
AArch64_BFCLAMP_ZZZ = 1703,
|
||
|
|
AArch64_BFCVT = 1704,
|
||
|
|
AArch64_BFCVTN = 1705,
|
||
|
|
AArch64_BFCVTN2 = 1706,
|
||
|
|
AArch64_BFCVTNT_ZPmZ = 1707,
|
||
|
|
AArch64_BFCVTN_Z2Z_HtoB = 1708,
|
||
|
|
AArch64_BFCVTN_Z2Z_StoH = 1709,
|
||
|
|
AArch64_BFCVT_Z2Z_HtoB = 1710,
|
||
|
|
AArch64_BFCVT_Z2Z_StoH = 1711,
|
||
|
|
AArch64_BFCVT_ZPmZ = 1712,
|
||
|
|
AArch64_BFDOT_VG2_M2Z2Z_HtoS = 1713,
|
||
|
|
AArch64_BFDOT_VG2_M2ZZI_HtoS = 1714,
|
||
|
|
AArch64_BFDOT_VG2_M2ZZ_HtoS = 1715,
|
||
|
|
AArch64_BFDOT_VG4_M4Z4Z_HtoS = 1716,
|
||
|
|
AArch64_BFDOT_VG4_M4ZZI_HtoS = 1717,
|
||
|
|
AArch64_BFDOT_VG4_M4ZZ_HtoS = 1718,
|
||
|
|
AArch64_BFDOT_ZZI = 1719,
|
||
|
|
AArch64_BFDOT_ZZZ = 1720,
|
||
|
|
AArch64_BFDOTv4bf16 = 1721,
|
||
|
|
AArch64_BFDOTv8bf16 = 1722,
|
||
|
|
AArch64_BFMAXNM_VG2_2Z2Z_H = 1723,
|
||
|
|
AArch64_BFMAXNM_VG2_2ZZ_H = 1724,
|
||
|
|
AArch64_BFMAXNM_VG4_4Z2Z_H = 1725,
|
||
|
|
AArch64_BFMAXNM_VG4_4ZZ_H = 1726,
|
||
|
|
AArch64_BFMAXNM_ZPmZZ = 1727,
|
||
|
|
AArch64_BFMAX_VG2_2Z2Z_H = 1728,
|
||
|
|
AArch64_BFMAX_VG2_2ZZ_H = 1729,
|
||
|
|
AArch64_BFMAX_VG4_4Z2Z_H = 1730,
|
||
|
|
AArch64_BFMAX_VG4_4ZZ_H = 1731,
|
||
|
|
AArch64_BFMAX_ZPmZZ = 1732,
|
||
|
|
AArch64_BFMINNM_VG2_2Z2Z_H = 1733,
|
||
|
|
AArch64_BFMINNM_VG2_2ZZ_H = 1734,
|
||
|
|
AArch64_BFMINNM_VG4_4Z2Z_H = 1735,
|
||
|
|
AArch64_BFMINNM_VG4_4ZZ_H = 1736,
|
||
|
|
AArch64_BFMINNM_ZPmZZ = 1737,
|
||
|
|
AArch64_BFMIN_VG2_2Z2Z_H = 1738,
|
||
|
|
AArch64_BFMIN_VG2_2ZZ_H = 1739,
|
||
|
|
AArch64_BFMIN_VG4_4Z2Z_H = 1740,
|
||
|
|
AArch64_BFMIN_VG4_4ZZ_H = 1741,
|
||
|
|
AArch64_BFMIN_ZPmZZ = 1742,
|
||
|
|
AArch64_BFMLALB = 1743,
|
||
|
|
AArch64_BFMLALBIdx = 1744,
|
||
|
|
AArch64_BFMLALB_ZZZ = 1745,
|
||
|
|
AArch64_BFMLALB_ZZZI = 1746,
|
||
|
|
AArch64_BFMLALT = 1747,
|
||
|
|
AArch64_BFMLALTIdx = 1748,
|
||
|
|
AArch64_BFMLALT_ZZZ = 1749,
|
||
|
|
AArch64_BFMLALT_ZZZI = 1750,
|
||
|
|
AArch64_BFMLAL_MZZI_HtoS = 1751,
|
||
|
|
AArch64_BFMLAL_MZZ_HtoS = 1752,
|
||
|
|
AArch64_BFMLAL_VG2_M2Z2Z_HtoS = 1753,
|
||
|
|
AArch64_BFMLAL_VG2_M2ZZI_HtoS = 1754,
|
||
|
|
AArch64_BFMLAL_VG2_M2ZZ_HtoS = 1755,
|
||
|
|
AArch64_BFMLAL_VG4_M4Z4Z_HtoS = 1756,
|
||
|
|
AArch64_BFMLAL_VG4_M4ZZI_HtoS = 1757,
|
||
|
|
AArch64_BFMLAL_VG4_M4ZZ_HtoS = 1758,
|
||
|
|
AArch64_BFMLA_VG2_M2Z2Z = 1759,
|
||
|
|
AArch64_BFMLA_VG2_M2ZZ = 1760,
|
||
|
|
AArch64_BFMLA_VG2_M2ZZI = 1761,
|
||
|
|
AArch64_BFMLA_VG4_M4Z4Z = 1762,
|
||
|
|
AArch64_BFMLA_VG4_M4ZZ = 1763,
|
||
|
|
AArch64_BFMLA_VG4_M4ZZI = 1764,
|
||
|
|
AArch64_BFMLA_ZPmZZ = 1765,
|
||
|
|
AArch64_BFMLA_ZZZI = 1766,
|
||
|
|
AArch64_BFMLSLB_ZZZI_S = 1767,
|
||
|
|
AArch64_BFMLSLB_ZZZ_S = 1768,
|
||
|
|
AArch64_BFMLSLT_ZZZI_S = 1769,
|
||
|
|
AArch64_BFMLSLT_ZZZ_S = 1770,
|
||
|
|
AArch64_BFMLSL_MZZI_HtoS = 1771,
|
||
|
|
AArch64_BFMLSL_MZZ_HtoS = 1772,
|
||
|
|
AArch64_BFMLSL_VG2_M2Z2Z_HtoS = 1773,
|
||
|
|
AArch64_BFMLSL_VG2_M2ZZI_HtoS = 1774,
|
||
|
|
AArch64_BFMLSL_VG2_M2ZZ_HtoS = 1775,
|
||
|
|
AArch64_BFMLSL_VG4_M4Z4Z_HtoS = 1776,
|
||
|
|
AArch64_BFMLSL_VG4_M4ZZI_HtoS = 1777,
|
||
|
|
AArch64_BFMLSL_VG4_M4ZZ_HtoS = 1778,
|
||
|
|
AArch64_BFMLS_VG2_M2Z2Z = 1779,
|
||
|
|
AArch64_BFMLS_VG2_M2ZZ = 1780,
|
||
|
|
AArch64_BFMLS_VG2_M2ZZI = 1781,
|
||
|
|
AArch64_BFMLS_VG4_M4Z4Z = 1782,
|
||
|
|
AArch64_BFMLS_VG4_M4ZZ = 1783,
|
||
|
|
AArch64_BFMLS_VG4_M4ZZI = 1784,
|
||
|
|
AArch64_BFMLS_ZPmZZ = 1785,
|
||
|
|
AArch64_BFMLS_ZZZI = 1786,
|
||
|
|
AArch64_BFMMLA = 1787,
|
||
|
|
AArch64_BFMMLA_ZZZ = 1788,
|
||
|
|
AArch64_BFMOPA_MPPZZ = 1789,
|
||
|
|
AArch64_BFMOPA_MPPZZ_H = 1790,
|
||
|
|
AArch64_BFMOPS_MPPZZ = 1791,
|
||
|
|
AArch64_BFMOPS_MPPZZ_H = 1792,
|
||
|
|
AArch64_BFMUL_ZPmZZ = 1793,
|
||
|
|
AArch64_BFMUL_ZZZ = 1794,
|
||
|
|
AArch64_BFMUL_ZZZI = 1795,
|
||
|
|
AArch64_BFMWri = 1796,
|
||
|
|
AArch64_BFMXri = 1797,
|
||
|
|
AArch64_BFSUB_VG2_M2Z_H = 1798,
|
||
|
|
AArch64_BFSUB_VG4_M4Z_H = 1799,
|
||
|
|
AArch64_BFSUB_ZPmZZ = 1800,
|
||
|
|
AArch64_BFSUB_ZZZ = 1801,
|
||
|
|
AArch64_BFVDOT_VG2_M2ZZI_HtoS = 1802,
|
||
|
|
AArch64_BGRP_ZZZ_B = 1803,
|
||
|
|
AArch64_BGRP_ZZZ_D = 1804,
|
||
|
|
AArch64_BGRP_ZZZ_H = 1805,
|
||
|
|
AArch64_BGRP_ZZZ_S = 1806,
|
||
|
|
AArch64_BICSWrs = 1807,
|
||
|
|
AArch64_BICSXrs = 1808,
|
||
|
|
AArch64_BICS_PPzPP = 1809,
|
||
|
|
AArch64_BICWrs = 1810,
|
||
|
|
AArch64_BICXrs = 1811,
|
||
|
|
AArch64_BIC_PPzPP = 1812,
|
||
|
|
AArch64_BIC_ZPmZ_B = 1813,
|
||
|
|
AArch64_BIC_ZPmZ_D = 1814,
|
||
|
|
AArch64_BIC_ZPmZ_H = 1815,
|
||
|
|
AArch64_BIC_ZPmZ_S = 1816,
|
||
|
|
AArch64_BIC_ZZZ = 1817,
|
||
|
|
AArch64_BICv16i8 = 1818,
|
||
|
|
AArch64_BICv2i32 = 1819,
|
||
|
|
AArch64_BICv4i16 = 1820,
|
||
|
|
AArch64_BICv4i32 = 1821,
|
||
|
|
AArch64_BICv8i16 = 1822,
|
||
|
|
AArch64_BICv8i8 = 1823,
|
||
|
|
AArch64_BIFv16i8 = 1824,
|
||
|
|
AArch64_BIFv8i8 = 1825,
|
||
|
|
AArch64_BITv16i8 = 1826,
|
||
|
|
AArch64_BITv8i8 = 1827,
|
||
|
|
AArch64_BL = 1828,
|
||
|
|
AArch64_BLR = 1829,
|
||
|
|
AArch64_BLRAA = 1830,
|
||
|
|
AArch64_BLRAAZ = 1831,
|
||
|
|
AArch64_BLRAB = 1832,
|
||
|
|
AArch64_BLRABZ = 1833,
|
||
|
|
AArch64_BMOPA_MPPZZ_S = 1834,
|
||
|
|
AArch64_BMOPS_MPPZZ_S = 1835,
|
||
|
|
AArch64_BR = 1836,
|
||
|
|
AArch64_BRAA = 1837,
|
||
|
|
AArch64_BRAAZ = 1838,
|
||
|
|
AArch64_BRAB = 1839,
|
||
|
|
AArch64_BRABZ = 1840,
|
||
|
|
AArch64_BRB_IALL = 1841,
|
||
|
|
AArch64_BRB_INJ = 1842,
|
||
|
|
AArch64_BRK = 1843,
|
||
|
|
AArch64_BRKAS_PPzP = 1844,
|
||
|
|
AArch64_BRKA_PPmP = 1845,
|
||
|
|
AArch64_BRKA_PPzP = 1846,
|
||
|
|
AArch64_BRKBS_PPzP = 1847,
|
||
|
|
AArch64_BRKB_PPmP = 1848,
|
||
|
|
AArch64_BRKB_PPzP = 1849,
|
||
|
|
AArch64_BRKNS_PPzP = 1850,
|
||
|
|
AArch64_BRKN_PPzP = 1851,
|
||
|
|
AArch64_BRKPAS_PPzPP = 1852,
|
||
|
|
AArch64_BRKPA_PPzPP = 1853,
|
||
|
|
AArch64_BRKPBS_PPzPP = 1854,
|
||
|
|
AArch64_BRKPB_PPzPP = 1855,
|
||
|
|
AArch64_BSL1N_ZZZZ = 1856,
|
||
|
|
AArch64_BSL2N_ZZZZ = 1857,
|
||
|
|
AArch64_BSL_ZZZZ = 1858,
|
||
|
|
AArch64_BSLv16i8 = 1859,
|
||
|
|
AArch64_BSLv8i8 = 1860,
|
||
|
|
AArch64_Bcc = 1861,
|
||
|
|
AArch64_CADD_ZZI_B = 1862,
|
||
|
|
AArch64_CADD_ZZI_D = 1863,
|
||
|
|
AArch64_CADD_ZZI_H = 1864,
|
||
|
|
AArch64_CADD_ZZI_S = 1865,
|
||
|
|
AArch64_CASAB = 1866,
|
||
|
|
AArch64_CASAH = 1867,
|
||
|
|
AArch64_CASALB = 1868,
|
||
|
|
AArch64_CASALH = 1869,
|
||
|
|
AArch64_CASALW = 1870,
|
||
|
|
AArch64_CASALX = 1871,
|
||
|
|
AArch64_CASAW = 1872,
|
||
|
|
AArch64_CASAX = 1873,
|
||
|
|
AArch64_CASB = 1874,
|
||
|
|
AArch64_CASH = 1875,
|
||
|
|
AArch64_CASLB = 1876,
|
||
|
|
AArch64_CASLH = 1877,
|
||
|
|
AArch64_CASLW = 1878,
|
||
|
|
AArch64_CASLX = 1879,
|
||
|
|
AArch64_CASPALW = 1880,
|
||
|
|
AArch64_CASPALX = 1881,
|
||
|
|
AArch64_CASPAW = 1882,
|
||
|
|
AArch64_CASPAX = 1883,
|
||
|
|
AArch64_CASPLW = 1884,
|
||
|
|
AArch64_CASPLX = 1885,
|
||
|
|
AArch64_CASPW = 1886,
|
||
|
|
AArch64_CASPX = 1887,
|
||
|
|
AArch64_CASW = 1888,
|
||
|
|
AArch64_CASX = 1889,
|
||
|
|
AArch64_CBNZW = 1890,
|
||
|
|
AArch64_CBNZX = 1891,
|
||
|
|
AArch64_CBZW = 1892,
|
||
|
|
AArch64_CBZX = 1893,
|
||
|
|
AArch64_CCMNWi = 1894,
|
||
|
|
AArch64_CCMNWr = 1895,
|
||
|
|
AArch64_CCMNXi = 1896,
|
||
|
|
AArch64_CCMNXr = 1897,
|
||
|
|
AArch64_CCMPWi = 1898,
|
||
|
|
AArch64_CCMPWr = 1899,
|
||
|
|
AArch64_CCMPXi = 1900,
|
||
|
|
AArch64_CCMPXr = 1901,
|
||
|
|
AArch64_CDOT_ZZZI_D = 1902,
|
||
|
|
AArch64_CDOT_ZZZI_S = 1903,
|
||
|
|
AArch64_CDOT_ZZZ_D = 1904,
|
||
|
|
AArch64_CDOT_ZZZ_S = 1905,
|
||
|
|
AArch64_CFINV = 1906,
|
||
|
|
AArch64_CHKFEAT = 1907,
|
||
|
|
AArch64_CLASTA_RPZ_B = 1908,
|
||
|
|
AArch64_CLASTA_RPZ_D = 1909,
|
||
|
|
AArch64_CLASTA_RPZ_H = 1910,
|
||
|
|
AArch64_CLASTA_RPZ_S = 1911,
|
||
|
|
AArch64_CLASTA_VPZ_B = 1912,
|
||
|
|
AArch64_CLASTA_VPZ_D = 1913,
|
||
|
|
AArch64_CLASTA_VPZ_H = 1914,
|
||
|
|
AArch64_CLASTA_VPZ_S = 1915,
|
||
|
|
AArch64_CLASTA_ZPZ_B = 1916,
|
||
|
|
AArch64_CLASTA_ZPZ_D = 1917,
|
||
|
|
AArch64_CLASTA_ZPZ_H = 1918,
|
||
|
|
AArch64_CLASTA_ZPZ_S = 1919,
|
||
|
|
AArch64_CLASTB_RPZ_B = 1920,
|
||
|
|
AArch64_CLASTB_RPZ_D = 1921,
|
||
|
|
AArch64_CLASTB_RPZ_H = 1922,
|
||
|
|
AArch64_CLASTB_RPZ_S = 1923,
|
||
|
|
AArch64_CLASTB_VPZ_B = 1924,
|
||
|
|
AArch64_CLASTB_VPZ_D = 1925,
|
||
|
|
AArch64_CLASTB_VPZ_H = 1926,
|
||
|
|
AArch64_CLASTB_VPZ_S = 1927,
|
||
|
|
AArch64_CLASTB_ZPZ_B = 1928,
|
||
|
|
AArch64_CLASTB_ZPZ_D = 1929,
|
||
|
|
AArch64_CLASTB_ZPZ_H = 1930,
|
||
|
|
AArch64_CLASTB_ZPZ_S = 1931,
|
||
|
|
AArch64_CLREX = 1932,
|
||
|
|
AArch64_CLSWr = 1933,
|
||
|
|
AArch64_CLSXr = 1934,
|
||
|
|
AArch64_CLS_ZPmZ_B = 1935,
|
||
|
|
AArch64_CLS_ZPmZ_D = 1936,
|
||
|
|
AArch64_CLS_ZPmZ_H = 1937,
|
||
|
|
AArch64_CLS_ZPmZ_S = 1938,
|
||
|
|
AArch64_CLSv16i8 = 1939,
|
||
|
|
AArch64_CLSv2i32 = 1940,
|
||
|
|
AArch64_CLSv4i16 = 1941,
|
||
|
|
AArch64_CLSv4i32 = 1942,
|
||
|
|
AArch64_CLSv8i16 = 1943,
|
||
|
|
AArch64_CLSv8i8 = 1944,
|
||
|
|
AArch64_CLZWr = 1945,
|
||
|
|
AArch64_CLZXr = 1946,
|
||
|
|
AArch64_CLZ_ZPmZ_B = 1947,
|
||
|
|
AArch64_CLZ_ZPmZ_D = 1948,
|
||
|
|
AArch64_CLZ_ZPmZ_H = 1949,
|
||
|
|
AArch64_CLZ_ZPmZ_S = 1950,
|
||
|
|
AArch64_CLZv16i8 = 1951,
|
||
|
|
AArch64_CLZv2i32 = 1952,
|
||
|
|
AArch64_CLZv4i16 = 1953,
|
||
|
|
AArch64_CLZv4i32 = 1954,
|
||
|
|
AArch64_CLZv8i16 = 1955,
|
||
|
|
AArch64_CLZv8i8 = 1956,
|
||
|
|
AArch64_CMEQv16i8 = 1957,
|
||
|
|
AArch64_CMEQv16i8rz = 1958,
|
||
|
|
AArch64_CMEQv1i64 = 1959,
|
||
|
|
AArch64_CMEQv1i64rz = 1960,
|
||
|
|
AArch64_CMEQv2i32 = 1961,
|
||
|
|
AArch64_CMEQv2i32rz = 1962,
|
||
|
|
AArch64_CMEQv2i64 = 1963,
|
||
|
|
AArch64_CMEQv2i64rz = 1964,
|
||
|
|
AArch64_CMEQv4i16 = 1965,
|
||
|
|
AArch64_CMEQv4i16rz = 1966,
|
||
|
|
AArch64_CMEQv4i32 = 1967,
|
||
|
|
AArch64_CMEQv4i32rz = 1968,
|
||
|
|
AArch64_CMEQv8i16 = 1969,
|
||
|
|
AArch64_CMEQv8i16rz = 1970,
|
||
|
|
AArch64_CMEQv8i8 = 1971,
|
||
|
|
AArch64_CMEQv8i8rz = 1972,
|
||
|
|
AArch64_CMGEv16i8 = 1973,
|
||
|
|
AArch64_CMGEv16i8rz = 1974,
|
||
|
|
AArch64_CMGEv1i64 = 1975,
|
||
|
|
AArch64_CMGEv1i64rz = 1976,
|
||
|
|
AArch64_CMGEv2i32 = 1977,
|
||
|
|
AArch64_CMGEv2i32rz = 1978,
|
||
|
|
AArch64_CMGEv2i64 = 1979,
|
||
|
|
AArch64_CMGEv2i64rz = 1980,
|
||
|
|
AArch64_CMGEv4i16 = 1981,
|
||
|
|
AArch64_CMGEv4i16rz = 1982,
|
||
|
|
AArch64_CMGEv4i32 = 1983,
|
||
|
|
AArch64_CMGEv4i32rz = 1984,
|
||
|
|
AArch64_CMGEv8i16 = 1985,
|
||
|
|
AArch64_CMGEv8i16rz = 1986,
|
||
|
|
AArch64_CMGEv8i8 = 1987,
|
||
|
|
AArch64_CMGEv8i8rz = 1988,
|
||
|
|
AArch64_CMGTv16i8 = 1989,
|
||
|
|
AArch64_CMGTv16i8rz = 1990,
|
||
|
|
AArch64_CMGTv1i64 = 1991,
|
||
|
|
AArch64_CMGTv1i64rz = 1992,
|
||
|
|
AArch64_CMGTv2i32 = 1993,
|
||
|
|
AArch64_CMGTv2i32rz = 1994,
|
||
|
|
AArch64_CMGTv2i64 = 1995,
|
||
|
|
AArch64_CMGTv2i64rz = 1996,
|
||
|
|
AArch64_CMGTv4i16 = 1997,
|
||
|
|
AArch64_CMGTv4i16rz = 1998,
|
||
|
|
AArch64_CMGTv4i32 = 1999,
|
||
|
|
AArch64_CMGTv4i32rz = 2000,
|
||
|
|
AArch64_CMGTv8i16 = 2001,
|
||
|
|
AArch64_CMGTv8i16rz = 2002,
|
||
|
|
AArch64_CMGTv8i8 = 2003,
|
||
|
|
AArch64_CMGTv8i8rz = 2004,
|
||
|
|
AArch64_CMHIv16i8 = 2005,
|
||
|
|
AArch64_CMHIv1i64 = 2006,
|
||
|
|
AArch64_CMHIv2i32 = 2007,
|
||
|
|
AArch64_CMHIv2i64 = 2008,
|
||
|
|
AArch64_CMHIv4i16 = 2009,
|
||
|
|
AArch64_CMHIv4i32 = 2010,
|
||
|
|
AArch64_CMHIv8i16 = 2011,
|
||
|
|
AArch64_CMHIv8i8 = 2012,
|
||
|
|
AArch64_CMHSv16i8 = 2013,
|
||
|
|
AArch64_CMHSv1i64 = 2014,
|
||
|
|
AArch64_CMHSv2i32 = 2015,
|
||
|
|
AArch64_CMHSv2i64 = 2016,
|
||
|
|
AArch64_CMHSv4i16 = 2017,
|
||
|
|
AArch64_CMHSv4i32 = 2018,
|
||
|
|
AArch64_CMHSv8i16 = 2019,
|
||
|
|
AArch64_CMHSv8i8 = 2020,
|
||
|
|
AArch64_CMLA_ZZZI_H = 2021,
|
||
|
|
AArch64_CMLA_ZZZI_S = 2022,
|
||
|
|
AArch64_CMLA_ZZZ_B = 2023,
|
||
|
|
AArch64_CMLA_ZZZ_D = 2024,
|
||
|
|
AArch64_CMLA_ZZZ_H = 2025,
|
||
|
|
AArch64_CMLA_ZZZ_S = 2026,
|
||
|
|
AArch64_CMLEv16i8rz = 2027,
|
||
|
|
AArch64_CMLEv1i64rz = 2028,
|
||
|
|
AArch64_CMLEv2i32rz = 2029,
|
||
|
|
AArch64_CMLEv2i64rz = 2030,
|
||
|
|
AArch64_CMLEv4i16rz = 2031,
|
||
|
|
AArch64_CMLEv4i32rz = 2032,
|
||
|
|
AArch64_CMLEv8i16rz = 2033,
|
||
|
|
AArch64_CMLEv8i8rz = 2034,
|
||
|
|
AArch64_CMLTv16i8rz = 2035,
|
||
|
|
AArch64_CMLTv1i64rz = 2036,
|
||
|
|
AArch64_CMLTv2i32rz = 2037,
|
||
|
|
AArch64_CMLTv2i64rz = 2038,
|
||
|
|
AArch64_CMLTv4i16rz = 2039,
|
||
|
|
AArch64_CMLTv4i32rz = 2040,
|
||
|
|
AArch64_CMLTv8i16rz = 2041,
|
||
|
|
AArch64_CMLTv8i8rz = 2042,
|
||
|
|
AArch64_CMPEQ_PPzZI_B = 2043,
|
||
|
|
AArch64_CMPEQ_PPzZI_D = 2044,
|
||
|
|
AArch64_CMPEQ_PPzZI_H = 2045,
|
||
|
|
AArch64_CMPEQ_PPzZI_S = 2046,
|
||
|
|
AArch64_CMPEQ_PPzZZ_B = 2047,
|
||
|
|
AArch64_CMPEQ_PPzZZ_D = 2048,
|
||
|
|
AArch64_CMPEQ_PPzZZ_H = 2049,
|
||
|
|
AArch64_CMPEQ_PPzZZ_S = 2050,
|
||
|
|
AArch64_CMPEQ_WIDE_PPzZZ_B = 2051,
|
||
|
|
AArch64_CMPEQ_WIDE_PPzZZ_H = 2052,
|
||
|
|
AArch64_CMPEQ_WIDE_PPzZZ_S = 2053,
|
||
|
|
AArch64_CMPGE_PPzZI_B = 2054,
|
||
|
|
AArch64_CMPGE_PPzZI_D = 2055,
|
||
|
|
AArch64_CMPGE_PPzZI_H = 2056,
|
||
|
|
AArch64_CMPGE_PPzZI_S = 2057,
|
||
|
|
AArch64_CMPGE_PPzZZ_B = 2058,
|
||
|
|
AArch64_CMPGE_PPzZZ_D = 2059,
|
||
|
|
AArch64_CMPGE_PPzZZ_H = 2060,
|
||
|
|
AArch64_CMPGE_PPzZZ_S = 2061,
|
||
|
|
AArch64_CMPGE_WIDE_PPzZZ_B = 2062,
|
||
|
|
AArch64_CMPGE_WIDE_PPzZZ_H = 2063,
|
||
|
|
AArch64_CMPGE_WIDE_PPzZZ_S = 2064,
|
||
|
|
AArch64_CMPGT_PPzZI_B = 2065,
|
||
|
|
AArch64_CMPGT_PPzZI_D = 2066,
|
||
|
|
AArch64_CMPGT_PPzZI_H = 2067,
|
||
|
|
AArch64_CMPGT_PPzZI_S = 2068,
|
||
|
|
AArch64_CMPGT_PPzZZ_B = 2069,
|
||
|
|
AArch64_CMPGT_PPzZZ_D = 2070,
|
||
|
|
AArch64_CMPGT_PPzZZ_H = 2071,
|
||
|
|
AArch64_CMPGT_PPzZZ_S = 2072,
|
||
|
|
AArch64_CMPGT_WIDE_PPzZZ_B = 2073,
|
||
|
|
AArch64_CMPGT_WIDE_PPzZZ_H = 2074,
|
||
|
|
AArch64_CMPGT_WIDE_PPzZZ_S = 2075,
|
||
|
|
AArch64_CMPHI_PPzZI_B = 2076,
|
||
|
|
AArch64_CMPHI_PPzZI_D = 2077,
|
||
|
|
AArch64_CMPHI_PPzZI_H = 2078,
|
||
|
|
AArch64_CMPHI_PPzZI_S = 2079,
|
||
|
|
AArch64_CMPHI_PPzZZ_B = 2080,
|
||
|
|
AArch64_CMPHI_PPzZZ_D = 2081,
|
||
|
|
AArch64_CMPHI_PPzZZ_H = 2082,
|
||
|
|
AArch64_CMPHI_PPzZZ_S = 2083,
|
||
|
|
AArch64_CMPHI_WIDE_PPzZZ_B = 2084,
|
||
|
|
AArch64_CMPHI_WIDE_PPzZZ_H = 2085,
|
||
|
|
AArch64_CMPHI_WIDE_PPzZZ_S = 2086,
|
||
|
|
AArch64_CMPHS_PPzZI_B = 2087,
|
||
|
|
AArch64_CMPHS_PPzZI_D = 2088,
|
||
|
|
AArch64_CMPHS_PPzZI_H = 2089,
|
||
|
|
AArch64_CMPHS_PPzZI_S = 2090,
|
||
|
|
AArch64_CMPHS_PPzZZ_B = 2091,
|
||
|
|
AArch64_CMPHS_PPzZZ_D = 2092,
|
||
|
|
AArch64_CMPHS_PPzZZ_H = 2093,
|
||
|
|
AArch64_CMPHS_PPzZZ_S = 2094,
|
||
|
|
AArch64_CMPHS_WIDE_PPzZZ_B = 2095,
|
||
|
|
AArch64_CMPHS_WIDE_PPzZZ_H = 2096,
|
||
|
|
AArch64_CMPHS_WIDE_PPzZZ_S = 2097,
|
||
|
|
AArch64_CMPLE_PPzZI_B = 2098,
|
||
|
|
AArch64_CMPLE_PPzZI_D = 2099,
|
||
|
|
AArch64_CMPLE_PPzZI_H = 2100,
|
||
|
|
AArch64_CMPLE_PPzZI_S = 2101,
|
||
|
|
AArch64_CMPLE_WIDE_PPzZZ_B = 2102,
|
||
|
|
AArch64_CMPLE_WIDE_PPzZZ_H = 2103,
|
||
|
|
AArch64_CMPLE_WIDE_PPzZZ_S = 2104,
|
||
|
|
AArch64_CMPLO_PPzZI_B = 2105,
|
||
|
|
AArch64_CMPLO_PPzZI_D = 2106,
|
||
|
|
AArch64_CMPLO_PPzZI_H = 2107,
|
||
|
|
AArch64_CMPLO_PPzZI_S = 2108,
|
||
|
|
AArch64_CMPLO_WIDE_PPzZZ_B = 2109,
|
||
|
|
AArch64_CMPLO_WIDE_PPzZZ_H = 2110,
|
||
|
|
AArch64_CMPLO_WIDE_PPzZZ_S = 2111,
|
||
|
|
AArch64_CMPLS_PPzZI_B = 2112,
|
||
|
|
AArch64_CMPLS_PPzZI_D = 2113,
|
||
|
|
AArch64_CMPLS_PPzZI_H = 2114,
|
||
|
|
AArch64_CMPLS_PPzZI_S = 2115,
|
||
|
|
AArch64_CMPLS_WIDE_PPzZZ_B = 2116,
|
||
|
|
AArch64_CMPLS_WIDE_PPzZZ_H = 2117,
|
||
|
|
AArch64_CMPLS_WIDE_PPzZZ_S = 2118,
|
||
|
|
AArch64_CMPLT_PPzZI_B = 2119,
|
||
|
|
AArch64_CMPLT_PPzZI_D = 2120,
|
||
|
|
AArch64_CMPLT_PPzZI_H = 2121,
|
||
|
|
AArch64_CMPLT_PPzZI_S = 2122,
|
||
|
|
AArch64_CMPLT_WIDE_PPzZZ_B = 2123,
|
||
|
|
AArch64_CMPLT_WIDE_PPzZZ_H = 2124,
|
||
|
|
AArch64_CMPLT_WIDE_PPzZZ_S = 2125,
|
||
|
|
AArch64_CMPNE_PPzZI_B = 2126,
|
||
|
|
AArch64_CMPNE_PPzZI_D = 2127,
|
||
|
|
AArch64_CMPNE_PPzZI_H = 2128,
|
||
|
|
AArch64_CMPNE_PPzZI_S = 2129,
|
||
|
|
AArch64_CMPNE_PPzZZ_B = 2130,
|
||
|
|
AArch64_CMPNE_PPzZZ_D = 2131,
|
||
|
|
AArch64_CMPNE_PPzZZ_H = 2132,
|
||
|
|
AArch64_CMPNE_PPzZZ_S = 2133,
|
||
|
|
AArch64_CMPNE_WIDE_PPzZZ_B = 2134,
|
||
|
|
AArch64_CMPNE_WIDE_PPzZZ_H = 2135,
|
||
|
|
AArch64_CMPNE_WIDE_PPzZZ_S = 2136,
|
||
|
|
AArch64_CMTSTv16i8 = 2137,
|
||
|
|
AArch64_CMTSTv1i64 = 2138,
|
||
|
|
AArch64_CMTSTv2i32 = 2139,
|
||
|
|
AArch64_CMTSTv2i64 = 2140,
|
||
|
|
AArch64_CMTSTv4i16 = 2141,
|
||
|
|
AArch64_CMTSTv4i32 = 2142,
|
||
|
|
AArch64_CMTSTv8i16 = 2143,
|
||
|
|
AArch64_CMTSTv8i8 = 2144,
|
||
|
|
AArch64_CNOT_ZPmZ_B = 2145,
|
||
|
|
AArch64_CNOT_ZPmZ_D = 2146,
|
||
|
|
AArch64_CNOT_ZPmZ_H = 2147,
|
||
|
|
AArch64_CNOT_ZPmZ_S = 2148,
|
||
|
|
AArch64_CNTB_XPiI = 2149,
|
||
|
|
AArch64_CNTD_XPiI = 2150,
|
||
|
|
AArch64_CNTH_XPiI = 2151,
|
||
|
|
AArch64_CNTP_XCI_B = 2152,
|
||
|
|
AArch64_CNTP_XCI_D = 2153,
|
||
|
|
AArch64_CNTP_XCI_H = 2154,
|
||
|
|
AArch64_CNTP_XCI_S = 2155,
|
||
|
|
AArch64_CNTP_XPP_B = 2156,
|
||
|
|
AArch64_CNTP_XPP_D = 2157,
|
||
|
|
AArch64_CNTP_XPP_H = 2158,
|
||
|
|
AArch64_CNTP_XPP_S = 2159,
|
||
|
|
AArch64_CNTW_XPiI = 2160,
|
||
|
|
AArch64_CNTWr = 2161,
|
||
|
|
AArch64_CNTXr = 2162,
|
||
|
|
AArch64_CNT_ZPmZ_B = 2163,
|
||
|
|
AArch64_CNT_ZPmZ_D = 2164,
|
||
|
|
AArch64_CNT_ZPmZ_H = 2165,
|
||
|
|
AArch64_CNT_ZPmZ_S = 2166,
|
||
|
|
AArch64_CNTv16i8 = 2167,
|
||
|
|
AArch64_CNTv8i8 = 2168,
|
||
|
|
AArch64_COMPACT_ZPZ_D = 2169,
|
||
|
|
AArch64_COMPACT_ZPZ_S = 2170,
|
||
|
|
AArch64_CPYE = 2171,
|
||
|
|
AArch64_CPYEN = 2172,
|
||
|
|
AArch64_CPYERN = 2173,
|
||
|
|
AArch64_CPYERT = 2174,
|
||
|
|
AArch64_CPYERTN = 2175,
|
||
|
|
AArch64_CPYERTRN = 2176,
|
||
|
|
AArch64_CPYERTWN = 2177,
|
||
|
|
AArch64_CPYET = 2178,
|
||
|
|
AArch64_CPYETN = 2179,
|
||
|
|
AArch64_CPYETRN = 2180,
|
||
|
|
AArch64_CPYETWN = 2181,
|
||
|
|
AArch64_CPYEWN = 2182,
|
||
|
|
AArch64_CPYEWT = 2183,
|
||
|
|
AArch64_CPYEWTN = 2184,
|
||
|
|
AArch64_CPYEWTRN = 2185,
|
||
|
|
AArch64_CPYEWTWN = 2186,
|
||
|
|
AArch64_CPYFE = 2187,
|
||
|
|
AArch64_CPYFEN = 2188,
|
||
|
|
AArch64_CPYFERN = 2189,
|
||
|
|
AArch64_CPYFERT = 2190,
|
||
|
|
AArch64_CPYFERTN = 2191,
|
||
|
|
AArch64_CPYFERTRN = 2192,
|
||
|
|
AArch64_CPYFERTWN = 2193,
|
||
|
|
AArch64_CPYFET = 2194,
|
||
|
|
AArch64_CPYFETN = 2195,
|
||
|
|
AArch64_CPYFETRN = 2196,
|
||
|
|
AArch64_CPYFETWN = 2197,
|
||
|
|
AArch64_CPYFEWN = 2198,
|
||
|
|
AArch64_CPYFEWT = 2199,
|
||
|
|
AArch64_CPYFEWTN = 2200,
|
||
|
|
AArch64_CPYFEWTRN = 2201,
|
||
|
|
AArch64_CPYFEWTWN = 2202,
|
||
|
|
AArch64_CPYFM = 2203,
|
||
|
|
AArch64_CPYFMN = 2204,
|
||
|
|
AArch64_CPYFMRN = 2205,
|
||
|
|
AArch64_CPYFMRT = 2206,
|
||
|
|
AArch64_CPYFMRTN = 2207,
|
||
|
|
AArch64_CPYFMRTRN = 2208,
|
||
|
|
AArch64_CPYFMRTWN = 2209,
|
||
|
|
AArch64_CPYFMT = 2210,
|
||
|
|
AArch64_CPYFMTN = 2211,
|
||
|
|
AArch64_CPYFMTRN = 2212,
|
||
|
|
AArch64_CPYFMTWN = 2213,
|
||
|
|
AArch64_CPYFMWN = 2214,
|
||
|
|
AArch64_CPYFMWT = 2215,
|
||
|
|
AArch64_CPYFMWTN = 2216,
|
||
|
|
AArch64_CPYFMWTRN = 2217,
|
||
|
|
AArch64_CPYFMWTWN = 2218,
|
||
|
|
AArch64_CPYFP = 2219,
|
||
|
|
AArch64_CPYFPN = 2220,
|
||
|
|
AArch64_CPYFPRN = 2221,
|
||
|
|
AArch64_CPYFPRT = 2222,
|
||
|
|
AArch64_CPYFPRTN = 2223,
|
||
|
|
AArch64_CPYFPRTRN = 2224,
|
||
|
|
AArch64_CPYFPRTWN = 2225,
|
||
|
|
AArch64_CPYFPT = 2226,
|
||
|
|
AArch64_CPYFPTN = 2227,
|
||
|
|
AArch64_CPYFPTRN = 2228,
|
||
|
|
AArch64_CPYFPTWN = 2229,
|
||
|
|
AArch64_CPYFPWN = 2230,
|
||
|
|
AArch64_CPYFPWT = 2231,
|
||
|
|
AArch64_CPYFPWTN = 2232,
|
||
|
|
AArch64_CPYFPWTRN = 2233,
|
||
|
|
AArch64_CPYFPWTWN = 2234,
|
||
|
|
AArch64_CPYM = 2235,
|
||
|
|
AArch64_CPYMN = 2236,
|
||
|
|
AArch64_CPYMRN = 2237,
|
||
|
|
AArch64_CPYMRT = 2238,
|
||
|
|
AArch64_CPYMRTN = 2239,
|
||
|
|
AArch64_CPYMRTRN = 2240,
|
||
|
|
AArch64_CPYMRTWN = 2241,
|
||
|
|
AArch64_CPYMT = 2242,
|
||
|
|
AArch64_CPYMTN = 2243,
|
||
|
|
AArch64_CPYMTRN = 2244,
|
||
|
|
AArch64_CPYMTWN = 2245,
|
||
|
|
AArch64_CPYMWN = 2246,
|
||
|
|
AArch64_CPYMWT = 2247,
|
||
|
|
AArch64_CPYMWTN = 2248,
|
||
|
|
AArch64_CPYMWTRN = 2249,
|
||
|
|
AArch64_CPYMWTWN = 2250,
|
||
|
|
AArch64_CPYP = 2251,
|
||
|
|
AArch64_CPYPN = 2252,
|
||
|
|
AArch64_CPYPRN = 2253,
|
||
|
|
AArch64_CPYPRT = 2254,
|
||
|
|
AArch64_CPYPRTN = 2255,
|
||
|
|
AArch64_CPYPRTRN = 2256,
|
||
|
|
AArch64_CPYPRTWN = 2257,
|
||
|
|
AArch64_CPYPT = 2258,
|
||
|
|
AArch64_CPYPTN = 2259,
|
||
|
|
AArch64_CPYPTRN = 2260,
|
||
|
|
AArch64_CPYPTWN = 2261,
|
||
|
|
AArch64_CPYPWN = 2262,
|
||
|
|
AArch64_CPYPWT = 2263,
|
||
|
|
AArch64_CPYPWTN = 2264,
|
||
|
|
AArch64_CPYPWTRN = 2265,
|
||
|
|
AArch64_CPYPWTWN = 2266,
|
||
|
|
AArch64_CPY_ZPmI_B = 2267,
|
||
|
|
AArch64_CPY_ZPmI_D = 2268,
|
||
|
|
AArch64_CPY_ZPmI_H = 2269,
|
||
|
|
AArch64_CPY_ZPmI_S = 2270,
|
||
|
|
AArch64_CPY_ZPmR_B = 2271,
|
||
|
|
AArch64_CPY_ZPmR_D = 2272,
|
||
|
|
AArch64_CPY_ZPmR_H = 2273,
|
||
|
|
AArch64_CPY_ZPmR_S = 2274,
|
||
|
|
AArch64_CPY_ZPmV_B = 2275,
|
||
|
|
AArch64_CPY_ZPmV_D = 2276,
|
||
|
|
AArch64_CPY_ZPmV_H = 2277,
|
||
|
|
AArch64_CPY_ZPmV_S = 2278,
|
||
|
|
AArch64_CPY_ZPzI_B = 2279,
|
||
|
|
AArch64_CPY_ZPzI_D = 2280,
|
||
|
|
AArch64_CPY_ZPzI_H = 2281,
|
||
|
|
AArch64_CPY_ZPzI_S = 2282,
|
||
|
|
AArch64_CRC32Brr = 2283,
|
||
|
|
AArch64_CRC32CBrr = 2284,
|
||
|
|
AArch64_CRC32CHrr = 2285,
|
||
|
|
AArch64_CRC32CWrr = 2286,
|
||
|
|
AArch64_CRC32CXrr = 2287,
|
||
|
|
AArch64_CRC32Hrr = 2288,
|
||
|
|
AArch64_CRC32Wrr = 2289,
|
||
|
|
AArch64_CRC32Xrr = 2290,
|
||
|
|
AArch64_CSELWr = 2291,
|
||
|
|
AArch64_CSELXr = 2292,
|
||
|
|
AArch64_CSINCWr = 2293,
|
||
|
|
AArch64_CSINCXr = 2294,
|
||
|
|
AArch64_CSINVWr = 2295,
|
||
|
|
AArch64_CSINVXr = 2296,
|
||
|
|
AArch64_CSNEGWr = 2297,
|
||
|
|
AArch64_CSNEGXr = 2298,
|
||
|
|
AArch64_CTERMEQ_WW = 2299,
|
||
|
|
AArch64_CTERMEQ_XX = 2300,
|
||
|
|
AArch64_CTERMNE_WW = 2301,
|
||
|
|
AArch64_CTERMNE_XX = 2302,
|
||
|
|
AArch64_CTZWr = 2303,
|
||
|
|
AArch64_CTZXr = 2304,
|
||
|
|
AArch64_DCPS1 = 2305,
|
||
|
|
AArch64_DCPS2 = 2306,
|
||
|
|
AArch64_DCPS3 = 2307,
|
||
|
|
AArch64_DECB_XPiI = 2308,
|
||
|
|
AArch64_DECD_XPiI = 2309,
|
||
|
|
AArch64_DECD_ZPiI = 2310,
|
||
|
|
AArch64_DECH_XPiI = 2311,
|
||
|
|
AArch64_DECH_ZPiI = 2312,
|
||
|
|
AArch64_DECP_XP_B = 2313,
|
||
|
|
AArch64_DECP_XP_D = 2314,
|
||
|
|
AArch64_DECP_XP_H = 2315,
|
||
|
|
AArch64_DECP_XP_S = 2316,
|
||
|
|
AArch64_DECP_ZP_D = 2317,
|
||
|
|
AArch64_DECP_ZP_H = 2318,
|
||
|
|
AArch64_DECP_ZP_S = 2319,
|
||
|
|
AArch64_DECW_XPiI = 2320,
|
||
|
|
AArch64_DECW_ZPiI = 2321,
|
||
|
|
AArch64_DMB = 2322,
|
||
|
|
AArch64_DRPS = 2323,
|
||
|
|
AArch64_DSB = 2324,
|
||
|
|
AArch64_DSBnXS = 2325,
|
||
|
|
AArch64_DUPM_ZI = 2326,
|
||
|
|
AArch64_DUPQ_ZZI_B = 2327,
|
||
|
|
AArch64_DUPQ_ZZI_D = 2328,
|
||
|
|
AArch64_DUPQ_ZZI_H = 2329,
|
||
|
|
AArch64_DUPQ_ZZI_S = 2330,
|
||
|
|
AArch64_DUP_ZI_B = 2331,
|
||
|
|
AArch64_DUP_ZI_D = 2332,
|
||
|
|
AArch64_DUP_ZI_H = 2333,
|
||
|
|
AArch64_DUP_ZI_S = 2334,
|
||
|
|
AArch64_DUP_ZR_B = 2335,
|
||
|
|
AArch64_DUP_ZR_D = 2336,
|
||
|
|
AArch64_DUP_ZR_H = 2337,
|
||
|
|
AArch64_DUP_ZR_S = 2338,
|
||
|
|
AArch64_DUP_ZZI_B = 2339,
|
||
|
|
AArch64_DUP_ZZI_D = 2340,
|
||
|
|
AArch64_DUP_ZZI_H = 2341,
|
||
|
|
AArch64_DUP_ZZI_Q = 2342,
|
||
|
|
AArch64_DUP_ZZI_S = 2343,
|
||
|
|
AArch64_DUPi16 = 2344,
|
||
|
|
AArch64_DUPi32 = 2345,
|
||
|
|
AArch64_DUPi64 = 2346,
|
||
|
|
AArch64_DUPi8 = 2347,
|
||
|
|
AArch64_DUPv16i8gpr = 2348,
|
||
|
|
AArch64_DUPv16i8lane = 2349,
|
||
|
|
AArch64_DUPv2i32gpr = 2350,
|
||
|
|
AArch64_DUPv2i32lane = 2351,
|
||
|
|
AArch64_DUPv2i64gpr = 2352,
|
||
|
|
AArch64_DUPv2i64lane = 2353,
|
||
|
|
AArch64_DUPv4i16gpr = 2354,
|
||
|
|
AArch64_DUPv4i16lane = 2355,
|
||
|
|
AArch64_DUPv4i32gpr = 2356,
|
||
|
|
AArch64_DUPv4i32lane = 2357,
|
||
|
|
AArch64_DUPv8i16gpr = 2358,
|
||
|
|
AArch64_DUPv8i16lane = 2359,
|
||
|
|
AArch64_DUPv8i8gpr = 2360,
|
||
|
|
AArch64_DUPv8i8lane = 2361,
|
||
|
|
AArch64_EONWrs = 2362,
|
||
|
|
AArch64_EONXrs = 2363,
|
||
|
|
AArch64_EOR3 = 2364,
|
||
|
|
AArch64_EOR3_ZZZZ = 2365,
|
||
|
|
AArch64_EORBT_ZZZ_B = 2366,
|
||
|
|
AArch64_EORBT_ZZZ_D = 2367,
|
||
|
|
AArch64_EORBT_ZZZ_H = 2368,
|
||
|
|
AArch64_EORBT_ZZZ_S = 2369,
|
||
|
|
AArch64_EORQV_VPZ_B = 2370,
|
||
|
|
AArch64_EORQV_VPZ_D = 2371,
|
||
|
|
AArch64_EORQV_VPZ_H = 2372,
|
||
|
|
AArch64_EORQV_VPZ_S = 2373,
|
||
|
|
AArch64_EORS_PPzPP = 2374,
|
||
|
|
AArch64_EORTB_ZZZ_B = 2375,
|
||
|
|
AArch64_EORTB_ZZZ_D = 2376,
|
||
|
|
AArch64_EORTB_ZZZ_H = 2377,
|
||
|
|
AArch64_EORTB_ZZZ_S = 2378,
|
||
|
|
AArch64_EORV_VPZ_B = 2379,
|
||
|
|
AArch64_EORV_VPZ_D = 2380,
|
||
|
|
AArch64_EORV_VPZ_H = 2381,
|
||
|
|
AArch64_EORV_VPZ_S = 2382,
|
||
|
|
AArch64_EORWri = 2383,
|
||
|
|
AArch64_EORWrs = 2384,
|
||
|
|
AArch64_EORXri = 2385,
|
||
|
|
AArch64_EORXrs = 2386,
|
||
|
|
AArch64_EOR_PPzPP = 2387,
|
||
|
|
AArch64_EOR_ZI = 2388,
|
||
|
|
AArch64_EOR_ZPmZ_B = 2389,
|
||
|
|
AArch64_EOR_ZPmZ_D = 2390,
|
||
|
|
AArch64_EOR_ZPmZ_H = 2391,
|
||
|
|
AArch64_EOR_ZPmZ_S = 2392,
|
||
|
|
AArch64_EOR_ZZZ = 2393,
|
||
|
|
AArch64_EORv16i8 = 2394,
|
||
|
|
AArch64_EORv8i8 = 2395,
|
||
|
|
AArch64_ERET = 2396,
|
||
|
|
AArch64_ERETAA = 2397,
|
||
|
|
AArch64_ERETAB = 2398,
|
||
|
|
AArch64_EXTQ_ZZI = 2399,
|
||
|
|
AArch64_EXTRACT_ZPMXI_H_B = 2400,
|
||
|
|
AArch64_EXTRACT_ZPMXI_H_D = 2401,
|
||
|
|
AArch64_EXTRACT_ZPMXI_H_H = 2402,
|
||
|
|
AArch64_EXTRACT_ZPMXI_H_Q = 2403,
|
||
|
|
AArch64_EXTRACT_ZPMXI_H_S = 2404,
|
||
|
|
AArch64_EXTRACT_ZPMXI_V_B = 2405,
|
||
|
|
AArch64_EXTRACT_ZPMXI_V_D = 2406,
|
||
|
|
AArch64_EXTRACT_ZPMXI_V_H = 2407,
|
||
|
|
AArch64_EXTRACT_ZPMXI_V_Q = 2408,
|
||
|
|
AArch64_EXTRACT_ZPMXI_V_S = 2409,
|
||
|
|
AArch64_EXTRWrri = 2410,
|
||
|
|
AArch64_EXTRXrri = 2411,
|
||
|
|
AArch64_EXT_ZZI = 2412,
|
||
|
|
AArch64_EXT_ZZI_B = 2413,
|
||
|
|
AArch64_EXTv16i8 = 2414,
|
||
|
|
AArch64_EXTv8i8 = 2415,
|
||
|
|
AArch64_F1CVTL2v8f16 = 2416,
|
||
|
|
AArch64_F1CVTLT_ZZ_BtoH = 2417,
|
||
|
|
AArch64_F1CVTL_2ZZ_BtoH_NAME = 2418,
|
||
|
|
AArch64_F1CVTLv8f16 = 2419,
|
||
|
|
AArch64_F1CVT_2ZZ_BtoH_NAME = 2420,
|
||
|
|
AArch64_F1CVT_ZZ_BtoH = 2421,
|
||
|
|
AArch64_F2CVTL2v8f16 = 2422,
|
||
|
|
AArch64_F2CVTLT_ZZ_BtoH = 2423,
|
||
|
|
AArch64_F2CVTL_2ZZ_BtoH_NAME = 2424,
|
||
|
|
AArch64_F2CVTLv8f16 = 2425,
|
||
|
|
AArch64_F2CVT_2ZZ_BtoH_NAME = 2426,
|
||
|
|
AArch64_F2CVT_ZZ_BtoH = 2427,
|
||
|
|
AArch64_FABD16 = 2428,
|
||
|
|
AArch64_FABD32 = 2429,
|
||
|
|
AArch64_FABD64 = 2430,
|
||
|
|
AArch64_FABD_ZPmZ_D = 2431,
|
||
|
|
AArch64_FABD_ZPmZ_H = 2432,
|
||
|
|
AArch64_FABD_ZPmZ_S = 2433,
|
||
|
|
AArch64_FABDv2f32 = 2434,
|
||
|
|
AArch64_FABDv2f64 = 2435,
|
||
|
|
AArch64_FABDv4f16 = 2436,
|
||
|
|
AArch64_FABDv4f32 = 2437,
|
||
|
|
AArch64_FABDv8f16 = 2438,
|
||
|
|
AArch64_FABSDr = 2439,
|
||
|
|
AArch64_FABSHr = 2440,
|
||
|
|
AArch64_FABSSr = 2441,
|
||
|
|
AArch64_FABS_ZPmZ_D = 2442,
|
||
|
|
AArch64_FABS_ZPmZ_H = 2443,
|
||
|
|
AArch64_FABS_ZPmZ_S = 2444,
|
||
|
|
AArch64_FABSv2f32 = 2445,
|
||
|
|
AArch64_FABSv2f64 = 2446,
|
||
|
|
AArch64_FABSv4f16 = 2447,
|
||
|
|
AArch64_FABSv4f32 = 2448,
|
||
|
|
AArch64_FABSv8f16 = 2449,
|
||
|
|
AArch64_FACGE16 = 2450,
|
||
|
|
AArch64_FACGE32 = 2451,
|
||
|
|
AArch64_FACGE64 = 2452,
|
||
|
|
AArch64_FACGE_PPzZZ_D = 2453,
|
||
|
|
AArch64_FACGE_PPzZZ_H = 2454,
|
||
|
|
AArch64_FACGE_PPzZZ_S = 2455,
|
||
|
|
AArch64_FACGEv2f32 = 2456,
|
||
|
|
AArch64_FACGEv2f64 = 2457,
|
||
|
|
AArch64_FACGEv4f16 = 2458,
|
||
|
|
AArch64_FACGEv4f32 = 2459,
|
||
|
|
AArch64_FACGEv8f16 = 2460,
|
||
|
|
AArch64_FACGT16 = 2461,
|
||
|
|
AArch64_FACGT32 = 2462,
|
||
|
|
AArch64_FACGT64 = 2463,
|
||
|
|
AArch64_FACGT_PPzZZ_D = 2464,
|
||
|
|
AArch64_FACGT_PPzZZ_H = 2465,
|
||
|
|
AArch64_FACGT_PPzZZ_S = 2466,
|
||
|
|
AArch64_FACGTv2f32 = 2467,
|
||
|
|
AArch64_FACGTv2f64 = 2468,
|
||
|
|
AArch64_FACGTv4f16 = 2469,
|
||
|
|
AArch64_FACGTv4f32 = 2470,
|
||
|
|
AArch64_FACGTv8f16 = 2471,
|
||
|
|
AArch64_FADDA_VPZ_D = 2472,
|
||
|
|
AArch64_FADDA_VPZ_H = 2473,
|
||
|
|
AArch64_FADDA_VPZ_S = 2474,
|
||
|
|
AArch64_FADDDrr = 2475,
|
||
|
|
AArch64_FADDHrr = 2476,
|
||
|
|
AArch64_FADDP_ZPmZZ_D = 2477,
|
||
|
|
AArch64_FADDP_ZPmZZ_H = 2478,
|
||
|
|
AArch64_FADDP_ZPmZZ_S = 2479,
|
||
|
|
AArch64_FADDPv2f32 = 2480,
|
||
|
|
AArch64_FADDPv2f64 = 2481,
|
||
|
|
AArch64_FADDPv2i16p = 2482,
|
||
|
|
AArch64_FADDPv2i32p = 2483,
|
||
|
|
AArch64_FADDPv2i64p = 2484,
|
||
|
|
AArch64_FADDPv4f16 = 2485,
|
||
|
|
AArch64_FADDPv4f32 = 2486,
|
||
|
|
AArch64_FADDPv8f16 = 2487,
|
||
|
|
AArch64_FADDQV_D = 2488,
|
||
|
|
AArch64_FADDQV_H = 2489,
|
||
|
|
AArch64_FADDQV_S = 2490,
|
||
|
|
AArch64_FADDSrr = 2491,
|
||
|
|
AArch64_FADDV_VPZ_D = 2492,
|
||
|
|
AArch64_FADDV_VPZ_H = 2493,
|
||
|
|
AArch64_FADDV_VPZ_S = 2494,
|
||
|
|
AArch64_FADD_VG2_M2Z_D = 2495,
|
||
|
|
AArch64_FADD_VG2_M2Z_H = 2496,
|
||
|
|
AArch64_FADD_VG2_M2Z_S = 2497,
|
||
|
|
AArch64_FADD_VG4_M4Z_D = 2498,
|
||
|
|
AArch64_FADD_VG4_M4Z_H = 2499,
|
||
|
|
AArch64_FADD_VG4_M4Z_S = 2500,
|
||
|
|
AArch64_FADD_ZPmI_D = 2501,
|
||
|
|
AArch64_FADD_ZPmI_H = 2502,
|
||
|
|
AArch64_FADD_ZPmI_S = 2503,
|
||
|
|
AArch64_FADD_ZPmZ_D = 2504,
|
||
|
|
AArch64_FADD_ZPmZ_H = 2505,
|
||
|
|
AArch64_FADD_ZPmZ_S = 2506,
|
||
|
|
AArch64_FADD_ZZZ_D = 2507,
|
||
|
|
AArch64_FADD_ZZZ_H = 2508,
|
||
|
|
AArch64_FADD_ZZZ_S = 2509,
|
||
|
|
AArch64_FADDv2f32 = 2510,
|
||
|
|
AArch64_FADDv2f64 = 2511,
|
||
|
|
AArch64_FADDv4f16 = 2512,
|
||
|
|
AArch64_FADDv4f32 = 2513,
|
||
|
|
AArch64_FADDv8f16 = 2514,
|
||
|
|
AArch64_FAMAX_2Z2Z_D = 2515,
|
||
|
|
AArch64_FAMAX_2Z2Z_H = 2516,
|
||
|
|
AArch64_FAMAX_2Z2Z_S = 2517,
|
||
|
|
AArch64_FAMAX_4Z4Z_D = 2518,
|
||
|
|
AArch64_FAMAX_4Z4Z_H = 2519,
|
||
|
|
AArch64_FAMAX_4Z4Z_S = 2520,
|
||
|
|
AArch64_FAMAX_ZPmZ_D = 2521,
|
||
|
|
AArch64_FAMAX_ZPmZ_H = 2522,
|
||
|
|
AArch64_FAMAX_ZPmZ_S = 2523,
|
||
|
|
AArch64_FAMAXv2f32 = 2524,
|
||
|
|
AArch64_FAMAXv2f64 = 2525,
|
||
|
|
AArch64_FAMAXv4f16 = 2526,
|
||
|
|
AArch64_FAMAXv4f32 = 2527,
|
||
|
|
AArch64_FAMAXv8f16 = 2528,
|
||
|
|
AArch64_FAMIN_2Z2Z_D = 2529,
|
||
|
|
AArch64_FAMIN_2Z2Z_H = 2530,
|
||
|
|
AArch64_FAMIN_2Z2Z_S = 2531,
|
||
|
|
AArch64_FAMIN_4Z4Z_D = 2532,
|
||
|
|
AArch64_FAMIN_4Z4Z_H = 2533,
|
||
|
|
AArch64_FAMIN_4Z4Z_S = 2534,
|
||
|
|
AArch64_FAMIN_ZPmZ_D = 2535,
|
||
|
|
AArch64_FAMIN_ZPmZ_H = 2536,
|
||
|
|
AArch64_FAMIN_ZPmZ_S = 2537,
|
||
|
|
AArch64_FAMINv2f32 = 2538,
|
||
|
|
AArch64_FAMINv2f64 = 2539,
|
||
|
|
AArch64_FAMINv4f16 = 2540,
|
||
|
|
AArch64_FAMINv4f32 = 2541,
|
||
|
|
AArch64_FAMINv8f16 = 2542,
|
||
|
|
AArch64_FCADD_ZPmZ_D = 2543,
|
||
|
|
AArch64_FCADD_ZPmZ_H = 2544,
|
||
|
|
AArch64_FCADD_ZPmZ_S = 2545,
|
||
|
|
AArch64_FCADDv2f32 = 2546,
|
||
|
|
AArch64_FCADDv2f64 = 2547,
|
||
|
|
AArch64_FCADDv4f16 = 2548,
|
||
|
|
AArch64_FCADDv4f32 = 2549,
|
||
|
|
AArch64_FCADDv8f16 = 2550,
|
||
|
|
AArch64_FCCMPDrr = 2551,
|
||
|
|
AArch64_FCCMPEDrr = 2552,
|
||
|
|
AArch64_FCCMPEHrr = 2553,
|
||
|
|
AArch64_FCCMPESrr = 2554,
|
||
|
|
AArch64_FCCMPHrr = 2555,
|
||
|
|
AArch64_FCCMPSrr = 2556,
|
||
|
|
AArch64_FCLAMP_VG2_2Z2Z_D = 2557,
|
||
|
|
AArch64_FCLAMP_VG2_2Z2Z_H = 2558,
|
||
|
|
AArch64_FCLAMP_VG2_2Z2Z_S = 2559,
|
||
|
|
AArch64_FCLAMP_VG4_4Z4Z_D = 2560,
|
||
|
|
AArch64_FCLAMP_VG4_4Z4Z_H = 2561,
|
||
|
|
AArch64_FCLAMP_VG4_4Z4Z_S = 2562,
|
||
|
|
AArch64_FCLAMP_ZZZ_D = 2563,
|
||
|
|
AArch64_FCLAMP_ZZZ_H = 2564,
|
||
|
|
AArch64_FCLAMP_ZZZ_S = 2565,
|
||
|
|
AArch64_FCMEQ16 = 2566,
|
||
|
|
AArch64_FCMEQ32 = 2567,
|
||
|
|
AArch64_FCMEQ64 = 2568,
|
||
|
|
AArch64_FCMEQ_PPzZ0_D = 2569,
|
||
|
|
AArch64_FCMEQ_PPzZ0_H = 2570,
|
||
|
|
AArch64_FCMEQ_PPzZ0_S = 2571,
|
||
|
|
AArch64_FCMEQ_PPzZZ_D = 2572,
|
||
|
|
AArch64_FCMEQ_PPzZZ_H = 2573,
|
||
|
|
AArch64_FCMEQ_PPzZZ_S = 2574,
|
||
|
|
AArch64_FCMEQv1i16rz = 2575,
|
||
|
|
AArch64_FCMEQv1i32rz = 2576,
|
||
|
|
AArch64_FCMEQv1i64rz = 2577,
|
||
|
|
AArch64_FCMEQv2f32 = 2578,
|
||
|
|
AArch64_FCMEQv2f64 = 2579,
|
||
|
|
AArch64_FCMEQv2i32rz = 2580,
|
||
|
|
AArch64_FCMEQv2i64rz = 2581,
|
||
|
|
AArch64_FCMEQv4f16 = 2582,
|
||
|
|
AArch64_FCMEQv4f32 = 2583,
|
||
|
|
AArch64_FCMEQv4i16rz = 2584,
|
||
|
|
AArch64_FCMEQv4i32rz = 2585,
|
||
|
|
AArch64_FCMEQv8f16 = 2586,
|
||
|
|
AArch64_FCMEQv8i16rz = 2587,
|
||
|
|
AArch64_FCMGE16 = 2588,
|
||
|
|
AArch64_FCMGE32 = 2589,
|
||
|
|
AArch64_FCMGE64 = 2590,
|
||
|
|
AArch64_FCMGE_PPzZ0_D = 2591,
|
||
|
|
AArch64_FCMGE_PPzZ0_H = 2592,
|
||
|
|
AArch64_FCMGE_PPzZ0_S = 2593,
|
||
|
|
AArch64_FCMGE_PPzZZ_D = 2594,
|
||
|
|
AArch64_FCMGE_PPzZZ_H = 2595,
|
||
|
|
AArch64_FCMGE_PPzZZ_S = 2596,
|
||
|
|
AArch64_FCMGEv1i16rz = 2597,
|
||
|
|
AArch64_FCMGEv1i32rz = 2598,
|
||
|
|
AArch64_FCMGEv1i64rz = 2599,
|
||
|
|
AArch64_FCMGEv2f32 = 2600,
|
||
|
|
AArch64_FCMGEv2f64 = 2601,
|
||
|
|
AArch64_FCMGEv2i32rz = 2602,
|
||
|
|
AArch64_FCMGEv2i64rz = 2603,
|
||
|
|
AArch64_FCMGEv4f16 = 2604,
|
||
|
|
AArch64_FCMGEv4f32 = 2605,
|
||
|
|
AArch64_FCMGEv4i16rz = 2606,
|
||
|
|
AArch64_FCMGEv4i32rz = 2607,
|
||
|
|
AArch64_FCMGEv8f16 = 2608,
|
||
|
|
AArch64_FCMGEv8i16rz = 2609,
|
||
|
|
AArch64_FCMGT16 = 2610,
|
||
|
|
AArch64_FCMGT32 = 2611,
|
||
|
|
AArch64_FCMGT64 = 2612,
|
||
|
|
AArch64_FCMGT_PPzZ0_D = 2613,
|
||
|
|
AArch64_FCMGT_PPzZ0_H = 2614,
|
||
|
|
AArch64_FCMGT_PPzZ0_S = 2615,
|
||
|
|
AArch64_FCMGT_PPzZZ_D = 2616,
|
||
|
|
AArch64_FCMGT_PPzZZ_H = 2617,
|
||
|
|
AArch64_FCMGT_PPzZZ_S = 2618,
|
||
|
|
AArch64_FCMGTv1i16rz = 2619,
|
||
|
|
AArch64_FCMGTv1i32rz = 2620,
|
||
|
|
AArch64_FCMGTv1i64rz = 2621,
|
||
|
|
AArch64_FCMGTv2f32 = 2622,
|
||
|
|
AArch64_FCMGTv2f64 = 2623,
|
||
|
|
AArch64_FCMGTv2i32rz = 2624,
|
||
|
|
AArch64_FCMGTv2i64rz = 2625,
|
||
|
|
AArch64_FCMGTv4f16 = 2626,
|
||
|
|
AArch64_FCMGTv4f32 = 2627,
|
||
|
|
AArch64_FCMGTv4i16rz = 2628,
|
||
|
|
AArch64_FCMGTv4i32rz = 2629,
|
||
|
|
AArch64_FCMGTv8f16 = 2630,
|
||
|
|
AArch64_FCMGTv8i16rz = 2631,
|
||
|
|
AArch64_FCMLA_ZPmZZ_D = 2632,
|
||
|
|
AArch64_FCMLA_ZPmZZ_H = 2633,
|
||
|
|
AArch64_FCMLA_ZPmZZ_S = 2634,
|
||
|
|
AArch64_FCMLA_ZZZI_H = 2635,
|
||
|
|
AArch64_FCMLA_ZZZI_S = 2636,
|
||
|
|
AArch64_FCMLAv2f32 = 2637,
|
||
|
|
AArch64_FCMLAv2f64 = 2638,
|
||
|
|
AArch64_FCMLAv4f16 = 2639,
|
||
|
|
AArch64_FCMLAv4f16_indexed = 2640,
|
||
|
|
AArch64_FCMLAv4f32 = 2641,
|
||
|
|
AArch64_FCMLAv4f32_indexed = 2642,
|
||
|
|
AArch64_FCMLAv8f16 = 2643,
|
||
|
|
AArch64_FCMLAv8f16_indexed = 2644,
|
||
|
|
AArch64_FCMLE_PPzZ0_D = 2645,
|
||
|
|
AArch64_FCMLE_PPzZ0_H = 2646,
|
||
|
|
AArch64_FCMLE_PPzZ0_S = 2647,
|
||
|
|
AArch64_FCMLEv1i16rz = 2648,
|
||
|
|
AArch64_FCMLEv1i32rz = 2649,
|
||
|
|
AArch64_FCMLEv1i64rz = 2650,
|
||
|
|
AArch64_FCMLEv2i32rz = 2651,
|
||
|
|
AArch64_FCMLEv2i64rz = 2652,
|
||
|
|
AArch64_FCMLEv4i16rz = 2653,
|
||
|
|
AArch64_FCMLEv4i32rz = 2654,
|
||
|
|
AArch64_FCMLEv8i16rz = 2655,
|
||
|
|
AArch64_FCMLT_PPzZ0_D = 2656,
|
||
|
|
AArch64_FCMLT_PPzZ0_H = 2657,
|
||
|
|
AArch64_FCMLT_PPzZ0_S = 2658,
|
||
|
|
AArch64_FCMLTv1i16rz = 2659,
|
||
|
|
AArch64_FCMLTv1i32rz = 2660,
|
||
|
|
AArch64_FCMLTv1i64rz = 2661,
|
||
|
|
AArch64_FCMLTv2i32rz = 2662,
|
||
|
|
AArch64_FCMLTv2i64rz = 2663,
|
||
|
|
AArch64_FCMLTv4i16rz = 2664,
|
||
|
|
AArch64_FCMLTv4i32rz = 2665,
|
||
|
|
AArch64_FCMLTv8i16rz = 2666,
|
||
|
|
AArch64_FCMNE_PPzZ0_D = 2667,
|
||
|
|
AArch64_FCMNE_PPzZ0_H = 2668,
|
||
|
|
AArch64_FCMNE_PPzZ0_S = 2669,
|
||
|
|
AArch64_FCMNE_PPzZZ_D = 2670,
|
||
|
|
AArch64_FCMNE_PPzZZ_H = 2671,
|
||
|
|
AArch64_FCMNE_PPzZZ_S = 2672,
|
||
|
|
AArch64_FCMPDri = 2673,
|
||
|
|
AArch64_FCMPDrr = 2674,
|
||
|
|
AArch64_FCMPEDri = 2675,
|
||
|
|
AArch64_FCMPEDrr = 2676,
|
||
|
|
AArch64_FCMPEHri = 2677,
|
||
|
|
AArch64_FCMPEHrr = 2678,
|
||
|
|
AArch64_FCMPESri = 2679,
|
||
|
|
AArch64_FCMPESrr = 2680,
|
||
|
|
AArch64_FCMPHri = 2681,
|
||
|
|
AArch64_FCMPHrr = 2682,
|
||
|
|
AArch64_FCMPSri = 2683,
|
||
|
|
AArch64_FCMPSrr = 2684,
|
||
|
|
AArch64_FCMUO_PPzZZ_D = 2685,
|
||
|
|
AArch64_FCMUO_PPzZZ_H = 2686,
|
||
|
|
AArch64_FCMUO_PPzZZ_S = 2687,
|
||
|
|
AArch64_FCPY_ZPmI_D = 2688,
|
||
|
|
AArch64_FCPY_ZPmI_H = 2689,
|
||
|
|
AArch64_FCPY_ZPmI_S = 2690,
|
||
|
|
AArch64_FCSELDrrr = 2691,
|
||
|
|
AArch64_FCSELHrrr = 2692,
|
||
|
|
AArch64_FCSELSrrr = 2693,
|
||
|
|
AArch64_FCVTASUWDr = 2694,
|
||
|
|
AArch64_FCVTASUWHr = 2695,
|
||
|
|
AArch64_FCVTASUWSr = 2696,
|
||
|
|
AArch64_FCVTASUXDr = 2697,
|
||
|
|
AArch64_FCVTASUXHr = 2698,
|
||
|
|
AArch64_FCVTASUXSr = 2699,
|
||
|
|
AArch64_FCVTASv1f16 = 2700,
|
||
|
|
AArch64_FCVTASv1i32 = 2701,
|
||
|
|
AArch64_FCVTASv1i64 = 2702,
|
||
|
|
AArch64_FCVTASv2f32 = 2703,
|
||
|
|
AArch64_FCVTASv2f64 = 2704,
|
||
|
|
AArch64_FCVTASv4f16 = 2705,
|
||
|
|
AArch64_FCVTASv4f32 = 2706,
|
||
|
|
AArch64_FCVTASv8f16 = 2707,
|
||
|
|
AArch64_FCVTAUUWDr = 2708,
|
||
|
|
AArch64_FCVTAUUWHr = 2709,
|
||
|
|
AArch64_FCVTAUUWSr = 2710,
|
||
|
|
AArch64_FCVTAUUXDr = 2711,
|
||
|
|
AArch64_FCVTAUUXHr = 2712,
|
||
|
|
AArch64_FCVTAUUXSr = 2713,
|
||
|
|
AArch64_FCVTAUv1f16 = 2714,
|
||
|
|
AArch64_FCVTAUv1i32 = 2715,
|
||
|
|
AArch64_FCVTAUv1i64 = 2716,
|
||
|
|
AArch64_FCVTAUv2f32 = 2717,
|
||
|
|
AArch64_FCVTAUv2f64 = 2718,
|
||
|
|
AArch64_FCVTAUv4f16 = 2719,
|
||
|
|
AArch64_FCVTAUv4f32 = 2720,
|
||
|
|
AArch64_FCVTAUv8f16 = 2721,
|
||
|
|
AArch64_FCVTDHr = 2722,
|
||
|
|
AArch64_FCVTDSr = 2723,
|
||
|
|
AArch64_FCVTHDr = 2724,
|
||
|
|
AArch64_FCVTHSr = 2725,
|
||
|
|
AArch64_FCVTLT_ZPmZ_HtoS = 2726,
|
||
|
|
AArch64_FCVTLT_ZPmZ_StoD = 2727,
|
||
|
|
AArch64_FCVTL_2ZZ_H_S = 2728,
|
||
|
|
AArch64_FCVTLv2i32 = 2729,
|
||
|
|
AArch64_FCVTLv4i16 = 2730,
|
||
|
|
AArch64_FCVTLv4i32 = 2731,
|
||
|
|
AArch64_FCVTLv8i16 = 2732,
|
||
|
|
AArch64_FCVTMSUWDr = 2733,
|
||
|
|
AArch64_FCVTMSUWHr = 2734,
|
||
|
|
AArch64_FCVTMSUWSr = 2735,
|
||
|
|
AArch64_FCVTMSUXDr = 2736,
|
||
|
|
AArch64_FCVTMSUXHr = 2737,
|
||
|
|
AArch64_FCVTMSUXSr = 2738,
|
||
|
|
AArch64_FCVTMSv1f16 = 2739,
|
||
|
|
AArch64_FCVTMSv1i32 = 2740,
|
||
|
|
AArch64_FCVTMSv1i64 = 2741,
|
||
|
|
AArch64_FCVTMSv2f32 = 2742,
|
||
|
|
AArch64_FCVTMSv2f64 = 2743,
|
||
|
|
AArch64_FCVTMSv4f16 = 2744,
|
||
|
|
AArch64_FCVTMSv4f32 = 2745,
|
||
|
|
AArch64_FCVTMSv8f16 = 2746,
|
||
|
|
AArch64_FCVTMUUWDr = 2747,
|
||
|
|
AArch64_FCVTMUUWHr = 2748,
|
||
|
|
AArch64_FCVTMUUWSr = 2749,
|
||
|
|
AArch64_FCVTMUUXDr = 2750,
|
||
|
|
AArch64_FCVTMUUXHr = 2751,
|
||
|
|
AArch64_FCVTMUUXSr = 2752,
|
||
|
|
AArch64_FCVTMUv1f16 = 2753,
|
||
|
|
AArch64_FCVTMUv1i32 = 2754,
|
||
|
|
AArch64_FCVTMUv1i64 = 2755,
|
||
|
|
AArch64_FCVTMUv2f32 = 2756,
|
||
|
|
AArch64_FCVTMUv2f64 = 2757,
|
||
|
|
AArch64_FCVTMUv4f16 = 2758,
|
||
|
|
AArch64_FCVTMUv4f32 = 2759,
|
||
|
|
AArch64_FCVTMUv8f16 = 2760,
|
||
|
|
AArch64_FCVTNB_Z2Z_StoB = 2761,
|
||
|
|
AArch64_FCVTNSUWDr = 2762,
|
||
|
|
AArch64_FCVTNSUWHr = 2763,
|
||
|
|
AArch64_FCVTNSUWSr = 2764,
|
||
|
|
AArch64_FCVTNSUXDr = 2765,
|
||
|
|
AArch64_FCVTNSUXHr = 2766,
|
||
|
|
AArch64_FCVTNSUXSr = 2767,
|
||
|
|
AArch64_FCVTNSv1f16 = 2768,
|
||
|
|
AArch64_FCVTNSv1i32 = 2769,
|
||
|
|
AArch64_FCVTNSv1i64 = 2770,
|
||
|
|
AArch64_FCVTNSv2f32 = 2771,
|
||
|
|
AArch64_FCVTNSv2f64 = 2772,
|
||
|
|
AArch64_FCVTNSv4f16 = 2773,
|
||
|
|
AArch64_FCVTNSv4f32 = 2774,
|
||
|
|
AArch64_FCVTNSv8f16 = 2775,
|
||
|
|
AArch64_FCVTNT_Z2Z_StoB = 2776,
|
||
|
|
AArch64_FCVTNT_ZPmZ_DtoS = 2777,
|
||
|
|
AArch64_FCVTNT_ZPmZ_StoH = 2778,
|
||
|
|
AArch64_FCVTNUUWDr = 2779,
|
||
|
|
AArch64_FCVTNUUWHr = 2780,
|
||
|
|
AArch64_FCVTNUUWSr = 2781,
|
||
|
|
AArch64_FCVTNUUXDr = 2782,
|
||
|
|
AArch64_FCVTNUUXHr = 2783,
|
||
|
|
AArch64_FCVTNUUXSr = 2784,
|
||
|
|
AArch64_FCVTNUv1f16 = 2785,
|
||
|
|
AArch64_FCVTNUv1i32 = 2786,
|
||
|
|
AArch64_FCVTNUv1i64 = 2787,
|
||
|
|
AArch64_FCVTNUv2f32 = 2788,
|
||
|
|
AArch64_FCVTNUv2f64 = 2789,
|
||
|
|
AArch64_FCVTNUv4f16 = 2790,
|
||
|
|
AArch64_FCVTNUv4f32 = 2791,
|
||
|
|
AArch64_FCVTNUv8f16 = 2792,
|
||
|
|
AArch64_FCVTN_F16_F8v16f8 = 2793,
|
||
|
|
AArch64_FCVTN_F16_F8v8f8 = 2794,
|
||
|
|
AArch64_FCVTN_F32_F82v16f8 = 2795,
|
||
|
|
AArch64_FCVTN_F32_F8v8f8 = 2796,
|
||
|
|
AArch64_FCVTN_Z2Z_HtoB = 2797,
|
||
|
|
AArch64_FCVTN_Z2Z_StoH = 2798,
|
||
|
|
AArch64_FCVTN_Z4Z_StoB_NAME = 2799,
|
||
|
|
AArch64_FCVTNv2i32 = 2800,
|
||
|
|
AArch64_FCVTNv4i16 = 2801,
|
||
|
|
AArch64_FCVTNv4i32 = 2802,
|
||
|
|
AArch64_FCVTNv8i16 = 2803,
|
||
|
|
AArch64_FCVTPSUWDr = 2804,
|
||
|
|
AArch64_FCVTPSUWHr = 2805,
|
||
|
|
AArch64_FCVTPSUWSr = 2806,
|
||
|
|
AArch64_FCVTPSUXDr = 2807,
|
||
|
|
AArch64_FCVTPSUXHr = 2808,
|
||
|
|
AArch64_FCVTPSUXSr = 2809,
|
||
|
|
AArch64_FCVTPSv1f16 = 2810,
|
||
|
|
AArch64_FCVTPSv1i32 = 2811,
|
||
|
|
AArch64_FCVTPSv1i64 = 2812,
|
||
|
|
AArch64_FCVTPSv2f32 = 2813,
|
||
|
|
AArch64_FCVTPSv2f64 = 2814,
|
||
|
|
AArch64_FCVTPSv4f16 = 2815,
|
||
|
|
AArch64_FCVTPSv4f32 = 2816,
|
||
|
|
AArch64_FCVTPSv8f16 = 2817,
|
||
|
|
AArch64_FCVTPUUWDr = 2818,
|
||
|
|
AArch64_FCVTPUUWHr = 2819,
|
||
|
|
AArch64_FCVTPUUWSr = 2820,
|
||
|
|
AArch64_FCVTPUUXDr = 2821,
|
||
|
|
AArch64_FCVTPUUXHr = 2822,
|
||
|
|
AArch64_FCVTPUUXSr = 2823,
|
||
|
|
AArch64_FCVTPUv1f16 = 2824,
|
||
|
|
AArch64_FCVTPUv1i32 = 2825,
|
||
|
|
AArch64_FCVTPUv1i64 = 2826,
|
||
|
|
AArch64_FCVTPUv2f32 = 2827,
|
||
|
|
AArch64_FCVTPUv2f64 = 2828,
|
||
|
|
AArch64_FCVTPUv4f16 = 2829,
|
||
|
|
AArch64_FCVTPUv4f32 = 2830,
|
||
|
|
AArch64_FCVTPUv8f16 = 2831,
|
||
|
|
AArch64_FCVTSDr = 2832,
|
||
|
|
AArch64_FCVTSHr = 2833,
|
||
|
|
AArch64_FCVTXNT_ZPmZ_DtoS = 2834,
|
||
|
|
AArch64_FCVTXNv1i64 = 2835,
|
||
|
|
AArch64_FCVTXNv2f32 = 2836,
|
||
|
|
AArch64_FCVTXNv4f32 = 2837,
|
||
|
|
AArch64_FCVTX_ZPmZ_DtoS = 2838,
|
||
|
|
AArch64_FCVTZSSWDri = 2839,
|
||
|
|
AArch64_FCVTZSSWHri = 2840,
|
||
|
|
AArch64_FCVTZSSWSri = 2841,
|
||
|
|
AArch64_FCVTZSSXDri = 2842,
|
||
|
|
AArch64_FCVTZSSXHri = 2843,
|
||
|
|
AArch64_FCVTZSSXSri = 2844,
|
||
|
|
AArch64_FCVTZSUWDr = 2845,
|
||
|
|
AArch64_FCVTZSUWHr = 2846,
|
||
|
|
AArch64_FCVTZSUWSr = 2847,
|
||
|
|
AArch64_FCVTZSUXDr = 2848,
|
||
|
|
AArch64_FCVTZSUXHr = 2849,
|
||
|
|
AArch64_FCVTZSUXSr = 2850,
|
||
|
|
AArch64_FCVTZS_2Z2Z_StoS = 2851,
|
||
|
|
AArch64_FCVTZS_4Z4Z_StoS = 2852,
|
||
|
|
AArch64_FCVTZS_ZPmZ_DtoD = 2853,
|
||
|
|
AArch64_FCVTZS_ZPmZ_DtoS = 2854,
|
||
|
|
AArch64_FCVTZS_ZPmZ_HtoD = 2855,
|
||
|
|
AArch64_FCVTZS_ZPmZ_HtoH = 2856,
|
||
|
|
AArch64_FCVTZS_ZPmZ_HtoS = 2857,
|
||
|
|
AArch64_FCVTZS_ZPmZ_StoD = 2858,
|
||
|
|
AArch64_FCVTZS_ZPmZ_StoS = 2859,
|
||
|
|
AArch64_FCVTZSd = 2860,
|
||
|
|
AArch64_FCVTZSh = 2861,
|
||
|
|
AArch64_FCVTZSs = 2862,
|
||
|
|
AArch64_FCVTZSv1f16 = 2863,
|
||
|
|
AArch64_FCVTZSv1i32 = 2864,
|
||
|
|
AArch64_FCVTZSv1i64 = 2865,
|
||
|
|
AArch64_FCVTZSv2f32 = 2866,
|
||
|
|
AArch64_FCVTZSv2f64 = 2867,
|
||
|
|
AArch64_FCVTZSv2i32_shift = 2868,
|
||
|
|
AArch64_FCVTZSv2i64_shift = 2869,
|
||
|
|
AArch64_FCVTZSv4f16 = 2870,
|
||
|
|
AArch64_FCVTZSv4f32 = 2871,
|
||
|
|
AArch64_FCVTZSv4i16_shift = 2872,
|
||
|
|
AArch64_FCVTZSv4i32_shift = 2873,
|
||
|
|
AArch64_FCVTZSv8f16 = 2874,
|
||
|
|
AArch64_FCVTZSv8i16_shift = 2875,
|
||
|
|
AArch64_FCVTZUSWDri = 2876,
|
||
|
|
AArch64_FCVTZUSWHri = 2877,
|
||
|
|
AArch64_FCVTZUSWSri = 2878,
|
||
|
|
AArch64_FCVTZUSXDri = 2879,
|
||
|
|
AArch64_FCVTZUSXHri = 2880,
|
||
|
|
AArch64_FCVTZUSXSri = 2881,
|
||
|
|
AArch64_FCVTZUUWDr = 2882,
|
||
|
|
AArch64_FCVTZUUWHr = 2883,
|
||
|
|
AArch64_FCVTZUUWSr = 2884,
|
||
|
|
AArch64_FCVTZUUXDr = 2885,
|
||
|
|
AArch64_FCVTZUUXHr = 2886,
|
||
|
|
AArch64_FCVTZUUXSr = 2887,
|
||
|
|
AArch64_FCVTZU_2Z2Z_StoS = 2888,
|
||
|
|
AArch64_FCVTZU_4Z4Z_StoS = 2889,
|
||
|
|
AArch64_FCVTZU_ZPmZ_DtoD = 2890,
|
||
|
|
AArch64_FCVTZU_ZPmZ_DtoS = 2891,
|
||
|
|
AArch64_FCVTZU_ZPmZ_HtoD = 2892,
|
||
|
|
AArch64_FCVTZU_ZPmZ_HtoH = 2893,
|
||
|
|
AArch64_FCVTZU_ZPmZ_HtoS = 2894,
|
||
|
|
AArch64_FCVTZU_ZPmZ_StoD = 2895,
|
||
|
|
AArch64_FCVTZU_ZPmZ_StoS = 2896,
|
||
|
|
AArch64_FCVTZUd = 2897,
|
||
|
|
AArch64_FCVTZUh = 2898,
|
||
|
|
AArch64_FCVTZUs = 2899,
|
||
|
|
AArch64_FCVTZUv1f16 = 2900,
|
||
|
|
AArch64_FCVTZUv1i32 = 2901,
|
||
|
|
AArch64_FCVTZUv1i64 = 2902,
|
||
|
|
AArch64_FCVTZUv2f32 = 2903,
|
||
|
|
AArch64_FCVTZUv2f64 = 2904,
|
||
|
|
AArch64_FCVTZUv2i32_shift = 2905,
|
||
|
|
AArch64_FCVTZUv2i64_shift = 2906,
|
||
|
|
AArch64_FCVTZUv4f16 = 2907,
|
||
|
|
AArch64_FCVTZUv4f32 = 2908,
|
||
|
|
AArch64_FCVTZUv4i16_shift = 2909,
|
||
|
|
AArch64_FCVTZUv4i32_shift = 2910,
|
||
|
|
AArch64_FCVTZUv8f16 = 2911,
|
||
|
|
AArch64_FCVTZUv8i16_shift = 2912,
|
||
|
|
AArch64_FCVT_2ZZ_H_S = 2913,
|
||
|
|
AArch64_FCVT_Z2Z_HtoB = 2914,
|
||
|
|
AArch64_FCVT_Z2Z_StoH = 2915,
|
||
|
|
AArch64_FCVT_Z4Z_StoB_NAME = 2916,
|
||
|
|
AArch64_FCVT_ZPmZ_DtoH = 2917,
|
||
|
|
AArch64_FCVT_ZPmZ_DtoS = 2918,
|
||
|
|
AArch64_FCVT_ZPmZ_HtoD = 2919,
|
||
|
|
AArch64_FCVT_ZPmZ_HtoS = 2920,
|
||
|
|
AArch64_FCVT_ZPmZ_StoD = 2921,
|
||
|
|
AArch64_FCVT_ZPmZ_StoH = 2922,
|
||
|
|
AArch64_FDIVDrr = 2923,
|
||
|
|
AArch64_FDIVHrr = 2924,
|
||
|
|
AArch64_FDIVR_ZPmZ_D = 2925,
|
||
|
|
AArch64_FDIVR_ZPmZ_H = 2926,
|
||
|
|
AArch64_FDIVR_ZPmZ_S = 2927,
|
||
|
|
AArch64_FDIVSrr = 2928,
|
||
|
|
AArch64_FDIV_ZPmZ_D = 2929,
|
||
|
|
AArch64_FDIV_ZPmZ_H = 2930,
|
||
|
|
AArch64_FDIV_ZPmZ_S = 2931,
|
||
|
|
AArch64_FDIVv2f32 = 2932,
|
||
|
|
AArch64_FDIVv2f64 = 2933,
|
||
|
|
AArch64_FDIVv4f16 = 2934,
|
||
|
|
AArch64_FDIVv4f32 = 2935,
|
||
|
|
AArch64_FDIVv8f16 = 2936,
|
||
|
|
AArch64_FDOT_VG2_M2Z2Z_BtoH = 2937,
|
||
|
|
AArch64_FDOT_VG2_M2Z2Z_BtoS = 2938,
|
||
|
|
AArch64_FDOT_VG2_M2Z2Z_HtoS = 2939,
|
||
|
|
AArch64_FDOT_VG2_M2ZZI_BtoH = 2940,
|
||
|
|
AArch64_FDOT_VG2_M2ZZI_BtoS = 2941,
|
||
|
|
AArch64_FDOT_VG2_M2ZZI_HtoS = 2942,
|
||
|
|
AArch64_FDOT_VG2_M2ZZ_BtoH = 2943,
|
||
|
|
AArch64_FDOT_VG2_M2ZZ_BtoS = 2944,
|
||
|
|
AArch64_FDOT_VG2_M2ZZ_HtoS = 2945,
|
||
|
|
AArch64_FDOT_VG4_M4Z4Z_BtoH = 2946,
|
||
|
|
AArch64_FDOT_VG4_M4Z4Z_BtoS = 2947,
|
||
|
|
AArch64_FDOT_VG4_M4Z4Z_HtoS = 2948,
|
||
|
|
AArch64_FDOT_VG4_M4ZZI_BtoH = 2949,
|
||
|
|
AArch64_FDOT_VG4_M4ZZI_BtoS = 2950,
|
||
|
|
AArch64_FDOT_VG4_M4ZZI_HtoS = 2951,
|
||
|
|
AArch64_FDOT_VG4_M4ZZ_BtoH = 2952,
|
||
|
|
AArch64_FDOT_VG4_M4ZZ_BtoS = 2953,
|
||
|
|
AArch64_FDOT_VG4_M4ZZ_HtoS = 2954,
|
||
|
|
AArch64_FDOT_ZZZI_BtoH = 2955,
|
||
|
|
AArch64_FDOT_ZZZI_BtoS = 2956,
|
||
|
|
AArch64_FDOT_ZZZI_S = 2957,
|
||
|
|
AArch64_FDOT_ZZZ_BtoH = 2958,
|
||
|
|
AArch64_FDOT_ZZZ_BtoS = 2959,
|
||
|
|
AArch64_FDOT_ZZZ_S = 2960,
|
||
|
|
AArch64_FDOTlanev16f8 = 2961,
|
||
|
|
AArch64_FDOTlanev4f16 = 2962,
|
||
|
|
AArch64_FDOTlanev8f16 = 2963,
|
||
|
|
AArch64_FDOTlanev8f8 = 2964,
|
||
|
|
AArch64_FDOTv2f32 = 2965,
|
||
|
|
AArch64_FDOTv4f16 = 2966,
|
||
|
|
AArch64_FDOTv4f32 = 2967,
|
||
|
|
AArch64_FDOTv8f16 = 2968,
|
||
|
|
AArch64_FDUP_ZI_D = 2969,
|
||
|
|
AArch64_FDUP_ZI_H = 2970,
|
||
|
|
AArch64_FDUP_ZI_S = 2971,
|
||
|
|
AArch64_FEXPA_ZZ_D = 2972,
|
||
|
|
AArch64_FEXPA_ZZ_H = 2973,
|
||
|
|
AArch64_FEXPA_ZZ_S = 2974,
|
||
|
|
AArch64_FJCVTZS = 2975,
|
||
|
|
AArch64_FLOGB_ZPmZ_D = 2976,
|
||
|
|
AArch64_FLOGB_ZPmZ_H = 2977,
|
||
|
|
AArch64_FLOGB_ZPmZ_S = 2978,
|
||
|
|
AArch64_FMADDDrrr = 2979,
|
||
|
|
AArch64_FMADDHrrr = 2980,
|
||
|
|
AArch64_FMADDSrrr = 2981,
|
||
|
|
AArch64_FMAD_ZPmZZ_D = 2982,
|
||
|
|
AArch64_FMAD_ZPmZZ_H = 2983,
|
||
|
|
AArch64_FMAD_ZPmZZ_S = 2984,
|
||
|
|
AArch64_FMAXDrr = 2985,
|
||
|
|
AArch64_FMAXHrr = 2986,
|
||
|
|
AArch64_FMAXNMDrr = 2987,
|
||
|
|
AArch64_FMAXNMHrr = 2988,
|
||
|
|
AArch64_FMAXNMP_ZPmZZ_D = 2989,
|
||
|
|
AArch64_FMAXNMP_ZPmZZ_H = 2990,
|
||
|
|
AArch64_FMAXNMP_ZPmZZ_S = 2991,
|
||
|
|
AArch64_FMAXNMPv2f32 = 2992,
|
||
|
|
AArch64_FMAXNMPv2f64 = 2993,
|
||
|
|
AArch64_FMAXNMPv2i16p = 2994,
|
||
|
|
AArch64_FMAXNMPv2i32p = 2995,
|
||
|
|
AArch64_FMAXNMPv2i64p = 2996,
|
||
|
|
AArch64_FMAXNMPv4f16 = 2997,
|
||
|
|
AArch64_FMAXNMPv4f32 = 2998,
|
||
|
|
AArch64_FMAXNMPv8f16 = 2999,
|
||
|
|
AArch64_FMAXNMQV_D = 3000,
|
||
|
|
AArch64_FMAXNMQV_H = 3001,
|
||
|
|
AArch64_FMAXNMQV_S = 3002,
|
||
|
|
AArch64_FMAXNMSrr = 3003,
|
||
|
|
AArch64_FMAXNMV_VPZ_D = 3004,
|
||
|
|
AArch64_FMAXNMV_VPZ_H = 3005,
|
||
|
|
AArch64_FMAXNMV_VPZ_S = 3006,
|
||
|
|
AArch64_FMAXNMVv4i16v = 3007,
|
||
|
|
AArch64_FMAXNMVv4i32v = 3008,
|
||
|
|
AArch64_FMAXNMVv8i16v = 3009,
|
||
|
|
AArch64_FMAXNM_VG2_2Z2Z_D = 3010,
|
||
|
|
AArch64_FMAXNM_VG2_2Z2Z_H = 3011,
|
||
|
|
AArch64_FMAXNM_VG2_2Z2Z_S = 3012,
|
||
|
|
AArch64_FMAXNM_VG2_2ZZ_D = 3013,
|
||
|
|
AArch64_FMAXNM_VG2_2ZZ_H = 3014,
|
||
|
|
AArch64_FMAXNM_VG2_2ZZ_S = 3015,
|
||
|
|
AArch64_FMAXNM_VG4_4Z4Z_D = 3016,
|
||
|
|
AArch64_FMAXNM_VG4_4Z4Z_H = 3017,
|
||
|
|
AArch64_FMAXNM_VG4_4Z4Z_S = 3018,
|
||
|
|
AArch64_FMAXNM_VG4_4ZZ_D = 3019,
|
||
|
|
AArch64_FMAXNM_VG4_4ZZ_H = 3020,
|
||
|
|
AArch64_FMAXNM_VG4_4ZZ_S = 3021,
|
||
|
|
AArch64_FMAXNM_ZPmI_D = 3022,
|
||
|
|
AArch64_FMAXNM_ZPmI_H = 3023,
|
||
|
|
AArch64_FMAXNM_ZPmI_S = 3024,
|
||
|
|
AArch64_FMAXNM_ZPmZ_D = 3025,
|
||
|
|
AArch64_FMAXNM_ZPmZ_H = 3026,
|
||
|
|
AArch64_FMAXNM_ZPmZ_S = 3027,
|
||
|
|
AArch64_FMAXNMv2f32 = 3028,
|
||
|
|
AArch64_FMAXNMv2f64 = 3029,
|
||
|
|
AArch64_FMAXNMv4f16 = 3030,
|
||
|
|
AArch64_FMAXNMv4f32 = 3031,
|
||
|
|
AArch64_FMAXNMv8f16 = 3032,
|
||
|
|
AArch64_FMAXP_ZPmZZ_D = 3033,
|
||
|
|
AArch64_FMAXP_ZPmZZ_H = 3034,
|
||
|
|
AArch64_FMAXP_ZPmZZ_S = 3035,
|
||
|
|
AArch64_FMAXPv2f32 = 3036,
|
||
|
|
AArch64_FMAXPv2f64 = 3037,
|
||
|
|
AArch64_FMAXPv2i16p = 3038,
|
||
|
|
AArch64_FMAXPv2i32p = 3039,
|
||
|
|
AArch64_FMAXPv2i64p = 3040,
|
||
|
|
AArch64_FMAXPv4f16 = 3041,
|
||
|
|
AArch64_FMAXPv4f32 = 3042,
|
||
|
|
AArch64_FMAXPv8f16 = 3043,
|
||
|
|
AArch64_FMAXQV_D = 3044,
|
||
|
|
AArch64_FMAXQV_H = 3045,
|
||
|
|
AArch64_FMAXQV_S = 3046,
|
||
|
|
AArch64_FMAXSrr = 3047,
|
||
|
|
AArch64_FMAXV_VPZ_D = 3048,
|
||
|
|
AArch64_FMAXV_VPZ_H = 3049,
|
||
|
|
AArch64_FMAXV_VPZ_S = 3050,
|
||
|
|
AArch64_FMAXVv4i16v = 3051,
|
||
|
|
AArch64_FMAXVv4i32v = 3052,
|
||
|
|
AArch64_FMAXVv8i16v = 3053,
|
||
|
|
AArch64_FMAX_VG2_2Z2Z_D = 3054,
|
||
|
|
AArch64_FMAX_VG2_2Z2Z_H = 3055,
|
||
|
|
AArch64_FMAX_VG2_2Z2Z_S = 3056,
|
||
|
|
AArch64_FMAX_VG2_2ZZ_D = 3057,
|
||
|
|
AArch64_FMAX_VG2_2ZZ_H = 3058,
|
||
|
|
AArch64_FMAX_VG2_2ZZ_S = 3059,
|
||
|
|
AArch64_FMAX_VG4_4Z4Z_D = 3060,
|
||
|
|
AArch64_FMAX_VG4_4Z4Z_H = 3061,
|
||
|
|
AArch64_FMAX_VG4_4Z4Z_S = 3062,
|
||
|
|
AArch64_FMAX_VG4_4ZZ_D = 3063,
|
||
|
|
AArch64_FMAX_VG4_4ZZ_H = 3064,
|
||
|
|
AArch64_FMAX_VG4_4ZZ_S = 3065,
|
||
|
|
AArch64_FMAX_ZPmI_D = 3066,
|
||
|
|
AArch64_FMAX_ZPmI_H = 3067,
|
||
|
|
AArch64_FMAX_ZPmI_S = 3068,
|
||
|
|
AArch64_FMAX_ZPmZ_D = 3069,
|
||
|
|
AArch64_FMAX_ZPmZ_H = 3070,
|
||
|
|
AArch64_FMAX_ZPmZ_S = 3071,
|
||
|
|
AArch64_FMAXv2f32 = 3072,
|
||
|
|
AArch64_FMAXv2f64 = 3073,
|
||
|
|
AArch64_FMAXv4f16 = 3074,
|
||
|
|
AArch64_FMAXv4f32 = 3075,
|
||
|
|
AArch64_FMAXv8f16 = 3076,
|
||
|
|
AArch64_FMINDrr = 3077,
|
||
|
|
AArch64_FMINHrr = 3078,
|
||
|
|
AArch64_FMINNMDrr = 3079,
|
||
|
|
AArch64_FMINNMHrr = 3080,
|
||
|
|
AArch64_FMINNMP_ZPmZZ_D = 3081,
|
||
|
|
AArch64_FMINNMP_ZPmZZ_H = 3082,
|
||
|
|
AArch64_FMINNMP_ZPmZZ_S = 3083,
|
||
|
|
AArch64_FMINNMPv2f32 = 3084,
|
||
|
|
AArch64_FMINNMPv2f64 = 3085,
|
||
|
|
AArch64_FMINNMPv2i16p = 3086,
|
||
|
|
AArch64_FMINNMPv2i32p = 3087,
|
||
|
|
AArch64_FMINNMPv2i64p = 3088,
|
||
|
|
AArch64_FMINNMPv4f16 = 3089,
|
||
|
|
AArch64_FMINNMPv4f32 = 3090,
|
||
|
|
AArch64_FMINNMPv8f16 = 3091,
|
||
|
|
AArch64_FMINNMQV_D = 3092,
|
||
|
|
AArch64_FMINNMQV_H = 3093,
|
||
|
|
AArch64_FMINNMQV_S = 3094,
|
||
|
|
AArch64_FMINNMSrr = 3095,
|
||
|
|
AArch64_FMINNMV_VPZ_D = 3096,
|
||
|
|
AArch64_FMINNMV_VPZ_H = 3097,
|
||
|
|
AArch64_FMINNMV_VPZ_S = 3098,
|
||
|
|
AArch64_FMINNMVv4i16v = 3099,
|
||
|
|
AArch64_FMINNMVv4i32v = 3100,
|
||
|
|
AArch64_FMINNMVv8i16v = 3101,
|
||
|
|
AArch64_FMINNM_VG2_2Z2Z_D = 3102,
|
||
|
|
AArch64_FMINNM_VG2_2Z2Z_H = 3103,
|
||
|
|
AArch64_FMINNM_VG2_2Z2Z_S = 3104,
|
||
|
|
AArch64_FMINNM_VG2_2ZZ_D = 3105,
|
||
|
|
AArch64_FMINNM_VG2_2ZZ_H = 3106,
|
||
|
|
AArch64_FMINNM_VG2_2ZZ_S = 3107,
|
||
|
|
AArch64_FMINNM_VG4_4Z4Z_D = 3108,
|
||
|
|
AArch64_FMINNM_VG4_4Z4Z_H = 3109,
|
||
|
|
AArch64_FMINNM_VG4_4Z4Z_S = 3110,
|
||
|
|
AArch64_FMINNM_VG4_4ZZ_D = 3111,
|
||
|
|
AArch64_FMINNM_VG4_4ZZ_H = 3112,
|
||
|
|
AArch64_FMINNM_VG4_4ZZ_S = 3113,
|
||
|
|
AArch64_FMINNM_ZPmI_D = 3114,
|
||
|
|
AArch64_FMINNM_ZPmI_H = 3115,
|
||
|
|
AArch64_FMINNM_ZPmI_S = 3116,
|
||
|
|
AArch64_FMINNM_ZPmZ_D = 3117,
|
||
|
|
AArch64_FMINNM_ZPmZ_H = 3118,
|
||
|
|
AArch64_FMINNM_ZPmZ_S = 3119,
|
||
|
|
AArch64_FMINNMv2f32 = 3120,
|
||
|
|
AArch64_FMINNMv2f64 = 3121,
|
||
|
|
AArch64_FMINNMv4f16 = 3122,
|
||
|
|
AArch64_FMINNMv4f32 = 3123,
|
||
|
|
AArch64_FMINNMv8f16 = 3124,
|
||
|
|
AArch64_FMINP_ZPmZZ_D = 3125,
|
||
|
|
AArch64_FMINP_ZPmZZ_H = 3126,
|
||
|
|
AArch64_FMINP_ZPmZZ_S = 3127,
|
||
|
|
AArch64_FMINPv2f32 = 3128,
|
||
|
|
AArch64_FMINPv2f64 = 3129,
|
||
|
|
AArch64_FMINPv2i16p = 3130,
|
||
|
|
AArch64_FMINPv2i32p = 3131,
|
||
|
|
AArch64_FMINPv2i64p = 3132,
|
||
|
|
AArch64_FMINPv4f16 = 3133,
|
||
|
|
AArch64_FMINPv4f32 = 3134,
|
||
|
|
AArch64_FMINPv8f16 = 3135,
|
||
|
|
AArch64_FMINQV_D = 3136,
|
||
|
|
AArch64_FMINQV_H = 3137,
|
||
|
|
AArch64_FMINQV_S = 3138,
|
||
|
|
AArch64_FMINSrr = 3139,
|
||
|
|
AArch64_FMINV_VPZ_D = 3140,
|
||
|
|
AArch64_FMINV_VPZ_H = 3141,
|
||
|
|
AArch64_FMINV_VPZ_S = 3142,
|
||
|
|
AArch64_FMINVv4i16v = 3143,
|
||
|
|
AArch64_FMINVv4i32v = 3144,
|
||
|
|
AArch64_FMINVv8i16v = 3145,
|
||
|
|
AArch64_FMIN_VG2_2Z2Z_D = 3146,
|
||
|
|
AArch64_FMIN_VG2_2Z2Z_H = 3147,
|
||
|
|
AArch64_FMIN_VG2_2Z2Z_S = 3148,
|
||
|
|
AArch64_FMIN_VG2_2ZZ_D = 3149,
|
||
|
|
AArch64_FMIN_VG2_2ZZ_H = 3150,
|
||
|
|
AArch64_FMIN_VG2_2ZZ_S = 3151,
|
||
|
|
AArch64_FMIN_VG4_4Z4Z_D = 3152,
|
||
|
|
AArch64_FMIN_VG4_4Z4Z_H = 3153,
|
||
|
|
AArch64_FMIN_VG4_4Z4Z_S = 3154,
|
||
|
|
AArch64_FMIN_VG4_4ZZ_D = 3155,
|
||
|
|
AArch64_FMIN_VG4_4ZZ_H = 3156,
|
||
|
|
AArch64_FMIN_VG4_4ZZ_S = 3157,
|
||
|
|
AArch64_FMIN_ZPmI_D = 3158,
|
||
|
|
AArch64_FMIN_ZPmI_H = 3159,
|
||
|
|
AArch64_FMIN_ZPmI_S = 3160,
|
||
|
|
AArch64_FMIN_ZPmZ_D = 3161,
|
||
|
|
AArch64_FMIN_ZPmZ_H = 3162,
|
||
|
|
AArch64_FMIN_ZPmZ_S = 3163,
|
||
|
|
AArch64_FMINv2f32 = 3164,
|
||
|
|
AArch64_FMINv2f64 = 3165,
|
||
|
|
AArch64_FMINv4f16 = 3166,
|
||
|
|
AArch64_FMINv4f32 = 3167,
|
||
|
|
AArch64_FMINv8f16 = 3168,
|
||
|
|
AArch64_FMLAL2lanev4f16 = 3169,
|
||
|
|
AArch64_FMLAL2lanev8f16 = 3170,
|
||
|
|
AArch64_FMLAL2v4f16 = 3171,
|
||
|
|
AArch64_FMLAL2v8f16 = 3172,
|
||
|
|
AArch64_FMLALB_ZZZ = 3173,
|
||
|
|
AArch64_FMLALB_ZZZI = 3174,
|
||
|
|
AArch64_FMLALB_ZZZI_SHH = 3175,
|
||
|
|
AArch64_FMLALB_ZZZ_SHH = 3176,
|
||
|
|
AArch64_FMLALBlanev8f16 = 3177,
|
||
|
|
AArch64_FMLALBv8f16 = 3178,
|
||
|
|
AArch64_FMLALLBB_ZZZ = 3179,
|
||
|
|
AArch64_FMLALLBB_ZZZI = 3180,
|
||
|
|
AArch64_FMLALLBBlanev4f32 = 3181,
|
||
|
|
AArch64_FMLALLBBv4f32 = 3182,
|
||
|
|
AArch64_FMLALLBT_ZZZ = 3183,
|
||
|
|
AArch64_FMLALLBT_ZZZI = 3184,
|
||
|
|
AArch64_FMLALLBTlanev4f32 = 3185,
|
||
|
|
AArch64_FMLALLBTv4f32 = 3186,
|
||
|
|
AArch64_FMLALLTB_ZZZ = 3187,
|
||
|
|
AArch64_FMLALLTB_ZZZI = 3188,
|
||
|
|
AArch64_FMLALLTBlanev4f32 = 3189,
|
||
|
|
AArch64_FMLALLTBv4f32 = 3190,
|
||
|
|
AArch64_FMLALLTT_ZZZ = 3191,
|
||
|
|
AArch64_FMLALLTT_ZZZI = 3192,
|
||
|
|
AArch64_FMLALLTTlanev4f32 = 3193,
|
||
|
|
AArch64_FMLALLTTv4f32 = 3194,
|
||
|
|
AArch64_FMLALL_MZZI_BtoS = 3195,
|
||
|
|
AArch64_FMLALL_MZZ_BtoS = 3196,
|
||
|
|
AArch64_FMLALL_VG2_M2Z2Z_BtoS = 3197,
|
||
|
|
AArch64_FMLALL_VG2_M2ZZI_BtoS = 3198,
|
||
|
|
AArch64_FMLALL_VG2_M2ZZ_BtoS = 3199,
|
||
|
|
AArch64_FMLALL_VG4_M4Z4Z_BtoS = 3200,
|
||
|
|
AArch64_FMLALL_VG4_M4ZZI_BtoS = 3201,
|
||
|
|
AArch64_FMLALL_VG4_M4ZZ_BtoS = 3202,
|
||
|
|
AArch64_FMLALT_ZZZ = 3203,
|
||
|
|
AArch64_FMLALT_ZZZI = 3204,
|
||
|
|
AArch64_FMLALT_ZZZI_SHH = 3205,
|
||
|
|
AArch64_FMLALT_ZZZ_SHH = 3206,
|
||
|
|
AArch64_FMLALTlanev8f16 = 3207,
|
||
|
|
AArch64_FMLALTv8f16 = 3208,
|
||
|
|
AArch64_FMLAL_MZZI_BtoH = 3209,
|
||
|
|
AArch64_FMLAL_MZZI_HtoS = 3210,
|
||
|
|
AArch64_FMLAL_MZZ_HtoS = 3211,
|
||
|
|
AArch64_FMLAL_VG2_M2Z2Z_BtoH = 3212,
|
||
|
|
AArch64_FMLAL_VG2_M2Z2Z_HtoS = 3213,
|
||
|
|
AArch64_FMLAL_VG2_M2ZZI_BtoH = 3214,
|
||
|
|
AArch64_FMLAL_VG2_M2ZZI_HtoS = 3215,
|
||
|
|
AArch64_FMLAL_VG2_M2ZZ_BtoH = 3216,
|
||
|
|
AArch64_FMLAL_VG2_M2ZZ_HtoS = 3217,
|
||
|
|
AArch64_FMLAL_VG2_MZZ_BtoH = 3218,
|
||
|
|
AArch64_FMLAL_VG4_M4Z4Z_BtoH = 3219,
|
||
|
|
AArch64_FMLAL_VG4_M4Z4Z_HtoS = 3220,
|
||
|
|
AArch64_FMLAL_VG4_M4ZZI_BtoH = 3221,
|
||
|
|
AArch64_FMLAL_VG4_M4ZZI_HtoS = 3222,
|
||
|
|
AArch64_FMLAL_VG4_M4ZZ_BtoH = 3223,
|
||
|
|
AArch64_FMLAL_VG4_M4ZZ_HtoS = 3224,
|
||
|
|
AArch64_FMLALlanev4f16 = 3225,
|
||
|
|
AArch64_FMLALlanev8f16 = 3226,
|
||
|
|
AArch64_FMLALv4f16 = 3227,
|
||
|
|
AArch64_FMLALv8f16 = 3228,
|
||
|
|
AArch64_FMLA_VG2_M2Z2Z_D = 3229,
|
||
|
|
AArch64_FMLA_VG2_M2Z2Z_S = 3230,
|
||
|
|
AArch64_FMLA_VG2_M2Z4Z_H = 3231,
|
||
|
|
AArch64_FMLA_VG2_M2ZZI_D = 3232,
|
||
|
|
AArch64_FMLA_VG2_M2ZZI_H = 3233,
|
||
|
|
AArch64_FMLA_VG2_M2ZZI_S = 3234,
|
||
|
|
AArch64_FMLA_VG2_M2ZZ_D = 3235,
|
||
|
|
AArch64_FMLA_VG2_M2ZZ_H = 3236,
|
||
|
|
AArch64_FMLA_VG2_M2ZZ_S = 3237,
|
||
|
|
AArch64_FMLA_VG4_M4Z4Z_D = 3238,
|
||
|
|
AArch64_FMLA_VG4_M4Z4Z_H = 3239,
|
||
|
|
AArch64_FMLA_VG4_M4Z4Z_S = 3240,
|
||
|
|
AArch64_FMLA_VG4_M4ZZI_D = 3241,
|
||
|
|
AArch64_FMLA_VG4_M4ZZI_H = 3242,
|
||
|
|
AArch64_FMLA_VG4_M4ZZI_S = 3243,
|
||
|
|
AArch64_FMLA_VG4_M4ZZ_D = 3244,
|
||
|
|
AArch64_FMLA_VG4_M4ZZ_H = 3245,
|
||
|
|
AArch64_FMLA_VG4_M4ZZ_S = 3246,
|
||
|
|
AArch64_FMLA_ZPmZZ_D = 3247,
|
||
|
|
AArch64_FMLA_ZPmZZ_H = 3248,
|
||
|
|
AArch64_FMLA_ZPmZZ_S = 3249,
|
||
|
|
AArch64_FMLA_ZZZI_D = 3250,
|
||
|
|
AArch64_FMLA_ZZZI_H = 3251,
|
||
|
|
AArch64_FMLA_ZZZI_S = 3252,
|
||
|
|
AArch64_FMLAv1i16_indexed = 3253,
|
||
|
|
AArch64_FMLAv1i32_indexed = 3254,
|
||
|
|
AArch64_FMLAv1i64_indexed = 3255,
|
||
|
|
AArch64_FMLAv2f32 = 3256,
|
||
|
|
AArch64_FMLAv2f64 = 3257,
|
||
|
|
AArch64_FMLAv2i32_indexed = 3258,
|
||
|
|
AArch64_FMLAv2i64_indexed = 3259,
|
||
|
|
AArch64_FMLAv4f16 = 3260,
|
||
|
|
AArch64_FMLAv4f32 = 3261,
|
||
|
|
AArch64_FMLAv4i16_indexed = 3262,
|
||
|
|
AArch64_FMLAv4i32_indexed = 3263,
|
||
|
|
AArch64_FMLAv8f16 = 3264,
|
||
|
|
AArch64_FMLAv8i16_indexed = 3265,
|
||
|
|
AArch64_FMLSL2lanev4f16 = 3266,
|
||
|
|
AArch64_FMLSL2lanev8f16 = 3267,
|
||
|
|
AArch64_FMLSL2v4f16 = 3268,
|
||
|
|
AArch64_FMLSL2v8f16 = 3269,
|
||
|
|
AArch64_FMLSLB_ZZZI_SHH = 3270,
|
||
|
|
AArch64_FMLSLB_ZZZ_SHH = 3271,
|
||
|
|
AArch64_FMLSLT_ZZZI_SHH = 3272,
|
||
|
|
AArch64_FMLSLT_ZZZ_SHH = 3273,
|
||
|
|
AArch64_FMLSL_MZZI_HtoS = 3274,
|
||
|
|
AArch64_FMLSL_MZZ_HtoS = 3275,
|
||
|
|
AArch64_FMLSL_VG2_M2Z2Z_HtoS = 3276,
|
||
|
|
AArch64_FMLSL_VG2_M2ZZI_HtoS = 3277,
|
||
|
|
AArch64_FMLSL_VG2_M2ZZ_HtoS = 3278,
|
||
|
|
AArch64_FMLSL_VG4_M4Z4Z_HtoS = 3279,
|
||
|
|
AArch64_FMLSL_VG4_M4ZZI_HtoS = 3280,
|
||
|
|
AArch64_FMLSL_VG4_M4ZZ_HtoS = 3281,
|
||
|
|
AArch64_FMLSLlanev4f16 = 3282,
|
||
|
|
AArch64_FMLSLlanev8f16 = 3283,
|
||
|
|
AArch64_FMLSLv4f16 = 3284,
|
||
|
|
AArch64_FMLSLv8f16 = 3285,
|
||
|
|
AArch64_FMLS_VG2_M2Z2Z_D = 3286,
|
||
|
|
AArch64_FMLS_VG2_M2Z2Z_H = 3287,
|
||
|
|
AArch64_FMLS_VG2_M2Z2Z_S = 3288,
|
||
|
|
AArch64_FMLS_VG2_M2ZZI_D = 3289,
|
||
|
|
AArch64_FMLS_VG2_M2ZZI_H = 3290,
|
||
|
|
AArch64_FMLS_VG2_M2ZZI_S = 3291,
|
||
|
|
AArch64_FMLS_VG2_M2ZZ_D = 3292,
|
||
|
|
AArch64_FMLS_VG2_M2ZZ_H = 3293,
|
||
|
|
AArch64_FMLS_VG2_M2ZZ_S = 3294,
|
||
|
|
AArch64_FMLS_VG4_M4Z2Z_H = 3295,
|
||
|
|
AArch64_FMLS_VG4_M4Z4Z_D = 3296,
|
||
|
|
AArch64_FMLS_VG4_M4Z4Z_S = 3297,
|
||
|
|
AArch64_FMLS_VG4_M4ZZI_D = 3298,
|
||
|
|
AArch64_FMLS_VG4_M4ZZI_H = 3299,
|
||
|
|
AArch64_FMLS_VG4_M4ZZI_S = 3300,
|
||
|
|
AArch64_FMLS_VG4_M4ZZ_D = 3301,
|
||
|
|
AArch64_FMLS_VG4_M4ZZ_H = 3302,
|
||
|
|
AArch64_FMLS_VG4_M4ZZ_S = 3303,
|
||
|
|
AArch64_FMLS_ZPmZZ_D = 3304,
|
||
|
|
AArch64_FMLS_ZPmZZ_H = 3305,
|
||
|
|
AArch64_FMLS_ZPmZZ_S = 3306,
|
||
|
|
AArch64_FMLS_ZZZI_D = 3307,
|
||
|
|
AArch64_FMLS_ZZZI_H = 3308,
|
||
|
|
AArch64_FMLS_ZZZI_S = 3309,
|
||
|
|
AArch64_FMLSv1i16_indexed = 3310,
|
||
|
|
AArch64_FMLSv1i32_indexed = 3311,
|
||
|
|
AArch64_FMLSv1i64_indexed = 3312,
|
||
|
|
AArch64_FMLSv2f32 = 3313,
|
||
|
|
AArch64_FMLSv2f64 = 3314,
|
||
|
|
AArch64_FMLSv2i32_indexed = 3315,
|
||
|
|
AArch64_FMLSv2i64_indexed = 3316,
|
||
|
|
AArch64_FMLSv4f16 = 3317,
|
||
|
|
AArch64_FMLSv4f32 = 3318,
|
||
|
|
AArch64_FMLSv4i16_indexed = 3319,
|
||
|
|
AArch64_FMLSv4i32_indexed = 3320,
|
||
|
|
AArch64_FMLSv8f16 = 3321,
|
||
|
|
AArch64_FMLSv8i16_indexed = 3322,
|
||
|
|
AArch64_FMMLA_ZZZ_D = 3323,
|
||
|
|
AArch64_FMMLA_ZZZ_S = 3324,
|
||
|
|
AArch64_FMOPAL_MPPZZ = 3325,
|
||
|
|
AArch64_FMOPA_MPPZZ_BtoH = 3326,
|
||
|
|
AArch64_FMOPA_MPPZZ_BtoS = 3327,
|
||
|
|
AArch64_FMOPA_MPPZZ_D = 3328,
|
||
|
|
AArch64_FMOPA_MPPZZ_H = 3329,
|
||
|
|
AArch64_FMOPA_MPPZZ_S = 3330,
|
||
|
|
AArch64_FMOPSL_MPPZZ = 3331,
|
||
|
|
AArch64_FMOPS_MPPZZ_D = 3332,
|
||
|
|
AArch64_FMOPS_MPPZZ_H = 3333,
|
||
|
|
AArch64_FMOPS_MPPZZ_S = 3334,
|
||
|
|
AArch64_FMOVDXHighr = 3335,
|
||
|
|
AArch64_FMOVDXr = 3336,
|
||
|
|
AArch64_FMOVDi = 3337,
|
||
|
|
AArch64_FMOVDr = 3338,
|
||
|
|
AArch64_FMOVHWr = 3339,
|
||
|
|
AArch64_FMOVHXr = 3340,
|
||
|
|
AArch64_FMOVHi = 3341,
|
||
|
|
AArch64_FMOVHr = 3342,
|
||
|
|
AArch64_FMOVSWr = 3343,
|
||
|
|
AArch64_FMOVSi = 3344,
|
||
|
|
AArch64_FMOVSr = 3345,
|
||
|
|
AArch64_FMOVWHr = 3346,
|
||
|
|
AArch64_FMOVWSr = 3347,
|
||
|
|
AArch64_FMOVXDHighr = 3348,
|
||
|
|
AArch64_FMOVXDr = 3349,
|
||
|
|
AArch64_FMOVXHr = 3350,
|
||
|
|
AArch64_FMOVv2f32_ns = 3351,
|
||
|
|
AArch64_FMOVv2f64_ns = 3352,
|
||
|
|
AArch64_FMOVv4f16_ns = 3353,
|
||
|
|
AArch64_FMOVv4f32_ns = 3354,
|
||
|
|
AArch64_FMOVv8f16_ns = 3355,
|
||
|
|
AArch64_FMSB_ZPmZZ_D = 3356,
|
||
|
|
AArch64_FMSB_ZPmZZ_H = 3357,
|
||
|
|
AArch64_FMSB_ZPmZZ_S = 3358,
|
||
|
|
AArch64_FMSUBDrrr = 3359,
|
||
|
|
AArch64_FMSUBHrrr = 3360,
|
||
|
|
AArch64_FMSUBSrrr = 3361,
|
||
|
|
AArch64_FMULDrr = 3362,
|
||
|
|
AArch64_FMULHrr = 3363,
|
||
|
|
AArch64_FMULSrr = 3364,
|
||
|
|
AArch64_FMULX16 = 3365,
|
||
|
|
AArch64_FMULX32 = 3366,
|
||
|
|
AArch64_FMULX64 = 3367,
|
||
|
|
AArch64_FMULX_ZPmZ_D = 3368,
|
||
|
|
AArch64_FMULX_ZPmZ_H = 3369,
|
||
|
|
AArch64_FMULX_ZPmZ_S = 3370,
|
||
|
|
AArch64_FMULXv1i16_indexed = 3371,
|
||
|
|
AArch64_FMULXv1i32_indexed = 3372,
|
||
|
|
AArch64_FMULXv1i64_indexed = 3373,
|
||
|
|
AArch64_FMULXv2f32 = 3374,
|
||
|
|
AArch64_FMULXv2f64 = 3375,
|
||
|
|
AArch64_FMULXv2i32_indexed = 3376,
|
||
|
|
AArch64_FMULXv2i64_indexed = 3377,
|
||
|
|
AArch64_FMULXv4f16 = 3378,
|
||
|
|
AArch64_FMULXv4f32 = 3379,
|
||
|
|
AArch64_FMULXv4i16_indexed = 3380,
|
||
|
|
AArch64_FMULXv4i32_indexed = 3381,
|
||
|
|
AArch64_FMULXv8f16 = 3382,
|
||
|
|
AArch64_FMULXv8i16_indexed = 3383,
|
||
|
|
AArch64_FMUL_ZPmI_D = 3384,
|
||
|
|
AArch64_FMUL_ZPmI_H = 3385,
|
||
|
|
AArch64_FMUL_ZPmI_S = 3386,
|
||
|
|
AArch64_FMUL_ZPmZ_D = 3387,
|
||
|
|
AArch64_FMUL_ZPmZ_H = 3388,
|
||
|
|
AArch64_FMUL_ZPmZ_S = 3389,
|
||
|
|
AArch64_FMUL_ZZZI_D = 3390,
|
||
|
|
AArch64_FMUL_ZZZI_H = 3391,
|
||
|
|
AArch64_FMUL_ZZZI_S = 3392,
|
||
|
|
AArch64_FMUL_ZZZ_D = 3393,
|
||
|
|
AArch64_FMUL_ZZZ_H = 3394,
|
||
|
|
AArch64_FMUL_ZZZ_S = 3395,
|
||
|
|
AArch64_FMULv1i16_indexed = 3396,
|
||
|
|
AArch64_FMULv1i32_indexed = 3397,
|
||
|
|
AArch64_FMULv1i64_indexed = 3398,
|
||
|
|
AArch64_FMULv2f32 = 3399,
|
||
|
|
AArch64_FMULv2f64 = 3400,
|
||
|
|
AArch64_FMULv2i32_indexed = 3401,
|
||
|
|
AArch64_FMULv2i64_indexed = 3402,
|
||
|
|
AArch64_FMULv4f16 = 3403,
|
||
|
|
AArch64_FMULv4f32 = 3404,
|
||
|
|
AArch64_FMULv4i16_indexed = 3405,
|
||
|
|
AArch64_FMULv4i32_indexed = 3406,
|
||
|
|
AArch64_FMULv8f16 = 3407,
|
||
|
|
AArch64_FMULv8i16_indexed = 3408,
|
||
|
|
AArch64_FNEGDr = 3409,
|
||
|
|
AArch64_FNEGHr = 3410,
|
||
|
|
AArch64_FNEGSr = 3411,
|
||
|
|
AArch64_FNEG_ZPmZ_D = 3412,
|
||
|
|
AArch64_FNEG_ZPmZ_H = 3413,
|
||
|
|
AArch64_FNEG_ZPmZ_S = 3414,
|
||
|
|
AArch64_FNEGv2f32 = 3415,
|
||
|
|
AArch64_FNEGv2f64 = 3416,
|
||
|
|
AArch64_FNEGv4f16 = 3417,
|
||
|
|
AArch64_FNEGv4f32 = 3418,
|
||
|
|
AArch64_FNEGv8f16 = 3419,
|
||
|
|
AArch64_FNMADDDrrr = 3420,
|
||
|
|
AArch64_FNMADDHrrr = 3421,
|
||
|
|
AArch64_FNMADDSrrr = 3422,
|
||
|
|
AArch64_FNMAD_ZPmZZ_D = 3423,
|
||
|
|
AArch64_FNMAD_ZPmZZ_H = 3424,
|
||
|
|
AArch64_FNMAD_ZPmZZ_S = 3425,
|
||
|
|
AArch64_FNMLA_ZPmZZ_D = 3426,
|
||
|
|
AArch64_FNMLA_ZPmZZ_H = 3427,
|
||
|
|
AArch64_FNMLA_ZPmZZ_S = 3428,
|
||
|
|
AArch64_FNMLS_ZPmZZ_D = 3429,
|
||
|
|
AArch64_FNMLS_ZPmZZ_H = 3430,
|
||
|
|
AArch64_FNMLS_ZPmZZ_S = 3431,
|
||
|
|
AArch64_FNMSB_ZPmZZ_D = 3432,
|
||
|
|
AArch64_FNMSB_ZPmZZ_H = 3433,
|
||
|
|
AArch64_FNMSB_ZPmZZ_S = 3434,
|
||
|
|
AArch64_FNMSUBDrrr = 3435,
|
||
|
|
AArch64_FNMSUBHrrr = 3436,
|
||
|
|
AArch64_FNMSUBSrrr = 3437,
|
||
|
|
AArch64_FNMULDrr = 3438,
|
||
|
|
AArch64_FNMULHrr = 3439,
|
||
|
|
AArch64_FNMULSrr = 3440,
|
||
|
|
AArch64_FRECPE_ZZ_D = 3441,
|
||
|
|
AArch64_FRECPE_ZZ_H = 3442,
|
||
|
|
AArch64_FRECPE_ZZ_S = 3443,
|
||
|
|
AArch64_FRECPEv1f16 = 3444,
|
||
|
|
AArch64_FRECPEv1i32 = 3445,
|
||
|
|
AArch64_FRECPEv1i64 = 3446,
|
||
|
|
AArch64_FRECPEv2f32 = 3447,
|
||
|
|
AArch64_FRECPEv2f64 = 3448,
|
||
|
|
AArch64_FRECPEv4f16 = 3449,
|
||
|
|
AArch64_FRECPEv4f32 = 3450,
|
||
|
|
AArch64_FRECPEv8f16 = 3451,
|
||
|
|
AArch64_FRECPS16 = 3452,
|
||
|
|
AArch64_FRECPS32 = 3453,
|
||
|
|
AArch64_FRECPS64 = 3454,
|
||
|
|
AArch64_FRECPS_ZZZ_D = 3455,
|
||
|
|
AArch64_FRECPS_ZZZ_H = 3456,
|
||
|
|
AArch64_FRECPS_ZZZ_S = 3457,
|
||
|
|
AArch64_FRECPSv2f32 = 3458,
|
||
|
|
AArch64_FRECPSv2f64 = 3459,
|
||
|
|
AArch64_FRECPSv4f16 = 3460,
|
||
|
|
AArch64_FRECPSv4f32 = 3461,
|
||
|
|
AArch64_FRECPSv8f16 = 3462,
|
||
|
|
AArch64_FRECPX_ZPmZ_D = 3463,
|
||
|
|
AArch64_FRECPX_ZPmZ_H = 3464,
|
||
|
|
AArch64_FRECPX_ZPmZ_S = 3465,
|
||
|
|
AArch64_FRECPXv1f16 = 3466,
|
||
|
|
AArch64_FRECPXv1i32 = 3467,
|
||
|
|
AArch64_FRECPXv1i64 = 3468,
|
||
|
|
AArch64_FRINT32XDr = 3469,
|
||
|
|
AArch64_FRINT32XSr = 3470,
|
||
|
|
AArch64_FRINT32Xv2f32 = 3471,
|
||
|
|
AArch64_FRINT32Xv2f64 = 3472,
|
||
|
|
AArch64_FRINT32Xv4f32 = 3473,
|
||
|
|
AArch64_FRINT32ZDr = 3474,
|
||
|
|
AArch64_FRINT32ZSr = 3475,
|
||
|
|
AArch64_FRINT32Zv2f32 = 3476,
|
||
|
|
AArch64_FRINT32Zv2f64 = 3477,
|
||
|
|
AArch64_FRINT32Zv4f32 = 3478,
|
||
|
|
AArch64_FRINT64XDr = 3479,
|
||
|
|
AArch64_FRINT64XSr = 3480,
|
||
|
|
AArch64_FRINT64Xv2f32 = 3481,
|
||
|
|
AArch64_FRINT64Xv2f64 = 3482,
|
||
|
|
AArch64_FRINT64Xv4f32 = 3483,
|
||
|
|
AArch64_FRINT64ZDr = 3484,
|
||
|
|
AArch64_FRINT64ZSr = 3485,
|
||
|
|
AArch64_FRINT64Zv2f32 = 3486,
|
||
|
|
AArch64_FRINT64Zv2f64 = 3487,
|
||
|
|
AArch64_FRINT64Zv4f32 = 3488,
|
||
|
|
AArch64_FRINTADr = 3489,
|
||
|
|
AArch64_FRINTAHr = 3490,
|
||
|
|
AArch64_FRINTASr = 3491,
|
||
|
|
AArch64_FRINTA_2Z2Z_S = 3492,
|
||
|
|
AArch64_FRINTA_4Z4Z_S = 3493,
|
||
|
|
AArch64_FRINTA_ZPmZ_D = 3494,
|
||
|
|
AArch64_FRINTA_ZPmZ_H = 3495,
|
||
|
|
AArch64_FRINTA_ZPmZ_S = 3496,
|
||
|
|
AArch64_FRINTAv2f32 = 3497,
|
||
|
|
AArch64_FRINTAv2f64 = 3498,
|
||
|
|
AArch64_FRINTAv4f16 = 3499,
|
||
|
|
AArch64_FRINTAv4f32 = 3500,
|
||
|
|
AArch64_FRINTAv8f16 = 3501,
|
||
|
|
AArch64_FRINTIDr = 3502,
|
||
|
|
AArch64_FRINTIHr = 3503,
|
||
|
|
AArch64_FRINTISr = 3504,
|
||
|
|
AArch64_FRINTI_ZPmZ_D = 3505,
|
||
|
|
AArch64_FRINTI_ZPmZ_H = 3506,
|
||
|
|
AArch64_FRINTI_ZPmZ_S = 3507,
|
||
|
|
AArch64_FRINTIv2f32 = 3508,
|
||
|
|
AArch64_FRINTIv2f64 = 3509,
|
||
|
|
AArch64_FRINTIv4f16 = 3510,
|
||
|
|
AArch64_FRINTIv4f32 = 3511,
|
||
|
|
AArch64_FRINTIv8f16 = 3512,
|
||
|
|
AArch64_FRINTMDr = 3513,
|
||
|
|
AArch64_FRINTMHr = 3514,
|
||
|
|
AArch64_FRINTMSr = 3515,
|
||
|
|
AArch64_FRINTM_2Z2Z_S = 3516,
|
||
|
|
AArch64_FRINTM_4Z4Z_S = 3517,
|
||
|
|
AArch64_FRINTM_ZPmZ_D = 3518,
|
||
|
|
AArch64_FRINTM_ZPmZ_H = 3519,
|
||
|
|
AArch64_FRINTM_ZPmZ_S = 3520,
|
||
|
|
AArch64_FRINTMv2f32 = 3521,
|
||
|
|
AArch64_FRINTMv2f64 = 3522,
|
||
|
|
AArch64_FRINTMv4f16 = 3523,
|
||
|
|
AArch64_FRINTMv4f32 = 3524,
|
||
|
|
AArch64_FRINTMv8f16 = 3525,
|
||
|
|
AArch64_FRINTNDr = 3526,
|
||
|
|
AArch64_FRINTNHr = 3527,
|
||
|
|
AArch64_FRINTNSr = 3528,
|
||
|
|
AArch64_FRINTN_2Z2Z_S = 3529,
|
||
|
|
AArch64_FRINTN_4Z4Z_S = 3530,
|
||
|
|
AArch64_FRINTN_ZPmZ_D = 3531,
|
||
|
|
AArch64_FRINTN_ZPmZ_H = 3532,
|
||
|
|
AArch64_FRINTN_ZPmZ_S = 3533,
|
||
|
|
AArch64_FRINTNv2f32 = 3534,
|
||
|
|
AArch64_FRINTNv2f64 = 3535,
|
||
|
|
AArch64_FRINTNv4f16 = 3536,
|
||
|
|
AArch64_FRINTNv4f32 = 3537,
|
||
|
|
AArch64_FRINTNv8f16 = 3538,
|
||
|
|
AArch64_FRINTPDr = 3539,
|
||
|
|
AArch64_FRINTPHr = 3540,
|
||
|
|
AArch64_FRINTPSr = 3541,
|
||
|
|
AArch64_FRINTP_2Z2Z_S = 3542,
|
||
|
|
AArch64_FRINTP_4Z4Z_S = 3543,
|
||
|
|
AArch64_FRINTP_ZPmZ_D = 3544,
|
||
|
|
AArch64_FRINTP_ZPmZ_H = 3545,
|
||
|
|
AArch64_FRINTP_ZPmZ_S = 3546,
|
||
|
|
AArch64_FRINTPv2f32 = 3547,
|
||
|
|
AArch64_FRINTPv2f64 = 3548,
|
||
|
|
AArch64_FRINTPv4f16 = 3549,
|
||
|
|
AArch64_FRINTPv4f32 = 3550,
|
||
|
|
AArch64_FRINTPv8f16 = 3551,
|
||
|
|
AArch64_FRINTXDr = 3552,
|
||
|
|
AArch64_FRINTXHr = 3553,
|
||
|
|
AArch64_FRINTXSr = 3554,
|
||
|
|
AArch64_FRINTX_ZPmZ_D = 3555,
|
||
|
|
AArch64_FRINTX_ZPmZ_H = 3556,
|
||
|
|
AArch64_FRINTX_ZPmZ_S = 3557,
|
||
|
|
AArch64_FRINTXv2f32 = 3558,
|
||
|
|
AArch64_FRINTXv2f64 = 3559,
|
||
|
|
AArch64_FRINTXv4f16 = 3560,
|
||
|
|
AArch64_FRINTXv4f32 = 3561,
|
||
|
|
AArch64_FRINTXv8f16 = 3562,
|
||
|
|
AArch64_FRINTZDr = 3563,
|
||
|
|
AArch64_FRINTZHr = 3564,
|
||
|
|
AArch64_FRINTZSr = 3565,
|
||
|
|
AArch64_FRINTZ_ZPmZ_D = 3566,
|
||
|
|
AArch64_FRINTZ_ZPmZ_H = 3567,
|
||
|
|
AArch64_FRINTZ_ZPmZ_S = 3568,
|
||
|
|
AArch64_FRINTZv2f32 = 3569,
|
||
|
|
AArch64_FRINTZv2f64 = 3570,
|
||
|
|
AArch64_FRINTZv4f16 = 3571,
|
||
|
|
AArch64_FRINTZv4f32 = 3572,
|
||
|
|
AArch64_FRINTZv8f16 = 3573,
|
||
|
|
AArch64_FRSQRTE_ZZ_D = 3574,
|
||
|
|
AArch64_FRSQRTE_ZZ_H = 3575,
|
||
|
|
AArch64_FRSQRTE_ZZ_S = 3576,
|
||
|
|
AArch64_FRSQRTEv1f16 = 3577,
|
||
|
|
AArch64_FRSQRTEv1i32 = 3578,
|
||
|
|
AArch64_FRSQRTEv1i64 = 3579,
|
||
|
|
AArch64_FRSQRTEv2f32 = 3580,
|
||
|
|
AArch64_FRSQRTEv2f64 = 3581,
|
||
|
|
AArch64_FRSQRTEv4f16 = 3582,
|
||
|
|
AArch64_FRSQRTEv4f32 = 3583,
|
||
|
|
AArch64_FRSQRTEv8f16 = 3584,
|
||
|
|
AArch64_FRSQRTS16 = 3585,
|
||
|
|
AArch64_FRSQRTS32 = 3586,
|
||
|
|
AArch64_FRSQRTS64 = 3587,
|
||
|
|
AArch64_FRSQRTS_ZZZ_D = 3588,
|
||
|
|
AArch64_FRSQRTS_ZZZ_H = 3589,
|
||
|
|
AArch64_FRSQRTS_ZZZ_S = 3590,
|
||
|
|
AArch64_FRSQRTSv2f32 = 3591,
|
||
|
|
AArch64_FRSQRTSv2f64 = 3592,
|
||
|
|
AArch64_FRSQRTSv4f16 = 3593,
|
||
|
|
AArch64_FRSQRTSv4f32 = 3594,
|
||
|
|
AArch64_FRSQRTSv8f16 = 3595,
|
||
|
|
AArch64_FSCALE_2Z2Z_D = 3596,
|
||
|
|
AArch64_FSCALE_2Z2Z_H = 3597,
|
||
|
|
AArch64_FSCALE_2Z2Z_S = 3598,
|
||
|
|
AArch64_FSCALE_2ZZ_D = 3599,
|
||
|
|
AArch64_FSCALE_2ZZ_H = 3600,
|
||
|
|
AArch64_FSCALE_2ZZ_S = 3601,
|
||
|
|
AArch64_FSCALE_4Z4Z_D = 3602,
|
||
|
|
AArch64_FSCALE_4Z4Z_H = 3603,
|
||
|
|
AArch64_FSCALE_4Z4Z_S = 3604,
|
||
|
|
AArch64_FSCALE_4ZZ_D = 3605,
|
||
|
|
AArch64_FSCALE_4ZZ_H = 3606,
|
||
|
|
AArch64_FSCALE_4ZZ_S = 3607,
|
||
|
|
AArch64_FSCALE_ZPmZ_D = 3608,
|
||
|
|
AArch64_FSCALE_ZPmZ_H = 3609,
|
||
|
|
AArch64_FSCALE_ZPmZ_S = 3610,
|
||
|
|
AArch64_FSCALEv2f32 = 3611,
|
||
|
|
AArch64_FSCALEv2f64 = 3612,
|
||
|
|
AArch64_FSCALEv4f16 = 3613,
|
||
|
|
AArch64_FSCALEv4f32 = 3614,
|
||
|
|
AArch64_FSCALEv8f16 = 3615,
|
||
|
|
AArch64_FSQRTDr = 3616,
|
||
|
|
AArch64_FSQRTHr = 3617,
|
||
|
|
AArch64_FSQRTSr = 3618,
|
||
|
|
AArch64_FSQRT_ZPmZ_D = 3619,
|
||
|
|
AArch64_FSQRT_ZPmZ_H = 3620,
|
||
|
|
AArch64_FSQRT_ZPmZ_S = 3621,
|
||
|
|
AArch64_FSQRTv2f32 = 3622,
|
||
|
|
AArch64_FSQRTv2f64 = 3623,
|
||
|
|
AArch64_FSQRTv4f16 = 3624,
|
||
|
|
AArch64_FSQRTv4f32 = 3625,
|
||
|
|
AArch64_FSQRTv8f16 = 3626,
|
||
|
|
AArch64_FSUBDrr = 3627,
|
||
|
|
AArch64_FSUBHrr = 3628,
|
||
|
|
AArch64_FSUBR_ZPmI_D = 3629,
|
||
|
|
AArch64_FSUBR_ZPmI_H = 3630,
|
||
|
|
AArch64_FSUBR_ZPmI_S = 3631,
|
||
|
|
AArch64_FSUBR_ZPmZ_D = 3632,
|
||
|
|
AArch64_FSUBR_ZPmZ_H = 3633,
|
||
|
|
AArch64_FSUBR_ZPmZ_S = 3634,
|
||
|
|
AArch64_FSUBSrr = 3635,
|
||
|
|
AArch64_FSUB_VG2_M2Z_D = 3636,
|
||
|
|
AArch64_FSUB_VG2_M2Z_H = 3637,
|
||
|
|
AArch64_FSUB_VG2_M2Z_S = 3638,
|
||
|
|
AArch64_FSUB_VG4_M4Z_D = 3639,
|
||
|
|
AArch64_FSUB_VG4_M4Z_H = 3640,
|
||
|
|
AArch64_FSUB_VG4_M4Z_S = 3641,
|
||
|
|
AArch64_FSUB_ZPmI_D = 3642,
|
||
|
|
AArch64_FSUB_ZPmI_H = 3643,
|
||
|
|
AArch64_FSUB_ZPmI_S = 3644,
|
||
|
|
AArch64_FSUB_ZPmZ_D = 3645,
|
||
|
|
AArch64_FSUB_ZPmZ_H = 3646,
|
||
|
|
AArch64_FSUB_ZPmZ_S = 3647,
|
||
|
|
AArch64_FSUB_ZZZ_D = 3648,
|
||
|
|
AArch64_FSUB_ZZZ_H = 3649,
|
||
|
|
AArch64_FSUB_ZZZ_S = 3650,
|
||
|
|
AArch64_FSUBv2f32 = 3651,
|
||
|
|
AArch64_FSUBv2f64 = 3652,
|
||
|
|
AArch64_FSUBv4f16 = 3653,
|
||
|
|
AArch64_FSUBv4f32 = 3654,
|
||
|
|
AArch64_FSUBv8f16 = 3655,
|
||
|
|
AArch64_FTMAD_ZZI_D = 3656,
|
||
|
|
AArch64_FTMAD_ZZI_H = 3657,
|
||
|
|
AArch64_FTMAD_ZZI_S = 3658,
|
||
|
|
AArch64_FTSMUL_ZZZ_D = 3659,
|
||
|
|
AArch64_FTSMUL_ZZZ_H = 3660,
|
||
|
|
AArch64_FTSMUL_ZZZ_S = 3661,
|
||
|
|
AArch64_FTSSEL_ZZZ_D = 3662,
|
||
|
|
AArch64_FTSSEL_ZZZ_H = 3663,
|
||
|
|
AArch64_FTSSEL_ZZZ_S = 3664,
|
||
|
|
AArch64_FVDOTB_VG4_M2ZZI_BtoS = 3665,
|
||
|
|
AArch64_FVDOTT_VG4_M2ZZI_BtoS = 3666,
|
||
|
|
AArch64_FVDOT_VG2_M2ZZI_BtoH = 3667,
|
||
|
|
AArch64_FVDOT_VG2_M2ZZI_HtoS = 3668,
|
||
|
|
AArch64_GCSPOPCX = 3669,
|
||
|
|
AArch64_GCSPOPM = 3670,
|
||
|
|
AArch64_GCSPOPX = 3671,
|
||
|
|
AArch64_GCSPUSHM = 3672,
|
||
|
|
AArch64_GCSPUSHX = 3673,
|
||
|
|
AArch64_GCSSS1 = 3674,
|
||
|
|
AArch64_GCSSS2 = 3675,
|
||
|
|
AArch64_GCSSTR = 3676,
|
||
|
|
AArch64_GCSSTTR = 3677,
|
||
|
|
AArch64_GLD1B_D_IMM_REAL = 3678,
|
||
|
|
AArch64_GLD1B_D_REAL = 3679,
|
||
|
|
AArch64_GLD1B_D_SXTW_REAL = 3680,
|
||
|
|
AArch64_GLD1B_D_UXTW_REAL = 3681,
|
||
|
|
AArch64_GLD1B_S_IMM_REAL = 3682,
|
||
|
|
AArch64_GLD1B_S_SXTW_REAL = 3683,
|
||
|
|
AArch64_GLD1B_S_UXTW_REAL = 3684,
|
||
|
|
AArch64_GLD1D_IMM_REAL = 3685,
|
||
|
|
AArch64_GLD1D_REAL = 3686,
|
||
|
|
AArch64_GLD1D_SCALED_REAL = 3687,
|
||
|
|
AArch64_GLD1D_SXTW_REAL = 3688,
|
||
|
|
AArch64_GLD1D_SXTW_SCALED_REAL = 3689,
|
||
|
|
AArch64_GLD1D_UXTW_REAL = 3690,
|
||
|
|
AArch64_GLD1D_UXTW_SCALED_REAL = 3691,
|
||
|
|
AArch64_GLD1H_D_IMM_REAL = 3692,
|
||
|
|
AArch64_GLD1H_D_REAL = 3693,
|
||
|
|
AArch64_GLD1H_D_SCALED_REAL = 3694,
|
||
|
|
AArch64_GLD1H_D_SXTW_REAL = 3695,
|
||
|
|
AArch64_GLD1H_D_SXTW_SCALED_REAL = 3696,
|
||
|
|
AArch64_GLD1H_D_UXTW_REAL = 3697,
|
||
|
|
AArch64_GLD1H_D_UXTW_SCALED_REAL = 3698,
|
||
|
|
AArch64_GLD1H_S_IMM_REAL = 3699,
|
||
|
|
AArch64_GLD1H_S_SXTW_REAL = 3700,
|
||
|
|
AArch64_GLD1H_S_SXTW_SCALED_REAL = 3701,
|
||
|
|
AArch64_GLD1H_S_UXTW_REAL = 3702,
|
||
|
|
AArch64_GLD1H_S_UXTW_SCALED_REAL = 3703,
|
||
|
|
AArch64_GLD1Q = 3704,
|
||
|
|
AArch64_GLD1SB_D_IMM_REAL = 3705,
|
||
|
|
AArch64_GLD1SB_D_REAL = 3706,
|
||
|
|
AArch64_GLD1SB_D_SXTW_REAL = 3707,
|
||
|
|
AArch64_GLD1SB_D_UXTW_REAL = 3708,
|
||
|
|
AArch64_GLD1SB_S_IMM_REAL = 3709,
|
||
|
|
AArch64_GLD1SB_S_SXTW_REAL = 3710,
|
||
|
|
AArch64_GLD1SB_S_UXTW_REAL = 3711,
|
||
|
|
AArch64_GLD1SH_D_IMM_REAL = 3712,
|
||
|
|
AArch64_GLD1SH_D_REAL = 3713,
|
||
|
|
AArch64_GLD1SH_D_SCALED_REAL = 3714,
|
||
|
|
AArch64_GLD1SH_D_SXTW_REAL = 3715,
|
||
|
|
AArch64_GLD1SH_D_SXTW_SCALED_REAL = 3716,
|
||
|
|
AArch64_GLD1SH_D_UXTW_REAL = 3717,
|
||
|
|
AArch64_GLD1SH_D_UXTW_SCALED_REAL = 3718,
|
||
|
|
AArch64_GLD1SH_S_IMM_REAL = 3719,
|
||
|
|
AArch64_GLD1SH_S_SXTW_REAL = 3720,
|
||
|
|
AArch64_GLD1SH_S_SXTW_SCALED_REAL = 3721,
|
||
|
|
AArch64_GLD1SH_S_UXTW_REAL = 3722,
|
||
|
|
AArch64_GLD1SH_S_UXTW_SCALED_REAL = 3723,
|
||
|
|
AArch64_GLD1SW_D_IMM_REAL = 3724,
|
||
|
|
AArch64_GLD1SW_D_REAL = 3725,
|
||
|
|
AArch64_GLD1SW_D_SCALED_REAL = 3726,
|
||
|
|
AArch64_GLD1SW_D_SXTW_REAL = 3727,
|
||
|
|
AArch64_GLD1SW_D_SXTW_SCALED_REAL = 3728,
|
||
|
|
AArch64_GLD1SW_D_UXTW_REAL = 3729,
|
||
|
|
AArch64_GLD1SW_D_UXTW_SCALED_REAL = 3730,
|
||
|
|
AArch64_GLD1W_D_IMM_REAL = 3731,
|
||
|
|
AArch64_GLD1W_D_REAL = 3732,
|
||
|
|
AArch64_GLD1W_D_SCALED_REAL = 3733,
|
||
|
|
AArch64_GLD1W_D_SXTW_REAL = 3734,
|
||
|
|
AArch64_GLD1W_D_SXTW_SCALED_REAL = 3735,
|
||
|
|
AArch64_GLD1W_D_UXTW_REAL = 3736,
|
||
|
|
AArch64_GLD1W_D_UXTW_SCALED_REAL = 3737,
|
||
|
|
AArch64_GLD1W_IMM_REAL = 3738,
|
||
|
|
AArch64_GLD1W_SXTW_REAL = 3739,
|
||
|
|
AArch64_GLD1W_SXTW_SCALED_REAL = 3740,
|
||
|
|
AArch64_GLD1W_UXTW_REAL = 3741,
|
||
|
|
AArch64_GLD1W_UXTW_SCALED_REAL = 3742,
|
||
|
|
AArch64_GLDFF1B_D_IMM_REAL = 3743,
|
||
|
|
AArch64_GLDFF1B_D_REAL = 3744,
|
||
|
|
AArch64_GLDFF1B_D_SXTW_REAL = 3745,
|
||
|
|
AArch64_GLDFF1B_D_UXTW_REAL = 3746,
|
||
|
|
AArch64_GLDFF1B_S_IMM_REAL = 3747,
|
||
|
|
AArch64_GLDFF1B_S_SXTW_REAL = 3748,
|
||
|
|
AArch64_GLDFF1B_S_UXTW_REAL = 3749,
|
||
|
|
AArch64_GLDFF1D_IMM_REAL = 3750,
|
||
|
|
AArch64_GLDFF1D_REAL = 3751,
|
||
|
|
AArch64_GLDFF1D_SCALED_REAL = 3752,
|
||
|
|
AArch64_GLDFF1D_SXTW_REAL = 3753,
|
||
|
|
AArch64_GLDFF1D_SXTW_SCALED_REAL = 3754,
|
||
|
|
AArch64_GLDFF1D_UXTW_REAL = 3755,
|
||
|
|
AArch64_GLDFF1D_UXTW_SCALED_REAL = 3756,
|
||
|
|
AArch64_GLDFF1H_D_IMM_REAL = 3757,
|
||
|
|
AArch64_GLDFF1H_D_REAL = 3758,
|
||
|
|
AArch64_GLDFF1H_D_SCALED_REAL = 3759,
|
||
|
|
AArch64_GLDFF1H_D_SXTW_REAL = 3760,
|
||
|
|
AArch64_GLDFF1H_D_SXTW_SCALED_REAL = 3761,
|
||
|
|
AArch64_GLDFF1H_D_UXTW_REAL = 3762,
|
||
|
|
AArch64_GLDFF1H_D_UXTW_SCALED_REAL = 3763,
|
||
|
|
AArch64_GLDFF1H_S_IMM_REAL = 3764,
|
||
|
|
AArch64_GLDFF1H_S_SXTW_REAL = 3765,
|
||
|
|
AArch64_GLDFF1H_S_SXTW_SCALED_REAL = 3766,
|
||
|
|
AArch64_GLDFF1H_S_UXTW_REAL = 3767,
|
||
|
|
AArch64_GLDFF1H_S_UXTW_SCALED_REAL = 3768,
|
||
|
|
AArch64_GLDFF1SB_D_IMM_REAL = 3769,
|
||
|
|
AArch64_GLDFF1SB_D_REAL = 3770,
|
||
|
|
AArch64_GLDFF1SB_D_SXTW_REAL = 3771,
|
||
|
|
AArch64_GLDFF1SB_D_UXTW_REAL = 3772,
|
||
|
|
AArch64_GLDFF1SB_S_IMM_REAL = 3773,
|
||
|
|
AArch64_GLDFF1SB_S_SXTW_REAL = 3774,
|
||
|
|
AArch64_GLDFF1SB_S_UXTW_REAL = 3775,
|
||
|
|
AArch64_GLDFF1SH_D_IMM_REAL = 3776,
|
||
|
|
AArch64_GLDFF1SH_D_REAL = 3777,
|
||
|
|
AArch64_GLDFF1SH_D_SCALED_REAL = 3778,
|
||
|
|
AArch64_GLDFF1SH_D_SXTW_REAL = 3779,
|
||
|
|
AArch64_GLDFF1SH_D_SXTW_SCALED_REAL = 3780,
|
||
|
|
AArch64_GLDFF1SH_D_UXTW_REAL = 3781,
|
||
|
|
AArch64_GLDFF1SH_D_UXTW_SCALED_REAL = 3782,
|
||
|
|
AArch64_GLDFF1SH_S_IMM_REAL = 3783,
|
||
|
|
AArch64_GLDFF1SH_S_SXTW_REAL = 3784,
|
||
|
|
AArch64_GLDFF1SH_S_SXTW_SCALED_REAL = 3785,
|
||
|
|
AArch64_GLDFF1SH_S_UXTW_REAL = 3786,
|
||
|
|
AArch64_GLDFF1SH_S_UXTW_SCALED_REAL = 3787,
|
||
|
|
AArch64_GLDFF1SW_D_IMM_REAL = 3788,
|
||
|
|
AArch64_GLDFF1SW_D_REAL = 3789,
|
||
|
|
AArch64_GLDFF1SW_D_SCALED_REAL = 3790,
|
||
|
|
AArch64_GLDFF1SW_D_SXTW_REAL = 3791,
|
||
|
|
AArch64_GLDFF1SW_D_SXTW_SCALED_REAL = 3792,
|
||
|
|
AArch64_GLDFF1SW_D_UXTW_REAL = 3793,
|
||
|
|
AArch64_GLDFF1SW_D_UXTW_SCALED_REAL = 3794,
|
||
|
|
AArch64_GLDFF1W_D_IMM_REAL = 3795,
|
||
|
|
AArch64_GLDFF1W_D_REAL = 3796,
|
||
|
|
AArch64_GLDFF1W_D_SCALED_REAL = 3797,
|
||
|
|
AArch64_GLDFF1W_D_SXTW_REAL = 3798,
|
||
|
|
AArch64_GLDFF1W_D_SXTW_SCALED_REAL = 3799,
|
||
|
|
AArch64_GLDFF1W_D_UXTW_REAL = 3800,
|
||
|
|
AArch64_GLDFF1W_D_UXTW_SCALED_REAL = 3801,
|
||
|
|
AArch64_GLDFF1W_IMM_REAL = 3802,
|
||
|
|
AArch64_GLDFF1W_SXTW_REAL = 3803,
|
||
|
|
AArch64_GLDFF1W_SXTW_SCALED_REAL = 3804,
|
||
|
|
AArch64_GLDFF1W_UXTW_REAL = 3805,
|
||
|
|
AArch64_GLDFF1W_UXTW_SCALED_REAL = 3806,
|
||
|
|
AArch64_GMI = 3807,
|
||
|
|
AArch64_HINT = 3808,
|
||
|
|
AArch64_HISTCNT_ZPzZZ_D = 3809,
|
||
|
|
AArch64_HISTCNT_ZPzZZ_S = 3810,
|
||
|
|
AArch64_HISTSEG_ZZZ = 3811,
|
||
|
|
AArch64_HLT = 3812,
|
||
|
|
AArch64_HVC = 3813,
|
||
|
|
AArch64_INCB_XPiI = 3814,
|
||
|
|
AArch64_INCD_XPiI = 3815,
|
||
|
|
AArch64_INCD_ZPiI = 3816,
|
||
|
|
AArch64_INCH_XPiI = 3817,
|
||
|
|
AArch64_INCH_ZPiI = 3818,
|
||
|
|
AArch64_INCP_XP_B = 3819,
|
||
|
|
AArch64_INCP_XP_D = 3820,
|
||
|
|
AArch64_INCP_XP_H = 3821,
|
||
|
|
AArch64_INCP_XP_S = 3822,
|
||
|
|
AArch64_INCP_ZP_D = 3823,
|
||
|
|
AArch64_INCP_ZP_H = 3824,
|
||
|
|
AArch64_INCP_ZP_S = 3825,
|
||
|
|
AArch64_INCW_XPiI = 3826,
|
||
|
|
AArch64_INCW_ZPiI = 3827,
|
||
|
|
AArch64_INDEX_II_B = 3828,
|
||
|
|
AArch64_INDEX_II_D = 3829,
|
||
|
|
AArch64_INDEX_II_H = 3830,
|
||
|
|
AArch64_INDEX_II_S = 3831,
|
||
|
|
AArch64_INDEX_IR_B = 3832,
|
||
|
|
AArch64_INDEX_IR_D = 3833,
|
||
|
|
AArch64_INDEX_IR_H = 3834,
|
||
|
|
AArch64_INDEX_IR_S = 3835,
|
||
|
|
AArch64_INDEX_RI_B = 3836,
|
||
|
|
AArch64_INDEX_RI_D = 3837,
|
||
|
|
AArch64_INDEX_RI_H = 3838,
|
||
|
|
AArch64_INDEX_RI_S = 3839,
|
||
|
|
AArch64_INDEX_RR_B = 3840,
|
||
|
|
AArch64_INDEX_RR_D = 3841,
|
||
|
|
AArch64_INDEX_RR_H = 3842,
|
||
|
|
AArch64_INDEX_RR_S = 3843,
|
||
|
|
AArch64_INSERT_MXIPZ_H_B = 3844,
|
||
|
|
AArch64_INSERT_MXIPZ_H_D = 3845,
|
||
|
|
AArch64_INSERT_MXIPZ_H_H = 3846,
|
||
|
|
AArch64_INSERT_MXIPZ_H_Q = 3847,
|
||
|
|
AArch64_INSERT_MXIPZ_H_S = 3848,
|
||
|
|
AArch64_INSERT_MXIPZ_V_B = 3849,
|
||
|
|
AArch64_INSERT_MXIPZ_V_D = 3850,
|
||
|
|
AArch64_INSERT_MXIPZ_V_H = 3851,
|
||
|
|
AArch64_INSERT_MXIPZ_V_Q = 3852,
|
||
|
|
AArch64_INSERT_MXIPZ_V_S = 3853,
|
||
|
|
AArch64_INSR_ZR_B = 3854,
|
||
|
|
AArch64_INSR_ZR_D = 3855,
|
||
|
|
AArch64_INSR_ZR_H = 3856,
|
||
|
|
AArch64_INSR_ZR_S = 3857,
|
||
|
|
AArch64_INSR_ZV_B = 3858,
|
||
|
|
AArch64_INSR_ZV_D = 3859,
|
||
|
|
AArch64_INSR_ZV_H = 3860,
|
||
|
|
AArch64_INSR_ZV_S = 3861,
|
||
|
|
AArch64_INSvi16gpr = 3862,
|
||
|
|
AArch64_INSvi16lane = 3863,
|
||
|
|
AArch64_INSvi32gpr = 3864,
|
||
|
|
AArch64_INSvi32lane = 3865,
|
||
|
|
AArch64_INSvi64gpr = 3866,
|
||
|
|
AArch64_INSvi64lane = 3867,
|
||
|
|
AArch64_INSvi8gpr = 3868,
|
||
|
|
AArch64_INSvi8lane = 3869,
|
||
|
|
AArch64_IRG = 3870,
|
||
|
|
AArch64_ISB = 3871,
|
||
|
|
AArch64_LASTA_RPZ_B = 3872,
|
||
|
|
AArch64_LASTA_RPZ_D = 3873,
|
||
|
|
AArch64_LASTA_RPZ_H = 3874,
|
||
|
|
AArch64_LASTA_RPZ_S = 3875,
|
||
|
|
AArch64_LASTA_VPZ_B = 3876,
|
||
|
|
AArch64_LASTA_VPZ_D = 3877,
|
||
|
|
AArch64_LASTA_VPZ_H = 3878,
|
||
|
|
AArch64_LASTA_VPZ_S = 3879,
|
||
|
|
AArch64_LASTB_RPZ_B = 3880,
|
||
|
|
AArch64_LASTB_RPZ_D = 3881,
|
||
|
|
AArch64_LASTB_RPZ_H = 3882,
|
||
|
|
AArch64_LASTB_RPZ_S = 3883,
|
||
|
|
AArch64_LASTB_VPZ_B = 3884,
|
||
|
|
AArch64_LASTB_VPZ_D = 3885,
|
||
|
|
AArch64_LASTB_VPZ_H = 3886,
|
||
|
|
AArch64_LASTB_VPZ_S = 3887,
|
||
|
|
AArch64_LD1B = 3888,
|
||
|
|
AArch64_LD1B_2Z = 3889,
|
||
|
|
AArch64_LD1B_2Z_IMM = 3890,
|
||
|
|
AArch64_LD1B_2Z_STRIDED = 3891,
|
||
|
|
AArch64_LD1B_2Z_STRIDED_IMM = 3892,
|
||
|
|
AArch64_LD1B_4Z = 3893,
|
||
|
|
AArch64_LD1B_4Z_IMM = 3894,
|
||
|
|
AArch64_LD1B_4Z_STRIDED = 3895,
|
||
|
|
AArch64_LD1B_4Z_STRIDED_IMM = 3896,
|
||
|
|
AArch64_LD1B_D = 3897,
|
||
|
|
AArch64_LD1B_D_IMM = 3898,
|
||
|
|
AArch64_LD1B_H = 3899,
|
||
|
|
AArch64_LD1B_H_IMM = 3900,
|
||
|
|
AArch64_LD1B_IMM = 3901,
|
||
|
|
AArch64_LD1B_S = 3902,
|
||
|
|
AArch64_LD1B_S_IMM = 3903,
|
||
|
|
AArch64_LD1D = 3904,
|
||
|
|
AArch64_LD1D_2Z = 3905,
|
||
|
|
AArch64_LD1D_2Z_IMM = 3906,
|
||
|
|
AArch64_LD1D_2Z_STRIDED = 3907,
|
||
|
|
AArch64_LD1D_2Z_STRIDED_IMM = 3908,
|
||
|
|
AArch64_LD1D_4Z = 3909,
|
||
|
|
AArch64_LD1D_4Z_IMM = 3910,
|
||
|
|
AArch64_LD1D_4Z_STRIDED = 3911,
|
||
|
|
AArch64_LD1D_4Z_STRIDED_IMM = 3912,
|
||
|
|
AArch64_LD1D_IMM = 3913,
|
||
|
|
AArch64_LD1D_Q = 3914,
|
||
|
|
AArch64_LD1D_Q_IMM = 3915,
|
||
|
|
AArch64_LD1Fourv16b = 3916,
|
||
|
|
AArch64_LD1Fourv16b_POST = 3917,
|
||
|
|
AArch64_LD1Fourv1d = 3918,
|
||
|
|
AArch64_LD1Fourv1d_POST = 3919,
|
||
|
|
AArch64_LD1Fourv2d = 3920,
|
||
|
|
AArch64_LD1Fourv2d_POST = 3921,
|
||
|
|
AArch64_LD1Fourv2s = 3922,
|
||
|
|
AArch64_LD1Fourv2s_POST = 3923,
|
||
|
|
AArch64_LD1Fourv4h = 3924,
|
||
|
|
AArch64_LD1Fourv4h_POST = 3925,
|
||
|
|
AArch64_LD1Fourv4s = 3926,
|
||
|
|
AArch64_LD1Fourv4s_POST = 3927,
|
||
|
|
AArch64_LD1Fourv8b = 3928,
|
||
|
|
AArch64_LD1Fourv8b_POST = 3929,
|
||
|
|
AArch64_LD1Fourv8h = 3930,
|
||
|
|
AArch64_LD1Fourv8h_POST = 3931,
|
||
|
|
AArch64_LD1H = 3932,
|
||
|
|
AArch64_LD1H_2Z = 3933,
|
||
|
|
AArch64_LD1H_2Z_IMM = 3934,
|
||
|
|
AArch64_LD1H_2Z_STRIDED = 3935,
|
||
|
|
AArch64_LD1H_2Z_STRIDED_IMM = 3936,
|
||
|
|
AArch64_LD1H_4Z = 3937,
|
||
|
|
AArch64_LD1H_4Z_IMM = 3938,
|
||
|
|
AArch64_LD1H_4Z_STRIDED = 3939,
|
||
|
|
AArch64_LD1H_4Z_STRIDED_IMM = 3940,
|
||
|
|
AArch64_LD1H_D = 3941,
|
||
|
|
AArch64_LD1H_D_IMM = 3942,
|
||
|
|
AArch64_LD1H_IMM = 3943,
|
||
|
|
AArch64_LD1H_S = 3944,
|
||
|
|
AArch64_LD1H_S_IMM = 3945,
|
||
|
|
AArch64_LD1Onev16b = 3946,
|
||
|
|
AArch64_LD1Onev16b_POST = 3947,
|
||
|
|
AArch64_LD1Onev1d = 3948,
|
||
|
|
AArch64_LD1Onev1d_POST = 3949,
|
||
|
|
AArch64_LD1Onev2d = 3950,
|
||
|
|
AArch64_LD1Onev2d_POST = 3951,
|
||
|
|
AArch64_LD1Onev2s = 3952,
|
||
|
|
AArch64_LD1Onev2s_POST = 3953,
|
||
|
|
AArch64_LD1Onev4h = 3954,
|
||
|
|
AArch64_LD1Onev4h_POST = 3955,
|
||
|
|
AArch64_LD1Onev4s = 3956,
|
||
|
|
AArch64_LD1Onev4s_POST = 3957,
|
||
|
|
AArch64_LD1Onev8b = 3958,
|
||
|
|
AArch64_LD1Onev8b_POST = 3959,
|
||
|
|
AArch64_LD1Onev8h = 3960,
|
||
|
|
AArch64_LD1Onev8h_POST = 3961,
|
||
|
|
AArch64_LD1RB_D_IMM = 3962,
|
||
|
|
AArch64_LD1RB_H_IMM = 3963,
|
||
|
|
AArch64_LD1RB_IMM = 3964,
|
||
|
|
AArch64_LD1RB_S_IMM = 3965,
|
||
|
|
AArch64_LD1RD_IMM = 3966,
|
||
|
|
AArch64_LD1RH_D_IMM = 3967,
|
||
|
|
AArch64_LD1RH_IMM = 3968,
|
||
|
|
AArch64_LD1RH_S_IMM = 3969,
|
||
|
|
AArch64_LD1RO_B = 3970,
|
||
|
|
AArch64_LD1RO_B_IMM = 3971,
|
||
|
|
AArch64_LD1RO_D = 3972,
|
||
|
|
AArch64_LD1RO_D_IMM = 3973,
|
||
|
|
AArch64_LD1RO_H = 3974,
|
||
|
|
AArch64_LD1RO_H_IMM = 3975,
|
||
|
|
AArch64_LD1RO_W = 3976,
|
||
|
|
AArch64_LD1RO_W_IMM = 3977,
|
||
|
|
AArch64_LD1RQ_B = 3978,
|
||
|
|
AArch64_LD1RQ_B_IMM = 3979,
|
||
|
|
AArch64_LD1RQ_D = 3980,
|
||
|
|
AArch64_LD1RQ_D_IMM = 3981,
|
||
|
|
AArch64_LD1RQ_H = 3982,
|
||
|
|
AArch64_LD1RQ_H_IMM = 3983,
|
||
|
|
AArch64_LD1RQ_W = 3984,
|
||
|
|
AArch64_LD1RQ_W_IMM = 3985,
|
||
|
|
AArch64_LD1RSB_D_IMM = 3986,
|
||
|
|
AArch64_LD1RSB_H_IMM = 3987,
|
||
|
|
AArch64_LD1RSB_S_IMM = 3988,
|
||
|
|
AArch64_LD1RSH_D_IMM = 3989,
|
||
|
|
AArch64_LD1RSH_S_IMM = 3990,
|
||
|
|
AArch64_LD1RSW_IMM = 3991,
|
||
|
|
AArch64_LD1RW_D_IMM = 3992,
|
||
|
|
AArch64_LD1RW_IMM = 3993,
|
||
|
|
AArch64_LD1Rv16b = 3994,
|
||
|
|
AArch64_LD1Rv16b_POST = 3995,
|
||
|
|
AArch64_LD1Rv1d = 3996,
|
||
|
|
AArch64_LD1Rv1d_POST = 3997,
|
||
|
|
AArch64_LD1Rv2d = 3998,
|
||
|
|
AArch64_LD1Rv2d_POST = 3999,
|
||
|
|
AArch64_LD1Rv2s = 4000,
|
||
|
|
AArch64_LD1Rv2s_POST = 4001,
|
||
|
|
AArch64_LD1Rv4h = 4002,
|
||
|
|
AArch64_LD1Rv4h_POST = 4003,
|
||
|
|
AArch64_LD1Rv4s = 4004,
|
||
|
|
AArch64_LD1Rv4s_POST = 4005,
|
||
|
|
AArch64_LD1Rv8b = 4006,
|
||
|
|
AArch64_LD1Rv8b_POST = 4007,
|
||
|
|
AArch64_LD1Rv8h = 4008,
|
||
|
|
AArch64_LD1Rv8h_POST = 4009,
|
||
|
|
AArch64_LD1SB_D = 4010,
|
||
|
|
AArch64_LD1SB_D_IMM = 4011,
|
||
|
|
AArch64_LD1SB_H = 4012,
|
||
|
|
AArch64_LD1SB_H_IMM = 4013,
|
||
|
|
AArch64_LD1SB_S = 4014,
|
||
|
|
AArch64_LD1SB_S_IMM = 4015,
|
||
|
|
AArch64_LD1SH_D = 4016,
|
||
|
|
AArch64_LD1SH_D_IMM = 4017,
|
||
|
|
AArch64_LD1SH_S = 4018,
|
||
|
|
AArch64_LD1SH_S_IMM = 4019,
|
||
|
|
AArch64_LD1SW_D = 4020,
|
||
|
|
AArch64_LD1SW_D_IMM = 4021,
|
||
|
|
AArch64_LD1Threev16b = 4022,
|
||
|
|
AArch64_LD1Threev16b_POST = 4023,
|
||
|
|
AArch64_LD1Threev1d = 4024,
|
||
|
|
AArch64_LD1Threev1d_POST = 4025,
|
||
|
|
AArch64_LD1Threev2d = 4026,
|
||
|
|
AArch64_LD1Threev2d_POST = 4027,
|
||
|
|
AArch64_LD1Threev2s = 4028,
|
||
|
|
AArch64_LD1Threev2s_POST = 4029,
|
||
|
|
AArch64_LD1Threev4h = 4030,
|
||
|
|
AArch64_LD1Threev4h_POST = 4031,
|
||
|
|
AArch64_LD1Threev4s = 4032,
|
||
|
|
AArch64_LD1Threev4s_POST = 4033,
|
||
|
|
AArch64_LD1Threev8b = 4034,
|
||
|
|
AArch64_LD1Threev8b_POST = 4035,
|
||
|
|
AArch64_LD1Threev8h = 4036,
|
||
|
|
AArch64_LD1Threev8h_POST = 4037,
|
||
|
|
AArch64_LD1Twov16b = 4038,
|
||
|
|
AArch64_LD1Twov16b_POST = 4039,
|
||
|
|
AArch64_LD1Twov1d = 4040,
|
||
|
|
AArch64_LD1Twov1d_POST = 4041,
|
||
|
|
AArch64_LD1Twov2d = 4042,
|
||
|
|
AArch64_LD1Twov2d_POST = 4043,
|
||
|
|
AArch64_LD1Twov2s = 4044,
|
||
|
|
AArch64_LD1Twov2s_POST = 4045,
|
||
|
|
AArch64_LD1Twov4h = 4046,
|
||
|
|
AArch64_LD1Twov4h_POST = 4047,
|
||
|
|
AArch64_LD1Twov4s = 4048,
|
||
|
|
AArch64_LD1Twov4s_POST = 4049,
|
||
|
|
AArch64_LD1Twov8b = 4050,
|
||
|
|
AArch64_LD1Twov8b_POST = 4051,
|
||
|
|
AArch64_LD1Twov8h = 4052,
|
||
|
|
AArch64_LD1Twov8h_POST = 4053,
|
||
|
|
AArch64_LD1W = 4054,
|
||
|
|
AArch64_LD1W_2Z = 4055,
|
||
|
|
AArch64_LD1W_2Z_IMM = 4056,
|
||
|
|
AArch64_LD1W_2Z_STRIDED = 4057,
|
||
|
|
AArch64_LD1W_2Z_STRIDED_IMM = 4058,
|
||
|
|
AArch64_LD1W_4Z = 4059,
|
||
|
|
AArch64_LD1W_4Z_IMM = 4060,
|
||
|
|
AArch64_LD1W_4Z_STRIDED = 4061,
|
||
|
|
AArch64_LD1W_4Z_STRIDED_IMM = 4062,
|
||
|
|
AArch64_LD1W_D = 4063,
|
||
|
|
AArch64_LD1W_D_IMM = 4064,
|
||
|
|
AArch64_LD1W_IMM = 4065,
|
||
|
|
AArch64_LD1W_Q = 4066,
|
||
|
|
AArch64_LD1W_Q_IMM = 4067,
|
||
|
|
AArch64_LD1_MXIPXX_H_B = 4068,
|
||
|
|
AArch64_LD1_MXIPXX_H_D = 4069,
|
||
|
|
AArch64_LD1_MXIPXX_H_H = 4070,
|
||
|
|
AArch64_LD1_MXIPXX_H_Q = 4071,
|
||
|
|
AArch64_LD1_MXIPXX_H_S = 4072,
|
||
|
|
AArch64_LD1_MXIPXX_V_B = 4073,
|
||
|
|
AArch64_LD1_MXIPXX_V_D = 4074,
|
||
|
|
AArch64_LD1_MXIPXX_V_H = 4075,
|
||
|
|
AArch64_LD1_MXIPXX_V_Q = 4076,
|
||
|
|
AArch64_LD1_MXIPXX_V_S = 4077,
|
||
|
|
AArch64_LD1i16 = 4078,
|
||
|
|
AArch64_LD1i16_POST = 4079,
|
||
|
|
AArch64_LD1i32 = 4080,
|
||
|
|
AArch64_LD1i32_POST = 4081,
|
||
|
|
AArch64_LD1i64 = 4082,
|
||
|
|
AArch64_LD1i64_POST = 4083,
|
||
|
|
AArch64_LD1i8 = 4084,
|
||
|
|
AArch64_LD1i8_POST = 4085,
|
||
|
|
AArch64_LD2B = 4086,
|
||
|
|
AArch64_LD2B_IMM = 4087,
|
||
|
|
AArch64_LD2D = 4088,
|
||
|
|
AArch64_LD2D_IMM = 4089,
|
||
|
|
AArch64_LD2H = 4090,
|
||
|
|
AArch64_LD2H_IMM = 4091,
|
||
|
|
AArch64_LD2Q = 4092,
|
||
|
|
AArch64_LD2Q_IMM = 4093,
|
||
|
|
AArch64_LD2Rv16b = 4094,
|
||
|
|
AArch64_LD2Rv16b_POST = 4095,
|
||
|
|
AArch64_LD2Rv1d = 4096,
|
||
|
|
AArch64_LD2Rv1d_POST = 4097,
|
||
|
|
AArch64_LD2Rv2d = 4098,
|
||
|
|
AArch64_LD2Rv2d_POST = 4099,
|
||
|
|
AArch64_LD2Rv2s = 4100,
|
||
|
|
AArch64_LD2Rv2s_POST = 4101,
|
||
|
|
AArch64_LD2Rv4h = 4102,
|
||
|
|
AArch64_LD2Rv4h_POST = 4103,
|
||
|
|
AArch64_LD2Rv4s = 4104,
|
||
|
|
AArch64_LD2Rv4s_POST = 4105,
|
||
|
|
AArch64_LD2Rv8b = 4106,
|
||
|
|
AArch64_LD2Rv8b_POST = 4107,
|
||
|
|
AArch64_LD2Rv8h = 4108,
|
||
|
|
AArch64_LD2Rv8h_POST = 4109,
|
||
|
|
AArch64_LD2Twov16b = 4110,
|
||
|
|
AArch64_LD2Twov16b_POST = 4111,
|
||
|
|
AArch64_LD2Twov2d = 4112,
|
||
|
|
AArch64_LD2Twov2d_POST = 4113,
|
||
|
|
AArch64_LD2Twov2s = 4114,
|
||
|
|
AArch64_LD2Twov2s_POST = 4115,
|
||
|
|
AArch64_LD2Twov4h = 4116,
|
||
|
|
AArch64_LD2Twov4h_POST = 4117,
|
||
|
|
AArch64_LD2Twov4s = 4118,
|
||
|
|
AArch64_LD2Twov4s_POST = 4119,
|
||
|
|
AArch64_LD2Twov8b = 4120,
|
||
|
|
AArch64_LD2Twov8b_POST = 4121,
|
||
|
|
AArch64_LD2Twov8h = 4122,
|
||
|
|
AArch64_LD2Twov8h_POST = 4123,
|
||
|
|
AArch64_LD2W = 4124,
|
||
|
|
AArch64_LD2W_IMM = 4125,
|
||
|
|
AArch64_LD2i16 = 4126,
|
||
|
|
AArch64_LD2i16_POST = 4127,
|
||
|
|
AArch64_LD2i32 = 4128,
|
||
|
|
AArch64_LD2i32_POST = 4129,
|
||
|
|
AArch64_LD2i64 = 4130,
|
||
|
|
AArch64_LD2i64_POST = 4131,
|
||
|
|
AArch64_LD2i8 = 4132,
|
||
|
|
AArch64_LD2i8_POST = 4133,
|
||
|
|
AArch64_LD3B = 4134,
|
||
|
|
AArch64_LD3B_IMM = 4135,
|
||
|
|
AArch64_LD3D = 4136,
|
||
|
|
AArch64_LD3D_IMM = 4137,
|
||
|
|
AArch64_LD3H = 4138,
|
||
|
|
AArch64_LD3H_IMM = 4139,
|
||
|
|
AArch64_LD3Q = 4140,
|
||
|
|
AArch64_LD3Q_IMM = 4141,
|
||
|
|
AArch64_LD3Rv16b = 4142,
|
||
|
|
AArch64_LD3Rv16b_POST = 4143,
|
||
|
|
AArch64_LD3Rv1d = 4144,
|
||
|
|
AArch64_LD3Rv1d_POST = 4145,
|
||
|
|
AArch64_LD3Rv2d = 4146,
|
||
|
|
AArch64_LD3Rv2d_POST = 4147,
|
||
|
|
AArch64_LD3Rv2s = 4148,
|
||
|
|
AArch64_LD3Rv2s_POST = 4149,
|
||
|
|
AArch64_LD3Rv4h = 4150,
|
||
|
|
AArch64_LD3Rv4h_POST = 4151,
|
||
|
|
AArch64_LD3Rv4s = 4152,
|
||
|
|
AArch64_LD3Rv4s_POST = 4153,
|
||
|
|
AArch64_LD3Rv8b = 4154,
|
||
|
|
AArch64_LD3Rv8b_POST = 4155,
|
||
|
|
AArch64_LD3Rv8h = 4156,
|
||
|
|
AArch64_LD3Rv8h_POST = 4157,
|
||
|
|
AArch64_LD3Threev16b = 4158,
|
||
|
|
AArch64_LD3Threev16b_POST = 4159,
|
||
|
|
AArch64_LD3Threev2d = 4160,
|
||
|
|
AArch64_LD3Threev2d_POST = 4161,
|
||
|
|
AArch64_LD3Threev2s = 4162,
|
||
|
|
AArch64_LD3Threev2s_POST = 4163,
|
||
|
|
AArch64_LD3Threev4h = 4164,
|
||
|
|
AArch64_LD3Threev4h_POST = 4165,
|
||
|
|
AArch64_LD3Threev4s = 4166,
|
||
|
|
AArch64_LD3Threev4s_POST = 4167,
|
||
|
|
AArch64_LD3Threev8b = 4168,
|
||
|
|
AArch64_LD3Threev8b_POST = 4169,
|
||
|
|
AArch64_LD3Threev8h = 4170,
|
||
|
|
AArch64_LD3Threev8h_POST = 4171,
|
||
|
|
AArch64_LD3W = 4172,
|
||
|
|
AArch64_LD3W_IMM = 4173,
|
||
|
|
AArch64_LD3i16 = 4174,
|
||
|
|
AArch64_LD3i16_POST = 4175,
|
||
|
|
AArch64_LD3i32 = 4176,
|
||
|
|
AArch64_LD3i32_POST = 4177,
|
||
|
|
AArch64_LD3i64 = 4178,
|
||
|
|
AArch64_LD3i64_POST = 4179,
|
||
|
|
AArch64_LD3i8 = 4180,
|
||
|
|
AArch64_LD3i8_POST = 4181,
|
||
|
|
AArch64_LD4B = 4182,
|
||
|
|
AArch64_LD4B_IMM = 4183,
|
||
|
|
AArch64_LD4D = 4184,
|
||
|
|
AArch64_LD4D_IMM = 4185,
|
||
|
|
AArch64_LD4Fourv16b = 4186,
|
||
|
|
AArch64_LD4Fourv16b_POST = 4187,
|
||
|
|
AArch64_LD4Fourv2d = 4188,
|
||
|
|
AArch64_LD4Fourv2d_POST = 4189,
|
||
|
|
AArch64_LD4Fourv2s = 4190,
|
||
|
|
AArch64_LD4Fourv2s_POST = 4191,
|
||
|
|
AArch64_LD4Fourv4h = 4192,
|
||
|
|
AArch64_LD4Fourv4h_POST = 4193,
|
||
|
|
AArch64_LD4Fourv4s = 4194,
|
||
|
|
AArch64_LD4Fourv4s_POST = 4195,
|
||
|
|
AArch64_LD4Fourv8b = 4196,
|
||
|
|
AArch64_LD4Fourv8b_POST = 4197,
|
||
|
|
AArch64_LD4Fourv8h = 4198,
|
||
|
|
AArch64_LD4Fourv8h_POST = 4199,
|
||
|
|
AArch64_LD4H = 4200,
|
||
|
|
AArch64_LD4H_IMM = 4201,
|
||
|
|
AArch64_LD4Q = 4202,
|
||
|
|
AArch64_LD4Q_IMM = 4203,
|
||
|
|
AArch64_LD4Rv16b = 4204,
|
||
|
|
AArch64_LD4Rv16b_POST = 4205,
|
||
|
|
AArch64_LD4Rv1d = 4206,
|
||
|
|
AArch64_LD4Rv1d_POST = 4207,
|
||
|
|
AArch64_LD4Rv2d = 4208,
|
||
|
|
AArch64_LD4Rv2d_POST = 4209,
|
||
|
|
AArch64_LD4Rv2s = 4210,
|
||
|
|
AArch64_LD4Rv2s_POST = 4211,
|
||
|
|
AArch64_LD4Rv4h = 4212,
|
||
|
|
AArch64_LD4Rv4h_POST = 4213,
|
||
|
|
AArch64_LD4Rv4s = 4214,
|
||
|
|
AArch64_LD4Rv4s_POST = 4215,
|
||
|
|
AArch64_LD4Rv8b = 4216,
|
||
|
|
AArch64_LD4Rv8b_POST = 4217,
|
||
|
|
AArch64_LD4Rv8h = 4218,
|
||
|
|
AArch64_LD4Rv8h_POST = 4219,
|
||
|
|
AArch64_LD4W = 4220,
|
||
|
|
AArch64_LD4W_IMM = 4221,
|
||
|
|
AArch64_LD4i16 = 4222,
|
||
|
|
AArch64_LD4i16_POST = 4223,
|
||
|
|
AArch64_LD4i32 = 4224,
|
||
|
|
AArch64_LD4i32_POST = 4225,
|
||
|
|
AArch64_LD4i64 = 4226,
|
||
|
|
AArch64_LD4i64_POST = 4227,
|
||
|
|
AArch64_LD4i8 = 4228,
|
||
|
|
AArch64_LD4i8_POST = 4229,
|
||
|
|
AArch64_LD64B = 4230,
|
||
|
|
AArch64_LDADDAB = 4231,
|
||
|
|
AArch64_LDADDAH = 4232,
|
||
|
|
AArch64_LDADDALB = 4233,
|
||
|
|
AArch64_LDADDALH = 4234,
|
||
|
|
AArch64_LDADDALW = 4235,
|
||
|
|
AArch64_LDADDALX = 4236,
|
||
|
|
AArch64_LDADDAW = 4237,
|
||
|
|
AArch64_LDADDAX = 4238,
|
||
|
|
AArch64_LDADDB = 4239,
|
||
|
|
AArch64_LDADDH = 4240,
|
||
|
|
AArch64_LDADDLB = 4241,
|
||
|
|
AArch64_LDADDLH = 4242,
|
||
|
|
AArch64_LDADDLW = 4243,
|
||
|
|
AArch64_LDADDLX = 4244,
|
||
|
|
AArch64_LDADDW = 4245,
|
||
|
|
AArch64_LDADDX = 4246,
|
||
|
|
AArch64_LDAP1 = 4247,
|
||
|
|
AArch64_LDAPRB = 4248,
|
||
|
|
AArch64_LDAPRH = 4249,
|
||
|
|
AArch64_LDAPRW = 4250,
|
||
|
|
AArch64_LDAPRWpost = 4251,
|
||
|
|
AArch64_LDAPRX = 4252,
|
||
|
|
AArch64_LDAPRXpost = 4253,
|
||
|
|
AArch64_LDAPURBi = 4254,
|
||
|
|
AArch64_LDAPURHi = 4255,
|
||
|
|
AArch64_LDAPURSBWi = 4256,
|
||
|
|
AArch64_LDAPURSBXi = 4257,
|
||
|
|
AArch64_LDAPURSHWi = 4258,
|
||
|
|
AArch64_LDAPURSHXi = 4259,
|
||
|
|
AArch64_LDAPURSWi = 4260,
|
||
|
|
AArch64_LDAPURXi = 4261,
|
||
|
|
AArch64_LDAPURbi = 4262,
|
||
|
|
AArch64_LDAPURdi = 4263,
|
||
|
|
AArch64_LDAPURhi = 4264,
|
||
|
|
AArch64_LDAPURi = 4265,
|
||
|
|
AArch64_LDAPURqi = 4266,
|
||
|
|
AArch64_LDAPURsi = 4267,
|
||
|
|
AArch64_LDARB = 4268,
|
||
|
|
AArch64_LDARH = 4269,
|
||
|
|
AArch64_LDARW = 4270,
|
||
|
|
AArch64_LDARX = 4271,
|
||
|
|
AArch64_LDAXPW = 4272,
|
||
|
|
AArch64_LDAXPX = 4273,
|
||
|
|
AArch64_LDAXRB = 4274,
|
||
|
|
AArch64_LDAXRH = 4275,
|
||
|
|
AArch64_LDAXRW = 4276,
|
||
|
|
AArch64_LDAXRX = 4277,
|
||
|
|
AArch64_LDCLRAB = 4278,
|
||
|
|
AArch64_LDCLRAH = 4279,
|
||
|
|
AArch64_LDCLRALB = 4280,
|
||
|
|
AArch64_LDCLRALH = 4281,
|
||
|
|
AArch64_LDCLRALW = 4282,
|
||
|
|
AArch64_LDCLRALX = 4283,
|
||
|
|
AArch64_LDCLRAW = 4284,
|
||
|
|
AArch64_LDCLRAX = 4285,
|
||
|
|
AArch64_LDCLRB = 4286,
|
||
|
|
AArch64_LDCLRH = 4287,
|
||
|
|
AArch64_LDCLRLB = 4288,
|
||
|
|
AArch64_LDCLRLH = 4289,
|
||
|
|
AArch64_LDCLRLW = 4290,
|
||
|
|
AArch64_LDCLRLX = 4291,
|
||
|
|
AArch64_LDCLRP = 4292,
|
||
|
|
AArch64_LDCLRPA = 4293,
|
||
|
|
AArch64_LDCLRPAL = 4294,
|
||
|
|
AArch64_LDCLRPL = 4295,
|
||
|
|
AArch64_LDCLRW = 4296,
|
||
|
|
AArch64_LDCLRX = 4297,
|
||
|
|
AArch64_LDEORAB = 4298,
|
||
|
|
AArch64_LDEORAH = 4299,
|
||
|
|
AArch64_LDEORALB = 4300,
|
||
|
|
AArch64_LDEORALH = 4301,
|
||
|
|
AArch64_LDEORALW = 4302,
|
||
|
|
AArch64_LDEORALX = 4303,
|
||
|
|
AArch64_LDEORAW = 4304,
|
||
|
|
AArch64_LDEORAX = 4305,
|
||
|
|
AArch64_LDEORB = 4306,
|
||
|
|
AArch64_LDEORH = 4307,
|
||
|
|
AArch64_LDEORLB = 4308,
|
||
|
|
AArch64_LDEORLH = 4309,
|
||
|
|
AArch64_LDEORLW = 4310,
|
||
|
|
AArch64_LDEORLX = 4311,
|
||
|
|
AArch64_LDEORW = 4312,
|
||
|
|
AArch64_LDEORX = 4313,
|
||
|
|
AArch64_LDFF1B_D_REAL = 4314,
|
||
|
|
AArch64_LDFF1B_H_REAL = 4315,
|
||
|
|
AArch64_LDFF1B_REAL = 4316,
|
||
|
|
AArch64_LDFF1B_S_REAL = 4317,
|
||
|
|
AArch64_LDFF1D_REAL = 4318,
|
||
|
|
AArch64_LDFF1H_D_REAL = 4319,
|
||
|
|
AArch64_LDFF1H_REAL = 4320,
|
||
|
|
AArch64_LDFF1H_S_REAL = 4321,
|
||
|
|
AArch64_LDFF1SB_D_REAL = 4322,
|
||
|
|
AArch64_LDFF1SB_H_REAL = 4323,
|
||
|
|
AArch64_LDFF1SB_S_REAL = 4324,
|
||
|
|
AArch64_LDFF1SH_D_REAL = 4325,
|
||
|
|
AArch64_LDFF1SH_S_REAL = 4326,
|
||
|
|
AArch64_LDFF1SW_D_REAL = 4327,
|
||
|
|
AArch64_LDFF1W_D_REAL = 4328,
|
||
|
|
AArch64_LDFF1W_REAL = 4329,
|
||
|
|
AArch64_LDG = 4330,
|
||
|
|
AArch64_LDGM = 4331,
|
||
|
|
AArch64_LDIAPPW = 4332,
|
||
|
|
AArch64_LDIAPPWpost = 4333,
|
||
|
|
AArch64_LDIAPPX = 4334,
|
||
|
|
AArch64_LDIAPPXpost = 4335,
|
||
|
|
AArch64_LDLARB = 4336,
|
||
|
|
AArch64_LDLARH = 4337,
|
||
|
|
AArch64_LDLARW = 4338,
|
||
|
|
AArch64_LDLARX = 4339,
|
||
|
|
AArch64_LDNF1B_D_IMM_REAL = 4340,
|
||
|
|
AArch64_LDNF1B_H_IMM_REAL = 4341,
|
||
|
|
AArch64_LDNF1B_IMM_REAL = 4342,
|
||
|
|
AArch64_LDNF1B_S_IMM_REAL = 4343,
|
||
|
|
AArch64_LDNF1D_IMM_REAL = 4344,
|
||
|
|
AArch64_LDNF1H_D_IMM_REAL = 4345,
|
||
|
|
AArch64_LDNF1H_IMM_REAL = 4346,
|
||
|
|
AArch64_LDNF1H_S_IMM_REAL = 4347,
|
||
|
|
AArch64_LDNF1SB_D_IMM_REAL = 4348,
|
||
|
|
AArch64_LDNF1SB_H_IMM_REAL = 4349,
|
||
|
|
AArch64_LDNF1SB_S_IMM_REAL = 4350,
|
||
|
|
AArch64_LDNF1SH_D_IMM_REAL = 4351,
|
||
|
|
AArch64_LDNF1SH_S_IMM_REAL = 4352,
|
||
|
|
AArch64_LDNF1SW_D_IMM_REAL = 4353,
|
||
|
|
AArch64_LDNF1W_D_IMM_REAL = 4354,
|
||
|
|
AArch64_LDNF1W_IMM_REAL = 4355,
|
||
|
|
AArch64_LDNPDi = 4356,
|
||
|
|
AArch64_LDNPQi = 4357,
|
||
|
|
AArch64_LDNPSi = 4358,
|
||
|
|
AArch64_LDNPWi = 4359,
|
||
|
|
AArch64_LDNPXi = 4360,
|
||
|
|
AArch64_LDNT1B_2Z = 4361,
|
||
|
|
AArch64_LDNT1B_2Z_IMM = 4362,
|
||
|
|
AArch64_LDNT1B_2Z_STRIDED = 4363,
|
||
|
|
AArch64_LDNT1B_2Z_STRIDED_IMM = 4364,
|
||
|
|
AArch64_LDNT1B_4Z = 4365,
|
||
|
|
AArch64_LDNT1B_4Z_IMM = 4366,
|
||
|
|
AArch64_LDNT1B_4Z_STRIDED = 4367,
|
||
|
|
AArch64_LDNT1B_4Z_STRIDED_IMM = 4368,
|
||
|
|
AArch64_LDNT1B_ZRI = 4369,
|
||
|
|
AArch64_LDNT1B_ZRR = 4370,
|
||
|
|
AArch64_LDNT1B_ZZR_D_REAL = 4371,
|
||
|
|
AArch64_LDNT1B_ZZR_S_REAL = 4372,
|
||
|
|
AArch64_LDNT1D_2Z = 4373,
|
||
|
|
AArch64_LDNT1D_2Z_IMM = 4374,
|
||
|
|
AArch64_LDNT1D_2Z_STRIDED = 4375,
|
||
|
|
AArch64_LDNT1D_2Z_STRIDED_IMM = 4376,
|
||
|
|
AArch64_LDNT1D_4Z = 4377,
|
||
|
|
AArch64_LDNT1D_4Z_IMM = 4378,
|
||
|
|
AArch64_LDNT1D_4Z_STRIDED = 4379,
|
||
|
|
AArch64_LDNT1D_4Z_STRIDED_IMM = 4380,
|
||
|
|
AArch64_LDNT1D_ZRI = 4381,
|
||
|
|
AArch64_LDNT1D_ZRR = 4382,
|
||
|
|
AArch64_LDNT1D_ZZR_D_REAL = 4383,
|
||
|
|
AArch64_LDNT1H_2Z = 4384,
|
||
|
|
AArch64_LDNT1H_2Z_IMM = 4385,
|
||
|
|
AArch64_LDNT1H_2Z_STRIDED = 4386,
|
||
|
|
AArch64_LDNT1H_2Z_STRIDED_IMM = 4387,
|
||
|
|
AArch64_LDNT1H_4Z = 4388,
|
||
|
|
AArch64_LDNT1H_4Z_IMM = 4389,
|
||
|
|
AArch64_LDNT1H_4Z_STRIDED = 4390,
|
||
|
|
AArch64_LDNT1H_4Z_STRIDED_IMM = 4391,
|
||
|
|
AArch64_LDNT1H_ZRI = 4392,
|
||
|
|
AArch64_LDNT1H_ZRR = 4393,
|
||
|
|
AArch64_LDNT1H_ZZR_D_REAL = 4394,
|
||
|
|
AArch64_LDNT1H_ZZR_S_REAL = 4395,
|
||
|
|
AArch64_LDNT1SB_ZZR_D_REAL = 4396,
|
||
|
|
AArch64_LDNT1SB_ZZR_S_REAL = 4397,
|
||
|
|
AArch64_LDNT1SH_ZZR_D_REAL = 4398,
|
||
|
|
AArch64_LDNT1SH_ZZR_S_REAL = 4399,
|
||
|
|
AArch64_LDNT1SW_ZZR_D_REAL = 4400,
|
||
|
|
AArch64_LDNT1W_2Z = 4401,
|
||
|
|
AArch64_LDNT1W_2Z_IMM = 4402,
|
||
|
|
AArch64_LDNT1W_2Z_STRIDED = 4403,
|
||
|
|
AArch64_LDNT1W_2Z_STRIDED_IMM = 4404,
|
||
|
|
AArch64_LDNT1W_4Z = 4405,
|
||
|
|
AArch64_LDNT1W_4Z_IMM = 4406,
|
||
|
|
AArch64_LDNT1W_4Z_STRIDED = 4407,
|
||
|
|
AArch64_LDNT1W_4Z_STRIDED_IMM = 4408,
|
||
|
|
AArch64_LDNT1W_ZRI = 4409,
|
||
|
|
AArch64_LDNT1W_ZRR = 4410,
|
||
|
|
AArch64_LDNT1W_ZZR_D_REAL = 4411,
|
||
|
|
AArch64_LDNT1W_ZZR_S_REAL = 4412,
|
||
|
|
AArch64_LDPDi = 4413,
|
||
|
|
AArch64_LDPDpost = 4414,
|
||
|
|
AArch64_LDPDpre = 4415,
|
||
|
|
AArch64_LDPQi = 4416,
|
||
|
|
AArch64_LDPQpost = 4417,
|
||
|
|
AArch64_LDPQpre = 4418,
|
||
|
|
AArch64_LDPSWi = 4419,
|
||
|
|
AArch64_LDPSWpost = 4420,
|
||
|
|
AArch64_LDPSWpre = 4421,
|
||
|
|
AArch64_LDPSi = 4422,
|
||
|
|
AArch64_LDPSpost = 4423,
|
||
|
|
AArch64_LDPSpre = 4424,
|
||
|
|
AArch64_LDPWi = 4425,
|
||
|
|
AArch64_LDPWpost = 4426,
|
||
|
|
AArch64_LDPWpre = 4427,
|
||
|
|
AArch64_LDPXi = 4428,
|
||
|
|
AArch64_LDPXpost = 4429,
|
||
|
|
AArch64_LDPXpre = 4430,
|
||
|
|
AArch64_LDRAAindexed = 4431,
|
||
|
|
AArch64_LDRAAwriteback = 4432,
|
||
|
|
AArch64_LDRABindexed = 4433,
|
||
|
|
AArch64_LDRABwriteback = 4434,
|
||
|
|
AArch64_LDRBBpost = 4435,
|
||
|
|
AArch64_LDRBBpre = 4436,
|
||
|
|
AArch64_LDRBBroW = 4437,
|
||
|
|
AArch64_LDRBBroX = 4438,
|
||
|
|
AArch64_LDRBBui = 4439,
|
||
|
|
AArch64_LDRBpost = 4440,
|
||
|
|
AArch64_LDRBpre = 4441,
|
||
|
|
AArch64_LDRBroW = 4442,
|
||
|
|
AArch64_LDRBroX = 4443,
|
||
|
|
AArch64_LDRBui = 4444,
|
||
|
|
AArch64_LDRDl = 4445,
|
||
|
|
AArch64_LDRDpost = 4446,
|
||
|
|
AArch64_LDRDpre = 4447,
|
||
|
|
AArch64_LDRDroW = 4448,
|
||
|
|
AArch64_LDRDroX = 4449,
|
||
|
|
AArch64_LDRDui = 4450,
|
||
|
|
AArch64_LDRHHpost = 4451,
|
||
|
|
AArch64_LDRHHpre = 4452,
|
||
|
|
AArch64_LDRHHroW = 4453,
|
||
|
|
AArch64_LDRHHroX = 4454,
|
||
|
|
AArch64_LDRHHui = 4455,
|
||
|
|
AArch64_LDRHpost = 4456,
|
||
|
|
AArch64_LDRHpre = 4457,
|
||
|
|
AArch64_LDRHroW = 4458,
|
||
|
|
AArch64_LDRHroX = 4459,
|
||
|
|
AArch64_LDRHui = 4460,
|
||
|
|
AArch64_LDRQl = 4461,
|
||
|
|
AArch64_LDRQpost = 4462,
|
||
|
|
AArch64_LDRQpre = 4463,
|
||
|
|
AArch64_LDRQroW = 4464,
|
||
|
|
AArch64_LDRQroX = 4465,
|
||
|
|
AArch64_LDRQui = 4466,
|
||
|
|
AArch64_LDRSBWpost = 4467,
|
||
|
|
AArch64_LDRSBWpre = 4468,
|
||
|
|
AArch64_LDRSBWroW = 4469,
|
||
|
|
AArch64_LDRSBWroX = 4470,
|
||
|
|
AArch64_LDRSBWui = 4471,
|
||
|
|
AArch64_LDRSBXpost = 4472,
|
||
|
|
AArch64_LDRSBXpre = 4473,
|
||
|
|
AArch64_LDRSBXroW = 4474,
|
||
|
|
AArch64_LDRSBXroX = 4475,
|
||
|
|
AArch64_LDRSBXui = 4476,
|
||
|
|
AArch64_LDRSHWpost = 4477,
|
||
|
|
AArch64_LDRSHWpre = 4478,
|
||
|
|
AArch64_LDRSHWroW = 4479,
|
||
|
|
AArch64_LDRSHWroX = 4480,
|
||
|
|
AArch64_LDRSHWui = 4481,
|
||
|
|
AArch64_LDRSHXpost = 4482,
|
||
|
|
AArch64_LDRSHXpre = 4483,
|
||
|
|
AArch64_LDRSHXroW = 4484,
|
||
|
|
AArch64_LDRSHXroX = 4485,
|
||
|
|
AArch64_LDRSHXui = 4486,
|
||
|
|
AArch64_LDRSWl = 4487,
|
||
|
|
AArch64_LDRSWpost = 4488,
|
||
|
|
AArch64_LDRSWpre = 4489,
|
||
|
|
AArch64_LDRSWroW = 4490,
|
||
|
|
AArch64_LDRSWroX = 4491,
|
||
|
|
AArch64_LDRSWui = 4492,
|
||
|
|
AArch64_LDRSl = 4493,
|
||
|
|
AArch64_LDRSpost = 4494,
|
||
|
|
AArch64_LDRSpre = 4495,
|
||
|
|
AArch64_LDRSroW = 4496,
|
||
|
|
AArch64_LDRSroX = 4497,
|
||
|
|
AArch64_LDRSui = 4498,
|
||
|
|
AArch64_LDRWl = 4499,
|
||
|
|
AArch64_LDRWpost = 4500,
|
||
|
|
AArch64_LDRWpre = 4501,
|
||
|
|
AArch64_LDRWroW = 4502,
|
||
|
|
AArch64_LDRWroX = 4503,
|
||
|
|
AArch64_LDRWui = 4504,
|
||
|
|
AArch64_LDRXl = 4505,
|
||
|
|
AArch64_LDRXpost = 4506,
|
||
|
|
AArch64_LDRXpre = 4507,
|
||
|
|
AArch64_LDRXroW = 4508,
|
||
|
|
AArch64_LDRXroX = 4509,
|
||
|
|
AArch64_LDRXui = 4510,
|
||
|
|
AArch64_LDR_PXI = 4511,
|
||
|
|
AArch64_LDR_TX = 4512,
|
||
|
|
AArch64_LDR_ZA = 4513,
|
||
|
|
AArch64_LDR_ZXI = 4514,
|
||
|
|
AArch64_LDSETAB = 4515,
|
||
|
|
AArch64_LDSETAH = 4516,
|
||
|
|
AArch64_LDSETALB = 4517,
|
||
|
|
AArch64_LDSETALH = 4518,
|
||
|
|
AArch64_LDSETALW = 4519,
|
||
|
|
AArch64_LDSETALX = 4520,
|
||
|
|
AArch64_LDSETAW = 4521,
|
||
|
|
AArch64_LDSETAX = 4522,
|
||
|
|
AArch64_LDSETB = 4523,
|
||
|
|
AArch64_LDSETH = 4524,
|
||
|
|
AArch64_LDSETLB = 4525,
|
||
|
|
AArch64_LDSETLH = 4526,
|
||
|
|
AArch64_LDSETLW = 4527,
|
||
|
|
AArch64_LDSETLX = 4528,
|
||
|
|
AArch64_LDSETP = 4529,
|
||
|
|
AArch64_LDSETPA = 4530,
|
||
|
|
AArch64_LDSETPAL = 4531,
|
||
|
|
AArch64_LDSETPL = 4532,
|
||
|
|
AArch64_LDSETW = 4533,
|
||
|
|
AArch64_LDSETX = 4534,
|
||
|
|
AArch64_LDSMAXAB = 4535,
|
||
|
|
AArch64_LDSMAXAH = 4536,
|
||
|
|
AArch64_LDSMAXALB = 4537,
|
||
|
|
AArch64_LDSMAXALH = 4538,
|
||
|
|
AArch64_LDSMAXALW = 4539,
|
||
|
|
AArch64_LDSMAXALX = 4540,
|
||
|
|
AArch64_LDSMAXAW = 4541,
|
||
|
|
AArch64_LDSMAXAX = 4542,
|
||
|
|
AArch64_LDSMAXB = 4543,
|
||
|
|
AArch64_LDSMAXH = 4544,
|
||
|
|
AArch64_LDSMAXLB = 4545,
|
||
|
|
AArch64_LDSMAXLH = 4546,
|
||
|
|
AArch64_LDSMAXLW = 4547,
|
||
|
|
AArch64_LDSMAXLX = 4548,
|
||
|
|
AArch64_LDSMAXW = 4549,
|
||
|
|
AArch64_LDSMAXX = 4550,
|
||
|
|
AArch64_LDSMINAB = 4551,
|
||
|
|
AArch64_LDSMINAH = 4552,
|
||
|
|
AArch64_LDSMINALB = 4553,
|
||
|
|
AArch64_LDSMINALH = 4554,
|
||
|
|
AArch64_LDSMINALW = 4555,
|
||
|
|
AArch64_LDSMINALX = 4556,
|
||
|
|
AArch64_LDSMINAW = 4557,
|
||
|
|
AArch64_LDSMINAX = 4558,
|
||
|
|
AArch64_LDSMINB = 4559,
|
||
|
|
AArch64_LDSMINH = 4560,
|
||
|
|
AArch64_LDSMINLB = 4561,
|
||
|
|
AArch64_LDSMINLH = 4562,
|
||
|
|
AArch64_LDSMINLW = 4563,
|
||
|
|
AArch64_LDSMINLX = 4564,
|
||
|
|
AArch64_LDSMINW = 4565,
|
||
|
|
AArch64_LDSMINX = 4566,
|
||
|
|
AArch64_LDTRBi = 4567,
|
||
|
|
AArch64_LDTRHi = 4568,
|
||
|
|
AArch64_LDTRSBWi = 4569,
|
||
|
|
AArch64_LDTRSBXi = 4570,
|
||
|
|
AArch64_LDTRSHWi = 4571,
|
||
|
|
AArch64_LDTRSHXi = 4572,
|
||
|
|
AArch64_LDTRSWi = 4573,
|
||
|
|
AArch64_LDTRWi = 4574,
|
||
|
|
AArch64_LDTRXi = 4575,
|
||
|
|
AArch64_LDUMAXAB = 4576,
|
||
|
|
AArch64_LDUMAXAH = 4577,
|
||
|
|
AArch64_LDUMAXALB = 4578,
|
||
|
|
AArch64_LDUMAXALH = 4579,
|
||
|
|
AArch64_LDUMAXALW = 4580,
|
||
|
|
AArch64_LDUMAXALX = 4581,
|
||
|
|
AArch64_LDUMAXAW = 4582,
|
||
|
|
AArch64_LDUMAXAX = 4583,
|
||
|
|
AArch64_LDUMAXB = 4584,
|
||
|
|
AArch64_LDUMAXH = 4585,
|
||
|
|
AArch64_LDUMAXLB = 4586,
|
||
|
|
AArch64_LDUMAXLH = 4587,
|
||
|
|
AArch64_LDUMAXLW = 4588,
|
||
|
|
AArch64_LDUMAXLX = 4589,
|
||
|
|
AArch64_LDUMAXW = 4590,
|
||
|
|
AArch64_LDUMAXX = 4591,
|
||
|
|
AArch64_LDUMINAB = 4592,
|
||
|
|
AArch64_LDUMINAH = 4593,
|
||
|
|
AArch64_LDUMINALB = 4594,
|
||
|
|
AArch64_LDUMINALH = 4595,
|
||
|
|
AArch64_LDUMINALW = 4596,
|
||
|
|
AArch64_LDUMINALX = 4597,
|
||
|
|
AArch64_LDUMINAW = 4598,
|
||
|
|
AArch64_LDUMINAX = 4599,
|
||
|
|
AArch64_LDUMINB = 4600,
|
||
|
|
AArch64_LDUMINH = 4601,
|
||
|
|
AArch64_LDUMINLB = 4602,
|
||
|
|
AArch64_LDUMINLH = 4603,
|
||
|
|
AArch64_LDUMINLW = 4604,
|
||
|
|
AArch64_LDUMINLX = 4605,
|
||
|
|
AArch64_LDUMINW = 4606,
|
||
|
|
AArch64_LDUMINX = 4607,
|
||
|
|
AArch64_LDURBBi = 4608,
|
||
|
|
AArch64_LDURBi = 4609,
|
||
|
|
AArch64_LDURDi = 4610,
|
||
|
|
AArch64_LDURHHi = 4611,
|
||
|
|
AArch64_LDURHi = 4612,
|
||
|
|
AArch64_LDURQi = 4613,
|
||
|
|
AArch64_LDURSBWi = 4614,
|
||
|
|
AArch64_LDURSBXi = 4615,
|
||
|
|
AArch64_LDURSHWi = 4616,
|
||
|
|
AArch64_LDURSHXi = 4617,
|
||
|
|
AArch64_LDURSWi = 4618,
|
||
|
|
AArch64_LDURSi = 4619,
|
||
|
|
AArch64_LDURWi = 4620,
|
||
|
|
AArch64_LDURXi = 4621,
|
||
|
|
AArch64_LDXPW = 4622,
|
||
|
|
AArch64_LDXPX = 4623,
|
||
|
|
AArch64_LDXRB = 4624,
|
||
|
|
AArch64_LDXRH = 4625,
|
||
|
|
AArch64_LDXRW = 4626,
|
||
|
|
AArch64_LDXRX = 4627,
|
||
|
|
AArch64_LSLR_ZPmZ_B = 4628,
|
||
|
|
AArch64_LSLR_ZPmZ_D = 4629,
|
||
|
|
AArch64_LSLR_ZPmZ_H = 4630,
|
||
|
|
AArch64_LSLR_ZPmZ_S = 4631,
|
||
|
|
AArch64_LSLVWr = 4632,
|
||
|
|
AArch64_LSLVXr = 4633,
|
||
|
|
AArch64_LSL_WIDE_ZPmZ_B = 4634,
|
||
|
|
AArch64_LSL_WIDE_ZPmZ_H = 4635,
|
||
|
|
AArch64_LSL_WIDE_ZPmZ_S = 4636,
|
||
|
|
AArch64_LSL_WIDE_ZZZ_B = 4637,
|
||
|
|
AArch64_LSL_WIDE_ZZZ_H = 4638,
|
||
|
|
AArch64_LSL_WIDE_ZZZ_S = 4639,
|
||
|
|
AArch64_LSL_ZPmI_B = 4640,
|
||
|
|
AArch64_LSL_ZPmI_D = 4641,
|
||
|
|
AArch64_LSL_ZPmI_H = 4642,
|
||
|
|
AArch64_LSL_ZPmI_S = 4643,
|
||
|
|
AArch64_LSL_ZPmZ_B = 4644,
|
||
|
|
AArch64_LSL_ZPmZ_D = 4645,
|
||
|
|
AArch64_LSL_ZPmZ_H = 4646,
|
||
|
|
AArch64_LSL_ZPmZ_S = 4647,
|
||
|
|
AArch64_LSL_ZZI_B = 4648,
|
||
|
|
AArch64_LSL_ZZI_D = 4649,
|
||
|
|
AArch64_LSL_ZZI_H = 4650,
|
||
|
|
AArch64_LSL_ZZI_S = 4651,
|
||
|
|
AArch64_LSRR_ZPmZ_B = 4652,
|
||
|
|
AArch64_LSRR_ZPmZ_D = 4653,
|
||
|
|
AArch64_LSRR_ZPmZ_H = 4654,
|
||
|
|
AArch64_LSRR_ZPmZ_S = 4655,
|
||
|
|
AArch64_LSRVWr = 4656,
|
||
|
|
AArch64_LSRVXr = 4657,
|
||
|
|
AArch64_LSR_WIDE_ZPmZ_B = 4658,
|
||
|
|
AArch64_LSR_WIDE_ZPmZ_H = 4659,
|
||
|
|
AArch64_LSR_WIDE_ZPmZ_S = 4660,
|
||
|
|
AArch64_LSR_WIDE_ZZZ_B = 4661,
|
||
|
|
AArch64_LSR_WIDE_ZZZ_H = 4662,
|
||
|
|
AArch64_LSR_WIDE_ZZZ_S = 4663,
|
||
|
|
AArch64_LSR_ZPmI_B = 4664,
|
||
|
|
AArch64_LSR_ZPmI_D = 4665,
|
||
|
|
AArch64_LSR_ZPmI_H = 4666,
|
||
|
|
AArch64_LSR_ZPmI_S = 4667,
|
||
|
|
AArch64_LSR_ZPmZ_B = 4668,
|
||
|
|
AArch64_LSR_ZPmZ_D = 4669,
|
||
|
|
AArch64_LSR_ZPmZ_H = 4670,
|
||
|
|
AArch64_LSR_ZPmZ_S = 4671,
|
||
|
|
AArch64_LSR_ZZI_B = 4672,
|
||
|
|
AArch64_LSR_ZZI_D = 4673,
|
||
|
|
AArch64_LSR_ZZI_H = 4674,
|
||
|
|
AArch64_LSR_ZZI_S = 4675,
|
||
|
|
AArch64_LUT2v16f8 = 4676,
|
||
|
|
AArch64_LUT2v8f16 = 4677,
|
||
|
|
AArch64_LUT4v16f8 = 4678,
|
||
|
|
AArch64_LUT4v8f16 = 4679,
|
||
|
|
AArch64_LUTI2_2ZTZI_B = 4680,
|
||
|
|
AArch64_LUTI2_2ZTZI_H = 4681,
|
||
|
|
AArch64_LUTI2_2ZTZI_S = 4682,
|
||
|
|
AArch64_LUTI2_4ZTZI_B = 4683,
|
||
|
|
AArch64_LUTI2_4ZTZI_H = 4684,
|
||
|
|
AArch64_LUTI2_4ZTZI_S = 4685,
|
||
|
|
AArch64_LUTI2_S_2ZTZI_B = 4686,
|
||
|
|
AArch64_LUTI2_S_2ZTZI_H = 4687,
|
||
|
|
AArch64_LUTI2_S_4ZTZI_B = 4688,
|
||
|
|
AArch64_LUTI2_S_4ZTZI_H = 4689,
|
||
|
|
AArch64_LUTI2_ZTZI_B = 4690,
|
||
|
|
AArch64_LUTI2_ZTZI_H = 4691,
|
||
|
|
AArch64_LUTI2_ZTZI_S = 4692,
|
||
|
|
AArch64_LUTI2_ZZZI_B = 4693,
|
||
|
|
AArch64_LUTI2_ZZZI_H = 4694,
|
||
|
|
AArch64_LUTI4_2ZTZI_B = 4695,
|
||
|
|
AArch64_LUTI4_2ZTZI_H = 4696,
|
||
|
|
AArch64_LUTI4_2ZTZI_S = 4697,
|
||
|
|
AArch64_LUTI4_4ZTZI_H = 4698,
|
||
|
|
AArch64_LUTI4_4ZTZI_S = 4699,
|
||
|
|
AArch64_LUTI4_4ZZT2Z = 4700,
|
||
|
|
AArch64_LUTI4_S_2ZTZI_B = 4701,
|
||
|
|
AArch64_LUTI4_S_2ZTZI_H = 4702,
|
||
|
|
AArch64_LUTI4_S_4ZTZI_H = 4703,
|
||
|
|
AArch64_LUTI4_S_4ZZT2Z = 4704,
|
||
|
|
AArch64_LUTI4_Z2ZZI_H = 4705,
|
||
|
|
AArch64_LUTI4_ZTZI_B = 4706,
|
||
|
|
AArch64_LUTI4_ZTZI_H = 4707,
|
||
|
|
AArch64_LUTI4_ZTZI_S = 4708,
|
||
|
|
AArch64_LUTI4_ZZZI_B = 4709,
|
||
|
|
AArch64_LUTI4_ZZZI_H = 4710,
|
||
|
|
AArch64_MADDPT = 4711,
|
||
|
|
AArch64_MADDWrrr = 4712,
|
||
|
|
AArch64_MADDXrrr = 4713,
|
||
|
|
AArch64_MAD_CPA = 4714,
|
||
|
|
AArch64_MAD_ZPmZZ_B = 4715,
|
||
|
|
AArch64_MAD_ZPmZZ_D = 4716,
|
||
|
|
AArch64_MAD_ZPmZZ_H = 4717,
|
||
|
|
AArch64_MAD_ZPmZZ_S = 4718,
|
||
|
|
AArch64_MATCH_PPzZZ_B = 4719,
|
||
|
|
AArch64_MATCH_PPzZZ_H = 4720,
|
||
|
|
AArch64_MLA_CPA = 4721,
|
||
|
|
AArch64_MLA_ZPmZZ_B = 4722,
|
||
|
|
AArch64_MLA_ZPmZZ_D = 4723,
|
||
|
|
AArch64_MLA_ZPmZZ_H = 4724,
|
||
|
|
AArch64_MLA_ZPmZZ_S = 4725,
|
||
|
|
AArch64_MLA_ZZZI_D = 4726,
|
||
|
|
AArch64_MLA_ZZZI_H = 4727,
|
||
|
|
AArch64_MLA_ZZZI_S = 4728,
|
||
|
|
AArch64_MLAv16i8 = 4729,
|
||
|
|
AArch64_MLAv2i32 = 4730,
|
||
|
|
AArch64_MLAv2i32_indexed = 4731,
|
||
|
|
AArch64_MLAv4i16 = 4732,
|
||
|
|
AArch64_MLAv4i16_indexed = 4733,
|
||
|
|
AArch64_MLAv4i32 = 4734,
|
||
|
|
AArch64_MLAv4i32_indexed = 4735,
|
||
|
|
AArch64_MLAv8i16 = 4736,
|
||
|
|
AArch64_MLAv8i16_indexed = 4737,
|
||
|
|
AArch64_MLAv8i8 = 4738,
|
||
|
|
AArch64_MLS_ZPmZZ_B = 4739,
|
||
|
|
AArch64_MLS_ZPmZZ_D = 4740,
|
||
|
|
AArch64_MLS_ZPmZZ_H = 4741,
|
||
|
|
AArch64_MLS_ZPmZZ_S = 4742,
|
||
|
|
AArch64_MLS_ZZZI_D = 4743,
|
||
|
|
AArch64_MLS_ZZZI_H = 4744,
|
||
|
|
AArch64_MLS_ZZZI_S = 4745,
|
||
|
|
AArch64_MLSv16i8 = 4746,
|
||
|
|
AArch64_MLSv2i32 = 4747,
|
||
|
|
AArch64_MLSv2i32_indexed = 4748,
|
||
|
|
AArch64_MLSv4i16 = 4749,
|
||
|
|
AArch64_MLSv4i16_indexed = 4750,
|
||
|
|
AArch64_MLSv4i32 = 4751,
|
||
|
|
AArch64_MLSv4i32_indexed = 4752,
|
||
|
|
AArch64_MLSv8i16 = 4753,
|
||
|
|
AArch64_MLSv8i16_indexed = 4754,
|
||
|
|
AArch64_MLSv8i8 = 4755,
|
||
|
|
AArch64_MOPSSETGE = 4756,
|
||
|
|
AArch64_MOPSSETGEN = 4757,
|
||
|
|
AArch64_MOPSSETGET = 4758,
|
||
|
|
AArch64_MOPSSETGETN = 4759,
|
||
|
|
AArch64_MOVAZ_2ZMI_H_B = 4760,
|
||
|
|
AArch64_MOVAZ_2ZMI_H_D = 4761,
|
||
|
|
AArch64_MOVAZ_2ZMI_H_H = 4762,
|
||
|
|
AArch64_MOVAZ_2ZMI_H_S = 4763,
|
||
|
|
AArch64_MOVAZ_2ZMI_V_B = 4764,
|
||
|
|
AArch64_MOVAZ_2ZMI_V_D = 4765,
|
||
|
|
AArch64_MOVAZ_2ZMI_V_H = 4766,
|
||
|
|
AArch64_MOVAZ_2ZMI_V_S = 4767,
|
||
|
|
AArch64_MOVAZ_4ZMI_H_B = 4768,
|
||
|
|
AArch64_MOVAZ_4ZMI_H_D = 4769,
|
||
|
|
AArch64_MOVAZ_4ZMI_H_H = 4770,
|
||
|
|
AArch64_MOVAZ_4ZMI_H_S = 4771,
|
||
|
|
AArch64_MOVAZ_4ZMI_V_B = 4772,
|
||
|
|
AArch64_MOVAZ_4ZMI_V_D = 4773,
|
||
|
|
AArch64_MOVAZ_4ZMI_V_H = 4774,
|
||
|
|
AArch64_MOVAZ_4ZMI_V_S = 4775,
|
||
|
|
AArch64_MOVAZ_VG2_2ZM = 4776,
|
||
|
|
AArch64_MOVAZ_VG4_4ZM = 4777,
|
||
|
|
AArch64_MOVAZ_ZMI_H_B = 4778,
|
||
|
|
AArch64_MOVAZ_ZMI_H_D = 4779,
|
||
|
|
AArch64_MOVAZ_ZMI_H_H = 4780,
|
||
|
|
AArch64_MOVAZ_ZMI_H_Q = 4781,
|
||
|
|
AArch64_MOVAZ_ZMI_H_S = 4782,
|
||
|
|
AArch64_MOVAZ_ZMI_V_B = 4783,
|
||
|
|
AArch64_MOVAZ_ZMI_V_D = 4784,
|
||
|
|
AArch64_MOVAZ_ZMI_V_H = 4785,
|
||
|
|
AArch64_MOVAZ_ZMI_V_Q = 4786,
|
||
|
|
AArch64_MOVAZ_ZMI_V_S = 4787,
|
||
|
|
AArch64_MOVA_2ZMXI_H_B = 4788,
|
||
|
|
AArch64_MOVA_2ZMXI_H_D = 4789,
|
||
|
|
AArch64_MOVA_2ZMXI_H_H = 4790,
|
||
|
|
AArch64_MOVA_2ZMXI_H_S = 4791,
|
||
|
|
AArch64_MOVA_2ZMXI_V_B = 4792,
|
||
|
|
AArch64_MOVA_2ZMXI_V_D = 4793,
|
||
|
|
AArch64_MOVA_2ZMXI_V_H = 4794,
|
||
|
|
AArch64_MOVA_2ZMXI_V_S = 4795,
|
||
|
|
AArch64_MOVA_4ZMXI_H_B = 4796,
|
||
|
|
AArch64_MOVA_4ZMXI_H_D = 4797,
|
||
|
|
AArch64_MOVA_4ZMXI_H_H = 4798,
|
||
|
|
AArch64_MOVA_4ZMXI_H_S = 4799,
|
||
|
|
AArch64_MOVA_4ZMXI_V_B = 4800,
|
||
|
|
AArch64_MOVA_4ZMXI_V_D = 4801,
|
||
|
|
AArch64_MOVA_4ZMXI_V_H = 4802,
|
||
|
|
AArch64_MOVA_4ZMXI_V_S = 4803,
|
||
|
|
AArch64_MOVA_MXI2Z_H_B = 4804,
|
||
|
|
AArch64_MOVA_MXI2Z_H_D = 4805,
|
||
|
|
AArch64_MOVA_MXI2Z_H_H = 4806,
|
||
|
|
AArch64_MOVA_MXI2Z_H_S = 4807,
|
||
|
|
AArch64_MOVA_MXI2Z_V_B = 4808,
|
||
|
|
AArch64_MOVA_MXI2Z_V_D = 4809,
|
||
|
|
AArch64_MOVA_MXI2Z_V_H = 4810,
|
||
|
|
AArch64_MOVA_MXI2Z_V_S = 4811,
|
||
|
|
AArch64_MOVA_MXI4Z_H_B = 4812,
|
||
|
|
AArch64_MOVA_MXI4Z_H_D = 4813,
|
||
|
|
AArch64_MOVA_MXI4Z_H_H = 4814,
|
||
|
|
AArch64_MOVA_MXI4Z_H_S = 4815,
|
||
|
|
AArch64_MOVA_MXI4Z_V_B = 4816,
|
||
|
|
AArch64_MOVA_MXI4Z_V_D = 4817,
|
||
|
|
AArch64_MOVA_MXI4Z_V_H = 4818,
|
||
|
|
AArch64_MOVA_MXI4Z_V_S = 4819,
|
||
|
|
AArch64_MOVA_VG2_2ZMXI = 4820,
|
||
|
|
AArch64_MOVA_VG2_MXI2Z = 4821,
|
||
|
|
AArch64_MOVA_VG4_4ZMXI = 4822,
|
||
|
|
AArch64_MOVA_VG4_MXI4Z = 4823,
|
||
|
|
AArch64_MOVID = 4824,
|
||
|
|
AArch64_MOVIv16b_ns = 4825,
|
||
|
|
AArch64_MOVIv2d_ns = 4826,
|
||
|
|
AArch64_MOVIv2i32 = 4827,
|
||
|
|
AArch64_MOVIv2s_msl = 4828,
|
||
|
|
AArch64_MOVIv4i16 = 4829,
|
||
|
|
AArch64_MOVIv4i32 = 4830,
|
||
|
|
AArch64_MOVIv4s_msl = 4831,
|
||
|
|
AArch64_MOVIv8b_ns = 4832,
|
||
|
|
AArch64_MOVIv8i16 = 4833,
|
||
|
|
AArch64_MOVKWi = 4834,
|
||
|
|
AArch64_MOVKXi = 4835,
|
||
|
|
AArch64_MOVNWi = 4836,
|
||
|
|
AArch64_MOVNXi = 4837,
|
||
|
|
AArch64_MOVPRFX_ZPmZ_B = 4838,
|
||
|
|
AArch64_MOVPRFX_ZPmZ_D = 4839,
|
||
|
|
AArch64_MOVPRFX_ZPmZ_H = 4840,
|
||
|
|
AArch64_MOVPRFX_ZPmZ_S = 4841,
|
||
|
|
AArch64_MOVPRFX_ZPzZ_B = 4842,
|
||
|
|
AArch64_MOVPRFX_ZPzZ_D = 4843,
|
||
|
|
AArch64_MOVPRFX_ZPzZ_H = 4844,
|
||
|
|
AArch64_MOVPRFX_ZPzZ_S = 4845,
|
||
|
|
AArch64_MOVPRFX_ZZ = 4846,
|
||
|
|
AArch64_MOVT = 4847,
|
||
|
|
AArch64_MOVT_TIX = 4848,
|
||
|
|
AArch64_MOVT_XTI = 4849,
|
||
|
|
AArch64_MOVZWi = 4850,
|
||
|
|
AArch64_MOVZXi = 4851,
|
||
|
|
AArch64_MRRS = 4852,
|
||
|
|
AArch64_MRS = 4853,
|
||
|
|
AArch64_MSB_ZPmZZ_B = 4854,
|
||
|
|
AArch64_MSB_ZPmZZ_D = 4855,
|
||
|
|
AArch64_MSB_ZPmZZ_H = 4856,
|
||
|
|
AArch64_MSB_ZPmZZ_S = 4857,
|
||
|
|
AArch64_MSR = 4858,
|
||
|
|
AArch64_MSRR = 4859,
|
||
|
|
AArch64_MSRpstateImm1 = 4860,
|
||
|
|
AArch64_MSRpstateImm4 = 4861,
|
||
|
|
AArch64_MSRpstatesvcrImm1 = 4862,
|
||
|
|
AArch64_MSUBPT = 4863,
|
||
|
|
AArch64_MSUBWrrr = 4864,
|
||
|
|
AArch64_MSUBXrrr = 4865,
|
||
|
|
AArch64_MUL_ZI_B = 4866,
|
||
|
|
AArch64_MUL_ZI_D = 4867,
|
||
|
|
AArch64_MUL_ZI_H = 4868,
|
||
|
|
AArch64_MUL_ZI_S = 4869,
|
||
|
|
AArch64_MUL_ZPmZ_B = 4870,
|
||
|
|
AArch64_MUL_ZPmZ_D = 4871,
|
||
|
|
AArch64_MUL_ZPmZ_H = 4872,
|
||
|
|
AArch64_MUL_ZPmZ_S = 4873,
|
||
|
|
AArch64_MUL_ZZZI_D = 4874,
|
||
|
|
AArch64_MUL_ZZZI_H = 4875,
|
||
|
|
AArch64_MUL_ZZZI_S = 4876,
|
||
|
|
AArch64_MUL_ZZZ_B = 4877,
|
||
|
|
AArch64_MUL_ZZZ_D = 4878,
|
||
|
|
AArch64_MUL_ZZZ_H = 4879,
|
||
|
|
AArch64_MUL_ZZZ_S = 4880,
|
||
|
|
AArch64_MULv16i8 = 4881,
|
||
|
|
AArch64_MULv2i32 = 4882,
|
||
|
|
AArch64_MULv2i32_indexed = 4883,
|
||
|
|
AArch64_MULv4i16 = 4884,
|
||
|
|
AArch64_MULv4i16_indexed = 4885,
|
||
|
|
AArch64_MULv4i32 = 4886,
|
||
|
|
AArch64_MULv4i32_indexed = 4887,
|
||
|
|
AArch64_MULv8i16 = 4888,
|
||
|
|
AArch64_MULv8i16_indexed = 4889,
|
||
|
|
AArch64_MULv8i8 = 4890,
|
||
|
|
AArch64_MVNIv2i32 = 4891,
|
||
|
|
AArch64_MVNIv2s_msl = 4892,
|
||
|
|
AArch64_MVNIv4i16 = 4893,
|
||
|
|
AArch64_MVNIv4i32 = 4894,
|
||
|
|
AArch64_MVNIv4s_msl = 4895,
|
||
|
|
AArch64_MVNIv8i16 = 4896,
|
||
|
|
AArch64_NANDS_PPzPP = 4897,
|
||
|
|
AArch64_NAND_PPzPP = 4898,
|
||
|
|
AArch64_NBSL_ZZZZ = 4899,
|
||
|
|
AArch64_NEG_ZPmZ_B = 4900,
|
||
|
|
AArch64_NEG_ZPmZ_D = 4901,
|
||
|
|
AArch64_NEG_ZPmZ_H = 4902,
|
||
|
|
AArch64_NEG_ZPmZ_S = 4903,
|
||
|
|
AArch64_NEGv16i8 = 4904,
|
||
|
|
AArch64_NEGv1i64 = 4905,
|
||
|
|
AArch64_NEGv2i32 = 4906,
|
||
|
|
AArch64_NEGv2i64 = 4907,
|
||
|
|
AArch64_NEGv4i16 = 4908,
|
||
|
|
AArch64_NEGv4i32 = 4909,
|
||
|
|
AArch64_NEGv8i16 = 4910,
|
||
|
|
AArch64_NEGv8i8 = 4911,
|
||
|
|
AArch64_NMATCH_PPzZZ_B = 4912,
|
||
|
|
AArch64_NMATCH_PPzZZ_H = 4913,
|
||
|
|
AArch64_NORS_PPzPP = 4914,
|
||
|
|
AArch64_NOR_PPzPP = 4915,
|
||
|
|
AArch64_NOT_ZPmZ_B = 4916,
|
||
|
|
AArch64_NOT_ZPmZ_D = 4917,
|
||
|
|
AArch64_NOT_ZPmZ_H = 4918,
|
||
|
|
AArch64_NOT_ZPmZ_S = 4919,
|
||
|
|
AArch64_NOTv16i8 = 4920,
|
||
|
|
AArch64_NOTv8i8 = 4921,
|
||
|
|
AArch64_ORNS_PPzPP = 4922,
|
||
|
|
AArch64_ORNWrs = 4923,
|
||
|
|
AArch64_ORNXrs = 4924,
|
||
|
|
AArch64_ORN_PPzPP = 4925,
|
||
|
|
AArch64_ORNv16i8 = 4926,
|
||
|
|
AArch64_ORNv8i8 = 4927,
|
||
|
|
AArch64_ORQV_VPZ_B = 4928,
|
||
|
|
AArch64_ORQV_VPZ_D = 4929,
|
||
|
|
AArch64_ORQV_VPZ_H = 4930,
|
||
|
|
AArch64_ORQV_VPZ_S = 4931,
|
||
|
|
AArch64_ORRS_PPzPP = 4932,
|
||
|
|
AArch64_ORRWri = 4933,
|
||
|
|
AArch64_ORRWrs = 4934,
|
||
|
|
AArch64_ORRXri = 4935,
|
||
|
|
AArch64_ORRXrs = 4936,
|
||
|
|
AArch64_ORR_PPzPP = 4937,
|
||
|
|
AArch64_ORR_ZI = 4938,
|
||
|
|
AArch64_ORR_ZPmZ_B = 4939,
|
||
|
|
AArch64_ORR_ZPmZ_D = 4940,
|
||
|
|
AArch64_ORR_ZPmZ_H = 4941,
|
||
|
|
AArch64_ORR_ZPmZ_S = 4942,
|
||
|
|
AArch64_ORR_ZZZ = 4943,
|
||
|
|
AArch64_ORRv16i8 = 4944,
|
||
|
|
AArch64_ORRv2i32 = 4945,
|
||
|
|
AArch64_ORRv4i16 = 4946,
|
||
|
|
AArch64_ORRv4i32 = 4947,
|
||
|
|
AArch64_ORRv8i16 = 4948,
|
||
|
|
AArch64_ORRv8i8 = 4949,
|
||
|
|
AArch64_ORV_VPZ_B = 4950,
|
||
|
|
AArch64_ORV_VPZ_D = 4951,
|
||
|
|
AArch64_ORV_VPZ_H = 4952,
|
||
|
|
AArch64_ORV_VPZ_S = 4953,
|
||
|
|
AArch64_PACDA = 4954,
|
||
|
|
AArch64_PACDB = 4955,
|
||
|
|
AArch64_PACDZA = 4956,
|
||
|
|
AArch64_PACDZB = 4957,
|
||
|
|
AArch64_PACGA = 4958,
|
||
|
|
AArch64_PACIA = 4959,
|
||
|
|
AArch64_PACIA1716 = 4960,
|
||
|
|
AArch64_PACIA171615 = 4961,
|
||
|
|
AArch64_PACIASP = 4962,
|
||
|
|
AArch64_PACIASPPC = 4963,
|
||
|
|
AArch64_PACIAZ = 4964,
|
||
|
|
AArch64_PACIB = 4965,
|
||
|
|
AArch64_PACIB1716 = 4966,
|
||
|
|
AArch64_PACIB171615 = 4967,
|
||
|
|
AArch64_PACIBSP = 4968,
|
||
|
|
AArch64_PACIBSPPC = 4969,
|
||
|
|
AArch64_PACIBZ = 4970,
|
||
|
|
AArch64_PACIZA = 4971,
|
||
|
|
AArch64_PACIZB = 4972,
|
||
|
|
AArch64_PACM = 4973,
|
||
|
|
AArch64_PACNBIASPPC = 4974,
|
||
|
|
AArch64_PACNBIBSPPC = 4975,
|
||
|
|
AArch64_PEXT_2PCI_B = 4976,
|
||
|
|
AArch64_PEXT_2PCI_D = 4977,
|
||
|
|
AArch64_PEXT_2PCI_H = 4978,
|
||
|
|
AArch64_PEXT_2PCI_S = 4979,
|
||
|
|
AArch64_PEXT_PCI_B = 4980,
|
||
|
|
AArch64_PEXT_PCI_D = 4981,
|
||
|
|
AArch64_PEXT_PCI_H = 4982,
|
||
|
|
AArch64_PEXT_PCI_S = 4983,
|
||
|
|
AArch64_PFALSE = 4984,
|
||
|
|
AArch64_PFIRST_B = 4985,
|
||
|
|
AArch64_PMOV_PZI_B = 4986,
|
||
|
|
AArch64_PMOV_PZI_D = 4987,
|
||
|
|
AArch64_PMOV_PZI_H = 4988,
|
||
|
|
AArch64_PMOV_PZI_S = 4989,
|
||
|
|
AArch64_PMOV_ZIP_B = 4990,
|
||
|
|
AArch64_PMOV_ZIP_D = 4991,
|
||
|
|
AArch64_PMOV_ZIP_H = 4992,
|
||
|
|
AArch64_PMOV_ZIP_S = 4993,
|
||
|
|
AArch64_PMULLB_ZZZ_D = 4994,
|
||
|
|
AArch64_PMULLB_ZZZ_H = 4995,
|
||
|
|
AArch64_PMULLB_ZZZ_Q = 4996,
|
||
|
|
AArch64_PMULLT_ZZZ_D = 4997,
|
||
|
|
AArch64_PMULLT_ZZZ_H = 4998,
|
||
|
|
AArch64_PMULLT_ZZZ_Q = 4999,
|
||
|
|
AArch64_PMULLv16i8 = 5000,
|
||
|
|
AArch64_PMULLv1i64 = 5001,
|
||
|
|
AArch64_PMULLv2i64 = 5002,
|
||
|
|
AArch64_PMULLv8i8 = 5003,
|
||
|
|
AArch64_PMUL_ZZZ_B = 5004,
|
||
|
|
AArch64_PMULv16i8 = 5005,
|
||
|
|
AArch64_PMULv8i8 = 5006,
|
||
|
|
AArch64_PNEXT_B = 5007,
|
||
|
|
AArch64_PNEXT_D = 5008,
|
||
|
|
AArch64_PNEXT_H = 5009,
|
||
|
|
AArch64_PNEXT_S = 5010,
|
||
|
|
AArch64_PRFB_D_PZI = 5011,
|
||
|
|
AArch64_PRFB_D_SCALED = 5012,
|
||
|
|
AArch64_PRFB_D_SXTW_SCALED = 5013,
|
||
|
|
AArch64_PRFB_D_UXTW_SCALED = 5014,
|
||
|
|
AArch64_PRFB_PRI = 5015,
|
||
|
|
AArch64_PRFB_PRR = 5016,
|
||
|
|
AArch64_PRFB_S_PZI = 5017,
|
||
|
|
AArch64_PRFB_S_SXTW_SCALED = 5018,
|
||
|
|
AArch64_PRFB_S_UXTW_SCALED = 5019,
|
||
|
|
AArch64_PRFD_D_PZI = 5020,
|
||
|
|
AArch64_PRFD_D_SCALED = 5021,
|
||
|
|
AArch64_PRFD_D_SXTW_SCALED = 5022,
|
||
|
|
AArch64_PRFD_D_UXTW_SCALED = 5023,
|
||
|
|
AArch64_PRFD_PRI = 5024,
|
||
|
|
AArch64_PRFD_PRR = 5025,
|
||
|
|
AArch64_PRFD_S_PZI = 5026,
|
||
|
|
AArch64_PRFD_S_SXTW_SCALED = 5027,
|
||
|
|
AArch64_PRFD_S_UXTW_SCALED = 5028,
|
||
|
|
AArch64_PRFH_D_PZI = 5029,
|
||
|
|
AArch64_PRFH_D_SCALED = 5030,
|
||
|
|
AArch64_PRFH_D_SXTW_SCALED = 5031,
|
||
|
|
AArch64_PRFH_D_UXTW_SCALED = 5032,
|
||
|
|
AArch64_PRFH_PRI = 5033,
|
||
|
|
AArch64_PRFH_PRR = 5034,
|
||
|
|
AArch64_PRFH_S_PZI = 5035,
|
||
|
|
AArch64_PRFH_S_SXTW_SCALED = 5036,
|
||
|
|
AArch64_PRFH_S_UXTW_SCALED = 5037,
|
||
|
|
AArch64_PRFMl = 5038,
|
||
|
|
AArch64_PRFMroW = 5039,
|
||
|
|
AArch64_PRFMroX = 5040,
|
||
|
|
AArch64_PRFMui = 5041,
|
||
|
|
AArch64_PRFUMi = 5042,
|
||
|
|
AArch64_PRFW_D_PZI = 5043,
|
||
|
|
AArch64_PRFW_D_SCALED = 5044,
|
||
|
|
AArch64_PRFW_D_SXTW_SCALED = 5045,
|
||
|
|
AArch64_PRFW_D_UXTW_SCALED = 5046,
|
||
|
|
AArch64_PRFW_PRI = 5047,
|
||
|
|
AArch64_PRFW_PRR = 5048,
|
||
|
|
AArch64_PRFW_S_PZI = 5049,
|
||
|
|
AArch64_PRFW_S_SXTW_SCALED = 5050,
|
||
|
|
AArch64_PRFW_S_UXTW_SCALED = 5051,
|
||
|
|
AArch64_PSEL_PPPRI_B = 5052,
|
||
|
|
AArch64_PSEL_PPPRI_D = 5053,
|
||
|
|
AArch64_PSEL_PPPRI_H = 5054,
|
||
|
|
AArch64_PSEL_PPPRI_S = 5055,
|
||
|
|
AArch64_PTEST_PP = 5056,
|
||
|
|
AArch64_PTRUES_B = 5057,
|
||
|
|
AArch64_PTRUES_D = 5058,
|
||
|
|
AArch64_PTRUES_H = 5059,
|
||
|
|
AArch64_PTRUES_S = 5060,
|
||
|
|
AArch64_PTRUE_B = 5061,
|
||
|
|
AArch64_PTRUE_C_B = 5062,
|
||
|
|
AArch64_PTRUE_C_D = 5063,
|
||
|
|
AArch64_PTRUE_C_H = 5064,
|
||
|
|
AArch64_PTRUE_C_S = 5065,
|
||
|
|
AArch64_PTRUE_D = 5066,
|
||
|
|
AArch64_PTRUE_H = 5067,
|
||
|
|
AArch64_PTRUE_S = 5068,
|
||
|
|
AArch64_PUNPKHI_PP = 5069,
|
||
|
|
AArch64_PUNPKLO_PP = 5070,
|
||
|
|
AArch64_RADDHNB_ZZZ_B = 5071,
|
||
|
|
AArch64_RADDHNB_ZZZ_H = 5072,
|
||
|
|
AArch64_RADDHNB_ZZZ_S = 5073,
|
||
|
|
AArch64_RADDHNT_ZZZ_B = 5074,
|
||
|
|
AArch64_RADDHNT_ZZZ_H = 5075,
|
||
|
|
AArch64_RADDHNT_ZZZ_S = 5076,
|
||
|
|
AArch64_RADDHNv2i64_v2i32 = 5077,
|
||
|
|
AArch64_RADDHNv2i64_v4i32 = 5078,
|
||
|
|
AArch64_RADDHNv4i32_v4i16 = 5079,
|
||
|
|
AArch64_RADDHNv4i32_v8i16 = 5080,
|
||
|
|
AArch64_RADDHNv8i16_v16i8 = 5081,
|
||
|
|
AArch64_RADDHNv8i16_v8i8 = 5082,
|
||
|
|
AArch64_RAX1 = 5083,
|
||
|
|
AArch64_RAX1_ZZZ_D = 5084,
|
||
|
|
AArch64_RBITWr = 5085,
|
||
|
|
AArch64_RBITXr = 5086,
|
||
|
|
AArch64_RBIT_ZPmZ_B = 5087,
|
||
|
|
AArch64_RBIT_ZPmZ_D = 5088,
|
||
|
|
AArch64_RBIT_ZPmZ_H = 5089,
|
||
|
|
AArch64_RBIT_ZPmZ_S = 5090,
|
||
|
|
AArch64_RBITv16i8 = 5091,
|
||
|
|
AArch64_RBITv8i8 = 5092,
|
||
|
|
AArch64_RCWCAS = 5093,
|
||
|
|
AArch64_RCWCASA = 5094,
|
||
|
|
AArch64_RCWCASAL = 5095,
|
||
|
|
AArch64_RCWCASL = 5096,
|
||
|
|
AArch64_RCWCASP = 5097,
|
||
|
|
AArch64_RCWCASPA = 5098,
|
||
|
|
AArch64_RCWCASPAL = 5099,
|
||
|
|
AArch64_RCWCASPL = 5100,
|
||
|
|
AArch64_RCWCLR = 5101,
|
||
|
|
AArch64_RCWCLRA = 5102,
|
||
|
|
AArch64_RCWCLRAL = 5103,
|
||
|
|
AArch64_RCWCLRL = 5104,
|
||
|
|
AArch64_RCWCLRP = 5105,
|
||
|
|
AArch64_RCWCLRPA = 5106,
|
||
|
|
AArch64_RCWCLRPAL = 5107,
|
||
|
|
AArch64_RCWCLRPL = 5108,
|
||
|
|
AArch64_RCWCLRS = 5109,
|
||
|
|
AArch64_RCWCLRSA = 5110,
|
||
|
|
AArch64_RCWCLRSAL = 5111,
|
||
|
|
AArch64_RCWCLRSL = 5112,
|
||
|
|
AArch64_RCWCLRSP = 5113,
|
||
|
|
AArch64_RCWCLRSPA = 5114,
|
||
|
|
AArch64_RCWCLRSPAL = 5115,
|
||
|
|
AArch64_RCWCLRSPL = 5116,
|
||
|
|
AArch64_RCWSCAS = 5117,
|
||
|
|
AArch64_RCWSCASA = 5118,
|
||
|
|
AArch64_RCWSCASAL = 5119,
|
||
|
|
AArch64_RCWSCASL = 5120,
|
||
|
|
AArch64_RCWSCASP = 5121,
|
||
|
|
AArch64_RCWSCASPA = 5122,
|
||
|
|
AArch64_RCWSCASPAL = 5123,
|
||
|
|
AArch64_RCWSCASPL = 5124,
|
||
|
|
AArch64_RCWSET = 5125,
|
||
|
|
AArch64_RCWSETA = 5126,
|
||
|
|
AArch64_RCWSETAL = 5127,
|
||
|
|
AArch64_RCWSETL = 5128,
|
||
|
|
AArch64_RCWSETP = 5129,
|
||
|
|
AArch64_RCWSETPA = 5130,
|
||
|
|
AArch64_RCWSETPAL = 5131,
|
||
|
|
AArch64_RCWSETPL = 5132,
|
||
|
|
AArch64_RCWSETS = 5133,
|
||
|
|
AArch64_RCWSETSA = 5134,
|
||
|
|
AArch64_RCWSETSAL = 5135,
|
||
|
|
AArch64_RCWSETSL = 5136,
|
||
|
|
AArch64_RCWSETSP = 5137,
|
||
|
|
AArch64_RCWSETSPA = 5138,
|
||
|
|
AArch64_RCWSETSPAL = 5139,
|
||
|
|
AArch64_RCWSETSPL = 5140,
|
||
|
|
AArch64_RCWSWP = 5141,
|
||
|
|
AArch64_RCWSWPA = 5142,
|
||
|
|
AArch64_RCWSWPAL = 5143,
|
||
|
|
AArch64_RCWSWPL = 5144,
|
||
|
|
AArch64_RCWSWPP = 5145,
|
||
|
|
AArch64_RCWSWPPA = 5146,
|
||
|
|
AArch64_RCWSWPPAL = 5147,
|
||
|
|
AArch64_RCWSWPPL = 5148,
|
||
|
|
AArch64_RCWSWPS = 5149,
|
||
|
|
AArch64_RCWSWPSA = 5150,
|
||
|
|
AArch64_RCWSWPSAL = 5151,
|
||
|
|
AArch64_RCWSWPSL = 5152,
|
||
|
|
AArch64_RCWSWPSP = 5153,
|
||
|
|
AArch64_RCWSWPSPA = 5154,
|
||
|
|
AArch64_RCWSWPSPAL = 5155,
|
||
|
|
AArch64_RCWSWPSPL = 5156,
|
||
|
|
AArch64_RDFFRS_PPz = 5157,
|
||
|
|
AArch64_RDFFR_PPz_REAL = 5158,
|
||
|
|
AArch64_RDFFR_P_REAL = 5159,
|
||
|
|
AArch64_RDSVLI_XI = 5160,
|
||
|
|
AArch64_RDVLI_XI = 5161,
|
||
|
|
AArch64_RET = 5162,
|
||
|
|
AArch64_RETAA = 5163,
|
||
|
|
AArch64_RETAASPPCi = 5164,
|
||
|
|
AArch64_RETAASPPCr = 5165,
|
||
|
|
AArch64_RETAB = 5166,
|
||
|
|
AArch64_RETABSPPCi = 5167,
|
||
|
|
AArch64_RETABSPPCr = 5168,
|
||
|
|
AArch64_REV16Wr = 5169,
|
||
|
|
AArch64_REV16Xr = 5170,
|
||
|
|
AArch64_REV16v16i8 = 5171,
|
||
|
|
AArch64_REV16v8i8 = 5172,
|
||
|
|
AArch64_REV32Xr = 5173,
|
||
|
|
AArch64_REV32v16i8 = 5174,
|
||
|
|
AArch64_REV32v4i16 = 5175,
|
||
|
|
AArch64_REV32v8i16 = 5176,
|
||
|
|
AArch64_REV32v8i8 = 5177,
|
||
|
|
AArch64_REV64v16i8 = 5178,
|
||
|
|
AArch64_REV64v2i32 = 5179,
|
||
|
|
AArch64_REV64v4i16 = 5180,
|
||
|
|
AArch64_REV64v4i32 = 5181,
|
||
|
|
AArch64_REV64v8i16 = 5182,
|
||
|
|
AArch64_REV64v8i8 = 5183,
|
||
|
|
AArch64_REVB_ZPmZ_D = 5184,
|
||
|
|
AArch64_REVB_ZPmZ_H = 5185,
|
||
|
|
AArch64_REVB_ZPmZ_S = 5186,
|
||
|
|
AArch64_REVD_ZPmZ = 5187,
|
||
|
|
AArch64_REVH_ZPmZ_D = 5188,
|
||
|
|
AArch64_REVH_ZPmZ_S = 5189,
|
||
|
|
AArch64_REVW_ZPmZ_D = 5190,
|
||
|
|
AArch64_REVWr = 5191,
|
||
|
|
AArch64_REVXr = 5192,
|
||
|
|
AArch64_REV_PP_B = 5193,
|
||
|
|
AArch64_REV_PP_D = 5194,
|
||
|
|
AArch64_REV_PP_H = 5195,
|
||
|
|
AArch64_REV_PP_S = 5196,
|
||
|
|
AArch64_REV_ZZ_B = 5197,
|
||
|
|
AArch64_REV_ZZ_D = 5198,
|
||
|
|
AArch64_REV_ZZ_H = 5199,
|
||
|
|
AArch64_REV_ZZ_S = 5200,
|
||
|
|
AArch64_RMIF = 5201,
|
||
|
|
AArch64_RORVWr = 5202,
|
||
|
|
AArch64_RORVXr = 5203,
|
||
|
|
AArch64_RPRFM = 5204,
|
||
|
|
AArch64_RSHRNB_ZZI_B = 5205,
|
||
|
|
AArch64_RSHRNB_ZZI_H = 5206,
|
||
|
|
AArch64_RSHRNB_ZZI_S = 5207,
|
||
|
|
AArch64_RSHRNT_ZZI_B = 5208,
|
||
|
|
AArch64_RSHRNT_ZZI_H = 5209,
|
||
|
|
AArch64_RSHRNT_ZZI_S = 5210,
|
||
|
|
AArch64_RSHRNv16i8_shift = 5211,
|
||
|
|
AArch64_RSHRNv2i32_shift = 5212,
|
||
|
|
AArch64_RSHRNv4i16_shift = 5213,
|
||
|
|
AArch64_RSHRNv4i32_shift = 5214,
|
||
|
|
AArch64_RSHRNv8i16_shift = 5215,
|
||
|
|
AArch64_RSHRNv8i8_shift = 5216,
|
||
|
|
AArch64_RSUBHNB_ZZZ_B = 5217,
|
||
|
|
AArch64_RSUBHNB_ZZZ_H = 5218,
|
||
|
|
AArch64_RSUBHNB_ZZZ_S = 5219,
|
||
|
|
AArch64_RSUBHNT_ZZZ_B = 5220,
|
||
|
|
AArch64_RSUBHNT_ZZZ_H = 5221,
|
||
|
|
AArch64_RSUBHNT_ZZZ_S = 5222,
|
||
|
|
AArch64_RSUBHNv2i64_v2i32 = 5223,
|
||
|
|
AArch64_RSUBHNv2i64_v4i32 = 5224,
|
||
|
|
AArch64_RSUBHNv4i32_v4i16 = 5225,
|
||
|
|
AArch64_RSUBHNv4i32_v8i16 = 5226,
|
||
|
|
AArch64_RSUBHNv8i16_v16i8 = 5227,
|
||
|
|
AArch64_RSUBHNv8i16_v8i8 = 5228,
|
||
|
|
AArch64_SABALB_ZZZ_D = 5229,
|
||
|
|
AArch64_SABALB_ZZZ_H = 5230,
|
||
|
|
AArch64_SABALB_ZZZ_S = 5231,
|
||
|
|
AArch64_SABALT_ZZZ_D = 5232,
|
||
|
|
AArch64_SABALT_ZZZ_H = 5233,
|
||
|
|
AArch64_SABALT_ZZZ_S = 5234,
|
||
|
|
AArch64_SABALv16i8_v8i16 = 5235,
|
||
|
|
AArch64_SABALv2i32_v2i64 = 5236,
|
||
|
|
AArch64_SABALv4i16_v4i32 = 5237,
|
||
|
|
AArch64_SABALv4i32_v2i64 = 5238,
|
||
|
|
AArch64_SABALv8i16_v4i32 = 5239,
|
||
|
|
AArch64_SABALv8i8_v8i16 = 5240,
|
||
|
|
AArch64_SABA_ZZZ_B = 5241,
|
||
|
|
AArch64_SABA_ZZZ_D = 5242,
|
||
|
|
AArch64_SABA_ZZZ_H = 5243,
|
||
|
|
AArch64_SABA_ZZZ_S = 5244,
|
||
|
|
AArch64_SABAv16i8 = 5245,
|
||
|
|
AArch64_SABAv2i32 = 5246,
|
||
|
|
AArch64_SABAv4i16 = 5247,
|
||
|
|
AArch64_SABAv4i32 = 5248,
|
||
|
|
AArch64_SABAv8i16 = 5249,
|
||
|
|
AArch64_SABAv8i8 = 5250,
|
||
|
|
AArch64_SABDLB_ZZZ_D = 5251,
|
||
|
|
AArch64_SABDLB_ZZZ_H = 5252,
|
||
|
|
AArch64_SABDLB_ZZZ_S = 5253,
|
||
|
|
AArch64_SABDLT_ZZZ_D = 5254,
|
||
|
|
AArch64_SABDLT_ZZZ_H = 5255,
|
||
|
|
AArch64_SABDLT_ZZZ_S = 5256,
|
||
|
|
AArch64_SABDLv16i8_v8i16 = 5257,
|
||
|
|
AArch64_SABDLv2i32_v2i64 = 5258,
|
||
|
|
AArch64_SABDLv4i16_v4i32 = 5259,
|
||
|
|
AArch64_SABDLv4i32_v2i64 = 5260,
|
||
|
|
AArch64_SABDLv8i16_v4i32 = 5261,
|
||
|
|
AArch64_SABDLv8i8_v8i16 = 5262,
|
||
|
|
AArch64_SABD_ZPmZ_B = 5263,
|
||
|
|
AArch64_SABD_ZPmZ_D = 5264,
|
||
|
|
AArch64_SABD_ZPmZ_H = 5265,
|
||
|
|
AArch64_SABD_ZPmZ_S = 5266,
|
||
|
|
AArch64_SABDv16i8 = 5267,
|
||
|
|
AArch64_SABDv2i32 = 5268,
|
||
|
|
AArch64_SABDv4i16 = 5269,
|
||
|
|
AArch64_SABDv4i32 = 5270,
|
||
|
|
AArch64_SABDv8i16 = 5271,
|
||
|
|
AArch64_SABDv8i8 = 5272,
|
||
|
|
AArch64_SADALP_ZPmZ_D = 5273,
|
||
|
|
AArch64_SADALP_ZPmZ_H = 5274,
|
||
|
|
AArch64_SADALP_ZPmZ_S = 5275,
|
||
|
|
AArch64_SADALPv16i8_v8i16 = 5276,
|
||
|
|
AArch64_SADALPv2i32_v1i64 = 5277,
|
||
|
|
AArch64_SADALPv4i16_v2i32 = 5278,
|
||
|
|
AArch64_SADALPv4i32_v2i64 = 5279,
|
||
|
|
AArch64_SADALPv8i16_v4i32 = 5280,
|
||
|
|
AArch64_SADALPv8i8_v4i16 = 5281,
|
||
|
|
AArch64_SADDLBT_ZZZ_D = 5282,
|
||
|
|
AArch64_SADDLBT_ZZZ_H = 5283,
|
||
|
|
AArch64_SADDLBT_ZZZ_S = 5284,
|
||
|
|
AArch64_SADDLB_ZZZ_D = 5285,
|
||
|
|
AArch64_SADDLB_ZZZ_H = 5286,
|
||
|
|
AArch64_SADDLB_ZZZ_S = 5287,
|
||
|
|
AArch64_SADDLPv16i8_v8i16 = 5288,
|
||
|
|
AArch64_SADDLPv2i32_v1i64 = 5289,
|
||
|
|
AArch64_SADDLPv4i16_v2i32 = 5290,
|
||
|
|
AArch64_SADDLPv4i32_v2i64 = 5291,
|
||
|
|
AArch64_SADDLPv8i16_v4i32 = 5292,
|
||
|
|
AArch64_SADDLPv8i8_v4i16 = 5293,
|
||
|
|
AArch64_SADDLT_ZZZ_D = 5294,
|
||
|
|
AArch64_SADDLT_ZZZ_H = 5295,
|
||
|
|
AArch64_SADDLT_ZZZ_S = 5296,
|
||
|
|
AArch64_SADDLVv16i8v = 5297,
|
||
|
|
AArch64_SADDLVv4i16v = 5298,
|
||
|
|
AArch64_SADDLVv4i32v = 5299,
|
||
|
|
AArch64_SADDLVv8i16v = 5300,
|
||
|
|
AArch64_SADDLVv8i8v = 5301,
|
||
|
|
AArch64_SADDLv16i8_v8i16 = 5302,
|
||
|
|
AArch64_SADDLv2i32_v2i64 = 5303,
|
||
|
|
AArch64_SADDLv4i16_v4i32 = 5304,
|
||
|
|
AArch64_SADDLv4i32_v2i64 = 5305,
|
||
|
|
AArch64_SADDLv8i16_v4i32 = 5306,
|
||
|
|
AArch64_SADDLv8i8_v8i16 = 5307,
|
||
|
|
AArch64_SADDV_VPZ_B = 5308,
|
||
|
|
AArch64_SADDV_VPZ_H = 5309,
|
||
|
|
AArch64_SADDV_VPZ_S = 5310,
|
||
|
|
AArch64_SADDWB_ZZZ_D = 5311,
|
||
|
|
AArch64_SADDWB_ZZZ_H = 5312,
|
||
|
|
AArch64_SADDWB_ZZZ_S = 5313,
|
||
|
|
AArch64_SADDWT_ZZZ_D = 5314,
|
||
|
|
AArch64_SADDWT_ZZZ_H = 5315,
|
||
|
|
AArch64_SADDWT_ZZZ_S = 5316,
|
||
|
|
AArch64_SADDWv16i8_v8i16 = 5317,
|
||
|
|
AArch64_SADDWv2i32_v2i64 = 5318,
|
||
|
|
AArch64_SADDWv4i16_v4i32 = 5319,
|
||
|
|
AArch64_SADDWv4i32_v2i64 = 5320,
|
||
|
|
AArch64_SADDWv8i16_v4i32 = 5321,
|
||
|
|
AArch64_SADDWv8i8_v8i16 = 5322,
|
||
|
|
AArch64_SB = 5323,
|
||
|
|
AArch64_SBCLB_ZZZ_D = 5324,
|
||
|
|
AArch64_SBCLB_ZZZ_S = 5325,
|
||
|
|
AArch64_SBCLT_ZZZ_D = 5326,
|
||
|
|
AArch64_SBCLT_ZZZ_S = 5327,
|
||
|
|
AArch64_SBCSWr = 5328,
|
||
|
|
AArch64_SBCSXr = 5329,
|
||
|
|
AArch64_SBCWr = 5330,
|
||
|
|
AArch64_SBCXr = 5331,
|
||
|
|
AArch64_SBFMWri = 5332,
|
||
|
|
AArch64_SBFMXri = 5333,
|
||
|
|
AArch64_SCLAMP_VG2_2Z2Z_B = 5334,
|
||
|
|
AArch64_SCLAMP_VG2_2Z2Z_D = 5335,
|
||
|
|
AArch64_SCLAMP_VG2_2Z2Z_H = 5336,
|
||
|
|
AArch64_SCLAMP_VG2_2Z2Z_S = 5337,
|
||
|
|
AArch64_SCLAMP_VG4_4Z4Z_B = 5338,
|
||
|
|
AArch64_SCLAMP_VG4_4Z4Z_D = 5339,
|
||
|
|
AArch64_SCLAMP_VG4_4Z4Z_H = 5340,
|
||
|
|
AArch64_SCLAMP_VG4_4Z4Z_S = 5341,
|
||
|
|
AArch64_SCLAMP_ZZZ_B = 5342,
|
||
|
|
AArch64_SCLAMP_ZZZ_D = 5343,
|
||
|
|
AArch64_SCLAMP_ZZZ_H = 5344,
|
||
|
|
AArch64_SCLAMP_ZZZ_S = 5345,
|
||
|
|
AArch64_SCVTFSWDri = 5346,
|
||
|
|
AArch64_SCVTFSWHri = 5347,
|
||
|
|
AArch64_SCVTFSWSri = 5348,
|
||
|
|
AArch64_SCVTFSXDri = 5349,
|
||
|
|
AArch64_SCVTFSXHri = 5350,
|
||
|
|
AArch64_SCVTFSXSri = 5351,
|
||
|
|
AArch64_SCVTFUWDri = 5352,
|
||
|
|
AArch64_SCVTFUWHri = 5353,
|
||
|
|
AArch64_SCVTFUWSri = 5354,
|
||
|
|
AArch64_SCVTFUXDri = 5355,
|
||
|
|
AArch64_SCVTFUXHri = 5356,
|
||
|
|
AArch64_SCVTFUXSri = 5357,
|
||
|
|
AArch64_SCVTF_2Z2Z_StoS = 5358,
|
||
|
|
AArch64_SCVTF_4Z4Z_StoS = 5359,
|
||
|
|
AArch64_SCVTF_ZPmZ_DtoD = 5360,
|
||
|
|
AArch64_SCVTF_ZPmZ_DtoH = 5361,
|
||
|
|
AArch64_SCVTF_ZPmZ_DtoS = 5362,
|
||
|
|
AArch64_SCVTF_ZPmZ_HtoH = 5363,
|
||
|
|
AArch64_SCVTF_ZPmZ_StoD = 5364,
|
||
|
|
AArch64_SCVTF_ZPmZ_StoH = 5365,
|
||
|
|
AArch64_SCVTF_ZPmZ_StoS = 5366,
|
||
|
|
AArch64_SCVTFd = 5367,
|
||
|
|
AArch64_SCVTFh = 5368,
|
||
|
|
AArch64_SCVTFs = 5369,
|
||
|
|
AArch64_SCVTFv1i16 = 5370,
|
||
|
|
AArch64_SCVTFv1i32 = 5371,
|
||
|
|
AArch64_SCVTFv1i64 = 5372,
|
||
|
|
AArch64_SCVTFv2f32 = 5373,
|
||
|
|
AArch64_SCVTFv2f64 = 5374,
|
||
|
|
AArch64_SCVTFv2i32_shift = 5375,
|
||
|
|
AArch64_SCVTFv2i64_shift = 5376,
|
||
|
|
AArch64_SCVTFv4f16 = 5377,
|
||
|
|
AArch64_SCVTFv4f32 = 5378,
|
||
|
|
AArch64_SCVTFv4i16_shift = 5379,
|
||
|
|
AArch64_SCVTFv4i32_shift = 5380,
|
||
|
|
AArch64_SCVTFv8f16 = 5381,
|
||
|
|
AArch64_SCVTFv8i16_shift = 5382,
|
||
|
|
AArch64_SDIVR_ZPmZ_D = 5383,
|
||
|
|
AArch64_SDIVR_ZPmZ_S = 5384,
|
||
|
|
AArch64_SDIVWr = 5385,
|
||
|
|
AArch64_SDIVXr = 5386,
|
||
|
|
AArch64_SDIV_ZPmZ_D = 5387,
|
||
|
|
AArch64_SDIV_ZPmZ_S = 5388,
|
||
|
|
AArch64_SDOT_VG2_M2Z2Z_BtoS = 5389,
|
||
|
|
AArch64_SDOT_VG2_M2Z2Z_HtoD = 5390,
|
||
|
|
AArch64_SDOT_VG2_M2Z2Z_HtoS = 5391,
|
||
|
|
AArch64_SDOT_VG2_M2ZZI_BToS = 5392,
|
||
|
|
AArch64_SDOT_VG2_M2ZZI_HToS = 5393,
|
||
|
|
AArch64_SDOT_VG2_M2ZZI_HtoD = 5394,
|
||
|
|
AArch64_SDOT_VG2_M2ZZ_BtoS = 5395,
|
||
|
|
AArch64_SDOT_VG2_M2ZZ_HtoD = 5396,
|
||
|
|
AArch64_SDOT_VG2_M2ZZ_HtoS = 5397,
|
||
|
|
AArch64_SDOT_VG4_M4Z4Z_BtoS = 5398,
|
||
|
|
AArch64_SDOT_VG4_M4Z4Z_HtoD = 5399,
|
||
|
|
AArch64_SDOT_VG4_M4Z4Z_HtoS = 5400,
|
||
|
|
AArch64_SDOT_VG4_M4ZZI_BToS = 5401,
|
||
|
|
AArch64_SDOT_VG4_M4ZZI_HToS = 5402,
|
||
|
|
AArch64_SDOT_VG4_M4ZZI_HtoD = 5403,
|
||
|
|
AArch64_SDOT_VG4_M4ZZ_BtoS = 5404,
|
||
|
|
AArch64_SDOT_VG4_M4ZZ_HtoD = 5405,
|
||
|
|
AArch64_SDOT_VG4_M4ZZ_HtoS = 5406,
|
||
|
|
AArch64_SDOT_ZZZI_D = 5407,
|
||
|
|
AArch64_SDOT_ZZZI_HtoS = 5408,
|
||
|
|
AArch64_SDOT_ZZZI_S = 5409,
|
||
|
|
AArch64_SDOT_ZZZ_D = 5410,
|
||
|
|
AArch64_SDOT_ZZZ_HtoS = 5411,
|
||
|
|
AArch64_SDOT_ZZZ_S = 5412,
|
||
|
|
AArch64_SDOTlanev16i8 = 5413,
|
||
|
|
AArch64_SDOTlanev8i8 = 5414,
|
||
|
|
AArch64_SDOTv16i8 = 5415,
|
||
|
|
AArch64_SDOTv8i8 = 5416,
|
||
|
|
AArch64_SEL_PPPP = 5417,
|
||
|
|
AArch64_SEL_VG2_2ZC2Z2Z_B = 5418,
|
||
|
|
AArch64_SEL_VG2_2ZC2Z2Z_D = 5419,
|
||
|
|
AArch64_SEL_VG2_2ZC2Z2Z_H = 5420,
|
||
|
|
AArch64_SEL_VG2_2ZC2Z2Z_S = 5421,
|
||
|
|
AArch64_SEL_VG4_4ZC4Z4Z_B = 5422,
|
||
|
|
AArch64_SEL_VG4_4ZC4Z4Z_D = 5423,
|
||
|
|
AArch64_SEL_VG4_4ZC4Z4Z_H = 5424,
|
||
|
|
AArch64_SEL_VG4_4ZC4Z4Z_S = 5425,
|
||
|
|
AArch64_SEL_ZPZZ_B = 5426,
|
||
|
|
AArch64_SEL_ZPZZ_D = 5427,
|
||
|
|
AArch64_SEL_ZPZZ_H = 5428,
|
||
|
|
AArch64_SEL_ZPZZ_S = 5429,
|
||
|
|
AArch64_SETE = 5430,
|
||
|
|
AArch64_SETEN = 5431,
|
||
|
|
AArch64_SETET = 5432,
|
||
|
|
AArch64_SETETN = 5433,
|
||
|
|
AArch64_SETF16 = 5434,
|
||
|
|
AArch64_SETF8 = 5435,
|
||
|
|
AArch64_SETFFR = 5436,
|
||
|
|
AArch64_SETGM = 5437,
|
||
|
|
AArch64_SETGMN = 5438,
|
||
|
|
AArch64_SETGMT = 5439,
|
||
|
|
AArch64_SETGMTN = 5440,
|
||
|
|
AArch64_SETGP = 5441,
|
||
|
|
AArch64_SETGPN = 5442,
|
||
|
|
AArch64_SETGPT = 5443,
|
||
|
|
AArch64_SETGPTN = 5444,
|
||
|
|
AArch64_SETM = 5445,
|
||
|
|
AArch64_SETMN = 5446,
|
||
|
|
AArch64_SETMT = 5447,
|
||
|
|
AArch64_SETMTN = 5448,
|
||
|
|
AArch64_SETP = 5449,
|
||
|
|
AArch64_SETPN = 5450,
|
||
|
|
AArch64_SETPT = 5451,
|
||
|
|
AArch64_SETPTN = 5452,
|
||
|
|
AArch64_SHA1Crrr = 5453,
|
||
|
|
AArch64_SHA1Hrr = 5454,
|
||
|
|
AArch64_SHA1Mrrr = 5455,
|
||
|
|
AArch64_SHA1Prrr = 5456,
|
||
|
|
AArch64_SHA1SU0rrr = 5457,
|
||
|
|
AArch64_SHA1SU1rr = 5458,
|
||
|
|
AArch64_SHA256H2rrr = 5459,
|
||
|
|
AArch64_SHA256Hrrr = 5460,
|
||
|
|
AArch64_SHA256SU0rr = 5461,
|
||
|
|
AArch64_SHA256SU1rrr = 5462,
|
||
|
|
AArch64_SHA512H = 5463,
|
||
|
|
AArch64_SHA512H2 = 5464,
|
||
|
|
AArch64_SHA512SU0 = 5465,
|
||
|
|
AArch64_SHA512SU1 = 5466,
|
||
|
|
AArch64_SHADD_ZPmZ_B = 5467,
|
||
|
|
AArch64_SHADD_ZPmZ_D = 5468,
|
||
|
|
AArch64_SHADD_ZPmZ_H = 5469,
|
||
|
|
AArch64_SHADD_ZPmZ_S = 5470,
|
||
|
|
AArch64_SHADDv16i8 = 5471,
|
||
|
|
AArch64_SHADDv2i32 = 5472,
|
||
|
|
AArch64_SHADDv4i16 = 5473,
|
||
|
|
AArch64_SHADDv4i32 = 5474,
|
||
|
|
AArch64_SHADDv8i16 = 5475,
|
||
|
|
AArch64_SHADDv8i8 = 5476,
|
||
|
|
AArch64_SHLLv16i8 = 5477,
|
||
|
|
AArch64_SHLLv2i32 = 5478,
|
||
|
|
AArch64_SHLLv4i16 = 5479,
|
||
|
|
AArch64_SHLLv4i32 = 5480,
|
||
|
|
AArch64_SHLLv8i16 = 5481,
|
||
|
|
AArch64_SHLLv8i8 = 5482,
|
||
|
|
AArch64_SHLd = 5483,
|
||
|
|
AArch64_SHLv16i8_shift = 5484,
|
||
|
|
AArch64_SHLv2i32_shift = 5485,
|
||
|
|
AArch64_SHLv2i64_shift = 5486,
|
||
|
|
AArch64_SHLv4i16_shift = 5487,
|
||
|
|
AArch64_SHLv4i32_shift = 5488,
|
||
|
|
AArch64_SHLv8i16_shift = 5489,
|
||
|
|
AArch64_SHLv8i8_shift = 5490,
|
||
|
|
AArch64_SHRNB_ZZI_B = 5491,
|
||
|
|
AArch64_SHRNB_ZZI_H = 5492,
|
||
|
|
AArch64_SHRNB_ZZI_S = 5493,
|
||
|
|
AArch64_SHRNT_ZZI_B = 5494,
|
||
|
|
AArch64_SHRNT_ZZI_H = 5495,
|
||
|
|
AArch64_SHRNT_ZZI_S = 5496,
|
||
|
|
AArch64_SHRNv16i8_shift = 5497,
|
||
|
|
AArch64_SHRNv2i32_shift = 5498,
|
||
|
|
AArch64_SHRNv4i16_shift = 5499,
|
||
|
|
AArch64_SHRNv4i32_shift = 5500,
|
||
|
|
AArch64_SHRNv8i16_shift = 5501,
|
||
|
|
AArch64_SHRNv8i8_shift = 5502,
|
||
|
|
AArch64_SHSUBR_ZPmZ_B = 5503,
|
||
|
|
AArch64_SHSUBR_ZPmZ_D = 5504,
|
||
|
|
AArch64_SHSUBR_ZPmZ_H = 5505,
|
||
|
|
AArch64_SHSUBR_ZPmZ_S = 5506,
|
||
|
|
AArch64_SHSUB_ZPmZ_B = 5507,
|
||
|
|
AArch64_SHSUB_ZPmZ_D = 5508,
|
||
|
|
AArch64_SHSUB_ZPmZ_H = 5509,
|
||
|
|
AArch64_SHSUB_ZPmZ_S = 5510,
|
||
|
|
AArch64_SHSUBv16i8 = 5511,
|
||
|
|
AArch64_SHSUBv2i32 = 5512,
|
||
|
|
AArch64_SHSUBv4i16 = 5513,
|
||
|
|
AArch64_SHSUBv4i32 = 5514,
|
||
|
|
AArch64_SHSUBv8i16 = 5515,
|
||
|
|
AArch64_SHSUBv8i8 = 5516,
|
||
|
|
AArch64_SLI_ZZI_B = 5517,
|
||
|
|
AArch64_SLI_ZZI_D = 5518,
|
||
|
|
AArch64_SLI_ZZI_H = 5519,
|
||
|
|
AArch64_SLI_ZZI_S = 5520,
|
||
|
|
AArch64_SLId = 5521,
|
||
|
|
AArch64_SLIv16i8_shift = 5522,
|
||
|
|
AArch64_SLIv2i32_shift = 5523,
|
||
|
|
AArch64_SLIv2i64_shift = 5524,
|
||
|
|
AArch64_SLIv4i16_shift = 5525,
|
||
|
|
AArch64_SLIv4i32_shift = 5526,
|
||
|
|
AArch64_SLIv8i16_shift = 5527,
|
||
|
|
AArch64_SLIv8i8_shift = 5528,
|
||
|
|
AArch64_SM3PARTW1 = 5529,
|
||
|
|
AArch64_SM3PARTW2 = 5530,
|
||
|
|
AArch64_SM3SS1 = 5531,
|
||
|
|
AArch64_SM3TT1A = 5532,
|
||
|
|
AArch64_SM3TT1B = 5533,
|
||
|
|
AArch64_SM3TT2A = 5534,
|
||
|
|
AArch64_SM3TT2B = 5535,
|
||
|
|
AArch64_SM4E = 5536,
|
||
|
|
AArch64_SM4EKEY_ZZZ_S = 5537,
|
||
|
|
AArch64_SM4ENCKEY = 5538,
|
||
|
|
AArch64_SM4E_ZZZ_S = 5539,
|
||
|
|
AArch64_SMADDLrrr = 5540,
|
||
|
|
AArch64_SMAXP_ZPmZ_B = 5541,
|
||
|
|
AArch64_SMAXP_ZPmZ_D = 5542,
|
||
|
|
AArch64_SMAXP_ZPmZ_H = 5543,
|
||
|
|
AArch64_SMAXP_ZPmZ_S = 5544,
|
||
|
|
AArch64_SMAXPv16i8 = 5545,
|
||
|
|
AArch64_SMAXPv2i32 = 5546,
|
||
|
|
AArch64_SMAXPv4i16 = 5547,
|
||
|
|
AArch64_SMAXPv4i32 = 5548,
|
||
|
|
AArch64_SMAXPv8i16 = 5549,
|
||
|
|
AArch64_SMAXPv8i8 = 5550,
|
||
|
|
AArch64_SMAXQV_VPZ_B = 5551,
|
||
|
|
AArch64_SMAXQV_VPZ_D = 5552,
|
||
|
|
AArch64_SMAXQV_VPZ_H = 5553,
|
||
|
|
AArch64_SMAXQV_VPZ_S = 5554,
|
||
|
|
AArch64_SMAXV_VPZ_B = 5555,
|
||
|
|
AArch64_SMAXV_VPZ_D = 5556,
|
||
|
|
AArch64_SMAXV_VPZ_H = 5557,
|
||
|
|
AArch64_SMAXV_VPZ_S = 5558,
|
||
|
|
AArch64_SMAXVv16i8v = 5559,
|
||
|
|
AArch64_SMAXVv4i16v = 5560,
|
||
|
|
AArch64_SMAXVv4i32v = 5561,
|
||
|
|
AArch64_SMAXVv8i16v = 5562,
|
||
|
|
AArch64_SMAXVv8i8v = 5563,
|
||
|
|
AArch64_SMAXWri = 5564,
|
||
|
|
AArch64_SMAXWrr = 5565,
|
||
|
|
AArch64_SMAXXri = 5566,
|
||
|
|
AArch64_SMAXXrr = 5567,
|
||
|
|
AArch64_SMAX_VG2_2Z2Z_B = 5568,
|
||
|
|
AArch64_SMAX_VG2_2Z2Z_D = 5569,
|
||
|
|
AArch64_SMAX_VG2_2Z2Z_H = 5570,
|
||
|
|
AArch64_SMAX_VG2_2Z2Z_S = 5571,
|
||
|
|
AArch64_SMAX_VG2_2ZZ_B = 5572,
|
||
|
|
AArch64_SMAX_VG2_2ZZ_D = 5573,
|
||
|
|
AArch64_SMAX_VG2_2ZZ_H = 5574,
|
||
|
|
AArch64_SMAX_VG2_2ZZ_S = 5575,
|
||
|
|
AArch64_SMAX_VG4_4Z4Z_B = 5576,
|
||
|
|
AArch64_SMAX_VG4_4Z4Z_D = 5577,
|
||
|
|
AArch64_SMAX_VG4_4Z4Z_H = 5578,
|
||
|
|
AArch64_SMAX_VG4_4Z4Z_S = 5579,
|
||
|
|
AArch64_SMAX_VG4_4ZZ_B = 5580,
|
||
|
|
AArch64_SMAX_VG4_4ZZ_D = 5581,
|
||
|
|
AArch64_SMAX_VG4_4ZZ_H = 5582,
|
||
|
|
AArch64_SMAX_VG4_4ZZ_S = 5583,
|
||
|
|
AArch64_SMAX_ZI_B = 5584,
|
||
|
|
AArch64_SMAX_ZI_D = 5585,
|
||
|
|
AArch64_SMAX_ZI_H = 5586,
|
||
|
|
AArch64_SMAX_ZI_S = 5587,
|
||
|
|
AArch64_SMAX_ZPmZ_B = 5588,
|
||
|
|
AArch64_SMAX_ZPmZ_D = 5589,
|
||
|
|
AArch64_SMAX_ZPmZ_H = 5590,
|
||
|
|
AArch64_SMAX_ZPmZ_S = 5591,
|
||
|
|
AArch64_SMAXv16i8 = 5592,
|
||
|
|
AArch64_SMAXv2i32 = 5593,
|
||
|
|
AArch64_SMAXv4i16 = 5594,
|
||
|
|
AArch64_SMAXv4i32 = 5595,
|
||
|
|
AArch64_SMAXv8i16 = 5596,
|
||
|
|
AArch64_SMAXv8i8 = 5597,
|
||
|
|
AArch64_SMC = 5598,
|
||
|
|
AArch64_SMINP_ZPmZ_B = 5599,
|
||
|
|
AArch64_SMINP_ZPmZ_D = 5600,
|
||
|
|
AArch64_SMINP_ZPmZ_H = 5601,
|
||
|
|
AArch64_SMINP_ZPmZ_S = 5602,
|
||
|
|
AArch64_SMINPv16i8 = 5603,
|
||
|
|
AArch64_SMINPv2i32 = 5604,
|
||
|
|
AArch64_SMINPv4i16 = 5605,
|
||
|
|
AArch64_SMINPv4i32 = 5606,
|
||
|
|
AArch64_SMINPv8i16 = 5607,
|
||
|
|
AArch64_SMINPv8i8 = 5608,
|
||
|
|
AArch64_SMINQV_VPZ_B = 5609,
|
||
|
|
AArch64_SMINQV_VPZ_D = 5610,
|
||
|
|
AArch64_SMINQV_VPZ_H = 5611,
|
||
|
|
AArch64_SMINQV_VPZ_S = 5612,
|
||
|
|
AArch64_SMINV_VPZ_B = 5613,
|
||
|
|
AArch64_SMINV_VPZ_D = 5614,
|
||
|
|
AArch64_SMINV_VPZ_H = 5615,
|
||
|
|
AArch64_SMINV_VPZ_S = 5616,
|
||
|
|
AArch64_SMINVv16i8v = 5617,
|
||
|
|
AArch64_SMINVv4i16v = 5618,
|
||
|
|
AArch64_SMINVv4i32v = 5619,
|
||
|
|
AArch64_SMINVv8i16v = 5620,
|
||
|
|
AArch64_SMINVv8i8v = 5621,
|
||
|
|
AArch64_SMINWri = 5622,
|
||
|
|
AArch64_SMINWrr = 5623,
|
||
|
|
AArch64_SMINXri = 5624,
|
||
|
|
AArch64_SMINXrr = 5625,
|
||
|
|
AArch64_SMIN_VG2_2Z2Z_B = 5626,
|
||
|
|
AArch64_SMIN_VG2_2Z2Z_D = 5627,
|
||
|
|
AArch64_SMIN_VG2_2Z2Z_H = 5628,
|
||
|
|
AArch64_SMIN_VG2_2Z2Z_S = 5629,
|
||
|
|
AArch64_SMIN_VG2_2ZZ_B = 5630,
|
||
|
|
AArch64_SMIN_VG2_2ZZ_D = 5631,
|
||
|
|
AArch64_SMIN_VG2_2ZZ_H = 5632,
|
||
|
|
AArch64_SMIN_VG2_2ZZ_S = 5633,
|
||
|
|
AArch64_SMIN_VG4_4Z4Z_B = 5634,
|
||
|
|
AArch64_SMIN_VG4_4Z4Z_D = 5635,
|
||
|
|
AArch64_SMIN_VG4_4Z4Z_H = 5636,
|
||
|
|
AArch64_SMIN_VG4_4Z4Z_S = 5637,
|
||
|
|
AArch64_SMIN_VG4_4ZZ_B = 5638,
|
||
|
|
AArch64_SMIN_VG4_4ZZ_D = 5639,
|
||
|
|
AArch64_SMIN_VG4_4ZZ_H = 5640,
|
||
|
|
AArch64_SMIN_VG4_4ZZ_S = 5641,
|
||
|
|
AArch64_SMIN_ZI_B = 5642,
|
||
|
|
AArch64_SMIN_ZI_D = 5643,
|
||
|
|
AArch64_SMIN_ZI_H = 5644,
|
||
|
|
AArch64_SMIN_ZI_S = 5645,
|
||
|
|
AArch64_SMIN_ZPmZ_B = 5646,
|
||
|
|
AArch64_SMIN_ZPmZ_D = 5647,
|
||
|
|
AArch64_SMIN_ZPmZ_H = 5648,
|
||
|
|
AArch64_SMIN_ZPmZ_S = 5649,
|
||
|
|
AArch64_SMINv16i8 = 5650,
|
||
|
|
AArch64_SMINv2i32 = 5651,
|
||
|
|
AArch64_SMINv4i16 = 5652,
|
||
|
|
AArch64_SMINv4i32 = 5653,
|
||
|
|
AArch64_SMINv8i16 = 5654,
|
||
|
|
AArch64_SMINv8i8 = 5655,
|
||
|
|
AArch64_SMLALB_ZZZI_D = 5656,
|
||
|
|
AArch64_SMLALB_ZZZI_S = 5657,
|
||
|
|
AArch64_SMLALB_ZZZ_D = 5658,
|
||
|
|
AArch64_SMLALB_ZZZ_H = 5659,
|
||
|
|
AArch64_SMLALB_ZZZ_S = 5660,
|
||
|
|
AArch64_SMLALL_MZZI_BtoS = 5661,
|
||
|
|
AArch64_SMLALL_MZZI_HtoD = 5662,
|
||
|
|
AArch64_SMLALL_MZZ_BtoS = 5663,
|
||
|
|
AArch64_SMLALL_MZZ_HtoD = 5664,
|
||
|
|
AArch64_SMLALL_VG2_M2Z2Z_BtoS = 5665,
|
||
|
|
AArch64_SMLALL_VG2_M2Z2Z_HtoD = 5666,
|
||
|
|
AArch64_SMLALL_VG2_M2ZZI_BtoS = 5667,
|
||
|
|
AArch64_SMLALL_VG2_M2ZZI_HtoD = 5668,
|
||
|
|
AArch64_SMLALL_VG2_M2ZZ_BtoS = 5669,
|
||
|
|
AArch64_SMLALL_VG2_M2ZZ_HtoD = 5670,
|
||
|
|
AArch64_SMLALL_VG4_M4Z4Z_BtoS = 5671,
|
||
|
|
AArch64_SMLALL_VG4_M4Z4Z_HtoD = 5672,
|
||
|
|
AArch64_SMLALL_VG4_M4ZZI_BtoS = 5673,
|
||
|
|
AArch64_SMLALL_VG4_M4ZZI_HtoD = 5674,
|
||
|
|
AArch64_SMLALL_VG4_M4ZZ_BtoS = 5675,
|
||
|
|
AArch64_SMLALL_VG4_M4ZZ_HtoD = 5676,
|
||
|
|
AArch64_SMLALT_ZZZI_D = 5677,
|
||
|
|
AArch64_SMLALT_ZZZI_S = 5678,
|
||
|
|
AArch64_SMLALT_ZZZ_D = 5679,
|
||
|
|
AArch64_SMLALT_ZZZ_H = 5680,
|
||
|
|
AArch64_SMLALT_ZZZ_S = 5681,
|
||
|
|
AArch64_SMLAL_MZZI_HtoS = 5682,
|
||
|
|
AArch64_SMLAL_MZZ_HtoS = 5683,
|
||
|
|
AArch64_SMLAL_VG2_M2Z2Z_HtoS = 5684,
|
||
|
|
AArch64_SMLAL_VG2_M2ZZI_S = 5685,
|
||
|
|
AArch64_SMLAL_VG2_M2ZZ_HtoS = 5686,
|
||
|
|
AArch64_SMLAL_VG4_M4Z4Z_HtoS = 5687,
|
||
|
|
AArch64_SMLAL_VG4_M4ZZI_HtoS = 5688,
|
||
|
|
AArch64_SMLAL_VG4_M4ZZ_HtoS = 5689,
|
||
|
|
AArch64_SMLALv16i8_v8i16 = 5690,
|
||
|
|
AArch64_SMLALv2i32_indexed = 5691,
|
||
|
|
AArch64_SMLALv2i32_v2i64 = 5692,
|
||
|
|
AArch64_SMLALv4i16_indexed = 5693,
|
||
|
|
AArch64_SMLALv4i16_v4i32 = 5694,
|
||
|
|
AArch64_SMLALv4i32_indexed = 5695,
|
||
|
|
AArch64_SMLALv4i32_v2i64 = 5696,
|
||
|
|
AArch64_SMLALv8i16_indexed = 5697,
|
||
|
|
AArch64_SMLALv8i16_v4i32 = 5698,
|
||
|
|
AArch64_SMLALv8i8_v8i16 = 5699,
|
||
|
|
AArch64_SMLSLB_ZZZI_D = 5700,
|
||
|
|
AArch64_SMLSLB_ZZZI_S = 5701,
|
||
|
|
AArch64_SMLSLB_ZZZ_D = 5702,
|
||
|
|
AArch64_SMLSLB_ZZZ_H = 5703,
|
||
|
|
AArch64_SMLSLB_ZZZ_S = 5704,
|
||
|
|
AArch64_SMLSLL_MZZI_BtoS = 5705,
|
||
|
|
AArch64_SMLSLL_MZZI_HtoD = 5706,
|
||
|
|
AArch64_SMLSLL_MZZ_BtoS = 5707,
|
||
|
|
AArch64_SMLSLL_MZZ_HtoD = 5708,
|
||
|
|
AArch64_SMLSLL_VG2_M2Z2Z_BtoS = 5709,
|
||
|
|
AArch64_SMLSLL_VG2_M2Z2Z_HtoD = 5710,
|
||
|
|
AArch64_SMLSLL_VG2_M2ZZI_BtoS = 5711,
|
||
|
|
AArch64_SMLSLL_VG2_M2ZZI_HtoD = 5712,
|
||
|
|
AArch64_SMLSLL_VG2_M2ZZ_BtoS = 5713,
|
||
|
|
AArch64_SMLSLL_VG2_M2ZZ_HtoD = 5714,
|
||
|
|
AArch64_SMLSLL_VG4_M4Z4Z_BtoS = 5715,
|
||
|
|
AArch64_SMLSLL_VG4_M4Z4Z_HtoD = 5716,
|
||
|
|
AArch64_SMLSLL_VG4_M4ZZI_BtoS = 5717,
|
||
|
|
AArch64_SMLSLL_VG4_M4ZZI_HtoD = 5718,
|
||
|
|
AArch64_SMLSLL_VG4_M4ZZ_BtoS = 5719,
|
||
|
|
AArch64_SMLSLL_VG4_M4ZZ_HtoD = 5720,
|
||
|
|
AArch64_SMLSLT_ZZZI_D = 5721,
|
||
|
|
AArch64_SMLSLT_ZZZI_S = 5722,
|
||
|
|
AArch64_SMLSLT_ZZZ_D = 5723,
|
||
|
|
AArch64_SMLSLT_ZZZ_H = 5724,
|
||
|
|
AArch64_SMLSLT_ZZZ_S = 5725,
|
||
|
|
AArch64_SMLSL_MZZI_HtoS = 5726,
|
||
|
|
AArch64_SMLSL_MZZ_HtoS = 5727,
|
||
|
|
AArch64_SMLSL_VG2_M2Z2Z_HtoS = 5728,
|
||
|
|
AArch64_SMLSL_VG2_M2ZZI_S = 5729,
|
||
|
|
AArch64_SMLSL_VG2_M2ZZ_HtoS = 5730,
|
||
|
|
AArch64_SMLSL_VG4_M4Z4Z_HtoS = 5731,
|
||
|
|
AArch64_SMLSL_VG4_M4ZZI_HtoS = 5732,
|
||
|
|
AArch64_SMLSL_VG4_M4ZZ_HtoS = 5733,
|
||
|
|
AArch64_SMLSLv16i8_v8i16 = 5734,
|
||
|
|
AArch64_SMLSLv2i32_indexed = 5735,
|
||
|
|
AArch64_SMLSLv2i32_v2i64 = 5736,
|
||
|
|
AArch64_SMLSLv4i16_indexed = 5737,
|
||
|
|
AArch64_SMLSLv4i16_v4i32 = 5738,
|
||
|
|
AArch64_SMLSLv4i32_indexed = 5739,
|
||
|
|
AArch64_SMLSLv4i32_v2i64 = 5740,
|
||
|
|
AArch64_SMLSLv8i16_indexed = 5741,
|
||
|
|
AArch64_SMLSLv8i16_v4i32 = 5742,
|
||
|
|
AArch64_SMLSLv8i8_v8i16 = 5743,
|
||
|
|
AArch64_SMMLA = 5744,
|
||
|
|
AArch64_SMMLA_ZZZ = 5745,
|
||
|
|
AArch64_SMOPA_MPPZZ_D = 5746,
|
||
|
|
AArch64_SMOPA_MPPZZ_HtoS = 5747,
|
||
|
|
AArch64_SMOPA_MPPZZ_S = 5748,
|
||
|
|
AArch64_SMOPS_MPPZZ_D = 5749,
|
||
|
|
AArch64_SMOPS_MPPZZ_HtoS = 5750,
|
||
|
|
AArch64_SMOPS_MPPZZ_S = 5751,
|
||
|
|
AArch64_SMOVvi16to32 = 5752,
|
||
|
|
AArch64_SMOVvi16to32_idx0 = 5753,
|
||
|
|
AArch64_SMOVvi16to64 = 5754,
|
||
|
|
AArch64_SMOVvi16to64_idx0 = 5755,
|
||
|
|
AArch64_SMOVvi32to64 = 5756,
|
||
|
|
AArch64_SMOVvi32to64_idx0 = 5757,
|
||
|
|
AArch64_SMOVvi8to32 = 5758,
|
||
|
|
AArch64_SMOVvi8to32_idx0 = 5759,
|
||
|
|
AArch64_SMOVvi8to64 = 5760,
|
||
|
|
AArch64_SMOVvi8to64_idx0 = 5761,
|
||
|
|
AArch64_SMSUBLrrr = 5762,
|
||
|
|
AArch64_SMULH_ZPmZ_B = 5763,
|
||
|
|
AArch64_SMULH_ZPmZ_D = 5764,
|
||
|
|
AArch64_SMULH_ZPmZ_H = 5765,
|
||
|
|
AArch64_SMULH_ZPmZ_S = 5766,
|
||
|
|
AArch64_SMULH_ZZZ_B = 5767,
|
||
|
|
AArch64_SMULH_ZZZ_D = 5768,
|
||
|
|
AArch64_SMULH_ZZZ_H = 5769,
|
||
|
|
AArch64_SMULH_ZZZ_S = 5770,
|
||
|
|
AArch64_SMULHrr = 5771,
|
||
|
|
AArch64_SMULLB_ZZZI_D = 5772,
|
||
|
|
AArch64_SMULLB_ZZZI_S = 5773,
|
||
|
|
AArch64_SMULLB_ZZZ_D = 5774,
|
||
|
|
AArch64_SMULLB_ZZZ_H = 5775,
|
||
|
|
AArch64_SMULLB_ZZZ_S = 5776,
|
||
|
|
AArch64_SMULLT_ZZZI_D = 5777,
|
||
|
|
AArch64_SMULLT_ZZZI_S = 5778,
|
||
|
|
AArch64_SMULLT_ZZZ_D = 5779,
|
||
|
|
AArch64_SMULLT_ZZZ_H = 5780,
|
||
|
|
AArch64_SMULLT_ZZZ_S = 5781,
|
||
|
|
AArch64_SMULLv16i8_v8i16 = 5782,
|
||
|
|
AArch64_SMULLv2i32_indexed = 5783,
|
||
|
|
AArch64_SMULLv2i32_v2i64 = 5784,
|
||
|
|
AArch64_SMULLv4i16_indexed = 5785,
|
||
|
|
AArch64_SMULLv4i16_v4i32 = 5786,
|
||
|
|
AArch64_SMULLv4i32_indexed = 5787,
|
||
|
|
AArch64_SMULLv4i32_v2i64 = 5788,
|
||
|
|
AArch64_SMULLv8i16_indexed = 5789,
|
||
|
|
AArch64_SMULLv8i16_v4i32 = 5790,
|
||
|
|
AArch64_SMULLv8i8_v8i16 = 5791,
|
||
|
|
AArch64_SPLICE_ZPZZ_B = 5792,
|
||
|
|
AArch64_SPLICE_ZPZZ_D = 5793,
|
||
|
|
AArch64_SPLICE_ZPZZ_H = 5794,
|
||
|
|
AArch64_SPLICE_ZPZZ_S = 5795,
|
||
|
|
AArch64_SPLICE_ZPZ_B = 5796,
|
||
|
|
AArch64_SPLICE_ZPZ_D = 5797,
|
||
|
|
AArch64_SPLICE_ZPZ_H = 5798,
|
||
|
|
AArch64_SPLICE_ZPZ_S = 5799,
|
||
|
|
AArch64_SQABS_ZPmZ_B = 5800,
|
||
|
|
AArch64_SQABS_ZPmZ_D = 5801,
|
||
|
|
AArch64_SQABS_ZPmZ_H = 5802,
|
||
|
|
AArch64_SQABS_ZPmZ_S = 5803,
|
||
|
|
AArch64_SQABSv16i8 = 5804,
|
||
|
|
AArch64_SQABSv1i16 = 5805,
|
||
|
|
AArch64_SQABSv1i32 = 5806,
|
||
|
|
AArch64_SQABSv1i64 = 5807,
|
||
|
|
AArch64_SQABSv1i8 = 5808,
|
||
|
|
AArch64_SQABSv2i32 = 5809,
|
||
|
|
AArch64_SQABSv2i64 = 5810,
|
||
|
|
AArch64_SQABSv4i16 = 5811,
|
||
|
|
AArch64_SQABSv4i32 = 5812,
|
||
|
|
AArch64_SQABSv8i16 = 5813,
|
||
|
|
AArch64_SQABSv8i8 = 5814,
|
||
|
|
AArch64_SQADD_ZI_B = 5815,
|
||
|
|
AArch64_SQADD_ZI_D = 5816,
|
||
|
|
AArch64_SQADD_ZI_H = 5817,
|
||
|
|
AArch64_SQADD_ZI_S = 5818,
|
||
|
|
AArch64_SQADD_ZPmZ_B = 5819,
|
||
|
|
AArch64_SQADD_ZPmZ_D = 5820,
|
||
|
|
AArch64_SQADD_ZPmZ_H = 5821,
|
||
|
|
AArch64_SQADD_ZPmZ_S = 5822,
|
||
|
|
AArch64_SQADD_ZZZ_B = 5823,
|
||
|
|
AArch64_SQADD_ZZZ_D = 5824,
|
||
|
|
AArch64_SQADD_ZZZ_H = 5825,
|
||
|
|
AArch64_SQADD_ZZZ_S = 5826,
|
||
|
|
AArch64_SQADDv16i8 = 5827,
|
||
|
|
AArch64_SQADDv1i16 = 5828,
|
||
|
|
AArch64_SQADDv1i32 = 5829,
|
||
|
|
AArch64_SQADDv1i64 = 5830,
|
||
|
|
AArch64_SQADDv1i8 = 5831,
|
||
|
|
AArch64_SQADDv2i32 = 5832,
|
||
|
|
AArch64_SQADDv2i64 = 5833,
|
||
|
|
AArch64_SQADDv4i16 = 5834,
|
||
|
|
AArch64_SQADDv4i32 = 5835,
|
||
|
|
AArch64_SQADDv8i16 = 5836,
|
||
|
|
AArch64_SQADDv8i8 = 5837,
|
||
|
|
AArch64_SQCADD_ZZI_B = 5838,
|
||
|
|
AArch64_SQCADD_ZZI_D = 5839,
|
||
|
|
AArch64_SQCADD_ZZI_H = 5840,
|
||
|
|
AArch64_SQCADD_ZZI_S = 5841,
|
||
|
|
AArch64_SQCVTN_Z2Z_StoH = 5842,
|
||
|
|
AArch64_SQCVTN_Z4Z_DtoH = 5843,
|
||
|
|
AArch64_SQCVTN_Z4Z_StoB = 5844,
|
||
|
|
AArch64_SQCVTUN_Z2Z_StoH = 5845,
|
||
|
|
AArch64_SQCVTUN_Z4Z_DtoH = 5846,
|
||
|
|
AArch64_SQCVTUN_Z4Z_StoB = 5847,
|
||
|
|
AArch64_SQCVTU_Z2Z_StoH = 5848,
|
||
|
|
AArch64_SQCVTU_Z4Z_DtoH = 5849,
|
||
|
|
AArch64_SQCVTU_Z4Z_StoB = 5850,
|
||
|
|
AArch64_SQCVT_Z2Z_StoH = 5851,
|
||
|
|
AArch64_SQCVT_Z4Z_DtoH = 5852,
|
||
|
|
AArch64_SQCVT_Z4Z_StoB = 5853,
|
||
|
|
AArch64_SQDECB_XPiI = 5854,
|
||
|
|
AArch64_SQDECB_XPiWdI = 5855,
|
||
|
|
AArch64_SQDECD_XPiI = 5856,
|
||
|
|
AArch64_SQDECD_XPiWdI = 5857,
|
||
|
|
AArch64_SQDECD_ZPiI = 5858,
|
||
|
|
AArch64_SQDECH_XPiI = 5859,
|
||
|
|
AArch64_SQDECH_XPiWdI = 5860,
|
||
|
|
AArch64_SQDECH_ZPiI = 5861,
|
||
|
|
AArch64_SQDECP_XPWd_B = 5862,
|
||
|
|
AArch64_SQDECP_XPWd_D = 5863,
|
||
|
|
AArch64_SQDECP_XPWd_H = 5864,
|
||
|
|
AArch64_SQDECP_XPWd_S = 5865,
|
||
|
|
AArch64_SQDECP_XP_B = 5866,
|
||
|
|
AArch64_SQDECP_XP_D = 5867,
|
||
|
|
AArch64_SQDECP_XP_H = 5868,
|
||
|
|
AArch64_SQDECP_XP_S = 5869,
|
||
|
|
AArch64_SQDECP_ZP_D = 5870,
|
||
|
|
AArch64_SQDECP_ZP_H = 5871,
|
||
|
|
AArch64_SQDECP_ZP_S = 5872,
|
||
|
|
AArch64_SQDECW_XPiI = 5873,
|
||
|
|
AArch64_SQDECW_XPiWdI = 5874,
|
||
|
|
AArch64_SQDECW_ZPiI = 5875,
|
||
|
|
AArch64_SQDMLALBT_ZZZ_D = 5876,
|
||
|
|
AArch64_SQDMLALBT_ZZZ_H = 5877,
|
||
|
|
AArch64_SQDMLALBT_ZZZ_S = 5878,
|
||
|
|
AArch64_SQDMLALB_ZZZI_D = 5879,
|
||
|
|
AArch64_SQDMLALB_ZZZI_S = 5880,
|
||
|
|
AArch64_SQDMLALB_ZZZ_D = 5881,
|
||
|
|
AArch64_SQDMLALB_ZZZ_H = 5882,
|
||
|
|
AArch64_SQDMLALB_ZZZ_S = 5883,
|
||
|
|
AArch64_SQDMLALT_ZZZI_D = 5884,
|
||
|
|
AArch64_SQDMLALT_ZZZI_S = 5885,
|
||
|
|
AArch64_SQDMLALT_ZZZ_D = 5886,
|
||
|
|
AArch64_SQDMLALT_ZZZ_H = 5887,
|
||
|
|
AArch64_SQDMLALT_ZZZ_S = 5888,
|
||
|
|
AArch64_SQDMLALi16 = 5889,
|
||
|
|
AArch64_SQDMLALi32 = 5890,
|
||
|
|
AArch64_SQDMLALv1i32_indexed = 5891,
|
||
|
|
AArch64_SQDMLALv1i64_indexed = 5892,
|
||
|
|
AArch64_SQDMLALv2i32_indexed = 5893,
|
||
|
|
AArch64_SQDMLALv2i32_v2i64 = 5894,
|
||
|
|
AArch64_SQDMLALv4i16_indexed = 5895,
|
||
|
|
AArch64_SQDMLALv4i16_v4i32 = 5896,
|
||
|
|
AArch64_SQDMLALv4i32_indexed = 5897,
|
||
|
|
AArch64_SQDMLALv4i32_v2i64 = 5898,
|
||
|
|
AArch64_SQDMLALv8i16_indexed = 5899,
|
||
|
|
AArch64_SQDMLALv8i16_v4i32 = 5900,
|
||
|
|
AArch64_SQDMLSLBT_ZZZ_D = 5901,
|
||
|
|
AArch64_SQDMLSLBT_ZZZ_H = 5902,
|
||
|
|
AArch64_SQDMLSLBT_ZZZ_S = 5903,
|
||
|
|
AArch64_SQDMLSLB_ZZZI_D = 5904,
|
||
|
|
AArch64_SQDMLSLB_ZZZI_S = 5905,
|
||
|
|
AArch64_SQDMLSLB_ZZZ_D = 5906,
|
||
|
|
AArch64_SQDMLSLB_ZZZ_H = 5907,
|
||
|
|
AArch64_SQDMLSLB_ZZZ_S = 5908,
|
||
|
|
AArch64_SQDMLSLT_ZZZI_D = 5909,
|
||
|
|
AArch64_SQDMLSLT_ZZZI_S = 5910,
|
||
|
|
AArch64_SQDMLSLT_ZZZ_D = 5911,
|
||
|
|
AArch64_SQDMLSLT_ZZZ_H = 5912,
|
||
|
|
AArch64_SQDMLSLT_ZZZ_S = 5913,
|
||
|
|
AArch64_SQDMLSLi16 = 5914,
|
||
|
|
AArch64_SQDMLSLi32 = 5915,
|
||
|
|
AArch64_SQDMLSLv1i32_indexed = 5916,
|
||
|
|
AArch64_SQDMLSLv1i64_indexed = 5917,
|
||
|
|
AArch64_SQDMLSLv2i32_indexed = 5918,
|
||
|
|
AArch64_SQDMLSLv2i32_v2i64 = 5919,
|
||
|
|
AArch64_SQDMLSLv4i16_indexed = 5920,
|
||
|
|
AArch64_SQDMLSLv4i16_v4i32 = 5921,
|
||
|
|
AArch64_SQDMLSLv4i32_indexed = 5922,
|
||
|
|
AArch64_SQDMLSLv4i32_v2i64 = 5923,
|
||
|
|
AArch64_SQDMLSLv8i16_indexed = 5924,
|
||
|
|
AArch64_SQDMLSLv8i16_v4i32 = 5925,
|
||
|
|
AArch64_SQDMULH_VG2_2Z2Z_B = 5926,
|
||
|
|
AArch64_SQDMULH_VG2_2Z2Z_D = 5927,
|
||
|
|
AArch64_SQDMULH_VG2_2Z2Z_H = 5928,
|
||
|
|
AArch64_SQDMULH_VG2_2Z2Z_S = 5929,
|
||
|
|
AArch64_SQDMULH_VG2_2ZZ_B = 5930,
|
||
|
|
AArch64_SQDMULH_VG2_2ZZ_D = 5931,
|
||
|
|
AArch64_SQDMULH_VG2_2ZZ_H = 5932,
|
||
|
|
AArch64_SQDMULH_VG2_2ZZ_S = 5933,
|
||
|
|
AArch64_SQDMULH_VG4_4Z4Z_B = 5934,
|
||
|
|
AArch64_SQDMULH_VG4_4Z4Z_D = 5935,
|
||
|
|
AArch64_SQDMULH_VG4_4Z4Z_H = 5936,
|
||
|
|
AArch64_SQDMULH_VG4_4Z4Z_S = 5937,
|
||
|
|
AArch64_SQDMULH_VG4_4ZZ_B = 5938,
|
||
|
|
AArch64_SQDMULH_VG4_4ZZ_D = 5939,
|
||
|
|
AArch64_SQDMULH_VG4_4ZZ_H = 5940,
|
||
|
|
AArch64_SQDMULH_VG4_4ZZ_S = 5941,
|
||
|
|
AArch64_SQDMULH_ZZZI_D = 5942,
|
||
|
|
AArch64_SQDMULH_ZZZI_H = 5943,
|
||
|
|
AArch64_SQDMULH_ZZZI_S = 5944,
|
||
|
|
AArch64_SQDMULH_ZZZ_B = 5945,
|
||
|
|
AArch64_SQDMULH_ZZZ_D = 5946,
|
||
|
|
AArch64_SQDMULH_ZZZ_H = 5947,
|
||
|
|
AArch64_SQDMULH_ZZZ_S = 5948,
|
||
|
|
AArch64_SQDMULHv1i16 = 5949,
|
||
|
|
AArch64_SQDMULHv1i16_indexed = 5950,
|
||
|
|
AArch64_SQDMULHv1i32 = 5951,
|
||
|
|
AArch64_SQDMULHv1i32_indexed = 5952,
|
||
|
|
AArch64_SQDMULHv2i32 = 5953,
|
||
|
|
AArch64_SQDMULHv2i32_indexed = 5954,
|
||
|
|
AArch64_SQDMULHv4i16 = 5955,
|
||
|
|
AArch64_SQDMULHv4i16_indexed = 5956,
|
||
|
|
AArch64_SQDMULHv4i32 = 5957,
|
||
|
|
AArch64_SQDMULHv4i32_indexed = 5958,
|
||
|
|
AArch64_SQDMULHv8i16 = 5959,
|
||
|
|
AArch64_SQDMULHv8i16_indexed = 5960,
|
||
|
|
AArch64_SQDMULLB_ZZZI_D = 5961,
|
||
|
|
AArch64_SQDMULLB_ZZZI_S = 5962,
|
||
|
|
AArch64_SQDMULLB_ZZZ_D = 5963,
|
||
|
|
AArch64_SQDMULLB_ZZZ_H = 5964,
|
||
|
|
AArch64_SQDMULLB_ZZZ_S = 5965,
|
||
|
|
AArch64_SQDMULLT_ZZZI_D = 5966,
|
||
|
|
AArch64_SQDMULLT_ZZZI_S = 5967,
|
||
|
|
AArch64_SQDMULLT_ZZZ_D = 5968,
|
||
|
|
AArch64_SQDMULLT_ZZZ_H = 5969,
|
||
|
|
AArch64_SQDMULLT_ZZZ_S = 5970,
|
||
|
|
AArch64_SQDMULLi16 = 5971,
|
||
|
|
AArch64_SQDMULLi32 = 5972,
|
||
|
|
AArch64_SQDMULLv1i32_indexed = 5973,
|
||
|
|
AArch64_SQDMULLv1i64_indexed = 5974,
|
||
|
|
AArch64_SQDMULLv2i32_indexed = 5975,
|
||
|
|
AArch64_SQDMULLv2i32_v2i64 = 5976,
|
||
|
|
AArch64_SQDMULLv4i16_indexed = 5977,
|
||
|
|
AArch64_SQDMULLv4i16_v4i32 = 5978,
|
||
|
|
AArch64_SQDMULLv4i32_indexed = 5979,
|
||
|
|
AArch64_SQDMULLv4i32_v2i64 = 5980,
|
||
|
|
AArch64_SQDMULLv8i16_indexed = 5981,
|
||
|
|
AArch64_SQDMULLv8i16_v4i32 = 5982,
|
||
|
|
AArch64_SQINCB_XPiI = 5983,
|
||
|
|
AArch64_SQINCB_XPiWdI = 5984,
|
||
|
|
AArch64_SQINCD_XPiI = 5985,
|
||
|
|
AArch64_SQINCD_XPiWdI = 5986,
|
||
|
|
AArch64_SQINCD_ZPiI = 5987,
|
||
|
|
AArch64_SQINCH_XPiI = 5988,
|
||
|
|
AArch64_SQINCH_XPiWdI = 5989,
|
||
|
|
AArch64_SQINCH_ZPiI = 5990,
|
||
|
|
AArch64_SQINCP_XPWd_B = 5991,
|
||
|
|
AArch64_SQINCP_XPWd_D = 5992,
|
||
|
|
AArch64_SQINCP_XPWd_H = 5993,
|
||
|
|
AArch64_SQINCP_XPWd_S = 5994,
|
||
|
|
AArch64_SQINCP_XP_B = 5995,
|
||
|
|
AArch64_SQINCP_XP_D = 5996,
|
||
|
|
AArch64_SQINCP_XP_H = 5997,
|
||
|
|
AArch64_SQINCP_XP_S = 5998,
|
||
|
|
AArch64_SQINCP_ZP_D = 5999,
|
||
|
|
AArch64_SQINCP_ZP_H = 6000,
|
||
|
|
AArch64_SQINCP_ZP_S = 6001,
|
||
|
|
AArch64_SQINCW_XPiI = 6002,
|
||
|
|
AArch64_SQINCW_XPiWdI = 6003,
|
||
|
|
AArch64_SQINCW_ZPiI = 6004,
|
||
|
|
AArch64_SQNEG_ZPmZ_B = 6005,
|
||
|
|
AArch64_SQNEG_ZPmZ_D = 6006,
|
||
|
|
AArch64_SQNEG_ZPmZ_H = 6007,
|
||
|
|
AArch64_SQNEG_ZPmZ_S = 6008,
|
||
|
|
AArch64_SQNEGv16i8 = 6009,
|
||
|
|
AArch64_SQNEGv1i16 = 6010,
|
||
|
|
AArch64_SQNEGv1i32 = 6011,
|
||
|
|
AArch64_SQNEGv1i64 = 6012,
|
||
|
|
AArch64_SQNEGv1i8 = 6013,
|
||
|
|
AArch64_SQNEGv2i32 = 6014,
|
||
|
|
AArch64_SQNEGv2i64 = 6015,
|
||
|
|
AArch64_SQNEGv4i16 = 6016,
|
||
|
|
AArch64_SQNEGv4i32 = 6017,
|
||
|
|
AArch64_SQNEGv8i16 = 6018,
|
||
|
|
AArch64_SQNEGv8i8 = 6019,
|
||
|
|
AArch64_SQRDCMLAH_ZZZI_H = 6020,
|
||
|
|
AArch64_SQRDCMLAH_ZZZI_S = 6021,
|
||
|
|
AArch64_SQRDCMLAH_ZZZ_B = 6022,
|
||
|
|
AArch64_SQRDCMLAH_ZZZ_D = 6023,
|
||
|
|
AArch64_SQRDCMLAH_ZZZ_H = 6024,
|
||
|
|
AArch64_SQRDCMLAH_ZZZ_S = 6025,
|
||
|
|
AArch64_SQRDMLAH_ZZZI_D = 6026,
|
||
|
|
AArch64_SQRDMLAH_ZZZI_H = 6027,
|
||
|
|
AArch64_SQRDMLAH_ZZZI_S = 6028,
|
||
|
|
AArch64_SQRDMLAH_ZZZ_B = 6029,
|
||
|
|
AArch64_SQRDMLAH_ZZZ_D = 6030,
|
||
|
|
AArch64_SQRDMLAH_ZZZ_H = 6031,
|
||
|
|
AArch64_SQRDMLAH_ZZZ_S = 6032,
|
||
|
|
AArch64_SQRDMLAHv1i16 = 6033,
|
||
|
|
AArch64_SQRDMLAHv1i16_indexed = 6034,
|
||
|
|
AArch64_SQRDMLAHv1i32 = 6035,
|
||
|
|
AArch64_SQRDMLAHv1i32_indexed = 6036,
|
||
|
|
AArch64_SQRDMLAHv2i32 = 6037,
|
||
|
|
AArch64_SQRDMLAHv2i32_indexed = 6038,
|
||
|
|
AArch64_SQRDMLAHv4i16 = 6039,
|
||
|
|
AArch64_SQRDMLAHv4i16_indexed = 6040,
|
||
|
|
AArch64_SQRDMLAHv4i32 = 6041,
|
||
|
|
AArch64_SQRDMLAHv4i32_indexed = 6042,
|
||
|
|
AArch64_SQRDMLAHv8i16 = 6043,
|
||
|
|
AArch64_SQRDMLAHv8i16_indexed = 6044,
|
||
|
|
AArch64_SQRDMLSH_ZZZI_D = 6045,
|
||
|
|
AArch64_SQRDMLSH_ZZZI_H = 6046,
|
||
|
|
AArch64_SQRDMLSH_ZZZI_S = 6047,
|
||
|
|
AArch64_SQRDMLSH_ZZZ_B = 6048,
|
||
|
|
AArch64_SQRDMLSH_ZZZ_D = 6049,
|
||
|
|
AArch64_SQRDMLSH_ZZZ_H = 6050,
|
||
|
|
AArch64_SQRDMLSH_ZZZ_S = 6051,
|
||
|
|
AArch64_SQRDMLSHv1i16 = 6052,
|
||
|
|
AArch64_SQRDMLSHv1i16_indexed = 6053,
|
||
|
|
AArch64_SQRDMLSHv1i32 = 6054,
|
||
|
|
AArch64_SQRDMLSHv1i32_indexed = 6055,
|
||
|
|
AArch64_SQRDMLSHv2i32 = 6056,
|
||
|
|
AArch64_SQRDMLSHv2i32_indexed = 6057,
|
||
|
|
AArch64_SQRDMLSHv4i16 = 6058,
|
||
|
|
AArch64_SQRDMLSHv4i16_indexed = 6059,
|
||
|
|
AArch64_SQRDMLSHv4i32 = 6060,
|
||
|
|
AArch64_SQRDMLSHv4i32_indexed = 6061,
|
||
|
|
AArch64_SQRDMLSHv8i16 = 6062,
|
||
|
|
AArch64_SQRDMLSHv8i16_indexed = 6063,
|
||
|
|
AArch64_SQRDMULH_ZZZI_D = 6064,
|
||
|
|
AArch64_SQRDMULH_ZZZI_H = 6065,
|
||
|
|
AArch64_SQRDMULH_ZZZI_S = 6066,
|
||
|
|
AArch64_SQRDMULH_ZZZ_B = 6067,
|
||
|
|
AArch64_SQRDMULH_ZZZ_D = 6068,
|
||
|
|
AArch64_SQRDMULH_ZZZ_H = 6069,
|
||
|
|
AArch64_SQRDMULH_ZZZ_S = 6070,
|
||
|
|
AArch64_SQRDMULHv1i16 = 6071,
|
||
|
|
AArch64_SQRDMULHv1i16_indexed = 6072,
|
||
|
|
AArch64_SQRDMULHv1i32 = 6073,
|
||
|
|
AArch64_SQRDMULHv1i32_indexed = 6074,
|
||
|
|
AArch64_SQRDMULHv2i32 = 6075,
|
||
|
|
AArch64_SQRDMULHv2i32_indexed = 6076,
|
||
|
|
AArch64_SQRDMULHv4i16 = 6077,
|
||
|
|
AArch64_SQRDMULHv4i16_indexed = 6078,
|
||
|
|
AArch64_SQRDMULHv4i32 = 6079,
|
||
|
|
AArch64_SQRDMULHv4i32_indexed = 6080,
|
||
|
|
AArch64_SQRDMULHv8i16 = 6081,
|
||
|
|
AArch64_SQRDMULHv8i16_indexed = 6082,
|
||
|
|
AArch64_SQRSHLR_ZPmZ_B = 6083,
|
||
|
|
AArch64_SQRSHLR_ZPmZ_D = 6084,
|
||
|
|
AArch64_SQRSHLR_ZPmZ_H = 6085,
|
||
|
|
AArch64_SQRSHLR_ZPmZ_S = 6086,
|
||
|
|
AArch64_SQRSHL_ZPmZ_B = 6087,
|
||
|
|
AArch64_SQRSHL_ZPmZ_D = 6088,
|
||
|
|
AArch64_SQRSHL_ZPmZ_H = 6089,
|
||
|
|
AArch64_SQRSHL_ZPmZ_S = 6090,
|
||
|
|
AArch64_SQRSHLv16i8 = 6091,
|
||
|
|
AArch64_SQRSHLv1i16 = 6092,
|
||
|
|
AArch64_SQRSHLv1i32 = 6093,
|
||
|
|
AArch64_SQRSHLv1i64 = 6094,
|
||
|
|
AArch64_SQRSHLv1i8 = 6095,
|
||
|
|
AArch64_SQRSHLv2i32 = 6096,
|
||
|
|
AArch64_SQRSHLv2i64 = 6097,
|
||
|
|
AArch64_SQRSHLv4i16 = 6098,
|
||
|
|
AArch64_SQRSHLv4i32 = 6099,
|
||
|
|
AArch64_SQRSHLv8i16 = 6100,
|
||
|
|
AArch64_SQRSHLv8i8 = 6101,
|
||
|
|
AArch64_SQRSHRNB_ZZI_B = 6102,
|
||
|
|
AArch64_SQRSHRNB_ZZI_H = 6103,
|
||
|
|
AArch64_SQRSHRNB_ZZI_S = 6104,
|
||
|
|
AArch64_SQRSHRNT_ZZI_B = 6105,
|
||
|
|
AArch64_SQRSHRNT_ZZI_H = 6106,
|
||
|
|
AArch64_SQRSHRNT_ZZI_S = 6107,
|
||
|
|
AArch64_SQRSHRN_VG4_Z4ZI_B = 6108,
|
||
|
|
AArch64_SQRSHRN_VG4_Z4ZI_H = 6109,
|
||
|
|
AArch64_SQRSHRN_Z2ZI_StoH = 6110,
|
||
|
|
AArch64_SQRSHRNb = 6111,
|
||
|
|
AArch64_SQRSHRNh = 6112,
|
||
|
|
AArch64_SQRSHRNs = 6113,
|
||
|
|
AArch64_SQRSHRNv16i8_shift = 6114,
|
||
|
|
AArch64_SQRSHRNv2i32_shift = 6115,
|
||
|
|
AArch64_SQRSHRNv4i16_shift = 6116,
|
||
|
|
AArch64_SQRSHRNv4i32_shift = 6117,
|
||
|
|
AArch64_SQRSHRNv8i16_shift = 6118,
|
||
|
|
AArch64_SQRSHRNv8i8_shift = 6119,
|
||
|
|
AArch64_SQRSHRUNB_ZZI_B = 6120,
|
||
|
|
AArch64_SQRSHRUNB_ZZI_H = 6121,
|
||
|
|
AArch64_SQRSHRUNB_ZZI_S = 6122,
|
||
|
|
AArch64_SQRSHRUNT_ZZI_B = 6123,
|
||
|
|
AArch64_SQRSHRUNT_ZZI_H = 6124,
|
||
|
|
AArch64_SQRSHRUNT_ZZI_S = 6125,
|
||
|
|
AArch64_SQRSHRUN_VG4_Z4ZI_B = 6126,
|
||
|
|
AArch64_SQRSHRUN_VG4_Z4ZI_H = 6127,
|
||
|
|
AArch64_SQRSHRUN_Z2ZI_StoH = 6128,
|
||
|
|
AArch64_SQRSHRUNb = 6129,
|
||
|
|
AArch64_SQRSHRUNh = 6130,
|
||
|
|
AArch64_SQRSHRUNs = 6131,
|
||
|
|
AArch64_SQRSHRUNv16i8_shift = 6132,
|
||
|
|
AArch64_SQRSHRUNv2i32_shift = 6133,
|
||
|
|
AArch64_SQRSHRUNv4i16_shift = 6134,
|
||
|
|
AArch64_SQRSHRUNv4i32_shift = 6135,
|
||
|
|
AArch64_SQRSHRUNv8i16_shift = 6136,
|
||
|
|
AArch64_SQRSHRUNv8i8_shift = 6137,
|
||
|
|
AArch64_SQRSHRU_VG2_Z2ZI_H = 6138,
|
||
|
|
AArch64_SQRSHRU_VG4_Z4ZI_B = 6139,
|
||
|
|
AArch64_SQRSHRU_VG4_Z4ZI_H = 6140,
|
||
|
|
AArch64_SQRSHR_VG2_Z2ZI_H = 6141,
|
||
|
|
AArch64_SQRSHR_VG4_Z4ZI_B = 6142,
|
||
|
|
AArch64_SQRSHR_VG4_Z4ZI_H = 6143,
|
||
|
|
AArch64_SQSHLR_ZPmZ_B = 6144,
|
||
|
|
AArch64_SQSHLR_ZPmZ_D = 6145,
|
||
|
|
AArch64_SQSHLR_ZPmZ_H = 6146,
|
||
|
|
AArch64_SQSHLR_ZPmZ_S = 6147,
|
||
|
|
AArch64_SQSHLU_ZPmI_B = 6148,
|
||
|
|
AArch64_SQSHLU_ZPmI_D = 6149,
|
||
|
|
AArch64_SQSHLU_ZPmI_H = 6150,
|
||
|
|
AArch64_SQSHLU_ZPmI_S = 6151,
|
||
|
|
AArch64_SQSHLUb = 6152,
|
||
|
|
AArch64_SQSHLUd = 6153,
|
||
|
|
AArch64_SQSHLUh = 6154,
|
||
|
|
AArch64_SQSHLUs = 6155,
|
||
|
|
AArch64_SQSHLUv16i8_shift = 6156,
|
||
|
|
AArch64_SQSHLUv2i32_shift = 6157,
|
||
|
|
AArch64_SQSHLUv2i64_shift = 6158,
|
||
|
|
AArch64_SQSHLUv4i16_shift = 6159,
|
||
|
|
AArch64_SQSHLUv4i32_shift = 6160,
|
||
|
|
AArch64_SQSHLUv8i16_shift = 6161,
|
||
|
|
AArch64_SQSHLUv8i8_shift = 6162,
|
||
|
|
AArch64_SQSHL_ZPmI_B = 6163,
|
||
|
|
AArch64_SQSHL_ZPmI_D = 6164,
|
||
|
|
AArch64_SQSHL_ZPmI_H = 6165,
|
||
|
|
AArch64_SQSHL_ZPmI_S = 6166,
|
||
|
|
AArch64_SQSHL_ZPmZ_B = 6167,
|
||
|
|
AArch64_SQSHL_ZPmZ_D = 6168,
|
||
|
|
AArch64_SQSHL_ZPmZ_H = 6169,
|
||
|
|
AArch64_SQSHL_ZPmZ_S = 6170,
|
||
|
|
AArch64_SQSHLb = 6171,
|
||
|
|
AArch64_SQSHLd = 6172,
|
||
|
|
AArch64_SQSHLh = 6173,
|
||
|
|
AArch64_SQSHLs = 6174,
|
||
|
|
AArch64_SQSHLv16i8 = 6175,
|
||
|
|
AArch64_SQSHLv16i8_shift = 6176,
|
||
|
|
AArch64_SQSHLv1i16 = 6177,
|
||
|
|
AArch64_SQSHLv1i32 = 6178,
|
||
|
|
AArch64_SQSHLv1i64 = 6179,
|
||
|
|
AArch64_SQSHLv1i8 = 6180,
|
||
|
|
AArch64_SQSHLv2i32 = 6181,
|
||
|
|
AArch64_SQSHLv2i32_shift = 6182,
|
||
|
|
AArch64_SQSHLv2i64 = 6183,
|
||
|
|
AArch64_SQSHLv2i64_shift = 6184,
|
||
|
|
AArch64_SQSHLv4i16 = 6185,
|
||
|
|
AArch64_SQSHLv4i16_shift = 6186,
|
||
|
|
AArch64_SQSHLv4i32 = 6187,
|
||
|
|
AArch64_SQSHLv4i32_shift = 6188,
|
||
|
|
AArch64_SQSHLv8i16 = 6189,
|
||
|
|
AArch64_SQSHLv8i16_shift = 6190,
|
||
|
|
AArch64_SQSHLv8i8 = 6191,
|
||
|
|
AArch64_SQSHLv8i8_shift = 6192,
|
||
|
|
AArch64_SQSHRNB_ZZI_B = 6193,
|
||
|
|
AArch64_SQSHRNB_ZZI_H = 6194,
|
||
|
|
AArch64_SQSHRNB_ZZI_S = 6195,
|
||
|
|
AArch64_SQSHRNT_ZZI_B = 6196,
|
||
|
|
AArch64_SQSHRNT_ZZI_H = 6197,
|
||
|
|
AArch64_SQSHRNT_ZZI_S = 6198,
|
||
|
|
AArch64_SQSHRNb = 6199,
|
||
|
|
AArch64_SQSHRNh = 6200,
|
||
|
|
AArch64_SQSHRNs = 6201,
|
||
|
|
AArch64_SQSHRNv16i8_shift = 6202,
|
||
|
|
AArch64_SQSHRNv2i32_shift = 6203,
|
||
|
|
AArch64_SQSHRNv4i16_shift = 6204,
|
||
|
|
AArch64_SQSHRNv4i32_shift = 6205,
|
||
|
|
AArch64_SQSHRNv8i16_shift = 6206,
|
||
|
|
AArch64_SQSHRNv8i8_shift = 6207,
|
||
|
|
AArch64_SQSHRUNB_ZZI_B = 6208,
|
||
|
|
AArch64_SQSHRUNB_ZZI_H = 6209,
|
||
|
|
AArch64_SQSHRUNB_ZZI_S = 6210,
|
||
|
|
AArch64_SQSHRUNT_ZZI_B = 6211,
|
||
|
|
AArch64_SQSHRUNT_ZZI_H = 6212,
|
||
|
|
AArch64_SQSHRUNT_ZZI_S = 6213,
|
||
|
|
AArch64_SQSHRUNb = 6214,
|
||
|
|
AArch64_SQSHRUNh = 6215,
|
||
|
|
AArch64_SQSHRUNs = 6216,
|
||
|
|
AArch64_SQSHRUNv16i8_shift = 6217,
|
||
|
|
AArch64_SQSHRUNv2i32_shift = 6218,
|
||
|
|
AArch64_SQSHRUNv4i16_shift = 6219,
|
||
|
|
AArch64_SQSHRUNv4i32_shift = 6220,
|
||
|
|
AArch64_SQSHRUNv8i16_shift = 6221,
|
||
|
|
AArch64_SQSHRUNv8i8_shift = 6222,
|
||
|
|
AArch64_SQSUBR_ZPmZ_B = 6223,
|
||
|
|
AArch64_SQSUBR_ZPmZ_D = 6224,
|
||
|
|
AArch64_SQSUBR_ZPmZ_H = 6225,
|
||
|
|
AArch64_SQSUBR_ZPmZ_S = 6226,
|
||
|
|
AArch64_SQSUB_ZI_B = 6227,
|
||
|
|
AArch64_SQSUB_ZI_D = 6228,
|
||
|
|
AArch64_SQSUB_ZI_H = 6229,
|
||
|
|
AArch64_SQSUB_ZI_S = 6230,
|
||
|
|
AArch64_SQSUB_ZPmZ_B = 6231,
|
||
|
|
AArch64_SQSUB_ZPmZ_D = 6232,
|
||
|
|
AArch64_SQSUB_ZPmZ_H = 6233,
|
||
|
|
AArch64_SQSUB_ZPmZ_S = 6234,
|
||
|
|
AArch64_SQSUB_ZZZ_B = 6235,
|
||
|
|
AArch64_SQSUB_ZZZ_D = 6236,
|
||
|
|
AArch64_SQSUB_ZZZ_H = 6237,
|
||
|
|
AArch64_SQSUB_ZZZ_S = 6238,
|
||
|
|
AArch64_SQSUBv16i8 = 6239,
|
||
|
|
AArch64_SQSUBv1i16 = 6240,
|
||
|
|
AArch64_SQSUBv1i32 = 6241,
|
||
|
|
AArch64_SQSUBv1i64 = 6242,
|
||
|
|
AArch64_SQSUBv1i8 = 6243,
|
||
|
|
AArch64_SQSUBv2i32 = 6244,
|
||
|
|
AArch64_SQSUBv2i64 = 6245,
|
||
|
|
AArch64_SQSUBv4i16 = 6246,
|
||
|
|
AArch64_SQSUBv4i32 = 6247,
|
||
|
|
AArch64_SQSUBv8i16 = 6248,
|
||
|
|
AArch64_SQSUBv8i8 = 6249,
|
||
|
|
AArch64_SQXTNB_ZZ_B = 6250,
|
||
|
|
AArch64_SQXTNB_ZZ_H = 6251,
|
||
|
|
AArch64_SQXTNB_ZZ_S = 6252,
|
||
|
|
AArch64_SQXTNT_ZZ_B = 6253,
|
||
|
|
AArch64_SQXTNT_ZZ_H = 6254,
|
||
|
|
AArch64_SQXTNT_ZZ_S = 6255,
|
||
|
|
AArch64_SQXTNv16i8 = 6256,
|
||
|
|
AArch64_SQXTNv1i16 = 6257,
|
||
|
|
AArch64_SQXTNv1i32 = 6258,
|
||
|
|
AArch64_SQXTNv1i8 = 6259,
|
||
|
|
AArch64_SQXTNv2i32 = 6260,
|
||
|
|
AArch64_SQXTNv4i16 = 6261,
|
||
|
|
AArch64_SQXTNv4i32 = 6262,
|
||
|
|
AArch64_SQXTNv8i16 = 6263,
|
||
|
|
AArch64_SQXTNv8i8 = 6264,
|
||
|
|
AArch64_SQXTUNB_ZZ_B = 6265,
|
||
|
|
AArch64_SQXTUNB_ZZ_H = 6266,
|
||
|
|
AArch64_SQXTUNB_ZZ_S = 6267,
|
||
|
|
AArch64_SQXTUNT_ZZ_B = 6268,
|
||
|
|
AArch64_SQXTUNT_ZZ_H = 6269,
|
||
|
|
AArch64_SQXTUNT_ZZ_S = 6270,
|
||
|
|
AArch64_SQXTUNv16i8 = 6271,
|
||
|
|
AArch64_SQXTUNv1i16 = 6272,
|
||
|
|
AArch64_SQXTUNv1i32 = 6273,
|
||
|
|
AArch64_SQXTUNv1i8 = 6274,
|
||
|
|
AArch64_SQXTUNv2i32 = 6275,
|
||
|
|
AArch64_SQXTUNv4i16 = 6276,
|
||
|
|
AArch64_SQXTUNv4i32 = 6277,
|
||
|
|
AArch64_SQXTUNv8i16 = 6278,
|
||
|
|
AArch64_SQXTUNv8i8 = 6279,
|
||
|
|
AArch64_SRHADD_ZPmZ_B = 6280,
|
||
|
|
AArch64_SRHADD_ZPmZ_D = 6281,
|
||
|
|
AArch64_SRHADD_ZPmZ_H = 6282,
|
||
|
|
AArch64_SRHADD_ZPmZ_S = 6283,
|
||
|
|
AArch64_SRHADDv16i8 = 6284,
|
||
|
|
AArch64_SRHADDv2i32 = 6285,
|
||
|
|
AArch64_SRHADDv4i16 = 6286,
|
||
|
|
AArch64_SRHADDv4i32 = 6287,
|
||
|
|
AArch64_SRHADDv8i16 = 6288,
|
||
|
|
AArch64_SRHADDv8i8 = 6289,
|
||
|
|
AArch64_SRI_ZZI_B = 6290,
|
||
|
|
AArch64_SRI_ZZI_D = 6291,
|
||
|
|
AArch64_SRI_ZZI_H = 6292,
|
||
|
|
AArch64_SRI_ZZI_S = 6293,
|
||
|
|
AArch64_SRId = 6294,
|
||
|
|
AArch64_SRIv16i8_shift = 6295,
|
||
|
|
AArch64_SRIv2i32_shift = 6296,
|
||
|
|
AArch64_SRIv2i64_shift = 6297,
|
||
|
|
AArch64_SRIv4i16_shift = 6298,
|
||
|
|
AArch64_SRIv4i32_shift = 6299,
|
||
|
|
AArch64_SRIv8i16_shift = 6300,
|
||
|
|
AArch64_SRIv8i8_shift = 6301,
|
||
|
|
AArch64_SRSHLR_ZPmZ_B = 6302,
|
||
|
|
AArch64_SRSHLR_ZPmZ_D = 6303,
|
||
|
|
AArch64_SRSHLR_ZPmZ_H = 6304,
|
||
|
|
AArch64_SRSHLR_ZPmZ_S = 6305,
|
||
|
|
AArch64_SRSHL_VG2_2Z2Z_B = 6306,
|
||
|
|
AArch64_SRSHL_VG2_2Z2Z_D = 6307,
|
||
|
|
AArch64_SRSHL_VG2_2Z2Z_H = 6308,
|
||
|
|
AArch64_SRSHL_VG2_2Z2Z_S = 6309,
|
||
|
|
AArch64_SRSHL_VG2_2ZZ_B = 6310,
|
||
|
|
AArch64_SRSHL_VG2_2ZZ_D = 6311,
|
||
|
|
AArch64_SRSHL_VG2_2ZZ_H = 6312,
|
||
|
|
AArch64_SRSHL_VG2_2ZZ_S = 6313,
|
||
|
|
AArch64_SRSHL_VG4_4Z4Z_B = 6314,
|
||
|
|
AArch64_SRSHL_VG4_4Z4Z_D = 6315,
|
||
|
|
AArch64_SRSHL_VG4_4Z4Z_H = 6316,
|
||
|
|
AArch64_SRSHL_VG4_4Z4Z_S = 6317,
|
||
|
|
AArch64_SRSHL_VG4_4ZZ_B = 6318,
|
||
|
|
AArch64_SRSHL_VG4_4ZZ_D = 6319,
|
||
|
|
AArch64_SRSHL_VG4_4ZZ_H = 6320,
|
||
|
|
AArch64_SRSHL_VG4_4ZZ_S = 6321,
|
||
|
|
AArch64_SRSHL_ZPmZ_B = 6322,
|
||
|
|
AArch64_SRSHL_ZPmZ_D = 6323,
|
||
|
|
AArch64_SRSHL_ZPmZ_H = 6324,
|
||
|
|
AArch64_SRSHL_ZPmZ_S = 6325,
|
||
|
|
AArch64_SRSHLv16i8 = 6326,
|
||
|
|
AArch64_SRSHLv1i64 = 6327,
|
||
|
|
AArch64_SRSHLv2i32 = 6328,
|
||
|
|
AArch64_SRSHLv2i64 = 6329,
|
||
|
|
AArch64_SRSHLv4i16 = 6330,
|
||
|
|
AArch64_SRSHLv4i32 = 6331,
|
||
|
|
AArch64_SRSHLv8i16 = 6332,
|
||
|
|
AArch64_SRSHLv8i8 = 6333,
|
||
|
|
AArch64_SRSHR_ZPmI_B = 6334,
|
||
|
|
AArch64_SRSHR_ZPmI_D = 6335,
|
||
|
|
AArch64_SRSHR_ZPmI_H = 6336,
|
||
|
|
AArch64_SRSHR_ZPmI_S = 6337,
|
||
|
|
AArch64_SRSHRd = 6338,
|
||
|
|
AArch64_SRSHRv16i8_shift = 6339,
|
||
|
|
AArch64_SRSHRv2i32_shift = 6340,
|
||
|
|
AArch64_SRSHRv2i64_shift = 6341,
|
||
|
|
AArch64_SRSHRv4i16_shift = 6342,
|
||
|
|
AArch64_SRSHRv4i32_shift = 6343,
|
||
|
|
AArch64_SRSHRv8i16_shift = 6344,
|
||
|
|
AArch64_SRSHRv8i8_shift = 6345,
|
||
|
|
AArch64_SRSRA_ZZI_B = 6346,
|
||
|
|
AArch64_SRSRA_ZZI_D = 6347,
|
||
|
|
AArch64_SRSRA_ZZI_H = 6348,
|
||
|
|
AArch64_SRSRA_ZZI_S = 6349,
|
||
|
|
AArch64_SRSRAd = 6350,
|
||
|
|
AArch64_SRSRAv16i8_shift = 6351,
|
||
|
|
AArch64_SRSRAv2i32_shift = 6352,
|
||
|
|
AArch64_SRSRAv2i64_shift = 6353,
|
||
|
|
AArch64_SRSRAv4i16_shift = 6354,
|
||
|
|
AArch64_SRSRAv4i32_shift = 6355,
|
||
|
|
AArch64_SRSRAv8i16_shift = 6356,
|
||
|
|
AArch64_SRSRAv8i8_shift = 6357,
|
||
|
|
AArch64_SSHLLB_ZZI_D = 6358,
|
||
|
|
AArch64_SSHLLB_ZZI_H = 6359,
|
||
|
|
AArch64_SSHLLB_ZZI_S = 6360,
|
||
|
|
AArch64_SSHLLT_ZZI_D = 6361,
|
||
|
|
AArch64_SSHLLT_ZZI_H = 6362,
|
||
|
|
AArch64_SSHLLT_ZZI_S = 6363,
|
||
|
|
AArch64_SSHLLv16i8_shift = 6364,
|
||
|
|
AArch64_SSHLLv2i32_shift = 6365,
|
||
|
|
AArch64_SSHLLv4i16_shift = 6366,
|
||
|
|
AArch64_SSHLLv4i32_shift = 6367,
|
||
|
|
AArch64_SSHLLv8i16_shift = 6368,
|
||
|
|
AArch64_SSHLLv8i8_shift = 6369,
|
||
|
|
AArch64_SSHLv16i8 = 6370,
|
||
|
|
AArch64_SSHLv1i64 = 6371,
|
||
|
|
AArch64_SSHLv2i32 = 6372,
|
||
|
|
AArch64_SSHLv2i64 = 6373,
|
||
|
|
AArch64_SSHLv4i16 = 6374,
|
||
|
|
AArch64_SSHLv4i32 = 6375,
|
||
|
|
AArch64_SSHLv8i16 = 6376,
|
||
|
|
AArch64_SSHLv8i8 = 6377,
|
||
|
|
AArch64_SSHRd = 6378,
|
||
|
|
AArch64_SSHRv16i8_shift = 6379,
|
||
|
|
AArch64_SSHRv2i32_shift = 6380,
|
||
|
|
AArch64_SSHRv2i64_shift = 6381,
|
||
|
|
AArch64_SSHRv4i16_shift = 6382,
|
||
|
|
AArch64_SSHRv4i32_shift = 6383,
|
||
|
|
AArch64_SSHRv8i16_shift = 6384,
|
||
|
|
AArch64_SSHRv8i8_shift = 6385,
|
||
|
|
AArch64_SSRA_ZZI_B = 6386,
|
||
|
|
AArch64_SSRA_ZZI_D = 6387,
|
||
|
|
AArch64_SSRA_ZZI_H = 6388,
|
||
|
|
AArch64_SSRA_ZZI_S = 6389,
|
||
|
|
AArch64_SSRAd = 6390,
|
||
|
|
AArch64_SSRAv16i8_shift = 6391,
|
||
|
|
AArch64_SSRAv2i32_shift = 6392,
|
||
|
|
AArch64_SSRAv2i64_shift = 6393,
|
||
|
|
AArch64_SSRAv4i16_shift = 6394,
|
||
|
|
AArch64_SSRAv4i32_shift = 6395,
|
||
|
|
AArch64_SSRAv8i16_shift = 6396,
|
||
|
|
AArch64_SSRAv8i8_shift = 6397,
|
||
|
|
AArch64_SST1B_D = 6398,
|
||
|
|
AArch64_SST1B_D_IMM = 6399,
|
||
|
|
AArch64_SST1B_D_SXTW = 6400,
|
||
|
|
AArch64_SST1B_D_UXTW = 6401,
|
||
|
|
AArch64_SST1B_S_IMM = 6402,
|
||
|
|
AArch64_SST1B_S_SXTW = 6403,
|
||
|
|
AArch64_SST1B_S_UXTW = 6404,
|
||
|
|
AArch64_SST1D = 6405,
|
||
|
|
AArch64_SST1D_IMM = 6406,
|
||
|
|
AArch64_SST1D_SCALED = 6407,
|
||
|
|
AArch64_SST1D_SXTW = 6408,
|
||
|
|
AArch64_SST1D_SXTW_SCALED = 6409,
|
||
|
|
AArch64_SST1D_UXTW = 6410,
|
||
|
|
AArch64_SST1D_UXTW_SCALED = 6411,
|
||
|
|
AArch64_SST1H_D = 6412,
|
||
|
|
AArch64_SST1H_D_IMM = 6413,
|
||
|
|
AArch64_SST1H_D_SCALED = 6414,
|
||
|
|
AArch64_SST1H_D_SXTW = 6415,
|
||
|
|
AArch64_SST1H_D_SXTW_SCALED = 6416,
|
||
|
|
AArch64_SST1H_D_UXTW = 6417,
|
||
|
|
AArch64_SST1H_D_UXTW_SCALED = 6418,
|
||
|
|
AArch64_SST1H_S_IMM = 6419,
|
||
|
|
AArch64_SST1H_S_SXTW = 6420,
|
||
|
|
AArch64_SST1H_S_SXTW_SCALED = 6421,
|
||
|
|
AArch64_SST1H_S_UXTW = 6422,
|
||
|
|
AArch64_SST1H_S_UXTW_SCALED = 6423,
|
||
|
|
AArch64_SST1Q = 6424,
|
||
|
|
AArch64_SST1W_D = 6425,
|
||
|
|
AArch64_SST1W_D_IMM = 6426,
|
||
|
|
AArch64_SST1W_D_SCALED = 6427,
|
||
|
|
AArch64_SST1W_D_SXTW = 6428,
|
||
|
|
AArch64_SST1W_D_SXTW_SCALED = 6429,
|
||
|
|
AArch64_SST1W_D_UXTW = 6430,
|
||
|
|
AArch64_SST1W_D_UXTW_SCALED = 6431,
|
||
|
|
AArch64_SST1W_IMM = 6432,
|
||
|
|
AArch64_SST1W_SXTW = 6433,
|
||
|
|
AArch64_SST1W_SXTW_SCALED = 6434,
|
||
|
|
AArch64_SST1W_UXTW = 6435,
|
||
|
|
AArch64_SST1W_UXTW_SCALED = 6436,
|
||
|
|
AArch64_SSUBLBT_ZZZ_D = 6437,
|
||
|
|
AArch64_SSUBLBT_ZZZ_H = 6438,
|
||
|
|
AArch64_SSUBLBT_ZZZ_S = 6439,
|
||
|
|
AArch64_SSUBLB_ZZZ_D = 6440,
|
||
|
|
AArch64_SSUBLB_ZZZ_H = 6441,
|
||
|
|
AArch64_SSUBLB_ZZZ_S = 6442,
|
||
|
|
AArch64_SSUBLTB_ZZZ_D = 6443,
|
||
|
|
AArch64_SSUBLTB_ZZZ_H = 6444,
|
||
|
|
AArch64_SSUBLTB_ZZZ_S = 6445,
|
||
|
|
AArch64_SSUBLT_ZZZ_D = 6446,
|
||
|
|
AArch64_SSUBLT_ZZZ_H = 6447,
|
||
|
|
AArch64_SSUBLT_ZZZ_S = 6448,
|
||
|
|
AArch64_SSUBLv16i8_v8i16 = 6449,
|
||
|
|
AArch64_SSUBLv2i32_v2i64 = 6450,
|
||
|
|
AArch64_SSUBLv4i16_v4i32 = 6451,
|
||
|
|
AArch64_SSUBLv4i32_v2i64 = 6452,
|
||
|
|
AArch64_SSUBLv8i16_v4i32 = 6453,
|
||
|
|
AArch64_SSUBLv8i8_v8i16 = 6454,
|
||
|
|
AArch64_SSUBWB_ZZZ_D = 6455,
|
||
|
|
AArch64_SSUBWB_ZZZ_H = 6456,
|
||
|
|
AArch64_SSUBWB_ZZZ_S = 6457,
|
||
|
|
AArch64_SSUBWT_ZZZ_D = 6458,
|
||
|
|
AArch64_SSUBWT_ZZZ_H = 6459,
|
||
|
|
AArch64_SSUBWT_ZZZ_S = 6460,
|
||
|
|
AArch64_SSUBWv16i8_v8i16 = 6461,
|
||
|
|
AArch64_SSUBWv2i32_v2i64 = 6462,
|
||
|
|
AArch64_SSUBWv4i16_v4i32 = 6463,
|
||
|
|
AArch64_SSUBWv4i32_v2i64 = 6464,
|
||
|
|
AArch64_SSUBWv8i16_v4i32 = 6465,
|
||
|
|
AArch64_SSUBWv8i8_v8i16 = 6466,
|
||
|
|
AArch64_ST1B = 6467,
|
||
|
|
AArch64_ST1B_2Z = 6468,
|
||
|
|
AArch64_ST1B_2Z_IMM = 6469,
|
||
|
|
AArch64_ST1B_2Z_STRIDED = 6470,
|
||
|
|
AArch64_ST1B_2Z_STRIDED_IMM = 6471,
|
||
|
|
AArch64_ST1B_4Z = 6472,
|
||
|
|
AArch64_ST1B_4Z_IMM = 6473,
|
||
|
|
AArch64_ST1B_4Z_STRIDED = 6474,
|
||
|
|
AArch64_ST1B_4Z_STRIDED_IMM = 6475,
|
||
|
|
AArch64_ST1B_D = 6476,
|
||
|
|
AArch64_ST1B_D_IMM = 6477,
|
||
|
|
AArch64_ST1B_H = 6478,
|
||
|
|
AArch64_ST1B_H_IMM = 6479,
|
||
|
|
AArch64_ST1B_IMM = 6480,
|
||
|
|
AArch64_ST1B_S = 6481,
|
||
|
|
AArch64_ST1B_S_IMM = 6482,
|
||
|
|
AArch64_ST1D = 6483,
|
||
|
|
AArch64_ST1D_2Z = 6484,
|
||
|
|
AArch64_ST1D_2Z_IMM = 6485,
|
||
|
|
AArch64_ST1D_2Z_STRIDED = 6486,
|
||
|
|
AArch64_ST1D_2Z_STRIDED_IMM = 6487,
|
||
|
|
AArch64_ST1D_4Z = 6488,
|
||
|
|
AArch64_ST1D_4Z_IMM = 6489,
|
||
|
|
AArch64_ST1D_4Z_STRIDED = 6490,
|
||
|
|
AArch64_ST1D_4Z_STRIDED_IMM = 6491,
|
||
|
|
AArch64_ST1D_IMM = 6492,
|
||
|
|
AArch64_ST1D_Q = 6493,
|
||
|
|
AArch64_ST1D_Q_IMM = 6494,
|
||
|
|
AArch64_ST1Fourv16b = 6495,
|
||
|
|
AArch64_ST1Fourv16b_POST = 6496,
|
||
|
|
AArch64_ST1Fourv1d = 6497,
|
||
|
|
AArch64_ST1Fourv1d_POST = 6498,
|
||
|
|
AArch64_ST1Fourv2d = 6499,
|
||
|
|
AArch64_ST1Fourv2d_POST = 6500,
|
||
|
|
AArch64_ST1Fourv2s = 6501,
|
||
|
|
AArch64_ST1Fourv2s_POST = 6502,
|
||
|
|
AArch64_ST1Fourv4h = 6503,
|
||
|
|
AArch64_ST1Fourv4h_POST = 6504,
|
||
|
|
AArch64_ST1Fourv4s = 6505,
|
||
|
|
AArch64_ST1Fourv4s_POST = 6506,
|
||
|
|
AArch64_ST1Fourv8b = 6507,
|
||
|
|
AArch64_ST1Fourv8b_POST = 6508,
|
||
|
|
AArch64_ST1Fourv8h = 6509,
|
||
|
|
AArch64_ST1Fourv8h_POST = 6510,
|
||
|
|
AArch64_ST1H = 6511,
|
||
|
|
AArch64_ST1H_2Z = 6512,
|
||
|
|
AArch64_ST1H_2Z_IMM = 6513,
|
||
|
|
AArch64_ST1H_2Z_STRIDED = 6514,
|
||
|
|
AArch64_ST1H_2Z_STRIDED_IMM = 6515,
|
||
|
|
AArch64_ST1H_4Z = 6516,
|
||
|
|
AArch64_ST1H_4Z_IMM = 6517,
|
||
|
|
AArch64_ST1H_4Z_STRIDED = 6518,
|
||
|
|
AArch64_ST1H_4Z_STRIDED_IMM = 6519,
|
||
|
|
AArch64_ST1H_D = 6520,
|
||
|
|
AArch64_ST1H_D_IMM = 6521,
|
||
|
|
AArch64_ST1H_IMM = 6522,
|
||
|
|
AArch64_ST1H_S = 6523,
|
||
|
|
AArch64_ST1H_S_IMM = 6524,
|
||
|
|
AArch64_ST1Onev16b = 6525,
|
||
|
|
AArch64_ST1Onev16b_POST = 6526,
|
||
|
|
AArch64_ST1Onev1d = 6527,
|
||
|
|
AArch64_ST1Onev1d_POST = 6528,
|
||
|
|
AArch64_ST1Onev2d = 6529,
|
||
|
|
AArch64_ST1Onev2d_POST = 6530,
|
||
|
|
AArch64_ST1Onev2s = 6531,
|
||
|
|
AArch64_ST1Onev2s_POST = 6532,
|
||
|
|
AArch64_ST1Onev4h = 6533,
|
||
|
|
AArch64_ST1Onev4h_POST = 6534,
|
||
|
|
AArch64_ST1Onev4s = 6535,
|
||
|
|
AArch64_ST1Onev4s_POST = 6536,
|
||
|
|
AArch64_ST1Onev8b = 6537,
|
||
|
|
AArch64_ST1Onev8b_POST = 6538,
|
||
|
|
AArch64_ST1Onev8h = 6539,
|
||
|
|
AArch64_ST1Onev8h_POST = 6540,
|
||
|
|
AArch64_ST1Threev16b = 6541,
|
||
|
|
AArch64_ST1Threev16b_POST = 6542,
|
||
|
|
AArch64_ST1Threev1d = 6543,
|
||
|
|
AArch64_ST1Threev1d_POST = 6544,
|
||
|
|
AArch64_ST1Threev2d = 6545,
|
||
|
|
AArch64_ST1Threev2d_POST = 6546,
|
||
|
|
AArch64_ST1Threev2s = 6547,
|
||
|
|
AArch64_ST1Threev2s_POST = 6548,
|
||
|
|
AArch64_ST1Threev4h = 6549,
|
||
|
|
AArch64_ST1Threev4h_POST = 6550,
|
||
|
|
AArch64_ST1Threev4s = 6551,
|
||
|
|
AArch64_ST1Threev4s_POST = 6552,
|
||
|
|
AArch64_ST1Threev8b = 6553,
|
||
|
|
AArch64_ST1Threev8b_POST = 6554,
|
||
|
|
AArch64_ST1Threev8h = 6555,
|
||
|
|
AArch64_ST1Threev8h_POST = 6556,
|
||
|
|
AArch64_ST1Twov16b = 6557,
|
||
|
|
AArch64_ST1Twov16b_POST = 6558,
|
||
|
|
AArch64_ST1Twov1d = 6559,
|
||
|
|
AArch64_ST1Twov1d_POST = 6560,
|
||
|
|
AArch64_ST1Twov2d = 6561,
|
||
|
|
AArch64_ST1Twov2d_POST = 6562,
|
||
|
|
AArch64_ST1Twov2s = 6563,
|
||
|
|
AArch64_ST1Twov2s_POST = 6564,
|
||
|
|
AArch64_ST1Twov4h = 6565,
|
||
|
|
AArch64_ST1Twov4h_POST = 6566,
|
||
|
|
AArch64_ST1Twov4s = 6567,
|
||
|
|
AArch64_ST1Twov4s_POST = 6568,
|
||
|
|
AArch64_ST1Twov8b = 6569,
|
||
|
|
AArch64_ST1Twov8b_POST = 6570,
|
||
|
|
AArch64_ST1Twov8h = 6571,
|
||
|
|
AArch64_ST1Twov8h_POST = 6572,
|
||
|
|
AArch64_ST1W = 6573,
|
||
|
|
AArch64_ST1W_2Z = 6574,
|
||
|
|
AArch64_ST1W_2Z_IMM = 6575,
|
||
|
|
AArch64_ST1W_2Z_STRIDED = 6576,
|
||
|
|
AArch64_ST1W_2Z_STRIDED_IMM = 6577,
|
||
|
|
AArch64_ST1W_4Z = 6578,
|
||
|
|
AArch64_ST1W_4Z_IMM = 6579,
|
||
|
|
AArch64_ST1W_4Z_STRIDED = 6580,
|
||
|
|
AArch64_ST1W_4Z_STRIDED_IMM = 6581,
|
||
|
|
AArch64_ST1W_D = 6582,
|
||
|
|
AArch64_ST1W_D_IMM = 6583,
|
||
|
|
AArch64_ST1W_IMM = 6584,
|
||
|
|
AArch64_ST1W_Q = 6585,
|
||
|
|
AArch64_ST1W_Q_IMM = 6586,
|
||
|
|
AArch64_ST1_MXIPXX_H_B = 6587,
|
||
|
|
AArch64_ST1_MXIPXX_H_D = 6588,
|
||
|
|
AArch64_ST1_MXIPXX_H_H = 6589,
|
||
|
|
AArch64_ST1_MXIPXX_H_Q = 6590,
|
||
|
|
AArch64_ST1_MXIPXX_H_S = 6591,
|
||
|
|
AArch64_ST1_MXIPXX_V_B = 6592,
|
||
|
|
AArch64_ST1_MXIPXX_V_D = 6593,
|
||
|
|
AArch64_ST1_MXIPXX_V_H = 6594,
|
||
|
|
AArch64_ST1_MXIPXX_V_Q = 6595,
|
||
|
|
AArch64_ST1_MXIPXX_V_S = 6596,
|
||
|
|
AArch64_ST1i16 = 6597,
|
||
|
|
AArch64_ST1i16_POST = 6598,
|
||
|
|
AArch64_ST1i32 = 6599,
|
||
|
|
AArch64_ST1i32_POST = 6600,
|
||
|
|
AArch64_ST1i64 = 6601,
|
||
|
|
AArch64_ST1i64_POST = 6602,
|
||
|
|
AArch64_ST1i8 = 6603,
|
||
|
|
AArch64_ST1i8_POST = 6604,
|
||
|
|
AArch64_ST2B = 6605,
|
||
|
|
AArch64_ST2B_IMM = 6606,
|
||
|
|
AArch64_ST2D = 6607,
|
||
|
|
AArch64_ST2D_IMM = 6608,
|
||
|
|
AArch64_ST2GPostIndex = 6609,
|
||
|
|
AArch64_ST2GPreIndex = 6610,
|
||
|
|
AArch64_ST2Gi = 6611,
|
||
|
|
AArch64_ST2H = 6612,
|
||
|
|
AArch64_ST2H_IMM = 6613,
|
||
|
|
AArch64_ST2Q = 6614,
|
||
|
|
AArch64_ST2Q_IMM = 6615,
|
||
|
|
AArch64_ST2Twov16b = 6616,
|
||
|
|
AArch64_ST2Twov16b_POST = 6617,
|
||
|
|
AArch64_ST2Twov2d = 6618,
|
||
|
|
AArch64_ST2Twov2d_POST = 6619,
|
||
|
|
AArch64_ST2Twov2s = 6620,
|
||
|
|
AArch64_ST2Twov2s_POST = 6621,
|
||
|
|
AArch64_ST2Twov4h = 6622,
|
||
|
|
AArch64_ST2Twov4h_POST = 6623,
|
||
|
|
AArch64_ST2Twov4s = 6624,
|
||
|
|
AArch64_ST2Twov4s_POST = 6625,
|
||
|
|
AArch64_ST2Twov8b = 6626,
|
||
|
|
AArch64_ST2Twov8b_POST = 6627,
|
||
|
|
AArch64_ST2Twov8h = 6628,
|
||
|
|
AArch64_ST2Twov8h_POST = 6629,
|
||
|
|
AArch64_ST2W = 6630,
|
||
|
|
AArch64_ST2W_IMM = 6631,
|
||
|
|
AArch64_ST2i16 = 6632,
|
||
|
|
AArch64_ST2i16_POST = 6633,
|
||
|
|
AArch64_ST2i32 = 6634,
|
||
|
|
AArch64_ST2i32_POST = 6635,
|
||
|
|
AArch64_ST2i64 = 6636,
|
||
|
|
AArch64_ST2i64_POST = 6637,
|
||
|
|
AArch64_ST2i8 = 6638,
|
||
|
|
AArch64_ST2i8_POST = 6639,
|
||
|
|
AArch64_ST3B = 6640,
|
||
|
|
AArch64_ST3B_IMM = 6641,
|
||
|
|
AArch64_ST3D = 6642,
|
||
|
|
AArch64_ST3D_IMM = 6643,
|
||
|
|
AArch64_ST3H = 6644,
|
||
|
|
AArch64_ST3H_IMM = 6645,
|
||
|
|
AArch64_ST3Q = 6646,
|
||
|
|
AArch64_ST3Q_IMM = 6647,
|
||
|
|
AArch64_ST3Threev16b = 6648,
|
||
|
|
AArch64_ST3Threev16b_POST = 6649,
|
||
|
|
AArch64_ST3Threev2d = 6650,
|
||
|
|
AArch64_ST3Threev2d_POST = 6651,
|
||
|
|
AArch64_ST3Threev2s = 6652,
|
||
|
|
AArch64_ST3Threev2s_POST = 6653,
|
||
|
|
AArch64_ST3Threev4h = 6654,
|
||
|
|
AArch64_ST3Threev4h_POST = 6655,
|
||
|
|
AArch64_ST3Threev4s = 6656,
|
||
|
|
AArch64_ST3Threev4s_POST = 6657,
|
||
|
|
AArch64_ST3Threev8b = 6658,
|
||
|
|
AArch64_ST3Threev8b_POST = 6659,
|
||
|
|
AArch64_ST3Threev8h = 6660,
|
||
|
|
AArch64_ST3Threev8h_POST = 6661,
|
||
|
|
AArch64_ST3W = 6662,
|
||
|
|
AArch64_ST3W_IMM = 6663,
|
||
|
|
AArch64_ST3i16 = 6664,
|
||
|
|
AArch64_ST3i16_POST = 6665,
|
||
|
|
AArch64_ST3i32 = 6666,
|
||
|
|
AArch64_ST3i32_POST = 6667,
|
||
|
|
AArch64_ST3i64 = 6668,
|
||
|
|
AArch64_ST3i64_POST = 6669,
|
||
|
|
AArch64_ST3i8 = 6670,
|
||
|
|
AArch64_ST3i8_POST = 6671,
|
||
|
|
AArch64_ST4B = 6672,
|
||
|
|
AArch64_ST4B_IMM = 6673,
|
||
|
|
AArch64_ST4D = 6674,
|
||
|
|
AArch64_ST4D_IMM = 6675,
|
||
|
|
AArch64_ST4Fourv16b = 6676,
|
||
|
|
AArch64_ST4Fourv16b_POST = 6677,
|
||
|
|
AArch64_ST4Fourv2d = 6678,
|
||
|
|
AArch64_ST4Fourv2d_POST = 6679,
|
||
|
|
AArch64_ST4Fourv2s = 6680,
|
||
|
|
AArch64_ST4Fourv2s_POST = 6681,
|
||
|
|
AArch64_ST4Fourv4h = 6682,
|
||
|
|
AArch64_ST4Fourv4h_POST = 6683,
|
||
|
|
AArch64_ST4Fourv4s = 6684,
|
||
|
|
AArch64_ST4Fourv4s_POST = 6685,
|
||
|
|
AArch64_ST4Fourv8b = 6686,
|
||
|
|
AArch64_ST4Fourv8b_POST = 6687,
|
||
|
|
AArch64_ST4Fourv8h = 6688,
|
||
|
|
AArch64_ST4Fourv8h_POST = 6689,
|
||
|
|
AArch64_ST4H = 6690,
|
||
|
|
AArch64_ST4H_IMM = 6691,
|
||
|
|
AArch64_ST4Q = 6692,
|
||
|
|
AArch64_ST4Q_IMM = 6693,
|
||
|
|
AArch64_ST4W = 6694,
|
||
|
|
AArch64_ST4W_IMM = 6695,
|
||
|
|
AArch64_ST4i16 = 6696,
|
||
|
|
AArch64_ST4i16_POST = 6697,
|
||
|
|
AArch64_ST4i32 = 6698,
|
||
|
|
AArch64_ST4i32_POST = 6699,
|
||
|
|
AArch64_ST4i64 = 6700,
|
||
|
|
AArch64_ST4i64_POST = 6701,
|
||
|
|
AArch64_ST4i8 = 6702,
|
||
|
|
AArch64_ST4i8_POST = 6703,
|
||
|
|
AArch64_ST64B = 6704,
|
||
|
|
AArch64_ST64BV = 6705,
|
||
|
|
AArch64_ST64BV0 = 6706,
|
||
|
|
AArch64_STGM = 6707,
|
||
|
|
AArch64_STGPi = 6708,
|
||
|
|
AArch64_STGPostIndex = 6709,
|
||
|
|
AArch64_STGPpost = 6710,
|
||
|
|
AArch64_STGPpre = 6711,
|
||
|
|
AArch64_STGPreIndex = 6712,
|
||
|
|
AArch64_STGi = 6713,
|
||
|
|
AArch64_STILPW = 6714,
|
||
|
|
AArch64_STILPWpre = 6715,
|
||
|
|
AArch64_STILPX = 6716,
|
||
|
|
AArch64_STILPXpre = 6717,
|
||
|
|
AArch64_STL1 = 6718,
|
||
|
|
AArch64_STLLRB = 6719,
|
||
|
|
AArch64_STLLRH = 6720,
|
||
|
|
AArch64_STLLRW = 6721,
|
||
|
|
AArch64_STLLRX = 6722,
|
||
|
|
AArch64_STLRB = 6723,
|
||
|
|
AArch64_STLRH = 6724,
|
||
|
|
AArch64_STLRW = 6725,
|
||
|
|
AArch64_STLRWpre = 6726,
|
||
|
|
AArch64_STLRX = 6727,
|
||
|
|
AArch64_STLRXpre = 6728,
|
||
|
|
AArch64_STLURBi = 6729,
|
||
|
|
AArch64_STLURHi = 6730,
|
||
|
|
AArch64_STLURWi = 6731,
|
||
|
|
AArch64_STLURXi = 6732,
|
||
|
|
AArch64_STLURbi = 6733,
|
||
|
|
AArch64_STLURdi = 6734,
|
||
|
|
AArch64_STLURhi = 6735,
|
||
|
|
AArch64_STLURqi = 6736,
|
||
|
|
AArch64_STLURsi = 6737,
|
||
|
|
AArch64_STLXPW = 6738,
|
||
|
|
AArch64_STLXPX = 6739,
|
||
|
|
AArch64_STLXRB = 6740,
|
||
|
|
AArch64_STLXRH = 6741,
|
||
|
|
AArch64_STLXRW = 6742,
|
||
|
|
AArch64_STLXRX = 6743,
|
||
|
|
AArch64_STNPDi = 6744,
|
||
|
|
AArch64_STNPQi = 6745,
|
||
|
|
AArch64_STNPSi = 6746,
|
||
|
|
AArch64_STNPWi = 6747,
|
||
|
|
AArch64_STNPXi = 6748,
|
||
|
|
AArch64_STNT1B_2Z = 6749,
|
||
|
|
AArch64_STNT1B_2Z_IMM = 6750,
|
||
|
|
AArch64_STNT1B_2Z_STRIDED = 6751,
|
||
|
|
AArch64_STNT1B_2Z_STRIDED_IMM = 6752,
|
||
|
|
AArch64_STNT1B_4Z = 6753,
|
||
|
|
AArch64_STNT1B_4Z_IMM = 6754,
|
||
|
|
AArch64_STNT1B_4Z_STRIDED = 6755,
|
||
|
|
AArch64_STNT1B_4Z_STRIDED_IMM = 6756,
|
||
|
|
AArch64_STNT1B_ZRI = 6757,
|
||
|
|
AArch64_STNT1B_ZRR = 6758,
|
||
|
|
AArch64_STNT1B_ZZR_D_REAL = 6759,
|
||
|
|
AArch64_STNT1B_ZZR_S_REAL = 6760,
|
||
|
|
AArch64_STNT1D_2Z = 6761,
|
||
|
|
AArch64_STNT1D_2Z_IMM = 6762,
|
||
|
|
AArch64_STNT1D_2Z_STRIDED = 6763,
|
||
|
|
AArch64_STNT1D_2Z_STRIDED_IMM = 6764,
|
||
|
|
AArch64_STNT1D_4Z = 6765,
|
||
|
|
AArch64_STNT1D_4Z_IMM = 6766,
|
||
|
|
AArch64_STNT1D_4Z_STRIDED = 6767,
|
||
|
|
AArch64_STNT1D_4Z_STRIDED_IMM = 6768,
|
||
|
|
AArch64_STNT1D_ZRI = 6769,
|
||
|
|
AArch64_STNT1D_ZRR = 6770,
|
||
|
|
AArch64_STNT1D_ZZR_D_REAL = 6771,
|
||
|
|
AArch64_STNT1H_2Z = 6772,
|
||
|
|
AArch64_STNT1H_2Z_IMM = 6773,
|
||
|
|
AArch64_STNT1H_2Z_STRIDED = 6774,
|
||
|
|
AArch64_STNT1H_2Z_STRIDED_IMM = 6775,
|
||
|
|
AArch64_STNT1H_4Z = 6776,
|
||
|
|
AArch64_STNT1H_4Z_IMM = 6777,
|
||
|
|
AArch64_STNT1H_4Z_STRIDED = 6778,
|
||
|
|
AArch64_STNT1H_4Z_STRIDED_IMM = 6779,
|
||
|
|
AArch64_STNT1H_ZRI = 6780,
|
||
|
|
AArch64_STNT1H_ZRR = 6781,
|
||
|
|
AArch64_STNT1H_ZZR_D_REAL = 6782,
|
||
|
|
AArch64_STNT1H_ZZR_S_REAL = 6783,
|
||
|
|
AArch64_STNT1W_2Z = 6784,
|
||
|
|
AArch64_STNT1W_2Z_IMM = 6785,
|
||
|
|
AArch64_STNT1W_2Z_STRIDED = 6786,
|
||
|
|
AArch64_STNT1W_2Z_STRIDED_IMM = 6787,
|
||
|
|
AArch64_STNT1W_4Z = 6788,
|
||
|
|
AArch64_STNT1W_4Z_IMM = 6789,
|
||
|
|
AArch64_STNT1W_4Z_STRIDED = 6790,
|
||
|
|
AArch64_STNT1W_4Z_STRIDED_IMM = 6791,
|
||
|
|
AArch64_STNT1W_ZRI = 6792,
|
||
|
|
AArch64_STNT1W_ZRR = 6793,
|
||
|
|
AArch64_STNT1W_ZZR_D_REAL = 6794,
|
||
|
|
AArch64_STNT1W_ZZR_S_REAL = 6795,
|
||
|
|
AArch64_STPDi = 6796,
|
||
|
|
AArch64_STPDpost = 6797,
|
||
|
|
AArch64_STPDpre = 6798,
|
||
|
|
AArch64_STPQi = 6799,
|
||
|
|
AArch64_STPQpost = 6800,
|
||
|
|
AArch64_STPQpre = 6801,
|
||
|
|
AArch64_STPSi = 6802,
|
||
|
|
AArch64_STPSpost = 6803,
|
||
|
|
AArch64_STPSpre = 6804,
|
||
|
|
AArch64_STPWi = 6805,
|
||
|
|
AArch64_STPWpost = 6806,
|
||
|
|
AArch64_STPWpre = 6807,
|
||
|
|
AArch64_STPXi = 6808,
|
||
|
|
AArch64_STPXpost = 6809,
|
||
|
|
AArch64_STPXpre = 6810,
|
||
|
|
AArch64_STRBBpost = 6811,
|
||
|
|
AArch64_STRBBpre = 6812,
|
||
|
|
AArch64_STRBBroW = 6813,
|
||
|
|
AArch64_STRBBroX = 6814,
|
||
|
|
AArch64_STRBBui = 6815,
|
||
|
|
AArch64_STRBpost = 6816,
|
||
|
|
AArch64_STRBpre = 6817,
|
||
|
|
AArch64_STRBroW = 6818,
|
||
|
|
AArch64_STRBroX = 6819,
|
||
|
|
AArch64_STRBui = 6820,
|
||
|
|
AArch64_STRDpost = 6821,
|
||
|
|
AArch64_STRDpre = 6822,
|
||
|
|
AArch64_STRDroW = 6823,
|
||
|
|
AArch64_STRDroX = 6824,
|
||
|
|
AArch64_STRDui = 6825,
|
||
|
|
AArch64_STRHHpost = 6826,
|
||
|
|
AArch64_STRHHpre = 6827,
|
||
|
|
AArch64_STRHHroW = 6828,
|
||
|
|
AArch64_STRHHroX = 6829,
|
||
|
|
AArch64_STRHHui = 6830,
|
||
|
|
AArch64_STRHpost = 6831,
|
||
|
|
AArch64_STRHpre = 6832,
|
||
|
|
AArch64_STRHroW = 6833,
|
||
|
|
AArch64_STRHroX = 6834,
|
||
|
|
AArch64_STRHui = 6835,
|
||
|
|
AArch64_STRQpost = 6836,
|
||
|
|
AArch64_STRQpre = 6837,
|
||
|
|
AArch64_STRQroW = 6838,
|
||
|
|
AArch64_STRQroX = 6839,
|
||
|
|
AArch64_STRQui = 6840,
|
||
|
|
AArch64_STRSpost = 6841,
|
||
|
|
AArch64_STRSpre = 6842,
|
||
|
|
AArch64_STRSroW = 6843,
|
||
|
|
AArch64_STRSroX = 6844,
|
||
|
|
AArch64_STRSui = 6845,
|
||
|
|
AArch64_STRWpost = 6846,
|
||
|
|
AArch64_STRWpre = 6847,
|
||
|
|
AArch64_STRWroW = 6848,
|
||
|
|
AArch64_STRWroX = 6849,
|
||
|
|
AArch64_STRWui = 6850,
|
||
|
|
AArch64_STRXpost = 6851,
|
||
|
|
AArch64_STRXpre = 6852,
|
||
|
|
AArch64_STRXroW = 6853,
|
||
|
|
AArch64_STRXroX = 6854,
|
||
|
|
AArch64_STRXui = 6855,
|
||
|
|
AArch64_STR_PXI = 6856,
|
||
|
|
AArch64_STR_TX = 6857,
|
||
|
|
AArch64_STR_ZA = 6858,
|
||
|
|
AArch64_STR_ZXI = 6859,
|
||
|
|
AArch64_STTRBi = 6860,
|
||
|
|
AArch64_STTRHi = 6861,
|
||
|
|
AArch64_STTRWi = 6862,
|
||
|
|
AArch64_STTRXi = 6863,
|
||
|
|
AArch64_STURBBi = 6864,
|
||
|
|
AArch64_STURBi = 6865,
|
||
|
|
AArch64_STURDi = 6866,
|
||
|
|
AArch64_STURHHi = 6867,
|
||
|
|
AArch64_STURHi = 6868,
|
||
|
|
AArch64_STURQi = 6869,
|
||
|
|
AArch64_STURSi = 6870,
|
||
|
|
AArch64_STURWi = 6871,
|
||
|
|
AArch64_STURXi = 6872,
|
||
|
|
AArch64_STXPW = 6873,
|
||
|
|
AArch64_STXPX = 6874,
|
||
|
|
AArch64_STXRB = 6875,
|
||
|
|
AArch64_STXRH = 6876,
|
||
|
|
AArch64_STXRW = 6877,
|
||
|
|
AArch64_STXRX = 6878,
|
||
|
|
AArch64_STZ2GPostIndex = 6879,
|
||
|
|
AArch64_STZ2GPreIndex = 6880,
|
||
|
|
AArch64_STZ2Gi = 6881,
|
||
|
|
AArch64_STZGM = 6882,
|
||
|
|
AArch64_STZGPostIndex = 6883,
|
||
|
|
AArch64_STZGPreIndex = 6884,
|
||
|
|
AArch64_STZGi = 6885,
|
||
|
|
AArch64_SUBG = 6886,
|
||
|
|
AArch64_SUBHNB_ZZZ_B = 6887,
|
||
|
|
AArch64_SUBHNB_ZZZ_H = 6888,
|
||
|
|
AArch64_SUBHNB_ZZZ_S = 6889,
|
||
|
|
AArch64_SUBHNT_ZZZ_B = 6890,
|
||
|
|
AArch64_SUBHNT_ZZZ_H = 6891,
|
||
|
|
AArch64_SUBHNT_ZZZ_S = 6892,
|
||
|
|
AArch64_SUBHNv2i64_v2i32 = 6893,
|
||
|
|
AArch64_SUBHNv2i64_v4i32 = 6894,
|
||
|
|
AArch64_SUBHNv4i32_v4i16 = 6895,
|
||
|
|
AArch64_SUBHNv4i32_v8i16 = 6896,
|
||
|
|
AArch64_SUBHNv8i16_v16i8 = 6897,
|
||
|
|
AArch64_SUBHNv8i16_v8i8 = 6898,
|
||
|
|
AArch64_SUBP = 6899,
|
||
|
|
AArch64_SUBPS = 6900,
|
||
|
|
AArch64_SUBPT_shift = 6901,
|
||
|
|
AArch64_SUBR_ZI_B = 6902,
|
||
|
|
AArch64_SUBR_ZI_D = 6903,
|
||
|
|
AArch64_SUBR_ZI_H = 6904,
|
||
|
|
AArch64_SUBR_ZI_S = 6905,
|
||
|
|
AArch64_SUBR_ZPmZ_B = 6906,
|
||
|
|
AArch64_SUBR_ZPmZ_D = 6907,
|
||
|
|
AArch64_SUBR_ZPmZ_H = 6908,
|
||
|
|
AArch64_SUBR_ZPmZ_S = 6909,
|
||
|
|
AArch64_SUBSWri = 6910,
|
||
|
|
AArch64_SUBSWrs = 6911,
|
||
|
|
AArch64_SUBSWrx = 6912,
|
||
|
|
AArch64_SUBSXri = 6913,
|
||
|
|
AArch64_SUBSXrs = 6914,
|
||
|
|
AArch64_SUBSXrx = 6915,
|
||
|
|
AArch64_SUBSXrx64 = 6916,
|
||
|
|
AArch64_SUBWri = 6917,
|
||
|
|
AArch64_SUBWrs = 6918,
|
||
|
|
AArch64_SUBWrx = 6919,
|
||
|
|
AArch64_SUBXri = 6920,
|
||
|
|
AArch64_SUBXrs = 6921,
|
||
|
|
AArch64_SUBXrx = 6922,
|
||
|
|
AArch64_SUBXrx64 = 6923,
|
||
|
|
AArch64_SUB_VG2_M2Z2Z_D = 6924,
|
||
|
|
AArch64_SUB_VG2_M2Z2Z_S = 6925,
|
||
|
|
AArch64_SUB_VG2_M2ZZ_D = 6926,
|
||
|
|
AArch64_SUB_VG2_M2ZZ_S = 6927,
|
||
|
|
AArch64_SUB_VG2_M2Z_D = 6928,
|
||
|
|
AArch64_SUB_VG2_M2Z_S = 6929,
|
||
|
|
AArch64_SUB_VG4_M4Z4Z_D = 6930,
|
||
|
|
AArch64_SUB_VG4_M4Z4Z_S = 6931,
|
||
|
|
AArch64_SUB_VG4_M4ZZ_D = 6932,
|
||
|
|
AArch64_SUB_VG4_M4ZZ_S = 6933,
|
||
|
|
AArch64_SUB_VG4_M4Z_D = 6934,
|
||
|
|
AArch64_SUB_VG4_M4Z_S = 6935,
|
||
|
|
AArch64_SUB_ZI_B = 6936,
|
||
|
|
AArch64_SUB_ZI_D = 6937,
|
||
|
|
AArch64_SUB_ZI_H = 6938,
|
||
|
|
AArch64_SUB_ZI_S = 6939,
|
||
|
|
AArch64_SUB_ZPmZ_B = 6940,
|
||
|
|
AArch64_SUB_ZPmZ_CPA = 6941,
|
||
|
|
AArch64_SUB_ZPmZ_D = 6942,
|
||
|
|
AArch64_SUB_ZPmZ_H = 6943,
|
||
|
|
AArch64_SUB_ZPmZ_S = 6944,
|
||
|
|
AArch64_SUB_ZZZ_B = 6945,
|
||
|
|
AArch64_SUB_ZZZ_CPA = 6946,
|
||
|
|
AArch64_SUB_ZZZ_D = 6947,
|
||
|
|
AArch64_SUB_ZZZ_H = 6948,
|
||
|
|
AArch64_SUB_ZZZ_S = 6949,
|
||
|
|
AArch64_SUBv16i8 = 6950,
|
||
|
|
AArch64_SUBv1i64 = 6951,
|
||
|
|
AArch64_SUBv2i32 = 6952,
|
||
|
|
AArch64_SUBv2i64 = 6953,
|
||
|
|
AArch64_SUBv4i16 = 6954,
|
||
|
|
AArch64_SUBv4i32 = 6955,
|
||
|
|
AArch64_SUBv8i16 = 6956,
|
||
|
|
AArch64_SUBv8i8 = 6957,
|
||
|
|
AArch64_SUDOT_VG2_M2ZZI_BToS = 6958,
|
||
|
|
AArch64_SUDOT_VG2_M2ZZ_BToS = 6959,
|
||
|
|
AArch64_SUDOT_VG4_M4ZZI_BToS = 6960,
|
||
|
|
AArch64_SUDOT_VG4_M4ZZ_BToS = 6961,
|
||
|
|
AArch64_SUDOT_ZZZI = 6962,
|
||
|
|
AArch64_SUDOTlanev16i8 = 6963,
|
||
|
|
AArch64_SUDOTlanev8i8 = 6964,
|
||
|
|
AArch64_SUMLALL_MZZI_BtoS = 6965,
|
||
|
|
AArch64_SUMLALL_VG2_M2ZZI_BtoS = 6966,
|
||
|
|
AArch64_SUMLALL_VG2_M2ZZ_BtoS = 6967,
|
||
|
|
AArch64_SUMLALL_VG4_M4ZZI_BtoS = 6968,
|
||
|
|
AArch64_SUMLALL_VG4_M4ZZ_BtoS = 6969,
|
||
|
|
AArch64_SUMOPA_MPPZZ_D = 6970,
|
||
|
|
AArch64_SUMOPA_MPPZZ_S = 6971,
|
||
|
|
AArch64_SUMOPS_MPPZZ_D = 6972,
|
||
|
|
AArch64_SUMOPS_MPPZZ_S = 6973,
|
||
|
|
AArch64_SUNPKHI_ZZ_D = 6974,
|
||
|
|
AArch64_SUNPKHI_ZZ_H = 6975,
|
||
|
|
AArch64_SUNPKHI_ZZ_S = 6976,
|
||
|
|
AArch64_SUNPKLO_ZZ_D = 6977,
|
||
|
|
AArch64_SUNPKLO_ZZ_H = 6978,
|
||
|
|
AArch64_SUNPKLO_ZZ_S = 6979,
|
||
|
|
AArch64_SUNPK_VG2_2ZZ_D = 6980,
|
||
|
|
AArch64_SUNPK_VG2_2ZZ_H = 6981,
|
||
|
|
AArch64_SUNPK_VG2_2ZZ_S = 6982,
|
||
|
|
AArch64_SUNPK_VG4_4Z2Z_D = 6983,
|
||
|
|
AArch64_SUNPK_VG4_4Z2Z_H = 6984,
|
||
|
|
AArch64_SUNPK_VG4_4Z2Z_S = 6985,
|
||
|
|
AArch64_SUQADD_ZPmZ_B = 6986,
|
||
|
|
AArch64_SUQADD_ZPmZ_D = 6987,
|
||
|
|
AArch64_SUQADD_ZPmZ_H = 6988,
|
||
|
|
AArch64_SUQADD_ZPmZ_S = 6989,
|
||
|
|
AArch64_SUQADDv16i8 = 6990,
|
||
|
|
AArch64_SUQADDv1i16 = 6991,
|
||
|
|
AArch64_SUQADDv1i32 = 6992,
|
||
|
|
AArch64_SUQADDv1i64 = 6993,
|
||
|
|
AArch64_SUQADDv1i8 = 6994,
|
||
|
|
AArch64_SUQADDv2i32 = 6995,
|
||
|
|
AArch64_SUQADDv2i64 = 6996,
|
||
|
|
AArch64_SUQADDv4i16 = 6997,
|
||
|
|
AArch64_SUQADDv4i32 = 6998,
|
||
|
|
AArch64_SUQADDv8i16 = 6999,
|
||
|
|
AArch64_SUQADDv8i8 = 7000,
|
||
|
|
AArch64_SUVDOT_VG4_M4ZZI_BToS = 7001,
|
||
|
|
AArch64_SVC = 7002,
|
||
|
|
AArch64_SVDOT_VG2_M2ZZI_HtoS = 7003,
|
||
|
|
AArch64_SVDOT_VG4_M4ZZI_BtoS = 7004,
|
||
|
|
AArch64_SVDOT_VG4_M4ZZI_HtoD = 7005,
|
||
|
|
AArch64_SWPAB = 7006,
|
||
|
|
AArch64_SWPAH = 7007,
|
||
|
|
AArch64_SWPALB = 7008,
|
||
|
|
AArch64_SWPALH = 7009,
|
||
|
|
AArch64_SWPALW = 7010,
|
||
|
|
AArch64_SWPALX = 7011,
|
||
|
|
AArch64_SWPAW = 7012,
|
||
|
|
AArch64_SWPAX = 7013,
|
||
|
|
AArch64_SWPB = 7014,
|
||
|
|
AArch64_SWPH = 7015,
|
||
|
|
AArch64_SWPLB = 7016,
|
||
|
|
AArch64_SWPLH = 7017,
|
||
|
|
AArch64_SWPLW = 7018,
|
||
|
|
AArch64_SWPLX = 7019,
|
||
|
|
AArch64_SWPP = 7020,
|
||
|
|
AArch64_SWPPA = 7021,
|
||
|
|
AArch64_SWPPAL = 7022,
|
||
|
|
AArch64_SWPPL = 7023,
|
||
|
|
AArch64_SWPW = 7024,
|
||
|
|
AArch64_SWPX = 7025,
|
||
|
|
AArch64_SXTB_ZPmZ_D = 7026,
|
||
|
|
AArch64_SXTB_ZPmZ_H = 7027,
|
||
|
|
AArch64_SXTB_ZPmZ_S = 7028,
|
||
|
|
AArch64_SXTH_ZPmZ_D = 7029,
|
||
|
|
AArch64_SXTH_ZPmZ_S = 7030,
|
||
|
|
AArch64_SXTW_ZPmZ_D = 7031,
|
||
|
|
AArch64_SYSLxt = 7032,
|
||
|
|
AArch64_SYSPxt = 7033,
|
||
|
|
AArch64_SYSPxt_XZR = 7034,
|
||
|
|
AArch64_SYSxt = 7035,
|
||
|
|
AArch64_TBLQ_ZZZ_B = 7036,
|
||
|
|
AArch64_TBLQ_ZZZ_D = 7037,
|
||
|
|
AArch64_TBLQ_ZZZ_H = 7038,
|
||
|
|
AArch64_TBLQ_ZZZ_S = 7039,
|
||
|
|
AArch64_TBL_ZZZZ_B = 7040,
|
||
|
|
AArch64_TBL_ZZZZ_D = 7041,
|
||
|
|
AArch64_TBL_ZZZZ_H = 7042,
|
||
|
|
AArch64_TBL_ZZZZ_S = 7043,
|
||
|
|
AArch64_TBL_ZZZ_B = 7044,
|
||
|
|
AArch64_TBL_ZZZ_D = 7045,
|
||
|
|
AArch64_TBL_ZZZ_H = 7046,
|
||
|
|
AArch64_TBL_ZZZ_S = 7047,
|
||
|
|
AArch64_TBLv16i8Four = 7048,
|
||
|
|
AArch64_TBLv16i8One = 7049,
|
||
|
|
AArch64_TBLv16i8Three = 7050,
|
||
|
|
AArch64_TBLv16i8Two = 7051,
|
||
|
|
AArch64_TBLv8i8Four = 7052,
|
||
|
|
AArch64_TBLv8i8One = 7053,
|
||
|
|
AArch64_TBLv8i8Three = 7054,
|
||
|
|
AArch64_TBLv8i8Two = 7055,
|
||
|
|
AArch64_TBNZW = 7056,
|
||
|
|
AArch64_TBNZX = 7057,
|
||
|
|
AArch64_TBXQ_ZZZ_B = 7058,
|
||
|
|
AArch64_TBXQ_ZZZ_D = 7059,
|
||
|
|
AArch64_TBXQ_ZZZ_H = 7060,
|
||
|
|
AArch64_TBXQ_ZZZ_S = 7061,
|
||
|
|
AArch64_TBX_ZZZ_B = 7062,
|
||
|
|
AArch64_TBX_ZZZ_D = 7063,
|
||
|
|
AArch64_TBX_ZZZ_H = 7064,
|
||
|
|
AArch64_TBX_ZZZ_S = 7065,
|
||
|
|
AArch64_TBXv16i8Four = 7066,
|
||
|
|
AArch64_TBXv16i8One = 7067,
|
||
|
|
AArch64_TBXv16i8Three = 7068,
|
||
|
|
AArch64_TBXv16i8Two = 7069,
|
||
|
|
AArch64_TBXv8i8Four = 7070,
|
||
|
|
AArch64_TBXv8i8One = 7071,
|
||
|
|
AArch64_TBXv8i8Three = 7072,
|
||
|
|
AArch64_TBXv8i8Two = 7073,
|
||
|
|
AArch64_TBZW = 7074,
|
||
|
|
AArch64_TBZX = 7075,
|
||
|
|
AArch64_TCANCEL = 7076,
|
||
|
|
AArch64_TCOMMIT = 7077,
|
||
|
|
AArch64_TRCIT = 7078,
|
||
|
|
AArch64_TRN1_PPP_B = 7079,
|
||
|
|
AArch64_TRN1_PPP_D = 7080,
|
||
|
|
AArch64_TRN1_PPP_H = 7081,
|
||
|
|
AArch64_TRN1_PPP_S = 7082,
|
||
|
|
AArch64_TRN1_ZZZ_B = 7083,
|
||
|
|
AArch64_TRN1_ZZZ_D = 7084,
|
||
|
|
AArch64_TRN1_ZZZ_H = 7085,
|
||
|
|
AArch64_TRN1_ZZZ_Q = 7086,
|
||
|
|
AArch64_TRN1_ZZZ_S = 7087,
|
||
|
|
AArch64_TRN1v16i8 = 7088,
|
||
|
|
AArch64_TRN1v2i32 = 7089,
|
||
|
|
AArch64_TRN1v2i64 = 7090,
|
||
|
|
AArch64_TRN1v4i16 = 7091,
|
||
|
|
AArch64_TRN1v4i32 = 7092,
|
||
|
|
AArch64_TRN1v8i16 = 7093,
|
||
|
|
AArch64_TRN1v8i8 = 7094,
|
||
|
|
AArch64_TRN2_PPP_B = 7095,
|
||
|
|
AArch64_TRN2_PPP_D = 7096,
|
||
|
|
AArch64_TRN2_PPP_H = 7097,
|
||
|
|
AArch64_TRN2_PPP_S = 7098,
|
||
|
|
AArch64_TRN2_ZZZ_B = 7099,
|
||
|
|
AArch64_TRN2_ZZZ_D = 7100,
|
||
|
|
AArch64_TRN2_ZZZ_H = 7101,
|
||
|
|
AArch64_TRN2_ZZZ_Q = 7102,
|
||
|
|
AArch64_TRN2_ZZZ_S = 7103,
|
||
|
|
AArch64_TRN2v16i8 = 7104,
|
||
|
|
AArch64_TRN2v2i32 = 7105,
|
||
|
|
AArch64_TRN2v2i64 = 7106,
|
||
|
|
AArch64_TRN2v4i16 = 7107,
|
||
|
|
AArch64_TRN2v4i32 = 7108,
|
||
|
|
AArch64_TRN2v8i16 = 7109,
|
||
|
|
AArch64_TRN2v8i8 = 7110,
|
||
|
|
AArch64_TSB = 7111,
|
||
|
|
AArch64_TSTART = 7112,
|
||
|
|
AArch64_TTEST = 7113,
|
||
|
|
AArch64_UABALB_ZZZ_D = 7114,
|
||
|
|
AArch64_UABALB_ZZZ_H = 7115,
|
||
|
|
AArch64_UABALB_ZZZ_S = 7116,
|
||
|
|
AArch64_UABALT_ZZZ_D = 7117,
|
||
|
|
AArch64_UABALT_ZZZ_H = 7118,
|
||
|
|
AArch64_UABALT_ZZZ_S = 7119,
|
||
|
|
AArch64_UABALv16i8_v8i16 = 7120,
|
||
|
|
AArch64_UABALv2i32_v2i64 = 7121,
|
||
|
|
AArch64_UABALv4i16_v4i32 = 7122,
|
||
|
|
AArch64_UABALv4i32_v2i64 = 7123,
|
||
|
|
AArch64_UABALv8i16_v4i32 = 7124,
|
||
|
|
AArch64_UABALv8i8_v8i16 = 7125,
|
||
|
|
AArch64_UABA_ZZZ_B = 7126,
|
||
|
|
AArch64_UABA_ZZZ_D = 7127,
|
||
|
|
AArch64_UABA_ZZZ_H = 7128,
|
||
|
|
AArch64_UABA_ZZZ_S = 7129,
|
||
|
|
AArch64_UABAv16i8 = 7130,
|
||
|
|
AArch64_UABAv2i32 = 7131,
|
||
|
|
AArch64_UABAv4i16 = 7132,
|
||
|
|
AArch64_UABAv4i32 = 7133,
|
||
|
|
AArch64_UABAv8i16 = 7134,
|
||
|
|
AArch64_UABAv8i8 = 7135,
|
||
|
|
AArch64_UABDLB_ZZZ_D = 7136,
|
||
|
|
AArch64_UABDLB_ZZZ_H = 7137,
|
||
|
|
AArch64_UABDLB_ZZZ_S = 7138,
|
||
|
|
AArch64_UABDLT_ZZZ_D = 7139,
|
||
|
|
AArch64_UABDLT_ZZZ_H = 7140,
|
||
|
|
AArch64_UABDLT_ZZZ_S = 7141,
|
||
|
|
AArch64_UABDLv16i8_v8i16 = 7142,
|
||
|
|
AArch64_UABDLv2i32_v2i64 = 7143,
|
||
|
|
AArch64_UABDLv4i16_v4i32 = 7144,
|
||
|
|
AArch64_UABDLv4i32_v2i64 = 7145,
|
||
|
|
AArch64_UABDLv8i16_v4i32 = 7146,
|
||
|
|
AArch64_UABDLv8i8_v8i16 = 7147,
|
||
|
|
AArch64_UABD_ZPmZ_B = 7148,
|
||
|
|
AArch64_UABD_ZPmZ_D = 7149,
|
||
|
|
AArch64_UABD_ZPmZ_H = 7150,
|
||
|
|
AArch64_UABD_ZPmZ_S = 7151,
|
||
|
|
AArch64_UABDv16i8 = 7152,
|
||
|
|
AArch64_UABDv2i32 = 7153,
|
||
|
|
AArch64_UABDv4i16 = 7154,
|
||
|
|
AArch64_UABDv4i32 = 7155,
|
||
|
|
AArch64_UABDv8i16 = 7156,
|
||
|
|
AArch64_UABDv8i8 = 7157,
|
||
|
|
AArch64_UADALP_ZPmZ_D = 7158,
|
||
|
|
AArch64_UADALP_ZPmZ_H = 7159,
|
||
|
|
AArch64_UADALP_ZPmZ_S = 7160,
|
||
|
|
AArch64_UADALPv16i8_v8i16 = 7161,
|
||
|
|
AArch64_UADALPv2i32_v1i64 = 7162,
|
||
|
|
AArch64_UADALPv4i16_v2i32 = 7163,
|
||
|
|
AArch64_UADALPv4i32_v2i64 = 7164,
|
||
|
|
AArch64_UADALPv8i16_v4i32 = 7165,
|
||
|
|
AArch64_UADALPv8i8_v4i16 = 7166,
|
||
|
|
AArch64_UADDLB_ZZZ_D = 7167,
|
||
|
|
AArch64_UADDLB_ZZZ_H = 7168,
|
||
|
|
AArch64_UADDLB_ZZZ_S = 7169,
|
||
|
|
AArch64_UADDLPv16i8_v8i16 = 7170,
|
||
|
|
AArch64_UADDLPv2i32_v1i64 = 7171,
|
||
|
|
AArch64_UADDLPv4i16_v2i32 = 7172,
|
||
|
|
AArch64_UADDLPv4i32_v2i64 = 7173,
|
||
|
|
AArch64_UADDLPv8i16_v4i32 = 7174,
|
||
|
|
AArch64_UADDLPv8i8_v4i16 = 7175,
|
||
|
|
AArch64_UADDLT_ZZZ_D = 7176,
|
||
|
|
AArch64_UADDLT_ZZZ_H = 7177,
|
||
|
|
AArch64_UADDLT_ZZZ_S = 7178,
|
||
|
|
AArch64_UADDLVv16i8v = 7179,
|
||
|
|
AArch64_UADDLVv4i16v = 7180,
|
||
|
|
AArch64_UADDLVv4i32v = 7181,
|
||
|
|
AArch64_UADDLVv8i16v = 7182,
|
||
|
|
AArch64_UADDLVv8i8v = 7183,
|
||
|
|
AArch64_UADDLv16i8_v8i16 = 7184,
|
||
|
|
AArch64_UADDLv2i32_v2i64 = 7185,
|
||
|
|
AArch64_UADDLv4i16_v4i32 = 7186,
|
||
|
|
AArch64_UADDLv4i32_v2i64 = 7187,
|
||
|
|
AArch64_UADDLv8i16_v4i32 = 7188,
|
||
|
|
AArch64_UADDLv8i8_v8i16 = 7189,
|
||
|
|
AArch64_UADDV_VPZ_B = 7190,
|
||
|
|
AArch64_UADDV_VPZ_D = 7191,
|
||
|
|
AArch64_UADDV_VPZ_H = 7192,
|
||
|
|
AArch64_UADDV_VPZ_S = 7193,
|
||
|
|
AArch64_UADDWB_ZZZ_D = 7194,
|
||
|
|
AArch64_UADDWB_ZZZ_H = 7195,
|
||
|
|
AArch64_UADDWB_ZZZ_S = 7196,
|
||
|
|
AArch64_UADDWT_ZZZ_D = 7197,
|
||
|
|
AArch64_UADDWT_ZZZ_H = 7198,
|
||
|
|
AArch64_UADDWT_ZZZ_S = 7199,
|
||
|
|
AArch64_UADDWv16i8_v8i16 = 7200,
|
||
|
|
AArch64_UADDWv2i32_v2i64 = 7201,
|
||
|
|
AArch64_UADDWv4i16_v4i32 = 7202,
|
||
|
|
AArch64_UADDWv4i32_v2i64 = 7203,
|
||
|
|
AArch64_UADDWv8i16_v4i32 = 7204,
|
||
|
|
AArch64_UADDWv8i8_v8i16 = 7205,
|
||
|
|
AArch64_UBFMWri = 7206,
|
||
|
|
AArch64_UBFMXri = 7207,
|
||
|
|
AArch64_UCLAMP_VG2_2Z2Z_B = 7208,
|
||
|
|
AArch64_UCLAMP_VG2_2Z2Z_D = 7209,
|
||
|
|
AArch64_UCLAMP_VG2_2Z2Z_H = 7210,
|
||
|
|
AArch64_UCLAMP_VG2_2Z2Z_S = 7211,
|
||
|
|
AArch64_UCLAMP_VG4_4Z4Z_B = 7212,
|
||
|
|
AArch64_UCLAMP_VG4_4Z4Z_D = 7213,
|
||
|
|
AArch64_UCLAMP_VG4_4Z4Z_H = 7214,
|
||
|
|
AArch64_UCLAMP_VG4_4Z4Z_S = 7215,
|
||
|
|
AArch64_UCLAMP_ZZZ_B = 7216,
|
||
|
|
AArch64_UCLAMP_ZZZ_D = 7217,
|
||
|
|
AArch64_UCLAMP_ZZZ_H = 7218,
|
||
|
|
AArch64_UCLAMP_ZZZ_S = 7219,
|
||
|
|
AArch64_UCVTFSWDri = 7220,
|
||
|
|
AArch64_UCVTFSWHri = 7221,
|
||
|
|
AArch64_UCVTFSWSri = 7222,
|
||
|
|
AArch64_UCVTFSXDri = 7223,
|
||
|
|
AArch64_UCVTFSXHri = 7224,
|
||
|
|
AArch64_UCVTFSXSri = 7225,
|
||
|
|
AArch64_UCVTFUWDri = 7226,
|
||
|
|
AArch64_UCVTFUWHri = 7227,
|
||
|
|
AArch64_UCVTFUWSri = 7228,
|
||
|
|
AArch64_UCVTFUXDri = 7229,
|
||
|
|
AArch64_UCVTFUXHri = 7230,
|
||
|
|
AArch64_UCVTFUXSri = 7231,
|
||
|
|
AArch64_UCVTF_2Z2Z_StoS = 7232,
|
||
|
|
AArch64_UCVTF_4Z4Z_StoS = 7233,
|
||
|
|
AArch64_UCVTF_ZPmZ_DtoD = 7234,
|
||
|
|
AArch64_UCVTF_ZPmZ_DtoH = 7235,
|
||
|
|
AArch64_UCVTF_ZPmZ_DtoS = 7236,
|
||
|
|
AArch64_UCVTF_ZPmZ_HtoH = 7237,
|
||
|
|
AArch64_UCVTF_ZPmZ_StoD = 7238,
|
||
|
|
AArch64_UCVTF_ZPmZ_StoH = 7239,
|
||
|
|
AArch64_UCVTF_ZPmZ_StoS = 7240,
|
||
|
|
AArch64_UCVTFd = 7241,
|
||
|
|
AArch64_UCVTFh = 7242,
|
||
|
|
AArch64_UCVTFs = 7243,
|
||
|
|
AArch64_UCVTFv1i16 = 7244,
|
||
|
|
AArch64_UCVTFv1i32 = 7245,
|
||
|
|
AArch64_UCVTFv1i64 = 7246,
|
||
|
|
AArch64_UCVTFv2f32 = 7247,
|
||
|
|
AArch64_UCVTFv2f64 = 7248,
|
||
|
|
AArch64_UCVTFv2i32_shift = 7249,
|
||
|
|
AArch64_UCVTFv2i64_shift = 7250,
|
||
|
|
AArch64_UCVTFv4f16 = 7251,
|
||
|
|
AArch64_UCVTFv4f32 = 7252,
|
||
|
|
AArch64_UCVTFv4i16_shift = 7253,
|
||
|
|
AArch64_UCVTFv4i32_shift = 7254,
|
||
|
|
AArch64_UCVTFv8f16 = 7255,
|
||
|
|
AArch64_UCVTFv8i16_shift = 7256,
|
||
|
|
AArch64_UDF = 7257,
|
||
|
|
AArch64_UDIVR_ZPmZ_D = 7258,
|
||
|
|
AArch64_UDIVR_ZPmZ_S = 7259,
|
||
|
|
AArch64_UDIVWr = 7260,
|
||
|
|
AArch64_UDIVXr = 7261,
|
||
|
|
AArch64_UDIV_ZPmZ_D = 7262,
|
||
|
|
AArch64_UDIV_ZPmZ_S = 7263,
|
||
|
|
AArch64_UDOT_VG2_M2Z2Z_BtoS = 7264,
|
||
|
|
AArch64_UDOT_VG2_M2Z2Z_HtoD = 7265,
|
||
|
|
AArch64_UDOT_VG2_M2Z2Z_HtoS = 7266,
|
||
|
|
AArch64_UDOT_VG2_M2ZZI_BToS = 7267,
|
||
|
|
AArch64_UDOT_VG2_M2ZZI_HToS = 7268,
|
||
|
|
AArch64_UDOT_VG2_M2ZZI_HtoD = 7269,
|
||
|
|
AArch64_UDOT_VG2_M2ZZ_BtoS = 7270,
|
||
|
|
AArch64_UDOT_VG2_M2ZZ_HtoD = 7271,
|
||
|
|
AArch64_UDOT_VG2_M2ZZ_HtoS = 7272,
|
||
|
|
AArch64_UDOT_VG4_M4Z4Z_BtoS = 7273,
|
||
|
|
AArch64_UDOT_VG4_M4Z4Z_HtoD = 7274,
|
||
|
|
AArch64_UDOT_VG4_M4Z4Z_HtoS = 7275,
|
||
|
|
AArch64_UDOT_VG4_M4ZZI_BtoS = 7276,
|
||
|
|
AArch64_UDOT_VG4_M4ZZI_HToS = 7277,
|
||
|
|
AArch64_UDOT_VG4_M4ZZI_HtoD = 7278,
|
||
|
|
AArch64_UDOT_VG4_M4ZZ_BtoS = 7279,
|
||
|
|
AArch64_UDOT_VG4_M4ZZ_HtoD = 7280,
|
||
|
|
AArch64_UDOT_VG4_M4ZZ_HtoS = 7281,
|
||
|
|
AArch64_UDOT_ZZZI_D = 7282,
|
||
|
|
AArch64_UDOT_ZZZI_HtoS = 7283,
|
||
|
|
AArch64_UDOT_ZZZI_S = 7284,
|
||
|
|
AArch64_UDOT_ZZZ_D = 7285,
|
||
|
|
AArch64_UDOT_ZZZ_HtoS = 7286,
|
||
|
|
AArch64_UDOT_ZZZ_S = 7287,
|
||
|
|
AArch64_UDOTlanev16i8 = 7288,
|
||
|
|
AArch64_UDOTlanev8i8 = 7289,
|
||
|
|
AArch64_UDOTv16i8 = 7290,
|
||
|
|
AArch64_UDOTv8i8 = 7291,
|
||
|
|
AArch64_UHADD_ZPmZ_B = 7292,
|
||
|
|
AArch64_UHADD_ZPmZ_D = 7293,
|
||
|
|
AArch64_UHADD_ZPmZ_H = 7294,
|
||
|
|
AArch64_UHADD_ZPmZ_S = 7295,
|
||
|
|
AArch64_UHADDv16i8 = 7296,
|
||
|
|
AArch64_UHADDv2i32 = 7297,
|
||
|
|
AArch64_UHADDv4i16 = 7298,
|
||
|
|
AArch64_UHADDv4i32 = 7299,
|
||
|
|
AArch64_UHADDv8i16 = 7300,
|
||
|
|
AArch64_UHADDv8i8 = 7301,
|
||
|
|
AArch64_UHSUBR_ZPmZ_B = 7302,
|
||
|
|
AArch64_UHSUBR_ZPmZ_D = 7303,
|
||
|
|
AArch64_UHSUBR_ZPmZ_H = 7304,
|
||
|
|
AArch64_UHSUBR_ZPmZ_S = 7305,
|
||
|
|
AArch64_UHSUB_ZPmZ_B = 7306,
|
||
|
|
AArch64_UHSUB_ZPmZ_D = 7307,
|
||
|
|
AArch64_UHSUB_ZPmZ_H = 7308,
|
||
|
|
AArch64_UHSUB_ZPmZ_S = 7309,
|
||
|
|
AArch64_UHSUBv16i8 = 7310,
|
||
|
|
AArch64_UHSUBv2i32 = 7311,
|
||
|
|
AArch64_UHSUBv4i16 = 7312,
|
||
|
|
AArch64_UHSUBv4i32 = 7313,
|
||
|
|
AArch64_UHSUBv8i16 = 7314,
|
||
|
|
AArch64_UHSUBv8i8 = 7315,
|
||
|
|
AArch64_UMADDLrrr = 7316,
|
||
|
|
AArch64_UMAXP_ZPmZ_B = 7317,
|
||
|
|
AArch64_UMAXP_ZPmZ_D = 7318,
|
||
|
|
AArch64_UMAXP_ZPmZ_H = 7319,
|
||
|
|
AArch64_UMAXP_ZPmZ_S = 7320,
|
||
|
|
AArch64_UMAXPv16i8 = 7321,
|
||
|
|
AArch64_UMAXPv2i32 = 7322,
|
||
|
|
AArch64_UMAXPv4i16 = 7323,
|
||
|
|
AArch64_UMAXPv4i32 = 7324,
|
||
|
|
AArch64_UMAXPv8i16 = 7325,
|
||
|
|
AArch64_UMAXPv8i8 = 7326,
|
||
|
|
AArch64_UMAXQV_VPZ_B = 7327,
|
||
|
|
AArch64_UMAXQV_VPZ_D = 7328,
|
||
|
|
AArch64_UMAXQV_VPZ_H = 7329,
|
||
|
|
AArch64_UMAXQV_VPZ_S = 7330,
|
||
|
|
AArch64_UMAXV_VPZ_B = 7331,
|
||
|
|
AArch64_UMAXV_VPZ_D = 7332,
|
||
|
|
AArch64_UMAXV_VPZ_H = 7333,
|
||
|
|
AArch64_UMAXV_VPZ_S = 7334,
|
||
|
|
AArch64_UMAXVv16i8v = 7335,
|
||
|
|
AArch64_UMAXVv4i16v = 7336,
|
||
|
|
AArch64_UMAXVv4i32v = 7337,
|
||
|
|
AArch64_UMAXVv8i16v = 7338,
|
||
|
|
AArch64_UMAXVv8i8v = 7339,
|
||
|
|
AArch64_UMAXWri = 7340,
|
||
|
|
AArch64_UMAXWrr = 7341,
|
||
|
|
AArch64_UMAXXri = 7342,
|
||
|
|
AArch64_UMAXXrr = 7343,
|
||
|
|
AArch64_UMAX_VG2_2Z2Z_B = 7344,
|
||
|
|
AArch64_UMAX_VG2_2Z2Z_D = 7345,
|
||
|
|
AArch64_UMAX_VG2_2Z2Z_H = 7346,
|
||
|
|
AArch64_UMAX_VG2_2Z2Z_S = 7347,
|
||
|
|
AArch64_UMAX_VG2_2ZZ_B = 7348,
|
||
|
|
AArch64_UMAX_VG2_2ZZ_D = 7349,
|
||
|
|
AArch64_UMAX_VG2_2ZZ_H = 7350,
|
||
|
|
AArch64_UMAX_VG2_2ZZ_S = 7351,
|
||
|
|
AArch64_UMAX_VG4_4Z4Z_B = 7352,
|
||
|
|
AArch64_UMAX_VG4_4Z4Z_D = 7353,
|
||
|
|
AArch64_UMAX_VG4_4Z4Z_H = 7354,
|
||
|
|
AArch64_UMAX_VG4_4Z4Z_S = 7355,
|
||
|
|
AArch64_UMAX_VG4_4ZZ_B = 7356,
|
||
|
|
AArch64_UMAX_VG4_4ZZ_D = 7357,
|
||
|
|
AArch64_UMAX_VG4_4ZZ_H = 7358,
|
||
|
|
AArch64_UMAX_VG4_4ZZ_S = 7359,
|
||
|
|
AArch64_UMAX_ZI_B = 7360,
|
||
|
|
AArch64_UMAX_ZI_D = 7361,
|
||
|
|
AArch64_UMAX_ZI_H = 7362,
|
||
|
|
AArch64_UMAX_ZI_S = 7363,
|
||
|
|
AArch64_UMAX_ZPmZ_B = 7364,
|
||
|
|
AArch64_UMAX_ZPmZ_D = 7365,
|
||
|
|
AArch64_UMAX_ZPmZ_H = 7366,
|
||
|
|
AArch64_UMAX_ZPmZ_S = 7367,
|
||
|
|
AArch64_UMAXv16i8 = 7368,
|
||
|
|
AArch64_UMAXv2i32 = 7369,
|
||
|
|
AArch64_UMAXv4i16 = 7370,
|
||
|
|
AArch64_UMAXv4i32 = 7371,
|
||
|
|
AArch64_UMAXv8i16 = 7372,
|
||
|
|
AArch64_UMAXv8i8 = 7373,
|
||
|
|
AArch64_UMINP_ZPmZ_B = 7374,
|
||
|
|
AArch64_UMINP_ZPmZ_D = 7375,
|
||
|
|
AArch64_UMINP_ZPmZ_H = 7376,
|
||
|
|
AArch64_UMINP_ZPmZ_S = 7377,
|
||
|
|
AArch64_UMINPv16i8 = 7378,
|
||
|
|
AArch64_UMINPv2i32 = 7379,
|
||
|
|
AArch64_UMINPv4i16 = 7380,
|
||
|
|
AArch64_UMINPv4i32 = 7381,
|
||
|
|
AArch64_UMINPv8i16 = 7382,
|
||
|
|
AArch64_UMINPv8i8 = 7383,
|
||
|
|
AArch64_UMINQV_VPZ_B = 7384,
|
||
|
|
AArch64_UMINQV_VPZ_D = 7385,
|
||
|
|
AArch64_UMINQV_VPZ_H = 7386,
|
||
|
|
AArch64_UMINQV_VPZ_S = 7387,
|
||
|
|
AArch64_UMINV_VPZ_B = 7388,
|
||
|
|
AArch64_UMINV_VPZ_D = 7389,
|
||
|
|
AArch64_UMINV_VPZ_H = 7390,
|
||
|
|
AArch64_UMINV_VPZ_S = 7391,
|
||
|
|
AArch64_UMINVv16i8v = 7392,
|
||
|
|
AArch64_UMINVv4i16v = 7393,
|
||
|
|
AArch64_UMINVv4i32v = 7394,
|
||
|
|
AArch64_UMINVv8i16v = 7395,
|
||
|
|
AArch64_UMINVv8i8v = 7396,
|
||
|
|
AArch64_UMINWri = 7397,
|
||
|
|
AArch64_UMINWrr = 7398,
|
||
|
|
AArch64_UMINXri = 7399,
|
||
|
|
AArch64_UMINXrr = 7400,
|
||
|
|
AArch64_UMIN_VG2_2Z2Z_B = 7401,
|
||
|
|
AArch64_UMIN_VG2_2Z2Z_D = 7402,
|
||
|
|
AArch64_UMIN_VG2_2Z2Z_H = 7403,
|
||
|
|
AArch64_UMIN_VG2_2Z2Z_S = 7404,
|
||
|
|
AArch64_UMIN_VG2_2ZZ_B = 7405,
|
||
|
|
AArch64_UMIN_VG2_2ZZ_D = 7406,
|
||
|
|
AArch64_UMIN_VG2_2ZZ_H = 7407,
|
||
|
|
AArch64_UMIN_VG2_2ZZ_S = 7408,
|
||
|
|
AArch64_UMIN_VG4_4Z4Z_B = 7409,
|
||
|
|
AArch64_UMIN_VG4_4Z4Z_D = 7410,
|
||
|
|
AArch64_UMIN_VG4_4Z4Z_H = 7411,
|
||
|
|
AArch64_UMIN_VG4_4Z4Z_S = 7412,
|
||
|
|
AArch64_UMIN_VG4_4ZZ_B = 7413,
|
||
|
|
AArch64_UMIN_VG4_4ZZ_D = 7414,
|
||
|
|
AArch64_UMIN_VG4_4ZZ_H = 7415,
|
||
|
|
AArch64_UMIN_VG4_4ZZ_S = 7416,
|
||
|
|
AArch64_UMIN_ZI_B = 7417,
|
||
|
|
AArch64_UMIN_ZI_D = 7418,
|
||
|
|
AArch64_UMIN_ZI_H = 7419,
|
||
|
|
AArch64_UMIN_ZI_S = 7420,
|
||
|
|
AArch64_UMIN_ZPmZ_B = 7421,
|
||
|
|
AArch64_UMIN_ZPmZ_D = 7422,
|
||
|
|
AArch64_UMIN_ZPmZ_H = 7423,
|
||
|
|
AArch64_UMIN_ZPmZ_S = 7424,
|
||
|
|
AArch64_UMINv16i8 = 7425,
|
||
|
|
AArch64_UMINv2i32 = 7426,
|
||
|
|
AArch64_UMINv4i16 = 7427,
|
||
|
|
AArch64_UMINv4i32 = 7428,
|
||
|
|
AArch64_UMINv8i16 = 7429,
|
||
|
|
AArch64_UMINv8i8 = 7430,
|
||
|
|
AArch64_UMLALB_ZZZI_D = 7431,
|
||
|
|
AArch64_UMLALB_ZZZI_S = 7432,
|
||
|
|
AArch64_UMLALB_ZZZ_D = 7433,
|
||
|
|
AArch64_UMLALB_ZZZ_H = 7434,
|
||
|
|
AArch64_UMLALB_ZZZ_S = 7435,
|
||
|
|
AArch64_UMLALL_MZZI_BtoS = 7436,
|
||
|
|
AArch64_UMLALL_MZZI_HtoD = 7437,
|
||
|
|
AArch64_UMLALL_MZZ_BtoS = 7438,
|
||
|
|
AArch64_UMLALL_MZZ_HtoD = 7439,
|
||
|
|
AArch64_UMLALL_VG2_M2Z2Z_BtoS = 7440,
|
||
|
|
AArch64_UMLALL_VG2_M2Z2Z_HtoD = 7441,
|
||
|
|
AArch64_UMLALL_VG2_M2ZZI_BtoS = 7442,
|
||
|
|
AArch64_UMLALL_VG2_M2ZZI_HtoD = 7443,
|
||
|
|
AArch64_UMLALL_VG2_M2ZZ_BtoS = 7444,
|
||
|
|
AArch64_UMLALL_VG2_M2ZZ_HtoD = 7445,
|
||
|
|
AArch64_UMLALL_VG4_M4Z4Z_BtoS = 7446,
|
||
|
|
AArch64_UMLALL_VG4_M4Z4Z_HtoD = 7447,
|
||
|
|
AArch64_UMLALL_VG4_M4ZZI_BtoS = 7448,
|
||
|
|
AArch64_UMLALL_VG4_M4ZZI_HtoD = 7449,
|
||
|
|
AArch64_UMLALL_VG4_M4ZZ_BtoS = 7450,
|
||
|
|
AArch64_UMLALL_VG4_M4ZZ_HtoD = 7451,
|
||
|
|
AArch64_UMLALT_ZZZI_D = 7452,
|
||
|
|
AArch64_UMLALT_ZZZI_S = 7453,
|
||
|
|
AArch64_UMLALT_ZZZ_D = 7454,
|
||
|
|
AArch64_UMLALT_ZZZ_H = 7455,
|
||
|
|
AArch64_UMLALT_ZZZ_S = 7456,
|
||
|
|
AArch64_UMLAL_MZZI_HtoS = 7457,
|
||
|
|
AArch64_UMLAL_MZZ_HtoS = 7458,
|
||
|
|
AArch64_UMLAL_VG2_M2Z2Z_HtoS = 7459,
|
||
|
|
AArch64_UMLAL_VG2_M2ZZI_S = 7460,
|
||
|
|
AArch64_UMLAL_VG2_M2ZZ_HtoS = 7461,
|
||
|
|
AArch64_UMLAL_VG4_M4Z4Z_HtoS = 7462,
|
||
|
|
AArch64_UMLAL_VG4_M4ZZI_HtoS = 7463,
|
||
|
|
AArch64_UMLAL_VG4_M4ZZ_HtoS = 7464,
|
||
|
|
AArch64_UMLALv16i8_v8i16 = 7465,
|
||
|
|
AArch64_UMLALv2i32_indexed = 7466,
|
||
|
|
AArch64_UMLALv2i32_v2i64 = 7467,
|
||
|
|
AArch64_UMLALv4i16_indexed = 7468,
|
||
|
|
AArch64_UMLALv4i16_v4i32 = 7469,
|
||
|
|
AArch64_UMLALv4i32_indexed = 7470,
|
||
|
|
AArch64_UMLALv4i32_v2i64 = 7471,
|
||
|
|
AArch64_UMLALv8i16_indexed = 7472,
|
||
|
|
AArch64_UMLALv8i16_v4i32 = 7473,
|
||
|
|
AArch64_UMLALv8i8_v8i16 = 7474,
|
||
|
|
AArch64_UMLSLB_ZZZI_D = 7475,
|
||
|
|
AArch64_UMLSLB_ZZZI_S = 7476,
|
||
|
|
AArch64_UMLSLB_ZZZ_D = 7477,
|
||
|
|
AArch64_UMLSLB_ZZZ_H = 7478,
|
||
|
|
AArch64_UMLSLB_ZZZ_S = 7479,
|
||
|
|
AArch64_UMLSLL_MZZI_BtoS = 7480,
|
||
|
|
AArch64_UMLSLL_MZZI_HtoD = 7481,
|
||
|
|
AArch64_UMLSLL_MZZ_BtoS = 7482,
|
||
|
|
AArch64_UMLSLL_MZZ_HtoD = 7483,
|
||
|
|
AArch64_UMLSLL_VG2_M2Z2Z_BtoS = 7484,
|
||
|
|
AArch64_UMLSLL_VG2_M2Z2Z_HtoD = 7485,
|
||
|
|
AArch64_UMLSLL_VG2_M2ZZI_BtoS = 7486,
|
||
|
|
AArch64_UMLSLL_VG2_M2ZZI_HtoD = 7487,
|
||
|
|
AArch64_UMLSLL_VG2_M2ZZ_BtoS = 7488,
|
||
|
|
AArch64_UMLSLL_VG2_M2ZZ_HtoD = 7489,
|
||
|
|
AArch64_UMLSLL_VG4_M4Z4Z_BtoS = 7490,
|
||
|
|
AArch64_UMLSLL_VG4_M4Z4Z_HtoD = 7491,
|
||
|
|
AArch64_UMLSLL_VG4_M4ZZI_BtoS = 7492,
|
||
|
|
AArch64_UMLSLL_VG4_M4ZZI_HtoD = 7493,
|
||
|
|
AArch64_UMLSLL_VG4_M4ZZ_BtoS = 7494,
|
||
|
|
AArch64_UMLSLL_VG4_M4ZZ_HtoD = 7495,
|
||
|
|
AArch64_UMLSLT_ZZZI_D = 7496,
|
||
|
|
AArch64_UMLSLT_ZZZI_S = 7497,
|
||
|
|
AArch64_UMLSLT_ZZZ_D = 7498,
|
||
|
|
AArch64_UMLSLT_ZZZ_H = 7499,
|
||
|
|
AArch64_UMLSLT_ZZZ_S = 7500,
|
||
|
|
AArch64_UMLSL_MZZI_HtoS = 7501,
|
||
|
|
AArch64_UMLSL_MZZ_HtoS = 7502,
|
||
|
|
AArch64_UMLSL_VG2_M2Z2Z_HtoS = 7503,
|
||
|
|
AArch64_UMLSL_VG2_M2ZZI_S = 7504,
|
||
|
|
AArch64_UMLSL_VG2_M2ZZ_HtoS = 7505,
|
||
|
|
AArch64_UMLSL_VG4_M4Z4Z_HtoS = 7506,
|
||
|
|
AArch64_UMLSL_VG4_M4ZZI_HtoS = 7507,
|
||
|
|
AArch64_UMLSL_VG4_M4ZZ_HtoS = 7508,
|
||
|
|
AArch64_UMLSLv16i8_v8i16 = 7509,
|
||
|
|
AArch64_UMLSLv2i32_indexed = 7510,
|
||
|
|
AArch64_UMLSLv2i32_v2i64 = 7511,
|
||
|
|
AArch64_UMLSLv4i16_indexed = 7512,
|
||
|
|
AArch64_UMLSLv4i16_v4i32 = 7513,
|
||
|
|
AArch64_UMLSLv4i32_indexed = 7514,
|
||
|
|
AArch64_UMLSLv4i32_v2i64 = 7515,
|
||
|
|
AArch64_UMLSLv8i16_indexed = 7516,
|
||
|
|
AArch64_UMLSLv8i16_v4i32 = 7517,
|
||
|
|
AArch64_UMLSLv8i8_v8i16 = 7518,
|
||
|
|
AArch64_UMMLA = 7519,
|
||
|
|
AArch64_UMMLA_ZZZ = 7520,
|
||
|
|
AArch64_UMOPA_MPPZZ_D = 7521,
|
||
|
|
AArch64_UMOPA_MPPZZ_HtoS = 7522,
|
||
|
|
AArch64_UMOPA_MPPZZ_S = 7523,
|
||
|
|
AArch64_UMOPS_MPPZZ_D = 7524,
|
||
|
|
AArch64_UMOPS_MPPZZ_HtoS = 7525,
|
||
|
|
AArch64_UMOPS_MPPZZ_S = 7526,
|
||
|
|
AArch64_UMOVvi16 = 7527,
|
||
|
|
AArch64_UMOVvi16_idx0 = 7528,
|
||
|
|
AArch64_UMOVvi32 = 7529,
|
||
|
|
AArch64_UMOVvi32_idx0 = 7530,
|
||
|
|
AArch64_UMOVvi64 = 7531,
|
||
|
|
AArch64_UMOVvi64_idx0 = 7532,
|
||
|
|
AArch64_UMOVvi8 = 7533,
|
||
|
|
AArch64_UMOVvi8_idx0 = 7534,
|
||
|
|
AArch64_UMSUBLrrr = 7535,
|
||
|
|
AArch64_UMULH_ZPmZ_B = 7536,
|
||
|
|
AArch64_UMULH_ZPmZ_D = 7537,
|
||
|
|
AArch64_UMULH_ZPmZ_H = 7538,
|
||
|
|
AArch64_UMULH_ZPmZ_S = 7539,
|
||
|
|
AArch64_UMULH_ZZZ_B = 7540,
|
||
|
|
AArch64_UMULH_ZZZ_D = 7541,
|
||
|
|
AArch64_UMULH_ZZZ_H = 7542,
|
||
|
|
AArch64_UMULH_ZZZ_S = 7543,
|
||
|
|
AArch64_UMULHrr = 7544,
|
||
|
|
AArch64_UMULLB_ZZZI_D = 7545,
|
||
|
|
AArch64_UMULLB_ZZZI_S = 7546,
|
||
|
|
AArch64_UMULLB_ZZZ_D = 7547,
|
||
|
|
AArch64_UMULLB_ZZZ_H = 7548,
|
||
|
|
AArch64_UMULLB_ZZZ_S = 7549,
|
||
|
|
AArch64_UMULLT_ZZZI_D = 7550,
|
||
|
|
AArch64_UMULLT_ZZZI_S = 7551,
|
||
|
|
AArch64_UMULLT_ZZZ_D = 7552,
|
||
|
|
AArch64_UMULLT_ZZZ_H = 7553,
|
||
|
|
AArch64_UMULLT_ZZZ_S = 7554,
|
||
|
|
AArch64_UMULLv16i8_v8i16 = 7555,
|
||
|
|
AArch64_UMULLv2i32_indexed = 7556,
|
||
|
|
AArch64_UMULLv2i32_v2i64 = 7557,
|
||
|
|
AArch64_UMULLv4i16_indexed = 7558,
|
||
|
|
AArch64_UMULLv4i16_v4i32 = 7559,
|
||
|
|
AArch64_UMULLv4i32_indexed = 7560,
|
||
|
|
AArch64_UMULLv4i32_v2i64 = 7561,
|
||
|
|
AArch64_UMULLv8i16_indexed = 7562,
|
||
|
|
AArch64_UMULLv8i16_v4i32 = 7563,
|
||
|
|
AArch64_UMULLv8i8_v8i16 = 7564,
|
||
|
|
AArch64_UQADD_ZI_B = 7565,
|
||
|
|
AArch64_UQADD_ZI_D = 7566,
|
||
|
|
AArch64_UQADD_ZI_H = 7567,
|
||
|
|
AArch64_UQADD_ZI_S = 7568,
|
||
|
|
AArch64_UQADD_ZPmZ_B = 7569,
|
||
|
|
AArch64_UQADD_ZPmZ_D = 7570,
|
||
|
|
AArch64_UQADD_ZPmZ_H = 7571,
|
||
|
|
AArch64_UQADD_ZPmZ_S = 7572,
|
||
|
|
AArch64_UQADD_ZZZ_B = 7573,
|
||
|
|
AArch64_UQADD_ZZZ_D = 7574,
|
||
|
|
AArch64_UQADD_ZZZ_H = 7575,
|
||
|
|
AArch64_UQADD_ZZZ_S = 7576,
|
||
|
|
AArch64_UQADDv16i8 = 7577,
|
||
|
|
AArch64_UQADDv1i16 = 7578,
|
||
|
|
AArch64_UQADDv1i32 = 7579,
|
||
|
|
AArch64_UQADDv1i64 = 7580,
|
||
|
|
AArch64_UQADDv1i8 = 7581,
|
||
|
|
AArch64_UQADDv2i32 = 7582,
|
||
|
|
AArch64_UQADDv2i64 = 7583,
|
||
|
|
AArch64_UQADDv4i16 = 7584,
|
||
|
|
AArch64_UQADDv4i32 = 7585,
|
||
|
|
AArch64_UQADDv8i16 = 7586,
|
||
|
|
AArch64_UQADDv8i8 = 7587,
|
||
|
|
AArch64_UQCVTN_Z2Z_StoH = 7588,
|
||
|
|
AArch64_UQCVTN_Z4Z_DtoH = 7589,
|
||
|
|
AArch64_UQCVTN_Z4Z_StoB = 7590,
|
||
|
|
AArch64_UQCVT_Z2Z_StoH = 7591,
|
||
|
|
AArch64_UQCVT_Z4Z_DtoH = 7592,
|
||
|
|
AArch64_UQCVT_Z4Z_StoB = 7593,
|
||
|
|
AArch64_UQDECB_WPiI = 7594,
|
||
|
|
AArch64_UQDECB_XPiI = 7595,
|
||
|
|
AArch64_UQDECD_WPiI = 7596,
|
||
|
|
AArch64_UQDECD_XPiI = 7597,
|
||
|
|
AArch64_UQDECD_ZPiI = 7598,
|
||
|
|
AArch64_UQDECH_WPiI = 7599,
|
||
|
|
AArch64_UQDECH_XPiI = 7600,
|
||
|
|
AArch64_UQDECH_ZPiI = 7601,
|
||
|
|
AArch64_UQDECP_WP_B = 7602,
|
||
|
|
AArch64_UQDECP_WP_D = 7603,
|
||
|
|
AArch64_UQDECP_WP_H = 7604,
|
||
|
|
AArch64_UQDECP_WP_S = 7605,
|
||
|
|
AArch64_UQDECP_XP_B = 7606,
|
||
|
|
AArch64_UQDECP_XP_D = 7607,
|
||
|
|
AArch64_UQDECP_XP_H = 7608,
|
||
|
|
AArch64_UQDECP_XP_S = 7609,
|
||
|
|
AArch64_UQDECP_ZP_D = 7610,
|
||
|
|
AArch64_UQDECP_ZP_H = 7611,
|
||
|
|
AArch64_UQDECP_ZP_S = 7612,
|
||
|
|
AArch64_UQDECW_WPiI = 7613,
|
||
|
|
AArch64_UQDECW_XPiI = 7614,
|
||
|
|
AArch64_UQDECW_ZPiI = 7615,
|
||
|
|
AArch64_UQINCB_WPiI = 7616,
|
||
|
|
AArch64_UQINCB_XPiI = 7617,
|
||
|
|
AArch64_UQINCD_WPiI = 7618,
|
||
|
|
AArch64_UQINCD_XPiI = 7619,
|
||
|
|
AArch64_UQINCD_ZPiI = 7620,
|
||
|
|
AArch64_UQINCH_WPiI = 7621,
|
||
|
|
AArch64_UQINCH_XPiI = 7622,
|
||
|
|
AArch64_UQINCH_ZPiI = 7623,
|
||
|
|
AArch64_UQINCP_WP_B = 7624,
|
||
|
|
AArch64_UQINCP_WP_D = 7625,
|
||
|
|
AArch64_UQINCP_WP_H = 7626,
|
||
|
|
AArch64_UQINCP_WP_S = 7627,
|
||
|
|
AArch64_UQINCP_XP_B = 7628,
|
||
|
|
AArch64_UQINCP_XP_D = 7629,
|
||
|
|
AArch64_UQINCP_XP_H = 7630,
|
||
|
|
AArch64_UQINCP_XP_S = 7631,
|
||
|
|
AArch64_UQINCP_ZP_D = 7632,
|
||
|
|
AArch64_UQINCP_ZP_H = 7633,
|
||
|
|
AArch64_UQINCP_ZP_S = 7634,
|
||
|
|
AArch64_UQINCW_WPiI = 7635,
|
||
|
|
AArch64_UQINCW_XPiI = 7636,
|
||
|
|
AArch64_UQINCW_ZPiI = 7637,
|
||
|
|
AArch64_UQRSHLR_ZPmZ_B = 7638,
|
||
|
|
AArch64_UQRSHLR_ZPmZ_D = 7639,
|
||
|
|
AArch64_UQRSHLR_ZPmZ_H = 7640,
|
||
|
|
AArch64_UQRSHLR_ZPmZ_S = 7641,
|
||
|
|
AArch64_UQRSHL_ZPmZ_B = 7642,
|
||
|
|
AArch64_UQRSHL_ZPmZ_D = 7643,
|
||
|
|
AArch64_UQRSHL_ZPmZ_H = 7644,
|
||
|
|
AArch64_UQRSHL_ZPmZ_S = 7645,
|
||
|
|
AArch64_UQRSHLv16i8 = 7646,
|
||
|
|
AArch64_UQRSHLv1i16 = 7647,
|
||
|
|
AArch64_UQRSHLv1i32 = 7648,
|
||
|
|
AArch64_UQRSHLv1i64 = 7649,
|
||
|
|
AArch64_UQRSHLv1i8 = 7650,
|
||
|
|
AArch64_UQRSHLv2i32 = 7651,
|
||
|
|
AArch64_UQRSHLv2i64 = 7652,
|
||
|
|
AArch64_UQRSHLv4i16 = 7653,
|
||
|
|
AArch64_UQRSHLv4i32 = 7654,
|
||
|
|
AArch64_UQRSHLv8i16 = 7655,
|
||
|
|
AArch64_UQRSHLv8i8 = 7656,
|
||
|
|
AArch64_UQRSHRNB_ZZI_B = 7657,
|
||
|
|
AArch64_UQRSHRNB_ZZI_H = 7658,
|
||
|
|
AArch64_UQRSHRNB_ZZI_S = 7659,
|
||
|
|
AArch64_UQRSHRNT_ZZI_B = 7660,
|
||
|
|
AArch64_UQRSHRNT_ZZI_H = 7661,
|
||
|
|
AArch64_UQRSHRNT_ZZI_S = 7662,
|
||
|
|
AArch64_UQRSHRN_VG4_Z4ZI_B = 7663,
|
||
|
|
AArch64_UQRSHRN_VG4_Z4ZI_H = 7664,
|
||
|
|
AArch64_UQRSHRN_Z2ZI_StoH = 7665,
|
||
|
|
AArch64_UQRSHRNb = 7666,
|
||
|
|
AArch64_UQRSHRNh = 7667,
|
||
|
|
AArch64_UQRSHRNs = 7668,
|
||
|
|
AArch64_UQRSHRNv16i8_shift = 7669,
|
||
|
|
AArch64_UQRSHRNv2i32_shift = 7670,
|
||
|
|
AArch64_UQRSHRNv4i16_shift = 7671,
|
||
|
|
AArch64_UQRSHRNv4i32_shift = 7672,
|
||
|
|
AArch64_UQRSHRNv8i16_shift = 7673,
|
||
|
|
AArch64_UQRSHRNv8i8_shift = 7674,
|
||
|
|
AArch64_UQRSHR_VG2_Z2ZI_H = 7675,
|
||
|
|
AArch64_UQRSHR_VG4_Z4ZI_B = 7676,
|
||
|
|
AArch64_UQRSHR_VG4_Z4ZI_H = 7677,
|
||
|
|
AArch64_UQSHLR_ZPmZ_B = 7678,
|
||
|
|
AArch64_UQSHLR_ZPmZ_D = 7679,
|
||
|
|
AArch64_UQSHLR_ZPmZ_H = 7680,
|
||
|
|
AArch64_UQSHLR_ZPmZ_S = 7681,
|
||
|
|
AArch64_UQSHL_ZPmI_B = 7682,
|
||
|
|
AArch64_UQSHL_ZPmI_D = 7683,
|
||
|
|
AArch64_UQSHL_ZPmI_H = 7684,
|
||
|
|
AArch64_UQSHL_ZPmI_S = 7685,
|
||
|
|
AArch64_UQSHL_ZPmZ_B = 7686,
|
||
|
|
AArch64_UQSHL_ZPmZ_D = 7687,
|
||
|
|
AArch64_UQSHL_ZPmZ_H = 7688,
|
||
|
|
AArch64_UQSHL_ZPmZ_S = 7689,
|
||
|
|
AArch64_UQSHLb = 7690,
|
||
|
|
AArch64_UQSHLd = 7691,
|
||
|
|
AArch64_UQSHLh = 7692,
|
||
|
|
AArch64_UQSHLs = 7693,
|
||
|
|
AArch64_UQSHLv16i8 = 7694,
|
||
|
|
AArch64_UQSHLv16i8_shift = 7695,
|
||
|
|
AArch64_UQSHLv1i16 = 7696,
|
||
|
|
AArch64_UQSHLv1i32 = 7697,
|
||
|
|
AArch64_UQSHLv1i64 = 7698,
|
||
|
|
AArch64_UQSHLv1i8 = 7699,
|
||
|
|
AArch64_UQSHLv2i32 = 7700,
|
||
|
|
AArch64_UQSHLv2i32_shift = 7701,
|
||
|
|
AArch64_UQSHLv2i64 = 7702,
|
||
|
|
AArch64_UQSHLv2i64_shift = 7703,
|
||
|
|
AArch64_UQSHLv4i16 = 7704,
|
||
|
|
AArch64_UQSHLv4i16_shift = 7705,
|
||
|
|
AArch64_UQSHLv4i32 = 7706,
|
||
|
|
AArch64_UQSHLv4i32_shift = 7707,
|
||
|
|
AArch64_UQSHLv8i16 = 7708,
|
||
|
|
AArch64_UQSHLv8i16_shift = 7709,
|
||
|
|
AArch64_UQSHLv8i8 = 7710,
|
||
|
|
AArch64_UQSHLv8i8_shift = 7711,
|
||
|
|
AArch64_UQSHRNB_ZZI_B = 7712,
|
||
|
|
AArch64_UQSHRNB_ZZI_H = 7713,
|
||
|
|
AArch64_UQSHRNB_ZZI_S = 7714,
|
||
|
|
AArch64_UQSHRNT_ZZI_B = 7715,
|
||
|
|
AArch64_UQSHRNT_ZZI_H = 7716,
|
||
|
|
AArch64_UQSHRNT_ZZI_S = 7717,
|
||
|
|
AArch64_UQSHRNb = 7718,
|
||
|
|
AArch64_UQSHRNh = 7719,
|
||
|
|
AArch64_UQSHRNs = 7720,
|
||
|
|
AArch64_UQSHRNv16i8_shift = 7721,
|
||
|
|
AArch64_UQSHRNv2i32_shift = 7722,
|
||
|
|
AArch64_UQSHRNv4i16_shift = 7723,
|
||
|
|
AArch64_UQSHRNv4i32_shift = 7724,
|
||
|
|
AArch64_UQSHRNv8i16_shift = 7725,
|
||
|
|
AArch64_UQSHRNv8i8_shift = 7726,
|
||
|
|
AArch64_UQSUBR_ZPmZ_B = 7727,
|
||
|
|
AArch64_UQSUBR_ZPmZ_D = 7728,
|
||
|
|
AArch64_UQSUBR_ZPmZ_H = 7729,
|
||
|
|
AArch64_UQSUBR_ZPmZ_S = 7730,
|
||
|
|
AArch64_UQSUB_ZI_B = 7731,
|
||
|
|
AArch64_UQSUB_ZI_D = 7732,
|
||
|
|
AArch64_UQSUB_ZI_H = 7733,
|
||
|
|
AArch64_UQSUB_ZI_S = 7734,
|
||
|
|
AArch64_UQSUB_ZPmZ_B = 7735,
|
||
|
|
AArch64_UQSUB_ZPmZ_D = 7736,
|
||
|
|
AArch64_UQSUB_ZPmZ_H = 7737,
|
||
|
|
AArch64_UQSUB_ZPmZ_S = 7738,
|
||
|
|
AArch64_UQSUB_ZZZ_B = 7739,
|
||
|
|
AArch64_UQSUB_ZZZ_D = 7740,
|
||
|
|
AArch64_UQSUB_ZZZ_H = 7741,
|
||
|
|
AArch64_UQSUB_ZZZ_S = 7742,
|
||
|
|
AArch64_UQSUBv16i8 = 7743,
|
||
|
|
AArch64_UQSUBv1i16 = 7744,
|
||
|
|
AArch64_UQSUBv1i32 = 7745,
|
||
|
|
AArch64_UQSUBv1i64 = 7746,
|
||
|
|
AArch64_UQSUBv1i8 = 7747,
|
||
|
|
AArch64_UQSUBv2i32 = 7748,
|
||
|
|
AArch64_UQSUBv2i64 = 7749,
|
||
|
|
AArch64_UQSUBv4i16 = 7750,
|
||
|
|
AArch64_UQSUBv4i32 = 7751,
|
||
|
|
AArch64_UQSUBv8i16 = 7752,
|
||
|
|
AArch64_UQSUBv8i8 = 7753,
|
||
|
|
AArch64_UQXTNB_ZZ_B = 7754,
|
||
|
|
AArch64_UQXTNB_ZZ_H = 7755,
|
||
|
|
AArch64_UQXTNB_ZZ_S = 7756,
|
||
|
|
AArch64_UQXTNT_ZZ_B = 7757,
|
||
|
|
AArch64_UQXTNT_ZZ_H = 7758,
|
||
|
|
AArch64_UQXTNT_ZZ_S = 7759,
|
||
|
|
AArch64_UQXTNv16i8 = 7760,
|
||
|
|
AArch64_UQXTNv1i16 = 7761,
|
||
|
|
AArch64_UQXTNv1i32 = 7762,
|
||
|
|
AArch64_UQXTNv1i8 = 7763,
|
||
|
|
AArch64_UQXTNv2i32 = 7764,
|
||
|
|
AArch64_UQXTNv4i16 = 7765,
|
||
|
|
AArch64_UQXTNv4i32 = 7766,
|
||
|
|
AArch64_UQXTNv8i16 = 7767,
|
||
|
|
AArch64_UQXTNv8i8 = 7768,
|
||
|
|
AArch64_URECPE_ZPmZ_S = 7769,
|
||
|
|
AArch64_URECPEv2i32 = 7770,
|
||
|
|
AArch64_URECPEv4i32 = 7771,
|
||
|
|
AArch64_URHADD_ZPmZ_B = 7772,
|
||
|
|
AArch64_URHADD_ZPmZ_D = 7773,
|
||
|
|
AArch64_URHADD_ZPmZ_H = 7774,
|
||
|
|
AArch64_URHADD_ZPmZ_S = 7775,
|
||
|
|
AArch64_URHADDv16i8 = 7776,
|
||
|
|
AArch64_URHADDv2i32 = 7777,
|
||
|
|
AArch64_URHADDv4i16 = 7778,
|
||
|
|
AArch64_URHADDv4i32 = 7779,
|
||
|
|
AArch64_URHADDv8i16 = 7780,
|
||
|
|
AArch64_URHADDv8i8 = 7781,
|
||
|
|
AArch64_URSHLR_ZPmZ_B = 7782,
|
||
|
|
AArch64_URSHLR_ZPmZ_D = 7783,
|
||
|
|
AArch64_URSHLR_ZPmZ_H = 7784,
|
||
|
|
AArch64_URSHLR_ZPmZ_S = 7785,
|
||
|
|
AArch64_URSHL_VG2_2Z2Z_B = 7786,
|
||
|
|
AArch64_URSHL_VG2_2Z2Z_D = 7787,
|
||
|
|
AArch64_URSHL_VG2_2Z2Z_H = 7788,
|
||
|
|
AArch64_URSHL_VG2_2Z2Z_S = 7789,
|
||
|
|
AArch64_URSHL_VG2_2ZZ_B = 7790,
|
||
|
|
AArch64_URSHL_VG2_2ZZ_D = 7791,
|
||
|
|
AArch64_URSHL_VG2_2ZZ_H = 7792,
|
||
|
|
AArch64_URSHL_VG2_2ZZ_S = 7793,
|
||
|
|
AArch64_URSHL_VG4_4Z4Z_B = 7794,
|
||
|
|
AArch64_URSHL_VG4_4Z4Z_D = 7795,
|
||
|
|
AArch64_URSHL_VG4_4Z4Z_H = 7796,
|
||
|
|
AArch64_URSHL_VG4_4Z4Z_S = 7797,
|
||
|
|
AArch64_URSHL_VG4_4ZZ_B = 7798,
|
||
|
|
AArch64_URSHL_VG4_4ZZ_D = 7799,
|
||
|
|
AArch64_URSHL_VG4_4ZZ_H = 7800,
|
||
|
|
AArch64_URSHL_VG4_4ZZ_S = 7801,
|
||
|
|
AArch64_URSHL_ZPmZ_B = 7802,
|
||
|
|
AArch64_URSHL_ZPmZ_D = 7803,
|
||
|
|
AArch64_URSHL_ZPmZ_H = 7804,
|
||
|
|
AArch64_URSHL_ZPmZ_S = 7805,
|
||
|
|
AArch64_URSHLv16i8 = 7806,
|
||
|
|
AArch64_URSHLv1i64 = 7807,
|
||
|
|
AArch64_URSHLv2i32 = 7808,
|
||
|
|
AArch64_URSHLv2i64 = 7809,
|
||
|
|
AArch64_URSHLv4i16 = 7810,
|
||
|
|
AArch64_URSHLv4i32 = 7811,
|
||
|
|
AArch64_URSHLv8i16 = 7812,
|
||
|
|
AArch64_URSHLv8i8 = 7813,
|
||
|
|
AArch64_URSHR_ZPmI_B = 7814,
|
||
|
|
AArch64_URSHR_ZPmI_D = 7815,
|
||
|
|
AArch64_URSHR_ZPmI_H = 7816,
|
||
|
|
AArch64_URSHR_ZPmI_S = 7817,
|
||
|
|
AArch64_URSHRd = 7818,
|
||
|
|
AArch64_URSHRv16i8_shift = 7819,
|
||
|
|
AArch64_URSHRv2i32_shift = 7820,
|
||
|
|
AArch64_URSHRv2i64_shift = 7821,
|
||
|
|
AArch64_URSHRv4i16_shift = 7822,
|
||
|
|
AArch64_URSHRv4i32_shift = 7823,
|
||
|
|
AArch64_URSHRv8i16_shift = 7824,
|
||
|
|
AArch64_URSHRv8i8_shift = 7825,
|
||
|
|
AArch64_URSQRTE_ZPmZ_S = 7826,
|
||
|
|
AArch64_URSQRTEv2i32 = 7827,
|
||
|
|
AArch64_URSQRTEv4i32 = 7828,
|
||
|
|
AArch64_URSRA_ZZI_B = 7829,
|
||
|
|
AArch64_URSRA_ZZI_D = 7830,
|
||
|
|
AArch64_URSRA_ZZI_H = 7831,
|
||
|
|
AArch64_URSRA_ZZI_S = 7832,
|
||
|
|
AArch64_URSRAd = 7833,
|
||
|
|
AArch64_URSRAv16i8_shift = 7834,
|
||
|
|
AArch64_URSRAv2i32_shift = 7835,
|
||
|
|
AArch64_URSRAv2i64_shift = 7836,
|
||
|
|
AArch64_URSRAv4i16_shift = 7837,
|
||
|
|
AArch64_URSRAv4i32_shift = 7838,
|
||
|
|
AArch64_URSRAv8i16_shift = 7839,
|
||
|
|
AArch64_URSRAv8i8_shift = 7840,
|
||
|
|
AArch64_USDOT_VG2_M2Z2Z_BToS = 7841,
|
||
|
|
AArch64_USDOT_VG2_M2ZZI_BToS = 7842,
|
||
|
|
AArch64_USDOT_VG2_M2ZZ_BToS = 7843,
|
||
|
|
AArch64_USDOT_VG4_M4Z4Z_BToS = 7844,
|
||
|
|
AArch64_USDOT_VG4_M4ZZI_BToS = 7845,
|
||
|
|
AArch64_USDOT_VG4_M4ZZ_BToS = 7846,
|
||
|
|
AArch64_USDOT_ZZZ = 7847,
|
||
|
|
AArch64_USDOT_ZZZI = 7848,
|
||
|
|
AArch64_USDOTlanev16i8 = 7849,
|
||
|
|
AArch64_USDOTlanev8i8 = 7850,
|
||
|
|
AArch64_USDOTv16i8 = 7851,
|
||
|
|
AArch64_USDOTv8i8 = 7852,
|
||
|
|
AArch64_USHLLB_ZZI_D = 7853,
|
||
|
|
AArch64_USHLLB_ZZI_H = 7854,
|
||
|
|
AArch64_USHLLB_ZZI_S = 7855,
|
||
|
|
AArch64_USHLLT_ZZI_D = 7856,
|
||
|
|
AArch64_USHLLT_ZZI_H = 7857,
|
||
|
|
AArch64_USHLLT_ZZI_S = 7858,
|
||
|
|
AArch64_USHLLv16i8_shift = 7859,
|
||
|
|
AArch64_USHLLv2i32_shift = 7860,
|
||
|
|
AArch64_USHLLv4i16_shift = 7861,
|
||
|
|
AArch64_USHLLv4i32_shift = 7862,
|
||
|
|
AArch64_USHLLv8i16_shift = 7863,
|
||
|
|
AArch64_USHLLv8i8_shift = 7864,
|
||
|
|
AArch64_USHLv16i8 = 7865,
|
||
|
|
AArch64_USHLv1i64 = 7866,
|
||
|
|
AArch64_USHLv2i32 = 7867,
|
||
|
|
AArch64_USHLv2i64 = 7868,
|
||
|
|
AArch64_USHLv4i16 = 7869,
|
||
|
|
AArch64_USHLv4i32 = 7870,
|
||
|
|
AArch64_USHLv8i16 = 7871,
|
||
|
|
AArch64_USHLv8i8 = 7872,
|
||
|
|
AArch64_USHRd = 7873,
|
||
|
|
AArch64_USHRv16i8_shift = 7874,
|
||
|
|
AArch64_USHRv2i32_shift = 7875,
|
||
|
|
AArch64_USHRv2i64_shift = 7876,
|
||
|
|
AArch64_USHRv4i16_shift = 7877,
|
||
|
|
AArch64_USHRv4i32_shift = 7878,
|
||
|
|
AArch64_USHRv8i16_shift = 7879,
|
||
|
|
AArch64_USHRv8i8_shift = 7880,
|
||
|
|
AArch64_USMLALL_MZZI_BtoS = 7881,
|
||
|
|
AArch64_USMLALL_MZZ_BtoS = 7882,
|
||
|
|
AArch64_USMLALL_VG2_M2Z2Z_BtoS = 7883,
|
||
|
|
AArch64_USMLALL_VG2_M2ZZI_BtoS = 7884,
|
||
|
|
AArch64_USMLALL_VG2_M2ZZ_BtoS = 7885,
|
||
|
|
AArch64_USMLALL_VG4_M4Z4Z_BtoS = 7886,
|
||
|
|
AArch64_USMLALL_VG4_M4ZZI_BtoS = 7887,
|
||
|
|
AArch64_USMLALL_VG4_M4ZZ_BtoS = 7888,
|
||
|
|
AArch64_USMMLA = 7889,
|
||
|
|
AArch64_USMMLA_ZZZ = 7890,
|
||
|
|
AArch64_USMOPA_MPPZZ_D = 7891,
|
||
|
|
AArch64_USMOPA_MPPZZ_S = 7892,
|
||
|
|
AArch64_USMOPS_MPPZZ_D = 7893,
|
||
|
|
AArch64_USMOPS_MPPZZ_S = 7894,
|
||
|
|
AArch64_USQADD_ZPmZ_B = 7895,
|
||
|
|
AArch64_USQADD_ZPmZ_D = 7896,
|
||
|
|
AArch64_USQADD_ZPmZ_H = 7897,
|
||
|
|
AArch64_USQADD_ZPmZ_S = 7898,
|
||
|
|
AArch64_USQADDv16i8 = 7899,
|
||
|
|
AArch64_USQADDv1i16 = 7900,
|
||
|
|
AArch64_USQADDv1i32 = 7901,
|
||
|
|
AArch64_USQADDv1i64 = 7902,
|
||
|
|
AArch64_USQADDv1i8 = 7903,
|
||
|
|
AArch64_USQADDv2i32 = 7904,
|
||
|
|
AArch64_USQADDv2i64 = 7905,
|
||
|
|
AArch64_USQADDv4i16 = 7906,
|
||
|
|
AArch64_USQADDv4i32 = 7907,
|
||
|
|
AArch64_USQADDv8i16 = 7908,
|
||
|
|
AArch64_USQADDv8i8 = 7909,
|
||
|
|
AArch64_USRA_ZZI_B = 7910,
|
||
|
|
AArch64_USRA_ZZI_D = 7911,
|
||
|
|
AArch64_USRA_ZZI_H = 7912,
|
||
|
|
AArch64_USRA_ZZI_S = 7913,
|
||
|
|
AArch64_USRAd = 7914,
|
||
|
|
AArch64_USRAv16i8_shift = 7915,
|
||
|
|
AArch64_USRAv2i32_shift = 7916,
|
||
|
|
AArch64_USRAv2i64_shift = 7917,
|
||
|
|
AArch64_USRAv4i16_shift = 7918,
|
||
|
|
AArch64_USRAv4i32_shift = 7919,
|
||
|
|
AArch64_USRAv8i16_shift = 7920,
|
||
|
|
AArch64_USRAv8i8_shift = 7921,
|
||
|
|
AArch64_USUBLB_ZZZ_D = 7922,
|
||
|
|
AArch64_USUBLB_ZZZ_H = 7923,
|
||
|
|
AArch64_USUBLB_ZZZ_S = 7924,
|
||
|
|
AArch64_USUBLT_ZZZ_D = 7925,
|
||
|
|
AArch64_USUBLT_ZZZ_H = 7926,
|
||
|
|
AArch64_USUBLT_ZZZ_S = 7927,
|
||
|
|
AArch64_USUBLv16i8_v8i16 = 7928,
|
||
|
|
AArch64_USUBLv2i32_v2i64 = 7929,
|
||
|
|
AArch64_USUBLv4i16_v4i32 = 7930,
|
||
|
|
AArch64_USUBLv4i32_v2i64 = 7931,
|
||
|
|
AArch64_USUBLv8i16_v4i32 = 7932,
|
||
|
|
AArch64_USUBLv8i8_v8i16 = 7933,
|
||
|
|
AArch64_USUBWB_ZZZ_D = 7934,
|
||
|
|
AArch64_USUBWB_ZZZ_H = 7935,
|
||
|
|
AArch64_USUBWB_ZZZ_S = 7936,
|
||
|
|
AArch64_USUBWT_ZZZ_D = 7937,
|
||
|
|
AArch64_USUBWT_ZZZ_H = 7938,
|
||
|
|
AArch64_USUBWT_ZZZ_S = 7939,
|
||
|
|
AArch64_USUBWv16i8_v8i16 = 7940,
|
||
|
|
AArch64_USUBWv2i32_v2i64 = 7941,
|
||
|
|
AArch64_USUBWv4i16_v4i32 = 7942,
|
||
|
|
AArch64_USUBWv4i32_v2i64 = 7943,
|
||
|
|
AArch64_USUBWv8i16_v4i32 = 7944,
|
||
|
|
AArch64_USUBWv8i8_v8i16 = 7945,
|
||
|
|
AArch64_USVDOT_VG4_M4ZZI_BToS = 7946,
|
||
|
|
AArch64_UUNPKHI_ZZ_D = 7947,
|
||
|
|
AArch64_UUNPKHI_ZZ_H = 7948,
|
||
|
|
AArch64_UUNPKHI_ZZ_S = 7949,
|
||
|
|
AArch64_UUNPKLO_ZZ_D = 7950,
|
||
|
|
AArch64_UUNPKLO_ZZ_H = 7951,
|
||
|
|
AArch64_UUNPKLO_ZZ_S = 7952,
|
||
|
|
AArch64_UUNPK_VG2_2ZZ_D = 7953,
|
||
|
|
AArch64_UUNPK_VG2_2ZZ_H = 7954,
|
||
|
|
AArch64_UUNPK_VG2_2ZZ_S = 7955,
|
||
|
|
AArch64_UUNPK_VG4_4Z2Z_D = 7956,
|
||
|
|
AArch64_UUNPK_VG4_4Z2Z_H = 7957,
|
||
|
|
AArch64_UUNPK_VG4_4Z2Z_S = 7958,
|
||
|
|
AArch64_UVDOT_VG2_M2ZZI_HtoS = 7959,
|
||
|
|
AArch64_UVDOT_VG4_M4ZZI_BtoS = 7960,
|
||
|
|
AArch64_UVDOT_VG4_M4ZZI_HtoD = 7961,
|
||
|
|
AArch64_UXTB_ZPmZ_D = 7962,
|
||
|
|
AArch64_UXTB_ZPmZ_H = 7963,
|
||
|
|
AArch64_UXTB_ZPmZ_S = 7964,
|
||
|
|
AArch64_UXTH_ZPmZ_D = 7965,
|
||
|
|
AArch64_UXTH_ZPmZ_S = 7966,
|
||
|
|
AArch64_UXTW_ZPmZ_D = 7967,
|
||
|
|
AArch64_UZP1_PPP_B = 7968,
|
||
|
|
AArch64_UZP1_PPP_D = 7969,
|
||
|
|
AArch64_UZP1_PPP_H = 7970,
|
||
|
|
AArch64_UZP1_PPP_S = 7971,
|
||
|
|
AArch64_UZP1_ZZZ_B = 7972,
|
||
|
|
AArch64_UZP1_ZZZ_D = 7973,
|
||
|
|
AArch64_UZP1_ZZZ_H = 7974,
|
||
|
|
AArch64_UZP1_ZZZ_Q = 7975,
|
||
|
|
AArch64_UZP1_ZZZ_S = 7976,
|
||
|
|
AArch64_UZP1v16i8 = 7977,
|
||
|
|
AArch64_UZP1v2i32 = 7978,
|
||
|
|
AArch64_UZP1v2i64 = 7979,
|
||
|
|
AArch64_UZP1v4i16 = 7980,
|
||
|
|
AArch64_UZP1v4i32 = 7981,
|
||
|
|
AArch64_UZP1v8i16 = 7982,
|
||
|
|
AArch64_UZP1v8i8 = 7983,
|
||
|
|
AArch64_UZP2_PPP_B = 7984,
|
||
|
|
AArch64_UZP2_PPP_D = 7985,
|
||
|
|
AArch64_UZP2_PPP_H = 7986,
|
||
|
|
AArch64_UZP2_PPP_S = 7987,
|
||
|
|
AArch64_UZP2_ZZZ_B = 7988,
|
||
|
|
AArch64_UZP2_ZZZ_D = 7989,
|
||
|
|
AArch64_UZP2_ZZZ_H = 7990,
|
||
|
|
AArch64_UZP2_ZZZ_Q = 7991,
|
||
|
|
AArch64_UZP2_ZZZ_S = 7992,
|
||
|
|
AArch64_UZP2v16i8 = 7993,
|
||
|
|
AArch64_UZP2v2i32 = 7994,
|
||
|
|
AArch64_UZP2v2i64 = 7995,
|
||
|
|
AArch64_UZP2v4i16 = 7996,
|
||
|
|
AArch64_UZP2v4i32 = 7997,
|
||
|
|
AArch64_UZP2v8i16 = 7998,
|
||
|
|
AArch64_UZP2v8i8 = 7999,
|
||
|
|
AArch64_UZPQ1_ZZZ_B = 8000,
|
||
|
|
AArch64_UZPQ1_ZZZ_D = 8001,
|
||
|
|
AArch64_UZPQ1_ZZZ_H = 8002,
|
||
|
|
AArch64_UZPQ1_ZZZ_S = 8003,
|
||
|
|
AArch64_UZPQ2_ZZZ_B = 8004,
|
||
|
|
AArch64_UZPQ2_ZZZ_D = 8005,
|
||
|
|
AArch64_UZPQ2_ZZZ_H = 8006,
|
||
|
|
AArch64_UZPQ2_ZZZ_S = 8007,
|
||
|
|
AArch64_UZP_VG2_2ZZZ_B = 8008,
|
||
|
|
AArch64_UZP_VG2_2ZZZ_D = 8009,
|
||
|
|
AArch64_UZP_VG2_2ZZZ_H = 8010,
|
||
|
|
AArch64_UZP_VG2_2ZZZ_Q = 8011,
|
||
|
|
AArch64_UZP_VG2_2ZZZ_S = 8012,
|
||
|
|
AArch64_UZP_VG4_4Z4Z_B = 8013,
|
||
|
|
AArch64_UZP_VG4_4Z4Z_D = 8014,
|
||
|
|
AArch64_UZP_VG4_4Z4Z_H = 8015,
|
||
|
|
AArch64_UZP_VG4_4Z4Z_Q = 8016,
|
||
|
|
AArch64_UZP_VG4_4Z4Z_S = 8017,
|
||
|
|
AArch64_WFET = 8018,
|
||
|
|
AArch64_WFIT = 8019,
|
||
|
|
AArch64_WHILEGE_2PXX_B = 8020,
|
||
|
|
AArch64_WHILEGE_2PXX_D = 8021,
|
||
|
|
AArch64_WHILEGE_2PXX_H = 8022,
|
||
|
|
AArch64_WHILEGE_2PXX_S = 8023,
|
||
|
|
AArch64_WHILEGE_CXX_B = 8024,
|
||
|
|
AArch64_WHILEGE_CXX_D = 8025,
|
||
|
|
AArch64_WHILEGE_CXX_H = 8026,
|
||
|
|
AArch64_WHILEGE_CXX_S = 8027,
|
||
|
|
AArch64_WHILEGE_PWW_B = 8028,
|
||
|
|
AArch64_WHILEGE_PWW_D = 8029,
|
||
|
|
AArch64_WHILEGE_PWW_H = 8030,
|
||
|
|
AArch64_WHILEGE_PWW_S = 8031,
|
||
|
|
AArch64_WHILEGE_PXX_B = 8032,
|
||
|
|
AArch64_WHILEGE_PXX_D = 8033,
|
||
|
|
AArch64_WHILEGE_PXX_H = 8034,
|
||
|
|
AArch64_WHILEGE_PXX_S = 8035,
|
||
|
|
AArch64_WHILEGT_2PXX_B = 8036,
|
||
|
|
AArch64_WHILEGT_2PXX_D = 8037,
|
||
|
|
AArch64_WHILEGT_2PXX_H = 8038,
|
||
|
|
AArch64_WHILEGT_2PXX_S = 8039,
|
||
|
|
AArch64_WHILEGT_CXX_B = 8040,
|
||
|
|
AArch64_WHILEGT_CXX_D = 8041,
|
||
|
|
AArch64_WHILEGT_CXX_H = 8042,
|
||
|
|
AArch64_WHILEGT_CXX_S = 8043,
|
||
|
|
AArch64_WHILEGT_PWW_B = 8044,
|
||
|
|
AArch64_WHILEGT_PWW_D = 8045,
|
||
|
|
AArch64_WHILEGT_PWW_H = 8046,
|
||
|
|
AArch64_WHILEGT_PWW_S = 8047,
|
||
|
|
AArch64_WHILEGT_PXX_B = 8048,
|
||
|
|
AArch64_WHILEGT_PXX_D = 8049,
|
||
|
|
AArch64_WHILEGT_PXX_H = 8050,
|
||
|
|
AArch64_WHILEGT_PXX_S = 8051,
|
||
|
|
AArch64_WHILEHI_2PXX_B = 8052,
|
||
|
|
AArch64_WHILEHI_2PXX_D = 8053,
|
||
|
|
AArch64_WHILEHI_2PXX_H = 8054,
|
||
|
|
AArch64_WHILEHI_2PXX_S = 8055,
|
||
|
|
AArch64_WHILEHI_CXX_B = 8056,
|
||
|
|
AArch64_WHILEHI_CXX_D = 8057,
|
||
|
|
AArch64_WHILEHI_CXX_H = 8058,
|
||
|
|
AArch64_WHILEHI_CXX_S = 8059,
|
||
|
|
AArch64_WHILEHI_PWW_B = 8060,
|
||
|
|
AArch64_WHILEHI_PWW_D = 8061,
|
||
|
|
AArch64_WHILEHI_PWW_H = 8062,
|
||
|
|
AArch64_WHILEHI_PWW_S = 8063,
|
||
|
|
AArch64_WHILEHI_PXX_B = 8064,
|
||
|
|
AArch64_WHILEHI_PXX_D = 8065,
|
||
|
|
AArch64_WHILEHI_PXX_H = 8066,
|
||
|
|
AArch64_WHILEHI_PXX_S = 8067,
|
||
|
|
AArch64_WHILEHS_2PXX_B = 8068,
|
||
|
|
AArch64_WHILEHS_2PXX_D = 8069,
|
||
|
|
AArch64_WHILEHS_2PXX_H = 8070,
|
||
|
|
AArch64_WHILEHS_2PXX_S = 8071,
|
||
|
|
AArch64_WHILEHS_CXX_B = 8072,
|
||
|
|
AArch64_WHILEHS_CXX_D = 8073,
|
||
|
|
AArch64_WHILEHS_CXX_H = 8074,
|
||
|
|
AArch64_WHILEHS_CXX_S = 8075,
|
||
|
|
AArch64_WHILEHS_PWW_B = 8076,
|
||
|
|
AArch64_WHILEHS_PWW_D = 8077,
|
||
|
|
AArch64_WHILEHS_PWW_H = 8078,
|
||
|
|
AArch64_WHILEHS_PWW_S = 8079,
|
||
|
|
AArch64_WHILEHS_PXX_B = 8080,
|
||
|
|
AArch64_WHILEHS_PXX_D = 8081,
|
||
|
|
AArch64_WHILEHS_PXX_H = 8082,
|
||
|
|
AArch64_WHILEHS_PXX_S = 8083,
|
||
|
|
AArch64_WHILELE_2PXX_B = 8084,
|
||
|
|
AArch64_WHILELE_2PXX_D = 8085,
|
||
|
|
AArch64_WHILELE_2PXX_H = 8086,
|
||
|
|
AArch64_WHILELE_2PXX_S = 8087,
|
||
|
|
AArch64_WHILELE_CXX_B = 8088,
|
||
|
|
AArch64_WHILELE_CXX_D = 8089,
|
||
|
|
AArch64_WHILELE_CXX_H = 8090,
|
||
|
|
AArch64_WHILELE_CXX_S = 8091,
|
||
|
|
AArch64_WHILELE_PWW_B = 8092,
|
||
|
|
AArch64_WHILELE_PWW_D = 8093,
|
||
|
|
AArch64_WHILELE_PWW_H = 8094,
|
||
|
|
AArch64_WHILELE_PWW_S = 8095,
|
||
|
|
AArch64_WHILELE_PXX_B = 8096,
|
||
|
|
AArch64_WHILELE_PXX_D = 8097,
|
||
|
|
AArch64_WHILELE_PXX_H = 8098,
|
||
|
|
AArch64_WHILELE_PXX_S = 8099,
|
||
|
|
AArch64_WHILELO_2PXX_B = 8100,
|
||
|
|
AArch64_WHILELO_2PXX_D = 8101,
|
||
|
|
AArch64_WHILELO_2PXX_H = 8102,
|
||
|
|
AArch64_WHILELO_2PXX_S = 8103,
|
||
|
|
AArch64_WHILELO_CXX_B = 8104,
|
||
|
|
AArch64_WHILELO_CXX_D = 8105,
|
||
|
|
AArch64_WHILELO_CXX_H = 8106,
|
||
|
|
AArch64_WHILELO_CXX_S = 8107,
|
||
|
|
AArch64_WHILELO_PWW_B = 8108,
|
||
|
|
AArch64_WHILELO_PWW_D = 8109,
|
||
|
|
AArch64_WHILELO_PWW_H = 8110,
|
||
|
|
AArch64_WHILELO_PWW_S = 8111,
|
||
|
|
AArch64_WHILELO_PXX_B = 8112,
|
||
|
|
AArch64_WHILELO_PXX_D = 8113,
|
||
|
|
AArch64_WHILELO_PXX_H = 8114,
|
||
|
|
AArch64_WHILELO_PXX_S = 8115,
|
||
|
|
AArch64_WHILELS_2PXX_B = 8116,
|
||
|
|
AArch64_WHILELS_2PXX_D = 8117,
|
||
|
|
AArch64_WHILELS_2PXX_H = 8118,
|
||
|
|
AArch64_WHILELS_2PXX_S = 8119,
|
||
|
|
AArch64_WHILELS_CXX_B = 8120,
|
||
|
|
AArch64_WHILELS_CXX_D = 8121,
|
||
|
|
AArch64_WHILELS_CXX_H = 8122,
|
||
|
|
AArch64_WHILELS_CXX_S = 8123,
|
||
|
|
AArch64_WHILELS_PWW_B = 8124,
|
||
|
|
AArch64_WHILELS_PWW_D = 8125,
|
||
|
|
AArch64_WHILELS_PWW_H = 8126,
|
||
|
|
AArch64_WHILELS_PWW_S = 8127,
|
||
|
|
AArch64_WHILELS_PXX_B = 8128,
|
||
|
|
AArch64_WHILELS_PXX_D = 8129,
|
||
|
|
AArch64_WHILELS_PXX_H = 8130,
|
||
|
|
AArch64_WHILELS_PXX_S = 8131,
|
||
|
|
AArch64_WHILELT_2PXX_B = 8132,
|
||
|
|
AArch64_WHILELT_2PXX_D = 8133,
|
||
|
|
AArch64_WHILELT_2PXX_H = 8134,
|
||
|
|
AArch64_WHILELT_2PXX_S = 8135,
|
||
|
|
AArch64_WHILELT_CXX_B = 8136,
|
||
|
|
AArch64_WHILELT_CXX_D = 8137,
|
||
|
|
AArch64_WHILELT_CXX_H = 8138,
|
||
|
|
AArch64_WHILELT_CXX_S = 8139,
|
||
|
|
AArch64_WHILELT_PWW_B = 8140,
|
||
|
|
AArch64_WHILELT_PWW_D = 8141,
|
||
|
|
AArch64_WHILELT_PWW_H = 8142,
|
||
|
|
AArch64_WHILELT_PWW_S = 8143,
|
||
|
|
AArch64_WHILELT_PXX_B = 8144,
|
||
|
|
AArch64_WHILELT_PXX_D = 8145,
|
||
|
|
AArch64_WHILELT_PXX_H = 8146,
|
||
|
|
AArch64_WHILELT_PXX_S = 8147,
|
||
|
|
AArch64_WHILERW_PXX_B = 8148,
|
||
|
|
AArch64_WHILERW_PXX_D = 8149,
|
||
|
|
AArch64_WHILERW_PXX_H = 8150,
|
||
|
|
AArch64_WHILERW_PXX_S = 8151,
|
||
|
|
AArch64_WHILEWR_PXX_B = 8152,
|
||
|
|
AArch64_WHILEWR_PXX_D = 8153,
|
||
|
|
AArch64_WHILEWR_PXX_H = 8154,
|
||
|
|
AArch64_WHILEWR_PXX_S = 8155,
|
||
|
|
AArch64_WRFFR = 8156,
|
||
|
|
AArch64_XAFLAG = 8157,
|
||
|
|
AArch64_XAR = 8158,
|
||
|
|
AArch64_XAR_ZZZI_B = 8159,
|
||
|
|
AArch64_XAR_ZZZI_D = 8160,
|
||
|
|
AArch64_XAR_ZZZI_H = 8161,
|
||
|
|
AArch64_XAR_ZZZI_S = 8162,
|
||
|
|
AArch64_XPACD = 8163,
|
||
|
|
AArch64_XPACI = 8164,
|
||
|
|
AArch64_XPACLRI = 8165,
|
||
|
|
AArch64_XTNv16i8 = 8166,
|
||
|
|
AArch64_XTNv2i32 = 8167,
|
||
|
|
AArch64_XTNv4i16 = 8168,
|
||
|
|
AArch64_XTNv4i32 = 8169,
|
||
|
|
AArch64_XTNv8i16 = 8170,
|
||
|
|
AArch64_XTNv8i8 = 8171,
|
||
|
|
AArch64_ZERO_M = 8172,
|
||
|
|
AArch64_ZERO_MXI_2Z = 8173,
|
||
|
|
AArch64_ZERO_MXI_4Z = 8174,
|
||
|
|
AArch64_ZERO_MXI_VG2_2Z = 8175,
|
||
|
|
AArch64_ZERO_MXI_VG2_4Z = 8176,
|
||
|
|
AArch64_ZERO_MXI_VG2_Z = 8177,
|
||
|
|
AArch64_ZERO_MXI_VG4_2Z = 8178,
|
||
|
|
AArch64_ZERO_MXI_VG4_4Z = 8179,
|
||
|
|
AArch64_ZERO_MXI_VG4_Z = 8180,
|
||
|
|
AArch64_ZERO_T = 8181,
|
||
|
|
AArch64_ZIP1_PPP_B = 8182,
|
||
|
|
AArch64_ZIP1_PPP_D = 8183,
|
||
|
|
AArch64_ZIP1_PPP_H = 8184,
|
||
|
|
AArch64_ZIP1_PPP_S = 8185,
|
||
|
|
AArch64_ZIP1_ZZZ_B = 8186,
|
||
|
|
AArch64_ZIP1_ZZZ_D = 8187,
|
||
|
|
AArch64_ZIP1_ZZZ_H = 8188,
|
||
|
|
AArch64_ZIP1_ZZZ_Q = 8189,
|
||
|
|
AArch64_ZIP1_ZZZ_S = 8190,
|
||
|
|
AArch64_ZIP1v16i8 = 8191,
|
||
|
|
AArch64_ZIP1v2i32 = 8192,
|
||
|
|
AArch64_ZIP1v2i64 = 8193,
|
||
|
|
AArch64_ZIP1v4i16 = 8194,
|
||
|
|
AArch64_ZIP1v4i32 = 8195,
|
||
|
|
AArch64_ZIP1v8i16 = 8196,
|
||
|
|
AArch64_ZIP1v8i8 = 8197,
|
||
|
|
AArch64_ZIP2_PPP_B = 8198,
|
||
|
|
AArch64_ZIP2_PPP_D = 8199,
|
||
|
|
AArch64_ZIP2_PPP_H = 8200,
|
||
|
|
AArch64_ZIP2_PPP_S = 8201,
|
||
|
|
AArch64_ZIP2_ZZZ_B = 8202,
|
||
|
|
AArch64_ZIP2_ZZZ_D = 8203,
|
||
|
|
AArch64_ZIP2_ZZZ_H = 8204,
|
||
|
|
AArch64_ZIP2_ZZZ_Q = 8205,
|
||
|
|
AArch64_ZIP2_ZZZ_S = 8206,
|
||
|
|
AArch64_ZIP2v16i8 = 8207,
|
||
|
|
AArch64_ZIP2v2i32 = 8208,
|
||
|
|
AArch64_ZIP2v2i64 = 8209,
|
||
|
|
AArch64_ZIP2v4i16 = 8210,
|
||
|
|
AArch64_ZIP2v4i32 = 8211,
|
||
|
|
AArch64_ZIP2v8i16 = 8212,
|
||
|
|
AArch64_ZIP2v8i8 = 8213,
|
||
|
|
AArch64_ZIPQ1_ZZZ_B = 8214,
|
||
|
|
AArch64_ZIPQ1_ZZZ_D = 8215,
|
||
|
|
AArch64_ZIPQ1_ZZZ_H = 8216,
|
||
|
|
AArch64_ZIPQ1_ZZZ_S = 8217,
|
||
|
|
AArch64_ZIPQ2_ZZZ_B = 8218,
|
||
|
|
AArch64_ZIPQ2_ZZZ_D = 8219,
|
||
|
|
AArch64_ZIPQ2_ZZZ_H = 8220,
|
||
|
|
AArch64_ZIPQ2_ZZZ_S = 8221,
|
||
|
|
AArch64_ZIP_VG2_2ZZZ_B = 8222,
|
||
|
|
AArch64_ZIP_VG2_2ZZZ_D = 8223,
|
||
|
|
AArch64_ZIP_VG2_2ZZZ_H = 8224,
|
||
|
|
AArch64_ZIP_VG2_2ZZZ_Q = 8225,
|
||
|
|
AArch64_ZIP_VG2_2ZZZ_S = 8226,
|
||
|
|
AArch64_ZIP_VG4_4Z4Z_B = 8227,
|
||
|
|
AArch64_ZIP_VG4_4Z4Z_D = 8228,
|
||
|
|
AArch64_ZIP_VG4_4Z4Z_H = 8229,
|
||
|
|
AArch64_ZIP_VG4_4Z4Z_Q = 8230,
|
||
|
|
AArch64_ZIP_VG4_4Z4Z_S = 8231,
|
||
|
|
INSTRUCTION_LIST_END = 8232
|
||
|
|
};
|
||
|
|
|
||
|
|
#endif // GET_INSTRINFO_ENUM
|
||
|
|
|
||
|
|
#if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
|
||
|
|
typedef struct AArch64InstrTable {
|
||
|
|
MCInstrDesc Insts[8232];
|
||
|
|
MCOperandInfo OperandInfo[2330];
|
||
|
|
MCPhysReg ImplicitOps[54];
|
||
|
|
} AArch64InstrTable;
|
||
|
|
|
||
|
|
#endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
|
||
|
|
|
||
|
|
#ifdef GET_INSTRINFO_MC_DESC
|
||
|
|
#undef GET_INSTRINFO_MC_DESC
|
||
|
|
|
||
|
|
static const unsigned AArch64ImpOpBase = sizeof(MCOperandInfo) / (sizeof(MCPhysReg));
|
||
|
|
|
||
|
|
static const AArch64InstrTable AArch64Descs = {
|
||
|
|
{
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #8231 = ZIP_VG4_4Z4Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #8230 = ZIP_VG4_4Z4Z_Q
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #8229 = ZIP_VG4_4Z4Z_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #8228 = ZIP_VG4_4Z4Z_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #8227 = ZIP_VG4_4Z4Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2310] }, // Inst #8226 = ZIP_VG2_2ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2310] }, // Inst #8225 = ZIP_VG2_2ZZZ_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2310] }, // Inst #8224 = ZIP_VG2_2ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2310] }, // Inst #8223 = ZIP_VG2_2ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2310] }, // Inst #8222 = ZIP_VG2_2ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8221 = ZIPQ2_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8220 = ZIPQ2_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8219 = ZIPQ2_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8218 = ZIPQ2_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8217 = ZIPQ1_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8216 = ZIPQ1_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8215 = ZIPQ1_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8214 = ZIPQ1_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #8213 = ZIP2v8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #8212 = ZIP2v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #8211 = ZIP2v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #8210 = ZIP2v4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #8209 = ZIP2v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #8208 = ZIP2v2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #8207 = ZIP2v16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8206 = ZIP2_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8205 = ZIP2_ZZZ_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8204 = ZIP2_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8203 = ZIP2_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8202 = ZIP2_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #8201 = ZIP2_PPP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #8200 = ZIP2_PPP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #8199 = ZIP2_PPP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #8198 = ZIP2_PPP_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #8197 = ZIP1v8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #8196 = ZIP1v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #8195 = ZIP1v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #8194 = ZIP1v4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #8193 = ZIP1v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #8192 = ZIP1v2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #8191 = ZIP1v16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8190 = ZIP1_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8189 = ZIP1_ZZZ_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8188 = ZIP1_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8187 = ZIP1_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8186 = ZIP1_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #8185 = ZIP1_PPP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #8184 = ZIP1_PPP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #8183 = ZIP1_PPP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #8182 = ZIP1_PPP_B
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[425] }, // Inst #8181 = ZERO_T
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2326] }, // Inst #8180 = ZERO_MXI_VG4_Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2326] }, // Inst #8179 = ZERO_MXI_VG4_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2326] }, // Inst #8178 = ZERO_MXI_VG4_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2326] }, // Inst #8177 = ZERO_MXI_VG2_Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2326] }, // Inst #8176 = ZERO_MXI_VG2_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2326] }, // Inst #8175 = ZERO_MXI_VG2_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2326] }, // Inst #8174 = ZERO_MXI_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2326] }, // Inst #8173 = ZERO_MXI_2Z
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #8172 = ZERO_M
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #8171 = XTNv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #8170 = XTNv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #8169 = XTNv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #8168 = XTNv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #8167 = XTNv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #8166 = XTNv16i8
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #8165 = XPACLRI
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[624] }, // Inst #8164 = XPACI
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[624] }, // Inst #8163 = XPACD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #8162 = XAR_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #8161 = XAR_ZZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #8160 = XAR_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #8159 = XAR_ZZZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #8158 = XAR
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #8157 = XAFLAG
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[391] }, // Inst #8156 = WRFFR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8155 = WHILEWR_PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8154 = WHILEWR_PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8153 = WHILEWR_PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8152 = WHILEWR_PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8151 = WHILERW_PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8150 = WHILERW_PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8149 = WHILERW_PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8148 = WHILERW_PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8147 = WHILELT_PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8146 = WHILELT_PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8145 = WHILELT_PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8144 = WHILELT_PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8143 = WHILELT_PWW_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8142 = WHILELT_PWW_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8141 = WHILELT_PWW_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8140 = WHILELT_PWW_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8139 = WHILELT_CXX_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8138 = WHILELT_CXX_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8137 = WHILELT_CXX_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8136 = WHILELT_CXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8135 = WHILELT_2PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8134 = WHILELT_2PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8133 = WHILELT_2PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8132 = WHILELT_2PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8131 = WHILELS_PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8130 = WHILELS_PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8129 = WHILELS_PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8128 = WHILELS_PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8127 = WHILELS_PWW_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8126 = WHILELS_PWW_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8125 = WHILELS_PWW_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8124 = WHILELS_PWW_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8123 = WHILELS_CXX_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8122 = WHILELS_CXX_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8121 = WHILELS_CXX_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8120 = WHILELS_CXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8119 = WHILELS_2PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8118 = WHILELS_2PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8117 = WHILELS_2PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8116 = WHILELS_2PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8115 = WHILELO_PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8114 = WHILELO_PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8113 = WHILELO_PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8112 = WHILELO_PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8111 = WHILELO_PWW_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8110 = WHILELO_PWW_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8109 = WHILELO_PWW_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8108 = WHILELO_PWW_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8107 = WHILELO_CXX_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8106 = WHILELO_CXX_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8105 = WHILELO_CXX_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8104 = WHILELO_CXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8103 = WHILELO_2PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8102 = WHILELO_2PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8101 = WHILELO_2PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8100 = WHILELO_2PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8099 = WHILELE_PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8098 = WHILELE_PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8097 = WHILELE_PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8096 = WHILELE_PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8095 = WHILELE_PWW_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8094 = WHILELE_PWW_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8093 = WHILELE_PWW_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8092 = WHILELE_PWW_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8091 = WHILELE_CXX_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8090 = WHILELE_CXX_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8089 = WHILELE_CXX_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8088 = WHILELE_CXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8087 = WHILELE_2PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8086 = WHILELE_2PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8085 = WHILELE_2PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8084 = WHILELE_2PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8083 = WHILEHS_PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8082 = WHILEHS_PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8081 = WHILEHS_PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8080 = WHILEHS_PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8079 = WHILEHS_PWW_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8078 = WHILEHS_PWW_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8077 = WHILEHS_PWW_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8076 = WHILEHS_PWW_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8075 = WHILEHS_CXX_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8074 = WHILEHS_CXX_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8073 = WHILEHS_CXX_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8072 = WHILEHS_CXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8071 = WHILEHS_2PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8070 = WHILEHS_2PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8069 = WHILEHS_2PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8068 = WHILEHS_2PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8067 = WHILEHI_PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8066 = WHILEHI_PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8065 = WHILEHI_PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8064 = WHILEHI_PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8063 = WHILEHI_PWW_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8062 = WHILEHI_PWW_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8061 = WHILEHI_PWW_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8060 = WHILEHI_PWW_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8059 = WHILEHI_CXX_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8058 = WHILEHI_CXX_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8057 = WHILEHI_CXX_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8056 = WHILEHI_CXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8055 = WHILEHI_2PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8054 = WHILEHI_2PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8053 = WHILEHI_2PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8052 = WHILEHI_2PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8051 = WHILEGT_PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8050 = WHILEGT_PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8049 = WHILEGT_PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8048 = WHILEGT_PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8047 = WHILEGT_PWW_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8046 = WHILEGT_PWW_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8045 = WHILEGT_PWW_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8044 = WHILEGT_PWW_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8043 = WHILEGT_CXX_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8042 = WHILEGT_CXX_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8041 = WHILEGT_CXX_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8040 = WHILEGT_CXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8039 = WHILEGT_2PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8038 = WHILEGT_2PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8037 = WHILEGT_2PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8036 = WHILEGT_2PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8035 = WHILEGE_PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8034 = WHILEGE_PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8033 = WHILEGE_PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2323] }, // Inst #8032 = WHILEGE_PXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8031 = WHILEGE_PWW_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8030 = WHILEGE_PWW_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8029 = WHILEGE_PWW_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2320] }, // Inst #8028 = WHILEGE_PWW_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8027 = WHILEGE_CXX_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8026 = WHILEGE_CXX_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8025 = WHILEGE_CXX_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2316] }, // Inst #8024 = WHILEGE_CXX_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8023 = WHILEGE_2PXX_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8022 = WHILEGE_2PXX_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8021 = WHILEGE_2PXX_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2313] }, // Inst #8020 = WHILEGE_2PXX_B
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #8019 = WFIT
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #8018 = WFET
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #8017 = UZP_VG4_4Z4Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #8016 = UZP_VG4_4Z4Z_Q
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #8015 = UZP_VG4_4Z4Z_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #8014 = UZP_VG4_4Z4Z_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #8013 = UZP_VG4_4Z4Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2310] }, // Inst #8012 = UZP_VG2_2ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2310] }, // Inst #8011 = UZP_VG2_2ZZZ_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2310] }, // Inst #8010 = UZP_VG2_2ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2310] }, // Inst #8009 = UZP_VG2_2ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2310] }, // Inst #8008 = UZP_VG2_2ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8007 = UZPQ2_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8006 = UZPQ2_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8005 = UZPQ2_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8004 = UZPQ2_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8003 = UZPQ1_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8002 = UZPQ1_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8001 = UZPQ1_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #8000 = UZPQ1_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7999 = UZP2v8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7998 = UZP2v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7997 = UZP2v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7996 = UZP2v4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7995 = UZP2v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7994 = UZP2v2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7993 = UZP2v16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7992 = UZP2_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7991 = UZP2_ZZZ_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7990 = UZP2_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7989 = UZP2_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7988 = UZP2_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7987 = UZP2_PPP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7986 = UZP2_PPP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7985 = UZP2_PPP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7984 = UZP2_PPP_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7983 = UZP1v8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7982 = UZP1v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7981 = UZP1v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7980 = UZP1v4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7979 = UZP1v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7978 = UZP1v2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7977 = UZP1v16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7976 = UZP1_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7975 = UZP1_ZZZ_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7974 = UZP1_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7973 = UZP1_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7972 = UZP1_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7971 = UZP1_PPP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7970 = UZP1_PPP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7969 = UZP1_PPP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7968 = UZP1_PPP_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7967 = UXTW_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7966 = UXTH_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7965 = UXTH_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7964 = UXTB_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7963 = UXTB_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7962 = UXTB_ZPmZ_D
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7961 = UVDOT_VG4_M4ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7960 = UVDOT_VG4_M4ZZI_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7959 = UVDOT_VG2_M2ZZI_HtoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2223] }, // Inst #7958 = UUNPK_VG4_4Z2Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2223] }, // Inst #7957 = UUNPK_VG4_4Z2Z_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2223] }, // Inst #7956 = UUNPK_VG4_4Z2Z_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #7955 = UUNPK_VG2_2ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #7954 = UUNPK_VG2_2ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #7953 = UUNPK_VG2_2ZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #7952 = UUNPKLO_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #7951 = UUNPKLO_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #7950 = UUNPKLO_ZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #7949 = UUNPKHI_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #7948 = UUNPKHI_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #7947 = UUNPKHI_ZZ_D
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7946 = USVDOT_VG4_M4ZZI_BToS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #7945 = USUBWv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7944 = USUBWv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7943 = USUBWv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #7942 = USUBWv4i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #7941 = USUBWv2i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7940 = USUBWv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7939 = USUBWT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7938 = USUBWT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7937 = USUBWT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7936 = USUBWB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7935 = USUBWB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7934 = USUBWB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7933 = USUBLv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7932 = USUBLv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7931 = USUBLv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7930 = USUBLv4i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7929 = USUBLv2i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7928 = USUBLv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7927 = USUBLT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7926 = USUBLT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7925 = USUBLT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7924 = USUBLB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7923 = USUBLB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7922 = USUBLB_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #7921 = USRAv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7920 = USRAv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7919 = USRAv4i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #7918 = USRAv4i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7917 = USRAv2i64_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #7916 = USRAv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7915 = USRAv16i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #7914 = USRAd
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7913 = USRA_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7912 = USRA_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7911 = USRA_ZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7910 = USRA_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #7909 = USQADDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #7908 = USQADDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #7907 = USQADDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #7906 = USQADDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #7905 = USQADDv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #7904 = USQADDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2231] }, // Inst #7903 = USQADDv1i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #7902 = USQADDv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2228] }, // Inst #7901 = USQADDv1i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2225] }, // Inst #7900 = USQADDv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #7899 = USQADDv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7898 = USQADD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7897 = USQADD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7896 = USQADD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7895 = USQADD_ZPmZ_B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #7894 = USMOPS_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1150] }, // Inst #7893 = USMOPS_MPPZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #7892 = USMOPA_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1150] }, // Inst #7891 = USMOPA_MPPZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7890 = USMMLA_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7889 = USMMLA
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7888 = USMLALL_VG4_M4ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7887 = USMLALL_VG4_M4ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7886 = USMLALL_VG4_M4Z4Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7885 = USMLALL_VG2_M2ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7884 = USMLALL_VG2_M2ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7883 = USMLALL_VG2_M2Z2Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #7882 = USMLALL_MZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #7881 = USMLALL_MZZI_BtoS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7880 = USHRv8i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7879 = USHRv8i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7878 = USHRv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7877 = USHRv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7876 = USHRv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7875 = USHRv2i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7874 = USHRv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7873 = USHRd
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7872 = USHLv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7871 = USHLv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7870 = USHLv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7869 = USHLv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7868 = USHLv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7867 = USHLv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7866 = USHLv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7865 = USHLv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2164] }, // Inst #7864 = USHLLv8i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7863 = USHLLv8i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7862 = USHLLv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2164] }, // Inst #7861 = USHLLv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2164] }, // Inst #7860 = USHLLv2i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7859 = USHLLv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7858 = USHLLT_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7857 = USHLLT_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7856 = USHLLT_ZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7855 = USHLLB_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7854 = USHLLB_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7853 = USHLLB_ZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #7852 = USDOTv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7851 = USDOTv16i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #7850 = USDOTlanev8i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #7849 = USDOTlanev16i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #7848 = USDOT_ZZZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7847 = USDOT_ZZZ
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7846 = USDOT_VG4_M4ZZ_BToS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7845 = USDOT_VG4_M4ZZI_BToS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7844 = USDOT_VG4_M4Z4Z_BToS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7843 = USDOT_VG2_M2ZZ_BToS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7842 = USDOT_VG2_M2ZZI_BToS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7841 = USDOT_VG2_M2Z2Z_BToS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #7840 = URSRAv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7839 = URSRAv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7838 = URSRAv4i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #7837 = URSRAv4i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7836 = URSRAv2i64_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #7835 = URSRAv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7834 = URSRAv16i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #7833 = URSRAd
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7832 = URSRA_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7831 = URSRA_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7830 = URSRA_ZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7829 = URSRA_ZZI_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #7828 = URSQRTEv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #7827 = URSQRTEv2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7826 = URSQRTE_ZPmZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7825 = URSHRv8i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7824 = URSHRv8i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7823 = URSHRv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7822 = URSHRv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7821 = URSHRv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7820 = URSHRv2i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7819 = URSHRv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7818 = URSHRd
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #7817 = URSHR_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #7816 = URSHR_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #7815 = URSHR_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #7814 = URSHR_ZPmI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7813 = URSHLv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7812 = URSHLv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7811 = URSHLv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7810 = URSHLv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7809 = URSHLv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7808 = URSHLv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7807 = URSHLv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7806 = URSHLv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7805 = URSHL_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7804 = URSHL_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7803 = URSHL_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7802 = URSHL_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7801 = URSHL_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7800 = URSHL_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7799 = URSHL_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7798 = URSHL_VG4_4ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7797 = URSHL_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7796 = URSHL_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7795 = URSHL_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7794 = URSHL_VG4_4Z4Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7793 = URSHL_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7792 = URSHL_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7791 = URSHL_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7790 = URSHL_VG2_2ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7789 = URSHL_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7788 = URSHL_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7787 = URSHL_VG2_2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7786 = URSHL_VG2_2Z2Z_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7785 = URSHLR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7784 = URSHLR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7783 = URSHLR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7782 = URSHLR_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7781 = URHADDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7780 = URHADDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7779 = URHADDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7778 = URHADDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7777 = URHADDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7776 = URHADDv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7775 = URHADD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7774 = URHADD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7773 = URHADD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7772 = URHADD_ZPmZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #7771 = URECPEv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #7770 = URECPEv2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7769 = URECPE_ZPmZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #7768 = UQXTNv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #7767 = UQXTNv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #7766 = UQXTNv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #7765 = UQXTNv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #7764 = UQXTNv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2162] }, // Inst #7763 = UQXTNv1i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #7762 = UQXTNv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[653] }, // Inst #7761 = UQXTNv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #7760 = UQXTNv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #7759 = UQXTNT_ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #7758 = UQXTNT_ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #7757 = UQXTNT_ZZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #7756 = UQXTNB_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #7755 = UQXTNB_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #7754 = UQXTNB_ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7753 = UQSUBv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7752 = UQSUBv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7751 = UQSUBv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7750 = UQSUBv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7749 = UQSUBv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7748 = UQSUBv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2101] }, // Inst #7747 = UQSUBv1i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7746 = UQSUBv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #7745 = UQSUBv1i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #7744 = UQSUBv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7743 = UQSUBv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7742 = UQSUB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7741 = UQSUB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7740 = UQSUB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7739 = UQSUB_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7738 = UQSUB_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7737 = UQSUB_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7736 = UQSUB_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7735 = UQSUB_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7734 = UQSUB_ZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7733 = UQSUB_ZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7732 = UQSUB_ZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7731 = UQSUB_ZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7730 = UQSUBR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7729 = UQSUBR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7728 = UQSUBR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7727 = UQSUBR_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #7726 = UQSHRNv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7725 = UQSHRNv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7724 = UQSHRNv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #7723 = UQSHRNv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #7722 = UQSHRNv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7721 = UQSHRNv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2156] }, // Inst #7720 = UQSHRNs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2153] }, // Inst #7719 = UQSHRNh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2150] }, // Inst #7718 = UQSHRNb
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7717 = UQSHRNT_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7716 = UQSHRNT_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7715 = UQSHRNT_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7714 = UQSHRNB_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7713 = UQSHRNB_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7712 = UQSHRNB_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7711 = UQSHLv8i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7710 = UQSHLv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7709 = UQSHLv8i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7708 = UQSHLv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7707 = UQSHLv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7706 = UQSHLv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7705 = UQSHLv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7704 = UQSHLv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7703 = UQSHLv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7702 = UQSHLv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7701 = UQSHLv2i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7700 = UQSHLv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2101] }, // Inst #7699 = UQSHLv1i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7698 = UQSHLv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #7697 = UQSHLv1i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #7696 = UQSHLv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7695 = UQSHLv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7694 = UQSHLv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1112] }, // Inst #7693 = UQSHLs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1109] }, // Inst #7692 = UQSHLh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7691 = UQSHLd
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2159] }, // Inst #7690 = UQSHLb
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7689 = UQSHL_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7688 = UQSHL_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7687 = UQSHL_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7686 = UQSHL_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #7685 = UQSHL_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #7684 = UQSHL_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #7683 = UQSHL_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #7682 = UQSHL_ZPmI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7681 = UQSHLR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7680 = UQSHLR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7679 = UQSHLR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7678 = UQSHLR_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #7677 = UQRSHR_VG4_Z4ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #7676 = UQRSHR_VG4_Z4ZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2147] }, // Inst #7675 = UQRSHR_VG2_Z2ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #7674 = UQRSHRNv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7673 = UQRSHRNv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7672 = UQRSHRNv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #7671 = UQRSHRNv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #7670 = UQRSHRNv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #7669 = UQRSHRNv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2156] }, // Inst #7668 = UQRSHRNs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2153] }, // Inst #7667 = UQRSHRNh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2150] }, // Inst #7666 = UQRSHRNb
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2147] }, // Inst #7665 = UQRSHRN_Z2ZI_StoH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #7664 = UQRSHRN_VG4_Z4ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #7663 = UQRSHRN_VG4_Z4ZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7662 = UQRSHRNT_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7661 = UQRSHRNT_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #7660 = UQRSHRNT_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7659 = UQRSHRNB_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7658 = UQRSHRNB_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #7657 = UQRSHRNB_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7656 = UQRSHLv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7655 = UQRSHLv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7654 = UQRSHLv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7653 = UQRSHLv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7652 = UQRSHLv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7651 = UQRSHLv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2101] }, // Inst #7650 = UQRSHLv1i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7649 = UQRSHLv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #7648 = UQRSHLv1i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #7647 = UQRSHLv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7646 = UQRSHLv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7645 = UQRSHL_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7644 = UQRSHL_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7643 = UQRSHL_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7642 = UQRSHL_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7641 = UQRSHLR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7640 = UQRSHLR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7639 = UQRSHLR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7638 = UQRSHLR_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7637 = UQINCW_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #7636 = UQINCW_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1894] }, // Inst #7635 = UQINCW_WPiI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #7634 = UQINCP_ZP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #7633 = UQINCP_ZP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #7632 = UQINCP_ZP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #7631 = UQINCP_XP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #7630 = UQINCP_XP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #7629 = UQINCP_XP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #7628 = UQINCP_XP_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2307] }, // Inst #7627 = UQINCP_WP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2307] }, // Inst #7626 = UQINCP_WP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2307] }, // Inst #7625 = UQINCP_WP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2307] }, // Inst #7624 = UQINCP_WP_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7623 = UQINCH_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #7622 = UQINCH_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1894] }, // Inst #7621 = UQINCH_WPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7620 = UQINCD_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #7619 = UQINCD_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1894] }, // Inst #7618 = UQINCD_WPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #7617 = UQINCB_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1894] }, // Inst #7616 = UQINCB_WPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7615 = UQDECW_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #7614 = UQDECW_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1894] }, // Inst #7613 = UQDECW_WPiI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #7612 = UQDECP_ZP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #7611 = UQDECP_ZP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #7610 = UQDECP_ZP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #7609 = UQDECP_XP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #7608 = UQDECP_XP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #7607 = UQDECP_XP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #7606 = UQDECP_XP_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2307] }, // Inst #7605 = UQDECP_WP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2307] }, // Inst #7604 = UQDECP_WP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2307] }, // Inst #7603 = UQDECP_WP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2307] }, // Inst #7602 = UQDECP_WP_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7601 = UQDECH_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #7600 = UQDECH_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1894] }, // Inst #7599 = UQDECH_WPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7598 = UQDECD_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #7597 = UQDECD_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1894] }, // Inst #7596 = UQDECD_WPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #7595 = UQDECB_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1894] }, // Inst #7594 = UQDECB_WPiI
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #7593 = UQCVT_Z4Z_StoB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #7592 = UQCVT_Z4Z_DtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #7591 = UQCVT_Z2Z_StoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #7590 = UQCVTN_Z4Z_StoB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #7589 = UQCVTN_Z4Z_DtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #7588 = UQCVTN_Z2Z_StoH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7587 = UQADDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7586 = UQADDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7585 = UQADDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7584 = UQADDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7583 = UQADDv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7582 = UQADDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2101] }, // Inst #7581 = UQADDv1i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7580 = UQADDv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #7579 = UQADDv1i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #7578 = UQADDv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7577 = UQADDv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7576 = UQADD_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7575 = UQADD_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7574 = UQADD_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7573 = UQADD_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7572 = UQADD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7571 = UQADD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7570 = UQADD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7569 = UQADD_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7568 = UQADD_ZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7567 = UQADD_ZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7566 = UQADD_ZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #7565 = UQADD_ZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7564 = UMULLv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7563 = UMULLv8i16_v4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1194] }, // Inst #7562 = UMULLv8i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7561 = UMULLv4i32_v2i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #7560 = UMULLv4i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7559 = UMULLv4i16_v4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2092] }, // Inst #7558 = UMULLv4i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7557 = UMULLv2i32_v2i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2088] }, // Inst #7556 = UMULLv2i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7555 = UMULLv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7554 = UMULLT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7553 = UMULLT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7552 = UMULLT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #7551 = UMULLT_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1198] }, // Inst #7550 = UMULLT_ZZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7549 = UMULLB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7548 = UMULLB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7547 = UMULLB_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #7546 = UMULLB_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1198] }, // Inst #7545 = UMULLB_ZZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #7544 = UMULHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7543 = UMULH_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7542 = UMULH_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7541 = UMULH_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7540 = UMULH_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7539 = UMULH_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7538 = UMULH_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7537 = UMULH_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7536 = UMULH_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2059] }, // Inst #7535 = UMSUBLrrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2082] }, // Inst #7534 = UMOVvi8_idx0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2079] }, // Inst #7533 = UMOVvi8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2085] }, // Inst #7532 = UMOVvi64_idx0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1156] }, // Inst #7531 = UMOVvi64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2082] }, // Inst #7530 = UMOVvi32_idx0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2079] }, // Inst #7529 = UMOVvi32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2082] }, // Inst #7528 = UMOVvi16_idx0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2079] }, // Inst #7527 = UMOVvi16
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #7526 = UMOPS_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #7525 = UMOPS_MPPZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1150] }, // Inst #7524 = UMOPS_MPPZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #7523 = UMOPA_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #7522 = UMOPA_MPPZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1150] }, // Inst #7521 = UMOPA_MPPZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7520 = UMMLA_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7519 = UMMLA
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #7518 = UMLSLv8i8_v8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7517 = UMLSLv8i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #7516 = UMLSLv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7515 = UMLSLv4i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #7514 = UMLSLv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #7513 = UMLSLv4i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2074] }, // Inst #7512 = UMLSLv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #7511 = UMLSLv2i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2069] }, // Inst #7510 = UMLSLv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7509 = UMLSLv16i8_v8i16
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7508 = UMLSL_VG4_M4ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7507 = UMLSL_VG4_M4ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7506 = UMLSL_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7505 = UMLSL_VG2_M2ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7504 = UMLSL_VG2_M2ZZI_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7503 = UMLSL_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #7502 = UMLSL_MZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #7501 = UMLSL_MZZI_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7500 = UMLSLT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7499 = UMLSLT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7498 = UMLSLT_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #7497 = UMLSLT_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #7496 = UMLSLT_ZZZI_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7495 = UMLSLL_VG4_M4ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7494 = UMLSLL_VG4_M4ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7493 = UMLSLL_VG4_M4ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7492 = UMLSLL_VG4_M4ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7491 = UMLSLL_VG4_M4Z4Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7490 = UMLSLL_VG4_M4Z4Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7489 = UMLSLL_VG2_M2ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7488 = UMLSLL_VG2_M2ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7487 = UMLSLL_VG2_M2ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7486 = UMLSLL_VG2_M2ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7485 = UMLSLL_VG2_M2Z2Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7484 = UMLSLL_VG2_M2Z2Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #7483 = UMLSLL_MZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #7482 = UMLSLL_MZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #7481 = UMLSLL_MZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #7480 = UMLSLL_MZZI_BtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7479 = UMLSLB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7478 = UMLSLB_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7477 = UMLSLB_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #7476 = UMLSLB_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #7475 = UMLSLB_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #7474 = UMLALv8i8_v8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7473 = UMLALv8i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #7472 = UMLALv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7471 = UMLALv4i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #7470 = UMLALv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #7469 = UMLALv4i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2074] }, // Inst #7468 = UMLALv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #7467 = UMLALv2i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2069] }, // Inst #7466 = UMLALv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7465 = UMLALv16i8_v8i16
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7464 = UMLAL_VG4_M4ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7463 = UMLAL_VG4_M4ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7462 = UMLAL_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7461 = UMLAL_VG2_M2ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7460 = UMLAL_VG2_M2ZZI_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7459 = UMLAL_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #7458 = UMLAL_MZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #7457 = UMLAL_MZZI_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7456 = UMLALT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7455 = UMLALT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7454 = UMLALT_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #7453 = UMLALT_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #7452 = UMLALT_ZZZI_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7451 = UMLALL_VG4_M4ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7450 = UMLALL_VG4_M4ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7449 = UMLALL_VG4_M4ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7448 = UMLALL_VG4_M4ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7447 = UMLALL_VG4_M4Z4Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7446 = UMLALL_VG4_M4Z4Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7445 = UMLALL_VG2_M2ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7444 = UMLALL_VG2_M2ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7443 = UMLALL_VG2_M2ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7442 = UMLALL_VG2_M2ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7441 = UMLALL_VG2_M2Z2Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7440 = UMLALL_VG2_M2Z2Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #7439 = UMLALL_MZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #7438 = UMLALL_MZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #7437 = UMLALL_MZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #7436 = UMLALL_MZZI_BtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7435 = UMLALB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7434 = UMLALB_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7433 = UMLALB_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #7432 = UMLALB_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #7431 = UMLALB_ZZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7430 = UMINv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7429 = UMINv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7428 = UMINv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7427 = UMINv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7426 = UMINv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7425 = UMINv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7424 = UMIN_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7423 = UMIN_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7422 = UMIN_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7421 = UMIN_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #7420 = UMIN_ZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #7419 = UMIN_ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #7418 = UMIN_ZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #7417 = UMIN_ZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7416 = UMIN_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7415 = UMIN_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7414 = UMIN_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7413 = UMIN_VG4_4ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7412 = UMIN_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7411 = UMIN_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7410 = UMIN_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7409 = UMIN_VG4_4Z4Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7408 = UMIN_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7407 = UMIN_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7406 = UMIN_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7405 = UMIN_VG2_2ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7404 = UMIN_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7403 = UMIN_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7402 = UMIN_VG2_2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7401 = UMIN_VG2_2Z2Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #7400 = UMINXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2066] }, // Inst #7399 = UMINXri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #7398 = UMINWrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2063] }, // Inst #7397 = UMINWri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[520] }, // Inst #7396 = UMINVv8i8v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #7395 = UMINVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #7394 = UMINVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #7393 = UMINVv4i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[512] }, // Inst #7392 = UMINVv16i8v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7391 = UMINV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7390 = UMINV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7389 = UMINV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7388 = UMINV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #7387 = UMINQV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #7386 = UMINQV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #7385 = UMINQV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #7384 = UMINQV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7383 = UMINPv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7382 = UMINPv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7381 = UMINPv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7380 = UMINPv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7379 = UMINPv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7378 = UMINPv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7377 = UMINP_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7376 = UMINP_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7375 = UMINP_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7374 = UMINP_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7373 = UMAXv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7372 = UMAXv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7371 = UMAXv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7370 = UMAXv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7369 = UMAXv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7368 = UMAXv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7367 = UMAX_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7366 = UMAX_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7365 = UMAX_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7364 = UMAX_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #7363 = UMAX_ZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #7362 = UMAX_ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #7361 = UMAX_ZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #7360 = UMAX_ZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7359 = UMAX_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7358 = UMAX_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7357 = UMAX_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #7356 = UMAX_VG4_4ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7355 = UMAX_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7354 = UMAX_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7353 = UMAX_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #7352 = UMAX_VG4_4Z4Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7351 = UMAX_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7350 = UMAX_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7349 = UMAX_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #7348 = UMAX_VG2_2ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7347 = UMAX_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7346 = UMAX_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7345 = UMAX_VG2_2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #7344 = UMAX_VG2_2Z2Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #7343 = UMAXXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2066] }, // Inst #7342 = UMAXXri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #7341 = UMAXWrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2063] }, // Inst #7340 = UMAXWri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[520] }, // Inst #7339 = UMAXVv8i8v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #7338 = UMAXVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #7337 = UMAXVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #7336 = UMAXVv4i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[512] }, // Inst #7335 = UMAXVv16i8v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7334 = UMAXV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7333 = UMAXV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7332 = UMAXV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7331 = UMAXV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #7330 = UMAXQV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #7329 = UMAXQV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #7328 = UMAXQV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #7327 = UMAXQV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7326 = UMAXPv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7325 = UMAXPv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7324 = UMAXPv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7323 = UMAXPv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7322 = UMAXPv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7321 = UMAXPv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7320 = UMAXP_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7319 = UMAXP_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7318 = UMAXP_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7317 = UMAXP_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2059] }, // Inst #7316 = UMADDLrrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7315 = UHSUBv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7314 = UHSUBv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7313 = UHSUBv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7312 = UHSUBv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7311 = UHSUBv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7310 = UHSUBv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7309 = UHSUB_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7308 = UHSUB_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7307 = UHSUB_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7306 = UHSUB_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7305 = UHSUBR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7304 = UHSUBR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7303 = UHSUBR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7302 = UHSUBR_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7301 = UHADDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7300 = UHADDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7299 = UHADDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7298 = UHADDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7297 = UHADDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7296 = UHADDv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7295 = UHADD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7294 = UHADD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7293 = UHADD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7292 = UHADD_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #7291 = UDOTv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7290 = UDOTv16i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #7289 = UDOTlanev8i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #7288 = UDOTlanev16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7287 = UDOT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7286 = UDOT_ZZZ_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7285 = UDOT_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #7284 = UDOT_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #7283 = UDOT_ZZZI_HtoS
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #7282 = UDOT_ZZZI_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7281 = UDOT_VG4_M4ZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7280 = UDOT_VG4_M4ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #7279 = UDOT_VG4_M4ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7278 = UDOT_VG4_M4ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7277 = UDOT_VG4_M4ZZI_HToS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7276 = UDOT_VG4_M4ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7275 = UDOT_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7274 = UDOT_VG4_M4Z4Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #7273 = UDOT_VG4_M4Z4Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7272 = UDOT_VG2_M2ZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7271 = UDOT_VG2_M2ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #7270 = UDOT_VG2_M2ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7269 = UDOT_VG2_M2ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7268 = UDOT_VG2_M2ZZI_HToS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7267 = UDOT_VG2_M2ZZI_BToS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7266 = UDOT_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7265 = UDOT_VG2_M2Z2Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #7264 = UDOT_VG2_M2Z2Z_BtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7263 = UDIV_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7262 = UDIV_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #7261 = UDIVXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #7260 = UDIVWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7259 = UDIVR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7258 = UDIVR_ZPmZ_D
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #7257 = UDF
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7256 = UCVTFv8i16_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #7255 = UCVTFv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7254 = UCVTFv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7253 = UCVTFv4i16_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #7252 = UCVTFv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #7251 = UCVTFv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #7250 = UCVTFv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7249 = UCVTFv2i32_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #7248 = UCVTFv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #7247 = UCVTFv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #7246 = UCVTFv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #7245 = UCVTFv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #7244 = UCVTFv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1112] }, // Inst #7243 = UCVTFs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1109] }, // Inst #7242 = UCVTFh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #7241 = UCVTFd
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7240 = UCVTF_ZPmZ_StoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7239 = UCVTF_ZPmZ_StoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7238 = UCVTF_ZPmZ_StoD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7237 = UCVTF_ZPmZ_HtoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7236 = UCVTF_ZPmZ_DtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7235 = UCVTF_ZPmZ_DtoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7234 = UCVTF_ZPmZ_DtoD
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #7233 = UCVTF_4Z4Z_StoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1102] }, // Inst #7232 = UCVTF_2Z2Z_StoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2036] }, // Inst #7231 = UCVTFUXSri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1174] }, // Inst #7230 = UCVTFUXHri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1172] }, // Inst #7229 = UCVTFUXDri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1167] }, // Inst #7228 = UCVTFUWSri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1165] }, // Inst #7227 = UCVTFUWHri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[936] }, // Inst #7226 = UCVTFUWDri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2033] }, // Inst #7225 = UCVTFSXSri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2030] }, // Inst #7224 = UCVTFSXHri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2027] }, // Inst #7223 = UCVTFSXDri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2024] }, // Inst #7222 = UCVTFSWSri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2021] }, // Inst #7221 = UCVTFSWHri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2018] }, // Inst #7220 = UCVTFSWDri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7219 = UCLAMP_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7218 = UCLAMP_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7217 = UCLAMP_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7216 = UCLAMP_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #7215 = UCLAMP_VG4_4Z4Z_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #7214 = UCLAMP_VG4_4Z4Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #7213 = UCLAMP_VG4_4Z4Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #7212 = UCLAMP_VG4_4Z4Z_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #7211 = UCLAMP_VG2_2Z2Z_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #7210 = UCLAMP_VG2_2Z2Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #7209 = UCLAMP_VG2_2Z2Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #7208 = UCLAMP_VG2_2Z2Z_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2014] }, // Inst #7207 = UBFMXri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2010] }, // Inst #7206 = UBFMWri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #7205 = UADDWv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7204 = UADDWv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7203 = UADDWv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #7202 = UADDWv4i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #7201 = UADDWv2i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7200 = UADDWv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7199 = UADDWT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7198 = UADDWT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7197 = UADDWT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7196 = UADDWB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7195 = UADDWB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7194 = UADDWB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7193 = UADDV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7192 = UADDV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7191 = UADDV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #7190 = UADDV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7189 = UADDLv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7188 = UADDLv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7187 = UADDLv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7186 = UADDLv4i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7185 = UADDLv2i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7184 = UADDLv16i8_v8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #7183 = UADDLVv8i8v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #7182 = UADDLVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #7181 = UADDLVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #7180 = UADDLVv4i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #7179 = UADDLVv16i8v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7178 = UADDLT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7177 = UADDLT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7176 = UADDLT_ZZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #7175 = UADDLPv8i8_v4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #7174 = UADDLPv8i16_v4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #7173 = UADDLPv4i32_v2i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #7172 = UADDLPv4i16_v2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #7171 = UADDLPv2i32_v1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #7170 = UADDLPv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7169 = UADDLB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7168 = UADDLB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7167 = UADDLB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #7166 = UADALPv8i8_v4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #7165 = UADALPv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #7164 = UADALPv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #7163 = UADALPv4i16_v2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #7162 = UADALPv2i32_v1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #7161 = UADALPv16i8_v8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7160 = UADALP_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7159 = UADALP_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7158 = UADALP_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7157 = UABDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7156 = UABDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7155 = UABDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7154 = UABDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7153 = UABDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7152 = UABDv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7151 = UABD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7150 = UABD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7149 = UABD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #7148 = UABD_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7147 = UABDLv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7146 = UABDLv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7145 = UABDLv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7144 = UABDLv4i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #7143 = UABDLv2i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7142 = UABDLv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7141 = UABDLT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7140 = UABDLT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7139 = UABDLT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7138 = UABDLB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7137 = UABDLB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7136 = UABDLB_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #7135 = UABAv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7134 = UABAv8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7133 = UABAv4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #7132 = UABAv4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #7131 = UABAv2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7130 = UABAv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7129 = UABA_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7128 = UABA_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7127 = UABA_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7126 = UABA_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #7125 = UABALv8i8_v8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7124 = UABALv8i16_v4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7123 = UABALv4i32_v2i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #7122 = UABALv4i16_v4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #7121 = UABALv2i32_v2i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7120 = UABALv16i8_v8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7119 = UABALT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7118 = UABALT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7117 = UABALT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7116 = UABALB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7115 = UABALB_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7114 = UABALB_ZZZ_D
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #7113 = TTEST
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #7112 = TSTART
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #7111 = TSB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7110 = TRN2v8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7109 = TRN2v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7108 = TRN2v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7107 = TRN2v4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7106 = TRN2v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7105 = TRN2v2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7104 = TRN2v16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7103 = TRN2_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7102 = TRN2_ZZZ_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7101 = TRN2_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7100 = TRN2_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7099 = TRN2_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7098 = TRN2_PPP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7097 = TRN2_PPP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7096 = TRN2_PPP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7095 = TRN2_PPP_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7094 = TRN1v8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7093 = TRN1v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7092 = TRN1v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7091 = TRN1v4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7090 = TRN1v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #7089 = TRN1v2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7088 = TRN1v16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7087 = TRN1_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7086 = TRN1_ZZZ_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7085 = TRN1_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7084 = TRN1_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7083 = TRN1_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7082 = TRN1_PPP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7081 = TRN1_PPP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7080 = TRN1_PPP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #7079 = TRN1_PPP_B
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #7078 = TRCIT
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #7077 = TCOMMIT
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #7076 = TCANCEL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2276] }, // Inst #7075 = TBZX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2273] }, // Inst #7074 = TBZW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2303] }, // Inst #7073 = TBXv8i8Two
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2299] }, // Inst #7072 = TBXv8i8Three
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2295] }, // Inst #7071 = TBXv8i8One
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2291] }, // Inst #7070 = TBXv8i8Four
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2287] }, // Inst #7069 = TBXv16i8Two
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2283] }, // Inst #7068 = TBXv16i8Three
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #7067 = TBXv16i8One
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2279] }, // Inst #7066 = TBXv16i8Four
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7065 = TBX_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7064 = TBX_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7063 = TBX_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7062 = TBX_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7061 = TBXQ_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7060 = TBXQ_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7059 = TBXQ_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #7058 = TBXQ_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2276] }, // Inst #7057 = TBNZX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2273] }, // Inst #7056 = TBNZW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2270] }, // Inst #7055 = TBLv8i8Two
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2267] }, // Inst #7054 = TBLv8i8Three
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2264] }, // Inst #7053 = TBLv8i8One
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2261] }, // Inst #7052 = TBLv8i8Four
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2258] }, // Inst #7051 = TBLv16i8Two
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2255] }, // Inst #7050 = TBLv16i8Three
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #7049 = TBLv16i8One
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2252] }, // Inst #7048 = TBLv16i8Four
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7047 = TBL_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7046 = TBL_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7045 = TBL_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7044 = TBL_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2249] }, // Inst #7043 = TBL_ZZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2249] }, // Inst #7042 = TBL_ZZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2249] }, // Inst #7041 = TBL_ZZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2249] }, // Inst #7040 = TBL_ZZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7039 = TBLQ_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7038 = TBLQ_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7037 = TBLQ_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #7036 = TBLQ_ZZZ_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2244] }, // Inst #7035 = SYSxt
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2244] }, // Inst #7034 = SYSPxt_XZR
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2239] }, // Inst #7033 = SYSPxt
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2234] }, // Inst #7032 = SYSLxt
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7031 = SXTW_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7030 = SXTH_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7029 = SXTH_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7028 = SXTB_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7027 = SXTB_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #7026 = SXTB_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #7025 = SWPX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7024 = SWPW
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #7023 = SWPPL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #7022 = SWPPAL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #7021 = SWPPA
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #7020 = SWPP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #7019 = SWPLX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7018 = SWPLW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7017 = SWPLH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7016 = SWPLB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7015 = SWPH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7014 = SWPB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #7013 = SWPAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7012 = SWPAW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #7011 = SWPALX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7010 = SWPALW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7009 = SWPALH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7008 = SWPALB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7007 = SWPAH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #7006 = SWPAB
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7005 = SVDOT_VG4_M4ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7004 = SVDOT_VG4_M4ZZI_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #7003 = SVDOT_VG2_M2ZZI_HtoS
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #7002 = SVC
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #7001 = SUVDOT_VG4_M4ZZI_BToS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #7000 = SUQADDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #6999 = SUQADDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #6998 = SUQADDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #6997 = SUQADDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #6996 = SUQADDv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #6995 = SUQADDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2231] }, // Inst #6994 = SUQADDv1i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #6993 = SUQADDv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2228] }, // Inst #6992 = SUQADDv1i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2225] }, // Inst #6991 = SUQADDv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #6990 = SUQADDv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6989 = SUQADD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6988 = SUQADD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6987 = SUQADD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6986 = SUQADD_ZPmZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2223] }, // Inst #6985 = SUNPK_VG4_4Z2Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2223] }, // Inst #6984 = SUNPK_VG4_4Z2Z_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2223] }, // Inst #6983 = SUNPK_VG4_4Z2Z_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #6982 = SUNPK_VG2_2ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #6981 = SUNPK_VG2_2ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #6980 = SUNPK_VG2_2ZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6979 = SUNPKLO_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6978 = SUNPKLO_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6977 = SUNPKLO_ZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6976 = SUNPKHI_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6975 = SUNPKHI_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6974 = SUNPKHI_ZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #6973 = SUMOPS_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1150] }, // Inst #6972 = SUMOPS_MPPZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #6971 = SUMOPA_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1150] }, // Inst #6970 = SUMOPA_MPPZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #6969 = SUMLALL_VG4_M4ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #6968 = SUMLALL_VG4_M4ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #6967 = SUMLALL_VG2_M2ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #6966 = SUMLALL_VG2_M2ZZI_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #6965 = SUMLALL_MZZI_BtoS
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #6964 = SUDOTlanev8i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #6963 = SUDOTlanev16i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #6962 = SUDOT_ZZZI
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #6961 = SUDOT_VG4_M4ZZ_BToS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #6960 = SUDOT_VG4_M4ZZI_BToS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #6959 = SUDOT_VG2_M2ZZ_BToS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #6958 = SUDOT_VG2_M2ZZI_BToS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6957 = SUBv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6956 = SUBv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6955 = SUBv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6954 = SUBv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6953 = SUBv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6952 = SUBv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6951 = SUBv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6950 = SUBv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6949 = SUB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6948 = SUB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6947 = SUB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6946 = SUB_ZZZ_CPA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6945 = SUB_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6944 = SUB_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6943 = SUB_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6942 = SUB_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6941 = SUB_ZPmZ_CPA
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6940 = SUB_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6939 = SUB_ZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6938 = SUB_ZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6937 = SUB_ZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6936 = SUB_ZI_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #6935 = SUB_VG4_M4Z_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #6934 = SUB_VG4_M4Z_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #6933 = SUB_VG4_M4ZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #6932 = SUB_VG4_M4ZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #6931 = SUB_VG4_M4Z4Z_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #6930 = SUB_VG4_M4Z4Z_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #6929 = SUB_VG2_M2Z_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #6928 = SUB_VG2_M2Z_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #6927 = SUB_VG2_M2ZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #6926 = SUB_VG2_M2ZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #6925 = SUB_VG2_M2Z2Z_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #6924 = SUB_VG2_M2Z2Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[465] }, // Inst #6923 = SUBXrx64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[534] }, // Inst #6922 = SUBXrx
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #6921 = SUBXrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[530] }, // Inst #6920 = SUBXri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[526] }, // Inst #6919 = SUBWrx
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #6918 = SUBWrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[522] }, // Inst #6917 = SUBWri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[508] }, // Inst #6916 = SUBSXrx64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[504] }, // Inst #6915 = SUBSXrx
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #6914 = SUBSXrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[496] }, // Inst #6913 = SUBSXri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[492] }, // Inst #6912 = SUBSWrx
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #6911 = SUBSWrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[484] }, // Inst #6910 = SUBSWri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6909 = SUBR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6908 = SUBR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6907 = SUBR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6906 = SUBR_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6905 = SUBR_ZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6904 = SUBR_ZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6903 = SUBR_ZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6902 = SUBR_ZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[465] }, // Inst #6901 = SUBPT_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2220] }, // Inst #6900 = SUBPS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2220] }, // Inst #6899 = SUBP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #6898 = SUBHNv8i16_v8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #6897 = SUBHNv8i16_v16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #6896 = SUBHNv4i32_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #6895 = SUBHNv4i32_v4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #6894 = SUBHNv2i64_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #6893 = SUBHNv2i64_v2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6892 = SUBHNT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6891 = SUBHNT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6890 = SUBHNT_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6889 = SUBHNB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6888 = SUBHNB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6887 = SUBHNB_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[438] }, // Inst #6886 = SUBG
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[462] }, // Inst #6885 = STZGi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2175] }, // Inst #6884 = STZGPreIndex
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2175] }, // Inst #6883 = STZGPostIndex
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #6882 = STZGM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[462] }, // Inst #6881 = STZ2Gi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2175] }, // Inst #6880 = STZ2GPreIndex
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2175] }, // Inst #6879 = STZ2GPostIndex
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2217] }, // Inst #6878 = STXRX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2214] }, // Inst #6877 = STXRW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2214] }, // Inst #6876 = STXRH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2214] }, // Inst #6875 = STXRB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2210] }, // Inst #6874 = STXPX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2206] }, // Inst #6873 = STXPW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #6872 = STURXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6871 = STURWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1503] }, // Inst #6870 = STURSi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1500] }, // Inst #6869 = STURQi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1497] }, // Inst #6868 = STURHi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6867 = STURHHi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1494] }, // Inst #6866 = STURDi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1491] }, // Inst #6865 = STURBi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6864 = STURBBi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #6863 = STTRXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6862 = STTRWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6861 = STTRHi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6860 = STTRBi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1680] }, // Inst #6859 = STR_ZXI
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1675] }, // Inst #6858 = STR_ZA
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[322] }, // Inst #6857 = STR_TX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1672] }, // Inst #6856 = STR_PXI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #6855 = STRXui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1651] }, // Inst #6854 = STRXroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1646] }, // Inst #6853 = STRXroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #6852 = STRXpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #6851 = STRXpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6850 = STRWui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1581] }, // Inst #6849 = STRWroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1576] }, // Inst #6848 = STRWroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #6847 = STRWpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #6846 = STRWpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1503] }, // Inst #6845 = STRSui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1667] }, // Inst #6844 = STRSroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1662] }, // Inst #6843 = STRSroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1658] }, // Inst #6842 = STRSpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1658] }, // Inst #6841 = STRSpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1500] }, // Inst #6840 = STRQui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1641] }, // Inst #6839 = STRQroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1636] }, // Inst #6838 = STRQroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1632] }, // Inst #6837 = STRQpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1632] }, // Inst #6836 = STRQpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1497] }, // Inst #6835 = STRHui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1625] }, // Inst #6834 = STRHroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1620] }, // Inst #6833 = STRHroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1616] }, // Inst #6832 = STRHpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1616] }, // Inst #6831 = STRHpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6830 = STRHHui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1581] }, // Inst #6829 = STRHHroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1576] }, // Inst #6828 = STRHHroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #6827 = STRHHpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #6826 = STRHHpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1494] }, // Inst #6825 = STRDui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1611] }, // Inst #6824 = STRDroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1606] }, // Inst #6823 = STRDroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1602] }, // Inst #6822 = STRDpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1602] }, // Inst #6821 = STRDpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1491] }, // Inst #6820 = STRBui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1595] }, // Inst #6819 = STRBroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1590] }, // Inst #6818 = STRBroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1586] }, // Inst #6817 = STRBpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1586] }, // Inst #6816 = STRBpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6815 = STRBBui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1581] }, // Inst #6814 = STRBBroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1576] }, // Inst #6813 = STRBBroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #6812 = STRBBpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #6811 = STRBBpost
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1553] }, // Inst #6810 = STPXpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1553] }, // Inst #6809 = STPXpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1539] }, // Inst #6808 = STPXi
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1563] }, // Inst #6807 = STPWpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1563] }, // Inst #6806 = STPWpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1535] }, // Inst #6805 = STPWi
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1558] }, // Inst #6804 = STPSpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1558] }, // Inst #6803 = STPSpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1531] }, // Inst #6802 = STPSi
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1548] }, // Inst #6801 = STPQpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1548] }, // Inst #6800 = STPQpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1527] }, // Inst #6799 = STPQi
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1543] }, // Inst #6798 = STPDpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1543] }, // Inst #6797 = STPDpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1523] }, // Inst #6796 = STPDi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #6795 = STNT1W_ZZR_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #6794 = STNT1W_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6793 = STNT1W_ZRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6792 = STNT1W_ZRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #6791 = STNT1W_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #6790 = STNT1W_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #6789 = STNT1W_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #6788 = STNT1W_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #6787 = STNT1W_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #6786 = STNT1W_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #6785 = STNT1W_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #6784 = STNT1W_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #6783 = STNT1H_ZZR_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #6782 = STNT1H_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6781 = STNT1H_ZRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6780 = STNT1H_ZRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #6779 = STNT1H_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #6778 = STNT1H_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #6777 = STNT1H_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #6776 = STNT1H_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #6775 = STNT1H_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #6774 = STNT1H_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #6773 = STNT1H_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #6772 = STNT1H_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #6771 = STNT1D_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6770 = STNT1D_ZRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6769 = STNT1D_ZRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #6768 = STNT1D_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #6767 = STNT1D_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #6766 = STNT1D_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #6765 = STNT1D_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #6764 = STNT1D_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #6763 = STNT1D_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #6762 = STNT1D_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #6761 = STNT1D_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #6760 = STNT1B_ZZR_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #6759 = STNT1B_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6758 = STNT1B_ZRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6757 = STNT1B_ZRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #6756 = STNT1B_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #6755 = STNT1B_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #6754 = STNT1B_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #6753 = STNT1B_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #6752 = STNT1B_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #6751 = STNT1B_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #6750 = STNT1B_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #6749 = STNT1B_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1539] }, // Inst #6748 = STNPXi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1535] }, // Inst #6747 = STNPWi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1531] }, // Inst #6746 = STNPSi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1527] }, // Inst #6745 = STNPQi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1523] }, // Inst #6744 = STNPDi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2217] }, // Inst #6743 = STLXRX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2214] }, // Inst #6742 = STLXRW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2214] }, // Inst #6741 = STLXRH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2214] }, // Inst #6740 = STLXRB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2210] }, // Inst #6739 = STLXPX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2206] }, // Inst #6738 = STLXPW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1503] }, // Inst #6737 = STLURsi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1500] }, // Inst #6736 = STLURqi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1497] }, // Inst #6735 = STLURhi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1494] }, // Inst #6734 = STLURdi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1491] }, // Inst #6733 = STLURbi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #6732 = STLURXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6731 = STLURWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6730 = STLURHi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #6729 = STLURBi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1485] }, // Inst #6728 = STLRXpre
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #6727 = STLRX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1482] }, // Inst #6726 = STLRWpre
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #6725 = STLRW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #6724 = STLRH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #6723 = STLRB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #6722 = STLLRX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #6721 = STLLRW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #6720 = STLLRH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #6719 = STLLRB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2167] }, // Inst #6718 = STL1
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1519] }, // Inst #6717 = STILPXpre
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #6716 = STILPX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1515] }, // Inst #6715 = STILPWpre
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #6714 = STILPW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[462] }, // Inst #6713 = STGi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2175] }, // Inst #6712 = STGPreIndex
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1553] }, // Inst #6711 = STGPpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1553] }, // Inst #6710 = STGPpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2175] }, // Inst #6709 = STGPostIndex
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1539] }, // Inst #6708 = STGPi
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #6707 = STGM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2203] }, // Inst #6706 = ST64BV0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2203] }, // Inst #6705 = ST64BV
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1472] }, // Inst #6704 = ST64B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2198] }, // Inst #6703 = ST4i8_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2195] }, // Inst #6702 = ST4i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2198] }, // Inst #6701 = ST4i64_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2195] }, // Inst #6700 = ST4i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2198] }, // Inst #6699 = ST4i32_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2195] }, // Inst #6698 = ST4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2198] }, // Inst #6697 = ST4i16_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2195] }, // Inst #6696 = ST4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1458] }, // Inst #6695 = ST4W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1454] }, // Inst #6694 = ST4W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1458] }, // Inst #6693 = ST4Q_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1454] }, // Inst #6692 = ST4Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1458] }, // Inst #6691 = ST4H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1454] }, // Inst #6690 = ST4H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #6689 = ST4Fourv8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #6688 = ST4Fourv8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #6687 = ST4Fourv8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #6686 = ST4Fourv8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #6685 = ST4Fourv4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #6684 = ST4Fourv4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #6683 = ST4Fourv4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #6682 = ST4Fourv4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #6681 = ST4Fourv2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #6680 = ST4Fourv2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #6679 = ST4Fourv2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #6678 = ST4Fourv2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #6677 = ST4Fourv16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #6676 = ST4Fourv16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1458] }, // Inst #6675 = ST4D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1454] }, // Inst #6674 = ST4D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1458] }, // Inst #6673 = ST4B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1454] }, // Inst #6672 = ST4B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2190] }, // Inst #6671 = ST3i8_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2187] }, // Inst #6670 = ST3i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2190] }, // Inst #6669 = ST3i64_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2187] }, // Inst #6668 = ST3i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2190] }, // Inst #6667 = ST3i32_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2187] }, // Inst #6666 = ST3i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2190] }, // Inst #6665 = ST3i16_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2187] }, // Inst #6664 = ST3i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1440] }, // Inst #6663 = ST3W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1436] }, // Inst #6662 = ST3W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #6661 = ST3Threev8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #6660 = ST3Threev8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #6659 = ST3Threev8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #6658 = ST3Threev8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #6657 = ST3Threev4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #6656 = ST3Threev4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #6655 = ST3Threev4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #6654 = ST3Threev4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #6653 = ST3Threev2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #6652 = ST3Threev2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #6651 = ST3Threev2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #6650 = ST3Threev2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #6649 = ST3Threev16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #6648 = ST3Threev16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1440] }, // Inst #6647 = ST3Q_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1436] }, // Inst #6646 = ST3Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1440] }, // Inst #6645 = ST3H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1436] }, // Inst #6644 = ST3H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1440] }, // Inst #6643 = ST3D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1436] }, // Inst #6642 = ST3D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1440] }, // Inst #6641 = ST3B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1436] }, // Inst #6640 = ST3B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2182] }, // Inst #6639 = ST2i8_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2179] }, // Inst #6638 = ST2i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2182] }, // Inst #6637 = ST2i64_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2179] }, // Inst #6636 = ST2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2182] }, // Inst #6635 = ST2i32_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2179] }, // Inst #6634 = ST2i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2182] }, // Inst #6633 = ST2i16_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2179] }, // Inst #6632 = ST2i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1422] }, // Inst #6631 = ST2W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1418] }, // Inst #6630 = ST2W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #6629 = ST2Twov8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #6628 = ST2Twov8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #6627 = ST2Twov8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #6626 = ST2Twov8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #6625 = ST2Twov4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #6624 = ST2Twov4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #6623 = ST2Twov4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #6622 = ST2Twov4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #6621 = ST2Twov2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #6620 = ST2Twov2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #6619 = ST2Twov2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #6618 = ST2Twov2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #6617 = ST2Twov16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #6616 = ST2Twov16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1422] }, // Inst #6615 = ST2Q_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1418] }, // Inst #6614 = ST2Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1422] }, // Inst #6613 = ST2H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1418] }, // Inst #6612 = ST2H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[462] }, // Inst #6611 = ST2Gi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2175] }, // Inst #6610 = ST2GPreIndex
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2175] }, // Inst #6609 = ST2GPostIndex
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1422] }, // Inst #6608 = ST2D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1418] }, // Inst #6607 = ST2D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1422] }, // Inst #6606 = ST2B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1418] }, // Inst #6605 = ST2B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2170] }, // Inst #6604 = ST1i8_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2167] }, // Inst #6603 = ST1i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2170] }, // Inst #6602 = ST1i64_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2167] }, // Inst #6601 = ST1i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2170] }, // Inst #6600 = ST1i32_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2167] }, // Inst #6599 = ST1i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2170] }, // Inst #6598 = ST1i16_POST
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2167] }, // Inst #6597 = ST1i16
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1402] }, // Inst #6596 = ST1_MXIPXX_V_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1396] }, // Inst #6595 = ST1_MXIPXX_V_Q
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1390] }, // Inst #6594 = ST1_MXIPXX_V_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1384] }, // Inst #6593 = ST1_MXIPXX_V_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1378] }, // Inst #6592 = ST1_MXIPXX_V_B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1402] }, // Inst #6591 = ST1_MXIPXX_H_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1396] }, // Inst #6590 = ST1_MXIPXX_H_Q
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1390] }, // Inst #6589 = ST1_MXIPXX_H_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1384] }, // Inst #6588 = ST1_MXIPXX_H_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1378] }, // Inst #6587 = ST1_MXIPXX_H_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6586 = ST1W_Q_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6585 = ST1W_Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6584 = ST1W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6583 = ST1W_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6582 = ST1W_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #6581 = ST1W_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #6580 = ST1W_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #6579 = ST1W_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #6578 = ST1W_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #6577 = ST1W_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #6576 = ST1W_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #6575 = ST1W_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #6574 = ST1W_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6573 = ST1W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #6572 = ST1Twov8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #6571 = ST1Twov8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #6570 = ST1Twov8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #6569 = ST1Twov8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #6568 = ST1Twov4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #6567 = ST1Twov4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #6566 = ST1Twov4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #6565 = ST1Twov4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #6564 = ST1Twov2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #6563 = ST1Twov2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #6562 = ST1Twov2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #6561 = ST1Twov2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #6560 = ST1Twov1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #6559 = ST1Twov1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #6558 = ST1Twov16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #6557 = ST1Twov16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #6556 = ST1Threev8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #6555 = ST1Threev8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #6554 = ST1Threev8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #6553 = ST1Threev8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #6552 = ST1Threev4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #6551 = ST1Threev4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #6550 = ST1Threev4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #6549 = ST1Threev4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #6548 = ST1Threev2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #6547 = ST1Threev2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #6546 = ST1Threev2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #6545 = ST1Threev2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #6544 = ST1Threev1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #6543 = ST1Threev1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #6542 = ST1Threev16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #6541 = ST1Threev16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #6540 = ST1Onev8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #6539 = ST1Onev8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #6538 = ST1Onev8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #6537 = ST1Onev8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #6536 = ST1Onev4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #6535 = ST1Onev4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #6534 = ST1Onev4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #6533 = ST1Onev4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #6532 = ST1Onev2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #6531 = ST1Onev2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #6530 = ST1Onev2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #6529 = ST1Onev2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #6528 = ST1Onev1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #6527 = ST1Onev1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #6526 = ST1Onev16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #6525 = ST1Onev16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6524 = ST1H_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6523 = ST1H_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6522 = ST1H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6521 = ST1H_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6520 = ST1H_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #6519 = ST1H_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #6518 = ST1H_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #6517 = ST1H_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #6516 = ST1H_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #6515 = ST1H_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #6514 = ST1H_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #6513 = ST1H_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #6512 = ST1H_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6511 = ST1H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #6510 = ST1Fourv8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #6509 = ST1Fourv8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #6508 = ST1Fourv8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #6507 = ST1Fourv8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #6506 = ST1Fourv4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #6505 = ST1Fourv4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #6504 = ST1Fourv4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #6503 = ST1Fourv4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #6502 = ST1Fourv2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #6501 = ST1Fourv2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #6500 = ST1Fourv2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #6499 = ST1Fourv2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #6498 = ST1Fourv1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #6497 = ST1Fourv1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #6496 = ST1Fourv16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #6495 = ST1Fourv16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6494 = ST1D_Q_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6493 = ST1D_Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6492 = ST1D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #6491 = ST1D_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #6490 = ST1D_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #6489 = ST1D_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #6488 = ST1D_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #6487 = ST1D_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #6486 = ST1D_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #6485 = ST1D_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #6484 = ST1D_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6483 = ST1D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6482 = ST1B_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6481 = ST1B_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6480 = ST1B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6479 = ST1B_H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6478 = ST1B_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #6477 = ST1B_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6476 = ST1B_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #6475 = ST1B_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #6474 = ST1B_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #6473 = ST1B_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #6472 = ST1B_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #6471 = ST1B_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #6470 = ST1B_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #6469 = ST1B_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #6468 = ST1B_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #6467 = ST1B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #6466 = SSUBWv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6465 = SSUBWv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6464 = SSUBWv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #6463 = SSUBWv4i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #6462 = SSUBWv2i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6461 = SSUBWv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6460 = SSUBWT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6459 = SSUBWT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6458 = SSUBWT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6457 = SSUBWB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6456 = SSUBWB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6455 = SSUBWB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #6454 = SSUBLv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6453 = SSUBLv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6452 = SSUBLv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #6451 = SSUBLv4i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #6450 = SSUBLv2i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6449 = SSUBLv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6448 = SSUBLT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6447 = SSUBLT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6446 = SSUBLT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6445 = SSUBLTB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6444 = SSUBLTB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6443 = SSUBLTB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6442 = SSUBLB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6441 = SSUBLB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6440 = SSUBLB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6439 = SSUBLBT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6438 = SSUBLBT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6437 = SSUBLBT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6436 = SST1W_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6435 = SST1W_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6434 = SST1W_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6433 = SST1W_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #6432 = SST1W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6431 = SST1W_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6430 = SST1W_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6429 = SST1W_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6428 = SST1W_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6427 = SST1W_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #6426 = SST1W_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6425 = SST1W_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #6424 = SST1Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6423 = SST1H_S_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6422 = SST1H_S_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6421 = SST1H_S_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6420 = SST1H_S_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #6419 = SST1H_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6418 = SST1H_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6417 = SST1H_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6416 = SST1H_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6415 = SST1H_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6414 = SST1H_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #6413 = SST1H_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6412 = SST1H_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6411 = SST1D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6410 = SST1D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6409 = SST1D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6408 = SST1D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6407 = SST1D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #6406 = SST1D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6405 = SST1D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6404 = SST1B_S_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6403 = SST1B_S_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #6402 = SST1B_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6401 = SST1B_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6400 = SST1B_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #6399 = SST1B_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #6398 = SST1B_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6397 = SSRAv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6396 = SSRAv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6395 = SSRAv4i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6394 = SSRAv4i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6393 = SSRAv2i64_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6392 = SSRAv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6391 = SSRAv16i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6390 = SSRAd
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6389 = SSRA_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6388 = SSRA_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6387 = SSRA_ZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6386 = SSRA_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6385 = SSHRv8i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6384 = SSHRv8i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6383 = SSHRv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6382 = SSHRv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6381 = SSHRv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6380 = SSHRv2i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6379 = SSHRv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6378 = SSHRd
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6377 = SSHLv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6376 = SSHLv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6375 = SSHLv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6374 = SSHLv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6373 = SSHLv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6372 = SSHLv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6371 = SSHLv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6370 = SSHLv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2164] }, // Inst #6369 = SSHLLv8i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6368 = SSHLLv8i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6367 = SSHLLv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2164] }, // Inst #6366 = SSHLLv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2164] }, // Inst #6365 = SSHLLv2i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6364 = SSHLLv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6363 = SSHLLT_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6362 = SSHLLT_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6361 = SSHLLT_ZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6360 = SSHLLB_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6359 = SSHLLB_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6358 = SSHLLB_ZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6357 = SRSRAv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6356 = SRSRAv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6355 = SRSRAv4i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6354 = SRSRAv4i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6353 = SRSRAv2i64_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6352 = SRSRAv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6351 = SRSRAv16i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6350 = SRSRAd
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6349 = SRSRA_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6348 = SRSRA_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6347 = SRSRA_ZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6346 = SRSRA_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6345 = SRSHRv8i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6344 = SRSHRv8i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6343 = SRSHRv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6342 = SRSHRv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6341 = SRSHRv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6340 = SRSHRv2i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6339 = SRSHRv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6338 = SRSHRd
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6337 = SRSHR_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6336 = SRSHR_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6335 = SRSHR_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6334 = SRSHR_ZPmI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6333 = SRSHLv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6332 = SRSHLv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6331 = SRSHLv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6330 = SRSHLv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6329 = SRSHLv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6328 = SRSHLv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6327 = SRSHLv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6326 = SRSHLv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6325 = SRSHL_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6324 = SRSHL_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6323 = SRSHL_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6322 = SRSHL_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #6321 = SRSHL_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #6320 = SRSHL_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #6319 = SRSHL_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #6318 = SRSHL_VG4_4ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #6317 = SRSHL_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #6316 = SRSHL_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #6315 = SRSHL_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #6314 = SRSHL_VG4_4Z4Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #6313 = SRSHL_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #6312 = SRSHL_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #6311 = SRSHL_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #6310 = SRSHL_VG2_2ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #6309 = SRSHL_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #6308 = SRSHL_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #6307 = SRSHL_VG2_2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #6306 = SRSHL_VG2_2Z2Z_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6305 = SRSHLR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6304 = SRSHLR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6303 = SRSHLR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6302 = SRSHLR_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6301 = SRIv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6300 = SRIv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6299 = SRIv4i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6298 = SRIv4i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6297 = SRIv2i64_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6296 = SRIv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6295 = SRIv16i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #6294 = SRId
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6293 = SRI_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6292 = SRI_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6291 = SRI_ZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6290 = SRI_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6289 = SRHADDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6288 = SRHADDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6287 = SRHADDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6286 = SRHADDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6285 = SRHADDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6284 = SRHADDv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6283 = SRHADD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6282 = SRHADD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6281 = SRHADD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6280 = SRHADD_ZPmZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #6279 = SQXTUNv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #6278 = SQXTUNv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #6277 = SQXTUNv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #6276 = SQXTUNv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #6275 = SQXTUNv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2162] }, // Inst #6274 = SQXTUNv1i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #6273 = SQXTUNv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[653] }, // Inst #6272 = SQXTUNv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #6271 = SQXTUNv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #6270 = SQXTUNT_ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #6269 = SQXTUNT_ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #6268 = SQXTUNT_ZZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6267 = SQXTUNB_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6266 = SQXTUNB_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6265 = SQXTUNB_ZZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #6264 = SQXTNv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #6263 = SQXTNv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #6262 = SQXTNv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #6261 = SQXTNv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #6260 = SQXTNv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2162] }, // Inst #6259 = SQXTNv1i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #6258 = SQXTNv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[653] }, // Inst #6257 = SQXTNv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #6256 = SQXTNv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #6255 = SQXTNT_ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #6254 = SQXTNT_ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #6253 = SQXTNT_ZZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6252 = SQXTNB_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6251 = SQXTNB_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #6250 = SQXTNB_ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6249 = SQSUBv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6248 = SQSUBv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6247 = SQSUBv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6246 = SQSUBv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6245 = SQSUBv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6244 = SQSUBv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2101] }, // Inst #6243 = SQSUBv1i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6242 = SQSUBv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #6241 = SQSUBv1i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #6240 = SQSUBv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6239 = SQSUBv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6238 = SQSUB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6237 = SQSUB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6236 = SQSUB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6235 = SQSUB_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6234 = SQSUB_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6233 = SQSUB_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6232 = SQSUB_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6231 = SQSUB_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6230 = SQSUB_ZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6229 = SQSUB_ZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6228 = SQSUB_ZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6227 = SQSUB_ZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6226 = SQSUBR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6225 = SQSUBR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6224 = SQSUBR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6223 = SQSUBR_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6222 = SQSHRUNv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6221 = SQSHRUNv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6220 = SQSHRUNv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6219 = SQSHRUNv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6218 = SQSHRUNv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6217 = SQSHRUNv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2156] }, // Inst #6216 = SQSHRUNs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2153] }, // Inst #6215 = SQSHRUNh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2150] }, // Inst #6214 = SQSHRUNb
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6213 = SQSHRUNT_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6212 = SQSHRUNT_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6211 = SQSHRUNT_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6210 = SQSHRUNB_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6209 = SQSHRUNB_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6208 = SQSHRUNB_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6207 = SQSHRNv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6206 = SQSHRNv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6205 = SQSHRNv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6204 = SQSHRNv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6203 = SQSHRNv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6202 = SQSHRNv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2156] }, // Inst #6201 = SQSHRNs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2153] }, // Inst #6200 = SQSHRNh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2150] }, // Inst #6199 = SQSHRNb
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6198 = SQSHRNT_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6197 = SQSHRNT_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6196 = SQSHRNT_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6195 = SQSHRNB_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6194 = SQSHRNB_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6193 = SQSHRNB_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6192 = SQSHLv8i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6191 = SQSHLv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6190 = SQSHLv8i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6189 = SQSHLv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6188 = SQSHLv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6187 = SQSHLv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6186 = SQSHLv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6185 = SQSHLv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6184 = SQSHLv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6183 = SQSHLv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6182 = SQSHLv2i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6181 = SQSHLv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2101] }, // Inst #6180 = SQSHLv1i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6179 = SQSHLv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #6178 = SQSHLv1i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #6177 = SQSHLv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6176 = SQSHLv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6175 = SQSHLv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1112] }, // Inst #6174 = SQSHLs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1109] }, // Inst #6173 = SQSHLh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6172 = SQSHLd
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2159] }, // Inst #6171 = SQSHLb
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6170 = SQSHL_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6169 = SQSHL_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6168 = SQSHL_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6167 = SQSHL_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6166 = SQSHL_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6165 = SQSHL_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6164 = SQSHL_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6163 = SQSHL_ZPmI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6162 = SQSHLUv8i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6161 = SQSHLUv8i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6160 = SQSHLUv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6159 = SQSHLUv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6158 = SQSHLUv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6157 = SQSHLUv2i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #6156 = SQSHLUv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1112] }, // Inst #6155 = SQSHLUs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1109] }, // Inst #6154 = SQSHLUh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #6153 = SQSHLUd
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2159] }, // Inst #6152 = SQSHLUb
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6151 = SQSHLU_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6150 = SQSHLU_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6149 = SQSHLU_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #6148 = SQSHLU_ZPmI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6147 = SQSHLR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6146 = SQSHLR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6145 = SQSHLR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6144 = SQSHLR_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #6143 = SQRSHR_VG4_Z4ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #6142 = SQRSHR_VG4_Z4ZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2147] }, // Inst #6141 = SQRSHR_VG2_Z2ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #6140 = SQRSHRU_VG4_Z4ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #6139 = SQRSHRU_VG4_Z4ZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2147] }, // Inst #6138 = SQRSHRU_VG2_Z2ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6137 = SQRSHRUNv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6136 = SQRSHRUNv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6135 = SQRSHRUNv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6134 = SQRSHRUNv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6133 = SQRSHRUNv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6132 = SQRSHRUNv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2156] }, // Inst #6131 = SQRSHRUNs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2153] }, // Inst #6130 = SQRSHRUNh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2150] }, // Inst #6129 = SQRSHRUNb
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2147] }, // Inst #6128 = SQRSHRUN_Z2ZI_StoH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #6127 = SQRSHRUN_VG4_Z4ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #6126 = SQRSHRUN_VG4_Z4ZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6125 = SQRSHRUNT_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6124 = SQRSHRUNT_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6123 = SQRSHRUNT_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6122 = SQRSHRUNB_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6121 = SQRSHRUNB_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6120 = SQRSHRUNB_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6119 = SQRSHRNv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6118 = SQRSHRNv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6117 = SQRSHRNv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6116 = SQRSHRNv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #6115 = SQRSHRNv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #6114 = SQRSHRNv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2156] }, // Inst #6113 = SQRSHRNs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2153] }, // Inst #6112 = SQRSHRNh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2150] }, // Inst #6111 = SQRSHRNb
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2147] }, // Inst #6110 = SQRSHRN_Z2ZI_StoH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #6109 = SQRSHRN_VG4_Z4ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2144] }, // Inst #6108 = SQRSHRN_VG4_Z4ZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6107 = SQRSHRNT_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6106 = SQRSHRNT_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #6105 = SQRSHRNT_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6104 = SQRSHRNB_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6103 = SQRSHRNB_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #6102 = SQRSHRNB_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6101 = SQRSHLv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6100 = SQRSHLv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6099 = SQRSHLv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6098 = SQRSHLv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6097 = SQRSHLv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6096 = SQRSHLv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2101] }, // Inst #6095 = SQRSHLv1i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6094 = SQRSHLv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #6093 = SQRSHLv1i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #6092 = SQRSHLv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6091 = SQRSHLv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6090 = SQRSHL_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6089 = SQRSHL_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6088 = SQRSHL_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6087 = SQRSHL_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6086 = SQRSHLR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6085 = SQRSHLR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6084 = SQRSHLR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #6083 = SQRSHLR_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1194] }, // Inst #6082 = SQRDMULHv8i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6081 = SQRDMULHv8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #6080 = SQRDMULHv4i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #6079 = SQRDMULHv4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1190] }, // Inst #6078 = SQRDMULHv4i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6077 = SQRDMULHv4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1186] }, // Inst #6076 = SQRDMULHv2i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #6075 = SQRDMULHv2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1182] }, // Inst #6074 = SQRDMULHv1i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #6073 = SQRDMULHv1i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1178] }, // Inst #6072 = SQRDMULHv1i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #6071 = SQRDMULHv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6070 = SQRDMULH_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6069 = SQRDMULH_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6068 = SQRDMULH_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #6067 = SQRDMULH_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #6066 = SQRDMULH_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #6065 = SQRDMULH_ZZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1198] }, // Inst #6064 = SQRDMULH_ZZZI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #6063 = SQRDMLSHv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #6062 = SQRDMLSHv8i16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #6061 = SQRDMLSHv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #6060 = SQRDMLSHv4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #6059 = SQRDMLSHv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #6058 = SQRDMLSHv4i16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #6057 = SQRDMLSHv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #6056 = SQRDMLSHv2i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1145] }, // Inst #6055 = SQRDMLSHv1i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2140] }, // Inst #6054 = SQRDMLSHv1i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1140] }, // Inst #6053 = SQRDMLSHv1i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2136] }, // Inst #6052 = SQRDMLSHv1i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6051 = SQRDMLSH_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6050 = SQRDMLSH_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6049 = SQRDMLSH_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6048 = SQRDMLSH_ZZZ_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #6047 = SQRDMLSH_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #6046 = SQRDMLSH_ZZZI_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #6045 = SQRDMLSH_ZZZI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #6044 = SQRDMLAHv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #6043 = SQRDMLAHv8i16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #6042 = SQRDMLAHv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #6041 = SQRDMLAHv4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #6040 = SQRDMLAHv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #6039 = SQRDMLAHv4i16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #6038 = SQRDMLAHv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #6037 = SQRDMLAHv2i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1145] }, // Inst #6036 = SQRDMLAHv1i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2140] }, // Inst #6035 = SQRDMLAHv1i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1140] }, // Inst #6034 = SQRDMLAHv1i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2136] }, // Inst #6033 = SQRDMLAHv1i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6032 = SQRDMLAH_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6031 = SQRDMLAH_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6030 = SQRDMLAH_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #6029 = SQRDMLAH_ZZZ_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #6028 = SQRDMLAH_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #6027 = SQRDMLAH_ZZZI_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #6026 = SQRDMLAH_ZZZI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[806] }, // Inst #6025 = SQRDCMLAH_ZZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[806] }, // Inst #6024 = SQRDCMLAH_ZZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[806] }, // Inst #6023 = SQRDCMLAH_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[806] }, // Inst #6022 = SQRDCMLAH_ZZZ_B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[794] }, // Inst #6021 = SQRDCMLAH_ZZZI_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[800] }, // Inst #6020 = SQRDCMLAH_ZZZI_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #6019 = SQNEGv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #6018 = SQNEGv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #6017 = SQNEGv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #6016 = SQNEGv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #6015 = SQNEGv2i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #6014 = SQNEGv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2099] }, // Inst #6013 = SQNEGv1i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #6012 = SQNEGv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #6011 = SQNEGv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #6010 = SQNEGv1i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #6009 = SQNEGv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #6008 = SQNEG_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #6007 = SQNEG_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #6006 = SQNEG_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #6005 = SQNEG_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #6004 = SQINCW_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #6003 = SQINCW_XPiWdI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #6002 = SQINCW_XPiI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #6001 = SQINCP_ZP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #6000 = SQINCP_ZP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #5999 = SQINCP_ZP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5998 = SQINCP_XP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5997 = SQINCP_XP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5996 = SQINCP_XP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5995 = SQINCP_XP_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5994 = SQINCP_XPWd_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5993 = SQINCP_XPWd_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5992 = SQINCP_XPWd_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5991 = SQINCP_XPWd_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #5990 = SQINCH_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5989 = SQINCH_XPiWdI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5988 = SQINCH_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #5987 = SQINCD_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5986 = SQINCD_XPiWdI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5985 = SQINCD_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5984 = SQINCB_XPiWdI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5983 = SQINCB_XPiI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5982 = SQDMULLv8i16_v4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1194] }, // Inst #5981 = SQDMULLv8i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5980 = SQDMULLv4i32_v2i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #5979 = SQDMULLv4i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5978 = SQDMULLv4i16_v4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2092] }, // Inst #5977 = SQDMULLv4i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5976 = SQDMULLv2i32_v2i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2088] }, // Inst #5975 = SQDMULLv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2132] }, // Inst #5974 = SQDMULLv1i64_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2128] }, // Inst #5973 = SQDMULLv1i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2125] }, // Inst #5972 = SQDMULLi32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2122] }, // Inst #5971 = SQDMULLi16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5970 = SQDMULLT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5969 = SQDMULLT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5968 = SQDMULLT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #5967 = SQDMULLT_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1198] }, // Inst #5966 = SQDMULLT_ZZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5965 = SQDMULLB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5964 = SQDMULLB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5963 = SQDMULLB_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #5962 = SQDMULLB_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1198] }, // Inst #5961 = SQDMULLB_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1194] }, // Inst #5960 = SQDMULHv8i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5959 = SQDMULHv8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #5958 = SQDMULHv4i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5957 = SQDMULHv4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1190] }, // Inst #5956 = SQDMULHv4i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5955 = SQDMULHv4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1186] }, // Inst #5954 = SQDMULHv2i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5953 = SQDMULHv2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1182] }, // Inst #5952 = SQDMULHv1i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #5951 = SQDMULHv1i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1178] }, // Inst #5950 = SQDMULHv1i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #5949 = SQDMULHv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5948 = SQDMULH_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5947 = SQDMULH_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5946 = SQDMULH_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5945 = SQDMULH_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #5944 = SQDMULH_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #5943 = SQDMULH_ZZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1198] }, // Inst #5942 = SQDMULH_ZZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5941 = SQDMULH_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5940 = SQDMULH_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5939 = SQDMULH_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5938 = SQDMULH_VG4_4ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5937 = SQDMULH_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5936 = SQDMULH_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5935 = SQDMULH_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5934 = SQDMULH_VG4_4Z4Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5933 = SQDMULH_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5932 = SQDMULH_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5931 = SQDMULH_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5930 = SQDMULH_VG2_2ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5929 = SQDMULH_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5928 = SQDMULH_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5927 = SQDMULH_VG2_2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5926 = SQDMULH_VG2_2Z2Z_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5925 = SQDMLSLv8i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #5924 = SQDMLSLv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5923 = SQDMLSLv4i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #5922 = SQDMLSLv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5921 = SQDMLSLv4i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2074] }, // Inst #5920 = SQDMLSLv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5919 = SQDMLSLv2i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2069] }, // Inst #5918 = SQDMLSLv2i32_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2117] }, // Inst #5917 = SQDMLSLv1i64_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2112] }, // Inst #5916 = SQDMLSLv1i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2108] }, // Inst #5915 = SQDMLSLi32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2104] }, // Inst #5914 = SQDMLSLi16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5913 = SQDMLSLT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5912 = SQDMLSLT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5911 = SQDMLSLT_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #5910 = SQDMLSLT_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #5909 = SQDMLSLT_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5908 = SQDMLSLB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5907 = SQDMLSLB_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5906 = SQDMLSLB_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #5905 = SQDMLSLB_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #5904 = SQDMLSLB_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5903 = SQDMLSLBT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5902 = SQDMLSLBT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5901 = SQDMLSLBT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5900 = SQDMLALv8i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #5899 = SQDMLALv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5898 = SQDMLALv4i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #5897 = SQDMLALv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5896 = SQDMLALv4i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2074] }, // Inst #5895 = SQDMLALv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5894 = SQDMLALv2i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2069] }, // Inst #5893 = SQDMLALv2i32_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2117] }, // Inst #5892 = SQDMLALv1i64_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2112] }, // Inst #5891 = SQDMLALv1i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2108] }, // Inst #5890 = SQDMLALi32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2104] }, // Inst #5889 = SQDMLALi16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5888 = SQDMLALT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5887 = SQDMLALT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5886 = SQDMLALT_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #5885 = SQDMLALT_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #5884 = SQDMLALT_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5883 = SQDMLALB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5882 = SQDMLALB_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5881 = SQDMLALB_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #5880 = SQDMLALB_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #5879 = SQDMLALB_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5878 = SQDMLALBT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5877 = SQDMLALBT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5876 = SQDMLALBT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #5875 = SQDECW_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5874 = SQDECW_XPiWdI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5873 = SQDECW_XPiI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #5872 = SQDECP_ZP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #5871 = SQDECP_ZP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #5870 = SQDECP_ZP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5869 = SQDECP_XP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5868 = SQDECP_XP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5867 = SQDECP_XP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5866 = SQDECP_XP_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5865 = SQDECP_XPWd_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5864 = SQDECP_XPWd_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5863 = SQDECP_XPWd_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #5862 = SQDECP_XPWd_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #5861 = SQDECH_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5860 = SQDECH_XPiWdI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5859 = SQDECH_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #5858 = SQDECD_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5857 = SQDECD_XPiWdI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5856 = SQDECD_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5855 = SQDECB_XPiWdI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #5854 = SQDECB_XPiI
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #5853 = SQCVT_Z4Z_StoB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #5852 = SQCVT_Z4Z_DtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #5851 = SQCVT_Z2Z_StoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #5850 = SQCVTU_Z4Z_StoB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #5849 = SQCVTU_Z4Z_DtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #5848 = SQCVTU_Z2Z_StoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #5847 = SQCVTUN_Z4Z_StoB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #5846 = SQCVTUN_Z4Z_DtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #5845 = SQCVTUN_Z2Z_StoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #5844 = SQCVTN_Z4Z_StoB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #5843 = SQCVTN_Z4Z_DtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #5842 = SQCVTN_Z2Z_StoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5841 = SQCADD_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5840 = SQCADD_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5839 = SQCADD_ZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5838 = SQCADD_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5837 = SQADDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5836 = SQADDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5835 = SQADDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5834 = SQADDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5833 = SQADDv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5832 = SQADDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2101] }, // Inst #5831 = SQADDv1i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5830 = SQADDv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #5829 = SQADDv1i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #5828 = SQADDv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5827 = SQADDv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5826 = SQADD_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5825 = SQADD_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5824 = SQADD_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5823 = SQADD_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5822 = SQADD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5821 = SQADD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5820 = SQADD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5819 = SQADD_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #5818 = SQADD_ZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #5817 = SQADD_ZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #5816 = SQADD_ZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #5815 = SQADD_ZI_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5814 = SQABSv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5813 = SQABSv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5812 = SQABSv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5811 = SQABSv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5810 = SQABSv2i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5809 = SQABSv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2099] }, // Inst #5808 = SQABSv1i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5807 = SQABSv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #5806 = SQABSv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #5805 = SQABSv1i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5804 = SQABSv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5803 = SQABS_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5802 = SQABS_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5801 = SQABS_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5800 = SQABS_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5799 = SPLICE_ZPZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5798 = SPLICE_ZPZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5797 = SPLICE_ZPZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5796 = SPLICE_ZPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2096] }, // Inst #5795 = SPLICE_ZPZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2096] }, // Inst #5794 = SPLICE_ZPZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2096] }, // Inst #5793 = SPLICE_ZPZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2096] }, // Inst #5792 = SPLICE_ZPZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5791 = SMULLv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5790 = SMULLv8i16_v4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1194] }, // Inst #5789 = SMULLv8i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5788 = SMULLv4i32_v2i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #5787 = SMULLv4i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5786 = SMULLv4i16_v4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2092] }, // Inst #5785 = SMULLv4i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5784 = SMULLv2i32_v2i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2088] }, // Inst #5783 = SMULLv2i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5782 = SMULLv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5781 = SMULLT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5780 = SMULLT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5779 = SMULLT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #5778 = SMULLT_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1198] }, // Inst #5777 = SMULLT_ZZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5776 = SMULLB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5775 = SMULLB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5774 = SMULLB_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #5773 = SMULLB_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1198] }, // Inst #5772 = SMULLB_ZZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #5771 = SMULHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5770 = SMULH_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5769 = SMULH_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5768 = SMULH_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5767 = SMULH_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5766 = SMULH_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5765 = SMULH_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5764 = SMULH_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5763 = SMULH_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2059] }, // Inst #5762 = SMSUBLrrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2085] }, // Inst #5761 = SMOVvi8to64_idx0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1156] }, // Inst #5760 = SMOVvi8to64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2082] }, // Inst #5759 = SMOVvi8to32_idx0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2079] }, // Inst #5758 = SMOVvi8to32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2085] }, // Inst #5757 = SMOVvi32to64_idx0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1156] }, // Inst #5756 = SMOVvi32to64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2085] }, // Inst #5755 = SMOVvi16to64_idx0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1156] }, // Inst #5754 = SMOVvi16to64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2082] }, // Inst #5753 = SMOVvi16to32_idx0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2079] }, // Inst #5752 = SMOVvi16to32
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #5751 = SMOPS_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #5750 = SMOPS_MPPZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1150] }, // Inst #5749 = SMOPS_MPPZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #5748 = SMOPA_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #5747 = SMOPA_MPPZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1150] }, // Inst #5746 = SMOPA_MPPZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5745 = SMMLA_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5744 = SMMLA
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5743 = SMLSLv8i8_v8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5742 = SMLSLv8i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #5741 = SMLSLv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5740 = SMLSLv4i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #5739 = SMLSLv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5738 = SMLSLv4i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2074] }, // Inst #5737 = SMLSLv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5736 = SMLSLv2i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2069] }, // Inst #5735 = SMLSLv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5734 = SMLSLv16i8_v8i16
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #5733 = SMLSL_VG4_M4ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #5732 = SMLSL_VG4_M4ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #5731 = SMLSL_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #5730 = SMLSL_VG2_M2ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #5729 = SMLSL_VG2_M2ZZI_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #5728 = SMLSL_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #5727 = SMLSL_MZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #5726 = SMLSL_MZZI_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5725 = SMLSLT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5724 = SMLSLT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5723 = SMLSLT_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #5722 = SMLSLT_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #5721 = SMLSLT_ZZZI_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #5720 = SMLSLL_VG4_M4ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #5719 = SMLSLL_VG4_M4ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #5718 = SMLSLL_VG4_M4ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #5717 = SMLSLL_VG4_M4ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #5716 = SMLSLL_VG4_M4Z4Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #5715 = SMLSLL_VG4_M4Z4Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #5714 = SMLSLL_VG2_M2ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #5713 = SMLSLL_VG2_M2ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #5712 = SMLSLL_VG2_M2ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #5711 = SMLSLL_VG2_M2ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #5710 = SMLSLL_VG2_M2Z2Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #5709 = SMLSLL_VG2_M2Z2Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #5708 = SMLSLL_MZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #5707 = SMLSLL_MZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #5706 = SMLSLL_MZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #5705 = SMLSLL_MZZI_BtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5704 = SMLSLB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5703 = SMLSLB_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5702 = SMLSLB_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #5701 = SMLSLB_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #5700 = SMLSLB_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5699 = SMLALv8i8_v8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5698 = SMLALv8i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #5697 = SMLALv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5696 = SMLALv4i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #5695 = SMLALv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5694 = SMLALv4i16_v4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2074] }, // Inst #5693 = SMLALv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5692 = SMLALv2i32_v2i64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[2069] }, // Inst #5691 = SMLALv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5690 = SMLALv16i8_v8i16
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #5689 = SMLAL_VG4_M4ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #5688 = SMLAL_VG4_M4ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #5687 = SMLAL_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #5686 = SMLAL_VG2_M2ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #5685 = SMLAL_VG2_M2ZZI_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #5684 = SMLAL_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #5683 = SMLAL_MZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #5682 = SMLAL_MZZI_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5681 = SMLALT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5680 = SMLALT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5679 = SMLALT_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #5678 = SMLALT_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #5677 = SMLALT_ZZZI_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #5676 = SMLALL_VG4_M4ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #5675 = SMLALL_VG4_M4ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #5674 = SMLALL_VG4_M4ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #5673 = SMLALL_VG4_M4ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #5672 = SMLALL_VG4_M4Z4Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #5671 = SMLALL_VG4_M4Z4Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #5670 = SMLALL_VG2_M2ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #5669 = SMLALL_VG2_M2ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #5668 = SMLALL_VG2_M2ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #5667 = SMLALL_VG2_M2ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #5666 = SMLALL_VG2_M2Z2Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #5665 = SMLALL_VG2_M2Z2Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #5664 = SMLALL_MZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #5663 = SMLALL_MZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #5662 = SMLALL_MZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #5661 = SMLALL_MZZI_BtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5660 = SMLALB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5659 = SMLALB_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5658 = SMLALB_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #5657 = SMLALB_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #5656 = SMLALB_ZZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5655 = SMINv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5654 = SMINv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5653 = SMINv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5652 = SMINv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5651 = SMINv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5650 = SMINv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5649 = SMIN_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5648 = SMIN_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5647 = SMIN_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5646 = SMIN_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #5645 = SMIN_ZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #5644 = SMIN_ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #5643 = SMIN_ZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #5642 = SMIN_ZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5641 = SMIN_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5640 = SMIN_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5639 = SMIN_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5638 = SMIN_VG4_4ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5637 = SMIN_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5636 = SMIN_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5635 = SMIN_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5634 = SMIN_VG4_4Z4Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5633 = SMIN_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5632 = SMIN_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5631 = SMIN_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5630 = SMIN_VG2_2ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5629 = SMIN_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5628 = SMIN_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5627 = SMIN_VG2_2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5626 = SMIN_VG2_2Z2Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #5625 = SMINXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2066] }, // Inst #5624 = SMINXri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #5623 = SMINWrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2063] }, // Inst #5622 = SMINWri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[520] }, // Inst #5621 = SMINVv8i8v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #5620 = SMINVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #5619 = SMINVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #5618 = SMINVv4i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[512] }, // Inst #5617 = SMINVv16i8v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5616 = SMINV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5615 = SMINV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5614 = SMINV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5613 = SMINV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #5612 = SMINQV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #5611 = SMINQV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #5610 = SMINQV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #5609 = SMINQV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5608 = SMINPv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5607 = SMINPv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5606 = SMINPv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5605 = SMINPv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5604 = SMINPv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5603 = SMINPv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5602 = SMINP_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5601 = SMINP_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5600 = SMINP_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5599 = SMINP_ZPmZ_B
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #5598 = SMC
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5597 = SMAXv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5596 = SMAXv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5595 = SMAXv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5594 = SMAXv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5593 = SMAXv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5592 = SMAXv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5591 = SMAX_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5590 = SMAX_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5589 = SMAX_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5588 = SMAX_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #5587 = SMAX_ZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #5586 = SMAX_ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #5585 = SMAX_ZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #5584 = SMAX_ZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5583 = SMAX_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5582 = SMAX_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5581 = SMAX_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #5580 = SMAX_VG4_4ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5579 = SMAX_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5578 = SMAX_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5577 = SMAX_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #5576 = SMAX_VG4_4Z4Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5575 = SMAX_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5574 = SMAX_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5573 = SMAX_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #5572 = SMAX_VG2_2ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5571 = SMAX_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5570 = SMAX_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5569 = SMAX_VG2_2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #5568 = SMAX_VG2_2Z2Z_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #5567 = SMAXXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2066] }, // Inst #5566 = SMAXXri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #5565 = SMAXWrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2063] }, // Inst #5564 = SMAXWri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[520] }, // Inst #5563 = SMAXVv8i8v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #5562 = SMAXVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #5561 = SMAXVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #5560 = SMAXVv4i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[512] }, // Inst #5559 = SMAXVv16i8v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5558 = SMAXV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5557 = SMAXV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5556 = SMAXV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5555 = SMAXV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #5554 = SMAXQV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #5553 = SMAXQV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #5552 = SMAXQV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #5551 = SMAXQV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5550 = SMAXPv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5549 = SMAXPv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5548 = SMAXPv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5547 = SMAXPv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5546 = SMAXPv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5545 = SMAXPv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5544 = SMAXP_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5543 = SMAXP_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5542 = SMAXP_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5541 = SMAXP_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2059] }, // Inst #5540 = SMADDLrrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #5539 = SM4E_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5538 = SM4ENCKEY
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5537 = SM4EKEY_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #5536 = SM4E
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #5535 = SM3TT2B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #5534 = SM3TT2A
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #5533 = SM3TT1B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #5532 = SM3TT1A
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[219] }, // Inst #5531 = SM3SS1
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5530 = SM3PARTW2
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5529 = SM3PARTW1
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #5528 = SLIv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #5527 = SLIv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #5526 = SLIv4i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #5525 = SLIv4i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #5524 = SLIv2i64_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #5523 = SLIv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #5522 = SLIv16i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2055] }, // Inst #5521 = SLId
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5520 = SLI_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5519 = SLI_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5518 = SLI_ZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5517 = SLI_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5516 = SHSUBv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5515 = SHSUBv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5514 = SHSUBv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5513 = SHSUBv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5512 = SHSUBv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5511 = SHSUBv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5510 = SHSUB_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5509 = SHSUB_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5508 = SHSUB_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5507 = SHSUB_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5506 = SHSUBR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5505 = SHSUBR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5504 = SHSUBR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5503 = SHSUBR_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #5502 = SHRNv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #5501 = SHRNv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #5500 = SHRNv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #5499 = SHRNv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #5498 = SHRNv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #5497 = SHRNv16i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5496 = SHRNT_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5495 = SHRNT_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5494 = SHRNT_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #5493 = SHRNB_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #5492 = SHRNB_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #5491 = SHRNB_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #5490 = SHLv8i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #5489 = SHLv8i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #5488 = SHLv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #5487 = SHLv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #5486 = SHLv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #5485 = SHLv2i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #5484 = SHLv16i8_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #5483 = SHLd
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[643] }, // Inst #5482 = SHLLv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5481 = SHLLv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5480 = SHLLv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[643] }, // Inst #5479 = SHLLv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[643] }, // Inst #5478 = SHLLv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5477 = SHLLv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5476 = SHADDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5475 = SHADDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5474 = SHADDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5473 = SHADDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5472 = SHADDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5471 = SHADDv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5470 = SHADD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5469 = SHADD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5468 = SHADD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5467 = SHADD_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5466 = SHA512SU1
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #5465 = SHA512SU0
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5464 = SHA512H2
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5463 = SHA512H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5462 = SHA256SU1rrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #5461 = SHA256SU0rr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5460 = SHA256Hrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5459 = SHA256H2rrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #5458 = SHA1SU1rr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5457 = SHA1SU0rrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2051] }, // Inst #5456 = SHA1Prrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2051] }, // Inst #5455 = SHA1Mrrr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #5454 = SHA1Hrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2051] }, // Inst #5453 = SHA1Crrr
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5452 = SETPTN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5451 = SETPT
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5450 = SETPN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5449 = SETP
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5448 = SETMTN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5447 = SETMT
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5446 = SETMN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5445 = SETM
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5444 = SETGPTN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5443 = SETGPT
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5442 = SETGPN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5441 = SETGP
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5440 = SETGMTN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5439 = SETGMT
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5438 = SETGMN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5437 = SETGM
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #5436 = SETFFR
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[2050] }, // Inst #5435 = SETF8
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[2050] }, // Inst #5434 = SETF16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5433 = SETETN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5432 = SETET
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5431 = SETEN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #5430 = SETE
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2046] }, // Inst #5429 = SEL_ZPZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2046] }, // Inst #5428 = SEL_ZPZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2046] }, // Inst #5427 = SEL_ZPZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2046] }, // Inst #5426 = SEL_ZPZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2042] }, // Inst #5425 = SEL_VG4_4ZC4Z4Z_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2042] }, // Inst #5424 = SEL_VG4_4ZC4Z4Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2042] }, // Inst #5423 = SEL_VG4_4ZC4Z4Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2042] }, // Inst #5422 = SEL_VG4_4ZC4Z4Z_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2038] }, // Inst #5421 = SEL_VG2_2ZC2Z2Z_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2038] }, // Inst #5420 = SEL_VG2_2ZC2Z2Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2038] }, // Inst #5419 = SEL_VG2_2ZC2Z2Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2038] }, // Inst #5418 = SEL_VG2_2ZC2Z2Z_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #5417 = SEL_PPPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #5416 = SDOTv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5415 = SDOTv16i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #5414 = SDOTlanev8i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #5413 = SDOTlanev16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5412 = SDOT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5411 = SDOT_ZZZ_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5410 = SDOT_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #5409 = SDOT_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #5408 = SDOT_ZZZI_HtoS
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #5407 = SDOT_ZZZI_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #5406 = SDOT_VG4_M4ZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #5405 = SDOT_VG4_M4ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #5404 = SDOT_VG4_M4ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #5403 = SDOT_VG4_M4ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #5402 = SDOT_VG4_M4ZZI_HToS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #5401 = SDOT_VG4_M4ZZI_BToS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #5400 = SDOT_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #5399 = SDOT_VG4_M4Z4Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #5398 = SDOT_VG4_M4Z4Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #5397 = SDOT_VG2_M2ZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #5396 = SDOT_VG2_M2ZZ_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #5395 = SDOT_VG2_M2ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #5394 = SDOT_VG2_M2ZZI_HtoD
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #5393 = SDOT_VG2_M2ZZI_HToS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #5392 = SDOT_VG2_M2ZZI_BToS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #5391 = SDOT_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #5390 = SDOT_VG2_M2Z2Z_HtoD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #5389 = SDOT_VG2_M2Z2Z_BtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5388 = SDIV_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5387 = SDIV_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #5386 = SDIVXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #5385 = SDIVWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5384 = SDIVR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5383 = SDIVR_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #5382 = SCVTFv8i16_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5381 = SCVTFv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #5380 = SCVTFv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #5379 = SCVTFv4i16_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5378 = SCVTFv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5377 = SCVTFv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #5376 = SCVTFv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #5375 = SCVTFv2i32_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5374 = SCVTFv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5373 = SCVTFv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5372 = SCVTFv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #5371 = SCVTFv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #5370 = SCVTFv1i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1112] }, // Inst #5369 = SCVTFs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1109] }, // Inst #5368 = SCVTFh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #5367 = SCVTFd
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5366 = SCVTF_ZPmZ_StoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5365 = SCVTF_ZPmZ_StoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5364 = SCVTF_ZPmZ_StoD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5363 = SCVTF_ZPmZ_HtoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5362 = SCVTF_ZPmZ_DtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5361 = SCVTF_ZPmZ_DtoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5360 = SCVTF_ZPmZ_DtoD
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #5359 = SCVTF_4Z4Z_StoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1102] }, // Inst #5358 = SCVTF_2Z2Z_StoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[2036] }, // Inst #5357 = SCVTFUXSri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1174] }, // Inst #5356 = SCVTFUXHri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1172] }, // Inst #5355 = SCVTFUXDri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1167] }, // Inst #5354 = SCVTFUWSri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1165] }, // Inst #5353 = SCVTFUWHri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[936] }, // Inst #5352 = SCVTFUWDri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2033] }, // Inst #5351 = SCVTFSXSri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2030] }, // Inst #5350 = SCVTFSXHri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2027] }, // Inst #5349 = SCVTFSXDri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2024] }, // Inst #5348 = SCVTFSWSri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2021] }, // Inst #5347 = SCVTFSWHri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2018] }, // Inst #5346 = SCVTFSWDri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5345 = SCLAMP_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5344 = SCLAMP_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5343 = SCLAMP_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5342 = SCLAMP_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #5341 = SCLAMP_VG4_4Z4Z_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #5340 = SCLAMP_VG4_4Z4Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #5339 = SCLAMP_VG4_4Z4Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #5338 = SCLAMP_VG4_4Z4Z_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #5337 = SCLAMP_VG2_2Z2Z_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #5336 = SCLAMP_VG2_2Z2Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #5335 = SCLAMP_VG2_2Z2Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #5334 = SCLAMP_VG2_2Z2Z_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2014] }, // Inst #5333 = SBFMXri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2010] }, // Inst #5332 = SBFMWri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #5331 = SBCXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #5330 = SBCWr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #5329 = SBCSXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #5328 = SBCSWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5327 = SBCLT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5326 = SBCLT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5325 = SBCLB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5324 = SBCLB_ZZZ_D
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #5323 = SB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #5322 = SADDWv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5321 = SADDWv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5320 = SADDWv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #5319 = SADDWv4i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2007] }, // Inst #5318 = SADDWv2i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5317 = SADDWv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5316 = SADDWT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5315 = SADDWT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5314 = SADDWT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5313 = SADDWB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5312 = SADDWB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5311 = SADDWB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5310 = SADDV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5309 = SADDV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #5308 = SADDV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5307 = SADDLv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5306 = SADDLv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5305 = SADDLv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5304 = SADDLv4i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5303 = SADDLv2i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5302 = SADDLv16i8_v8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #5301 = SADDLVv8i8v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #5300 = SADDLVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #5299 = SADDLVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #5298 = SADDLVv4i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #5297 = SADDLVv16i8v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5296 = SADDLT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5295 = SADDLT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5294 = SADDLT_ZZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5293 = SADDLPv8i8_v4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5292 = SADDLPv8i16_v4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5291 = SADDLPv4i32_v2i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5290 = SADDLPv4i16_v2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5289 = SADDLPv2i32_v1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5288 = SADDLPv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5287 = SADDLB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5286 = SADDLB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5285 = SADDLB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5284 = SADDLBT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5283 = SADDLBT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5282 = SADDLBT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #5281 = SADALPv8i8_v4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #5280 = SADALPv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #5279 = SADALPv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #5278 = SADALPv4i16_v2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2004] }, // Inst #5277 = SADALPv2i32_v1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #5276 = SADALPv16i8_v8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5275 = SADALP_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5274 = SADALP_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5273 = SADALP_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5272 = SABDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5271 = SABDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5270 = SABDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5269 = SABDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5268 = SABDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5267 = SABDv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5266 = SABD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5265 = SABD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5264 = SABD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #5263 = SABD_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5262 = SABDLv8i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5261 = SABDLv8i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5260 = SABDLv4i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5259 = SABDLv4i16_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5258 = SABDLv2i32_v2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5257 = SABDLv16i8_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5256 = SABDLT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5255 = SABDLT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5254 = SABDLT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5253 = SABDLB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5252 = SABDLB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5251 = SABDLB_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #5250 = SABAv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5249 = SABAv8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5248 = SABAv4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #5247 = SABAv4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #5246 = SABAv2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5245 = SABAv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5244 = SABA_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5243 = SABA_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5242 = SABA_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5241 = SABA_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5240 = SABALv8i8_v8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5239 = SABALv8i16_v4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5238 = SABALv4i32_v2i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5237 = SABALv4i16_v4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[2000] }, // Inst #5236 = SABALv2i32_v2i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5235 = SABALv16i8_v8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5234 = SABALT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5233 = SABALT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5232 = SABALT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5231 = SABALB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5230 = SABALB_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5229 = SABALB_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #5228 = RSUBHNv8i16_v8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5227 = RSUBHNv8i16_v16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5226 = RSUBHNv4i32_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #5225 = RSUBHNv4i32_v4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5224 = RSUBHNv2i64_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #5223 = RSUBHNv2i64_v2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5222 = RSUBHNT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5221 = RSUBHNT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5220 = RSUBHNT_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5219 = RSUBHNB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5218 = RSUBHNB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5217 = RSUBHNB_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #5216 = RSHRNv8i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #5215 = RSHRNv8i16_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #5214 = RSHRNv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #5213 = RSHRNv4i16_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #5212 = RSHRNv2i32_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1996] }, // Inst #5211 = RSHRNv16i8_shift
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5210 = RSHRNT_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5209 = RSHRNT_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #5208 = RSHRNT_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #5207 = RSHRNB_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #5206 = RSHRNB_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #5205 = RSHRNB_ZZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1993] }, // Inst #5204 = RPRFM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #5203 = RORVXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #5202 = RORVWr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1990] }, // Inst #5201 = RMIF
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #5200 = REV_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #5199 = REV_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #5198 = REV_ZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #5197 = REV_ZZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #5196 = REV_PP_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #5195 = REV_PP_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #5194 = REV_PP_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #5193 = REV_PP_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #5192 = REVXr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #5191 = REVWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5190 = REVW_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5189 = REVH_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5188 = REVH_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5187 = REVD_ZPmZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5186 = REVB_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5185 = REVB_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5184 = REVB_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5183 = REV64v8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5182 = REV64v8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5181 = REV64v4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5180 = REV64v4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5179 = REV64v2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5178 = REV64v16i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5177 = REV32v8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5176 = REV32v8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5175 = REV32v4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5174 = REV32v16i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #5173 = REV32Xr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5172 = REV16v8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5171 = REV16v16i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #5170 = REV16Xr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #5169 = REV16Wr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[387] }, // Inst #5168 = RETABSPPCr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[626] }, // Inst #5167 = RETABSPPCi
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #5166 = RETAB
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[387] }, // Inst #5165 = RETAASPPCr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[626] }, // Inst #5164 = RETAASPPCi
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #5163 = RETAA
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #5162 = RET
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1912] }, // Inst #5161 = RDVLI_XI
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1912] }, // Inst #5160 = RDSVLI_XI
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[391] }, // Inst #5159 = RDFFR_P_REAL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #5158 = RDFFR_PPz_REAL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #5157 = RDFFRS_PPz
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5156 = RCWSWPSPL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5155 = RCWSWPSPAL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5154 = RCWSWPSPA
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5153 = RCWSWPSP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5152 = RCWSWPSL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5151 = RCWSWPSAL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5150 = RCWSWPSA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5149 = RCWSWPS
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5148 = RCWSWPPL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5147 = RCWSWPPAL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5146 = RCWSWPPA
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5145 = RCWSWPP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5144 = RCWSWPL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5143 = RCWSWPAL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5142 = RCWSWPA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5141 = RCWSWP
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5140 = RCWSETSPL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5139 = RCWSETSPAL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5138 = RCWSETSPA
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5137 = RCWSETSP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5136 = RCWSETSL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5135 = RCWSETSAL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5134 = RCWSETSA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5133 = RCWSETS
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5132 = RCWSETPL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5131 = RCWSETPAL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5130 = RCWSETPA
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5129 = RCWSETP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5128 = RCWSETL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5127 = RCWSETAL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5126 = RCWSETA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5125 = RCWSET
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #5124 = RCWSCASPL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #5123 = RCWSCASPAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #5122 = RCWSCASPA
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #5121 = RCWSCASP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #5120 = RCWSCASL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #5119 = RCWSCASAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #5118 = RCWSCASA
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #5117 = RCWSCAS
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5116 = RCWCLRSPL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5115 = RCWCLRSPAL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5114 = RCWCLRSPA
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5113 = RCWCLRSP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5112 = RCWCLRSL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5111 = RCWCLRSAL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5110 = RCWCLRSA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5109 = RCWCLRS
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5108 = RCWCLRPL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5107 = RCWCLRPAL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5106 = RCWCLRPA
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #5105 = RCWCLRP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5104 = RCWCLRL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5103 = RCWCLRAL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5102 = RCWCLRA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #5101 = RCWCLR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #5100 = RCWCASPL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #5099 = RCWCASPAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #5098 = RCWCASPA
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #5097 = RCWCASP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #5096 = RCWCASL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #5095 = RCWCASAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #5094 = RCWCASA
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #5093 = RCWCAS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #5092 = RBITv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #5091 = RBITv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5090 = RBIT_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5089 = RBIT_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5088 = RBIT_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #5087 = RBIT_ZPmZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #5086 = RBITXr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #5085 = RBITWr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5084 = RAX1_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5083 = RAX1
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #5082 = RADDHNv8i16_v8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5081 = RADDHNv8i16_v16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5080 = RADDHNv4i32_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #5079 = RADDHNv4i32_v4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #5078 = RADDHNv2i64_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #5077 = RADDHNv2i64_v2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5076 = RADDHNT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5075 = RADDHNT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #5074 = RADDHNT_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5073 = RADDHNB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5072 = RADDHNB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5071 = RADDHNB_ZZZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #5070 = PUNPKLO_PP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #5069 = PUNPKHI_PP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1987] }, // Inst #5068 = PTRUE_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1987] }, // Inst #5067 = PTRUE_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1987] }, // Inst #5066 = PTRUE_D
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1989] }, // Inst #5065 = PTRUE_C_S
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1989] }, // Inst #5064 = PTRUE_C_H
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1989] }, // Inst #5063 = PTRUE_C_D
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1989] }, // Inst #5062 = PTRUE_C_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1987] }, // Inst #5061 = PTRUE_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1987] }, // Inst #5060 = PTRUES_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1987] }, // Inst #5059 = PTRUES_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1987] }, // Inst #5058 = PTRUES_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1987] }, // Inst #5057 = PTRUES_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #5056 = PTEST_PP
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1982] }, // Inst #5055 = PSEL_PPPRI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1982] }, // Inst #5054 = PSEL_PPPRI_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1982] }, // Inst #5053 = PSEL_PPPRI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1982] }, // Inst #5052 = PSEL_PPPRI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5051 = PRFW_S_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5050 = PRFW_S_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1965] }, // Inst #5049 = PRFW_S_PZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1961] }, // Inst #5048 = PRFW_PRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1957] }, // Inst #5047 = PRFW_PRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5046 = PRFW_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5045 = PRFW_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5044 = PRFW_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1965] }, // Inst #5043 = PRFW_D_PZI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1979] }, // Inst #5042 = PRFUMi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1979] }, // Inst #5041 = PRFMui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1974] }, // Inst #5040 = PRFMroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1969] }, // Inst #5039 = PRFMroW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[627] }, // Inst #5038 = PRFMl
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5037 = PRFH_S_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5036 = PRFH_S_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1965] }, // Inst #5035 = PRFH_S_PZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1961] }, // Inst #5034 = PRFH_PRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1957] }, // Inst #5033 = PRFH_PRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5032 = PRFH_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5031 = PRFH_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5030 = PRFH_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1965] }, // Inst #5029 = PRFH_D_PZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5028 = PRFD_S_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5027 = PRFD_S_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1965] }, // Inst #5026 = PRFD_S_PZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1961] }, // Inst #5025 = PRFD_PRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1957] }, // Inst #5024 = PRFD_PRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5023 = PRFD_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5022 = PRFD_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5021 = PRFD_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1965] }, // Inst #5020 = PRFD_D_PZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5019 = PRFB_S_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5018 = PRFB_S_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1949] }, // Inst #5017 = PRFB_S_PZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1961] }, // Inst #5016 = PRFB_PRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1957] }, // Inst #5015 = PRFB_PRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5014 = PRFB_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5013 = PRFB_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1953] }, // Inst #5012 = PRFB_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1949] }, // Inst #5011 = PRFB_D_PZI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1929] }, // Inst #5010 = PNEXT_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1929] }, // Inst #5009 = PNEXT_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1929] }, // Inst #5008 = PNEXT_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1929] }, // Inst #5007 = PNEXT_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #5006 = PMULv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5005 = PMULv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #5004 = PMUL_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5003 = PMULLv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5002 = PMULLv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1946] }, // Inst #5001 = PMULLv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #5000 = PMULLv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4999 = PMULLT_ZZZ_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4998 = PMULLT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4997 = PMULLT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4996 = PMULLB_ZZZ_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4995 = PMULLB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4994 = PMULLB_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1942] }, // Inst #4993 = PMOV_ZIP_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1942] }, // Inst #4992 = PMOV_ZIP_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1942] }, // Inst #4991 = PMOV_ZIP_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1938] }, // Inst #4990 = PMOV_ZIP_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1935] }, // Inst #4989 = PMOV_PZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1935] }, // Inst #4988 = PMOV_PZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1935] }, // Inst #4987 = PMOV_PZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1932] }, // Inst #4986 = PMOV_PZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1929] }, // Inst #4985 = PFIRST_B
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[391] }, // Inst #4984 = PFALSE
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1926] }, // Inst #4983 = PEXT_PCI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1926] }, // Inst #4982 = PEXT_PCI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1926] }, // Inst #4981 = PEXT_PCI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1926] }, // Inst #4980 = PEXT_PCI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1923] }, // Inst #4979 = PEXT_2PCI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1923] }, // Inst #4978 = PEXT_2PCI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1923] }, // Inst #4977 = PEXT_2PCI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1923] }, // Inst #4976 = PEXT_2PCI_B
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4975 = PACNBIBSPPC
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4974 = PACNBIASPPC
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4973 = PACM
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[624] }, // Inst #4972 = PACIZB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[624] }, // Inst #4971 = PACIZA
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4970 = PACIBZ
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4969 = PACIBSPPC
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4968 = PACIBSP
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4967 = PACIB171615
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4966 = PACIB1716
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[621] }, // Inst #4965 = PACIB
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4964 = PACIAZ
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4963 = PACIASPPC
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4962 = PACIASP
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4961 = PACIA171615
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #4960 = PACIA1716
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[621] }, // Inst #4959 = PACIA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4958 = PACGA
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[624] }, // Inst #4957 = PACDZB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[624] }, // Inst #4956 = PACDZA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[621] }, // Inst #4955 = PACDB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[621] }, // Inst #4954 = PACDA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #4953 = ORV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #4952 = ORV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #4951 = ORV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #4950 = ORV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #4949 = ORRv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[739] }, // Inst #4948 = ORRv8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[739] }, // Inst #4947 = ORRv4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[735] }, // Inst #4946 = ORRv4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[735] }, // Inst #4945 = ORRv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #4944 = ORRv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4943 = ORR_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4942 = ORR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4941 = ORR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4940 = ORR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4939 = ORR_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #4938 = ORR_ZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #4937 = ORR_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #4936 = ORRXrs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[608] }, // Inst #4935 = ORRXri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #4934 = ORRWrs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[605] }, // Inst #4933 = ORRWri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #4932 = ORRS_PPzPP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #4931 = ORQV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #4930 = ORQV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #4929 = ORQV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #4928 = ORQV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #4927 = ORNv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #4926 = ORNv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #4925 = ORN_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #4924 = ORNXrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #4923 = ORNWrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #4922 = ORNS_PPzPP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #4921 = NOTv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #4920 = NOTv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4919 = NOT_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4918 = NOT_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4917 = NOT_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4916 = NOT_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #4915 = NOR_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #4914 = NORS_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #4913 = NMATCH_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #4912 = NMATCH_PPzZZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #4911 = NEGv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #4910 = NEGv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #4909 = NEGv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #4908 = NEGv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #4907 = NEGv2i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #4906 = NEGv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #4905 = NEGv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #4904 = NEGv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4903 = NEG_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4902 = NEG_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4901 = NEG_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4900 = NEG_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #4899 = NBSL_ZZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #4898 = NAND_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #4897 = NANDS_PPzPP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1889] }, // Inst #4896 = MVNIv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1889] }, // Inst #4895 = MVNIv4s_msl
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1889] }, // Inst #4894 = MVNIv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1886] }, // Inst #4893 = MVNIv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1886] }, // Inst #4892 = MVNIv2s_msl
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1886] }, // Inst #4891 = MVNIv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #4890 = MULv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1194] }, // Inst #4889 = MULv8i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #4888 = MULv8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #4887 = MULv4i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #4886 = MULv4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1190] }, // Inst #4885 = MULv4i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #4884 = MULv4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1186] }, // Inst #4883 = MULv2i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #4882 = MULv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #4881 = MULv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4880 = MUL_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4879 = MUL_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4878 = MUL_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4877 = MUL_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #4876 = MUL_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #4875 = MUL_ZZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1198] }, // Inst #4874 = MUL_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4873 = MUL_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4872 = MUL_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4871 = MUL_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4870 = MUL_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #4869 = MUL_ZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #4868 = MUL_ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #4867 = MUL_ZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1920] }, // Inst #4866 = MUL_ZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1721] }, // Inst #4865 = MSUBXrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1725] }, // Inst #4864 = MSUBWrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1721] }, // Inst #4863 = MSUBPT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1918] }, // Inst #4862 = MSRpstatesvcrImm1
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1918] }, // Inst #4861 = MSRpstateImm4
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1918] }, // Inst #4860 = MSRpstateImm1
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1916] }, // Inst #4859 = MSRR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1914] }, // Inst #4858 = MSR
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4857 = MSB_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4856 = MSB_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4855 = MSB_ZPmZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4854 = MSB_ZPmZZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1912] }, // Inst #4853 = MRS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1910] }, // Inst #4852 = MRRS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[847] }, // Inst #4851 = MOVZXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1898] }, // Inst #4850 = MOVZWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1907] }, // Inst #4849 = MOVT_XTI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1904] }, // Inst #4848 = MOVT_TIX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1901] }, // Inst #4847 = MOVT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #4846 = MOVPRFX_ZZ
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #4845 = MOVPRFX_ZPzZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #4844 = MOVPRFX_ZPzZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #4843 = MOVPRFX_ZPzZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #4842 = MOVPRFX_ZPzZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4841 = MOVPRFX_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4840 = MOVPRFX_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4839 = MOVPRFX_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #4838 = MOVPRFX_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[847] }, // Inst #4837 = MOVNXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1898] }, // Inst #4836 = MOVNWi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #4835 = MOVKXi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1894] }, // Inst #4834 = MOVKWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1889] }, // Inst #4833 = MOVIv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1892] }, // Inst #4832 = MOVIv8b_ns
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1889] }, // Inst #4831 = MOVIv4s_msl
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1889] }, // Inst #4830 = MOVIv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1886] }, // Inst #4829 = MOVIv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1886] }, // Inst #4828 = MOVIv2s_msl
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1886] }, // Inst #4827 = MOVIv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1176] }, // Inst #4826 = MOVIv2d_ns
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1884] }, // Inst #4825 = MOVIv16b_ns
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1159] }, // Inst #4824 = MOVID
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #4823 = MOVA_VG4_MXI4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1880] }, // Inst #4822 = MOVA_VG4_4ZMXI
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #4821 = MOVA_VG2_MXI2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1876] }, // Inst #4820 = MOVA_VG2_2ZMXI
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1871] }, // Inst #4819 = MOVA_MXI4Z_V_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1866] }, // Inst #4818 = MOVA_MXI4Z_V_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1861] }, // Inst #4817 = MOVA_MXI4Z_V_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1856] }, // Inst #4816 = MOVA_MXI4Z_V_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1871] }, // Inst #4815 = MOVA_MXI4Z_H_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1866] }, // Inst #4814 = MOVA_MXI4Z_H_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1861] }, // Inst #4813 = MOVA_MXI4Z_H_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1856] }, // Inst #4812 = MOVA_MXI4Z_H_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1851] }, // Inst #4811 = MOVA_MXI2Z_V_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1846] }, // Inst #4810 = MOVA_MXI2Z_V_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1841] }, // Inst #4809 = MOVA_MXI2Z_V_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1836] }, // Inst #4808 = MOVA_MXI2Z_V_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1851] }, // Inst #4807 = MOVA_MXI2Z_H_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1846] }, // Inst #4806 = MOVA_MXI2Z_H_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1841] }, // Inst #4805 = MOVA_MXI2Z_H_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1836] }, // Inst #4804 = MOVA_MXI2Z_H_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1832] }, // Inst #4803 = MOVA_4ZMXI_V_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1828] }, // Inst #4802 = MOVA_4ZMXI_V_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1824] }, // Inst #4801 = MOVA_4ZMXI_V_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1820] }, // Inst #4800 = MOVA_4ZMXI_V_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1832] }, // Inst #4799 = MOVA_4ZMXI_H_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1828] }, // Inst #4798 = MOVA_4ZMXI_H_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1824] }, // Inst #4797 = MOVA_4ZMXI_H_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1820] }, // Inst #4796 = MOVA_4ZMXI_H_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1816] }, // Inst #4795 = MOVA_2ZMXI_V_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1812] }, // Inst #4794 = MOVA_2ZMXI_V_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1808] }, // Inst #4793 = MOVA_2ZMXI_V_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1804] }, // Inst #4792 = MOVA_2ZMXI_V_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1816] }, // Inst #4791 = MOVA_2ZMXI_H_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1812] }, // Inst #4790 = MOVA_2ZMXI_H_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1808] }, // Inst #4789 = MOVA_2ZMXI_H_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1804] }, // Inst #4788 = MOVA_2ZMXI_H_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1799] }, // Inst #4787 = MOVAZ_ZMI_V_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1794] }, // Inst #4786 = MOVAZ_ZMI_V_Q
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1789] }, // Inst #4785 = MOVAZ_ZMI_V_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1784] }, // Inst #4784 = MOVAZ_ZMI_V_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1779] }, // Inst #4783 = MOVAZ_ZMI_V_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1799] }, // Inst #4782 = MOVAZ_ZMI_H_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1794] }, // Inst #4781 = MOVAZ_ZMI_H_Q
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1789] }, // Inst #4780 = MOVAZ_ZMI_H_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1784] }, // Inst #4779 = MOVAZ_ZMI_H_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1779] }, // Inst #4778 = MOVAZ_ZMI_H_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1774] }, // Inst #4777 = MOVAZ_VG4_4ZM
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1769] }, // Inst #4776 = MOVAZ_VG2_2ZM
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1764] }, // Inst #4775 = MOVAZ_4ZMI_V_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1759] }, // Inst #4774 = MOVAZ_4ZMI_V_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1754] }, // Inst #4773 = MOVAZ_4ZMI_V_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1749] }, // Inst #4772 = MOVAZ_4ZMI_V_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1764] }, // Inst #4771 = MOVAZ_4ZMI_H_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1759] }, // Inst #4770 = MOVAZ_4ZMI_H_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1754] }, // Inst #4769 = MOVAZ_4ZMI_H_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1749] }, // Inst #4768 = MOVAZ_4ZMI_H_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1744] }, // Inst #4767 = MOVAZ_2ZMI_V_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1739] }, // Inst #4766 = MOVAZ_2ZMI_V_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1734] }, // Inst #4765 = MOVAZ_2ZMI_V_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1729] }, // Inst #4764 = MOVAZ_2ZMI_V_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1744] }, // Inst #4763 = MOVAZ_2ZMI_H_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1739] }, // Inst #4762 = MOVAZ_2ZMI_H_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1734] }, // Inst #4761 = MOVAZ_2ZMI_H_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1729] }, // Inst #4760 = MOVAZ_2ZMI_H_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #4759 = MOPSSETGETN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #4758 = MOPSSETGET
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #4757 = MOPSSETGEN
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #4756 = MOPSSETGE
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #4755 = MLSv8i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #4754 = MLSv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #4753 = MLSv8i16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #4752 = MLSv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #4751 = MLSv4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #4750 = MLSv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #4749 = MLSv4i16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #4748 = MLSv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #4747 = MLSv2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #4746 = MLSv16i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #4745 = MLS_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #4744 = MLS_ZZZI_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #4743 = MLS_ZZZI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4742 = MLS_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4741 = MLS_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4740 = MLS_ZPmZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4739 = MLS_ZPmZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #4738 = MLAv8i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #4737 = MLAv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #4736 = MLAv8i16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #4735 = MLAv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #4734 = MLAv4i32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #4733 = MLAv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #4732 = MLAv4i16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #4731 = MLAv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #4730 = MLAv2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #4729 = MLAv16i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #4728 = MLA_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #4727 = MLA_ZZZI_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #4726 = MLA_ZZZI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4725 = MLA_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4724 = MLA_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4723 = MLA_ZPmZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4722 = MLA_ZPmZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #4721 = MLA_CPA
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #4720 = MATCH_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #4719 = MATCH_PPzZZ_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4718 = MAD_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4717 = MAD_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4716 = MAD_ZPmZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #4715 = MAD_ZPmZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #4714 = MAD_CPA
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1721] }, // Inst #4713 = MADDXrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1725] }, // Inst #4712 = MADDWrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1721] }, // Inst #4711 = MADDPT
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1707] }, // Inst #4710 = LUTI4_ZZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1707] }, // Inst #4709 = LUTI4_ZZZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1703] }, // Inst #4708 = LUTI4_ZTZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1703] }, // Inst #4707 = LUTI4_ZTZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1703] }, // Inst #4706 = LUTI4_ZTZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1717] }, // Inst #4705 = LUTI4_Z2ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1714] }, // Inst #4704 = LUTI4_S_4ZZT2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1699] }, // Inst #4703 = LUTI4_S_4ZTZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1695] }, // Inst #4702 = LUTI4_S_2ZTZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1695] }, // Inst #4701 = LUTI4_S_2ZTZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1711] }, // Inst #4700 = LUTI4_4ZZT2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1691] }, // Inst #4699 = LUTI4_4ZTZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1691] }, // Inst #4698 = LUTI4_4ZTZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1687] }, // Inst #4697 = LUTI4_2ZTZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1687] }, // Inst #4696 = LUTI4_2ZTZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1687] }, // Inst #4695 = LUTI4_2ZTZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1707] }, // Inst #4694 = LUTI2_ZZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1707] }, // Inst #4693 = LUTI2_ZZZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1703] }, // Inst #4692 = LUTI2_ZTZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1703] }, // Inst #4691 = LUTI2_ZTZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1703] }, // Inst #4690 = LUTI2_ZTZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1699] }, // Inst #4689 = LUTI2_S_4ZTZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1699] }, // Inst #4688 = LUTI2_S_4ZTZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1695] }, // Inst #4687 = LUTI2_S_2ZTZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1695] }, // Inst #4686 = LUTI2_S_2ZTZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1691] }, // Inst #4685 = LUTI2_4ZTZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1691] }, // Inst #4684 = LUTI2_4ZTZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1691] }, // Inst #4683 = LUTI2_4ZTZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1687] }, // Inst #4682 = LUTI2_2ZTZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1687] }, // Inst #4681 = LUTI2_2ZTZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1687] }, // Inst #4680 = LUTI2_2ZTZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1683] }, // Inst #4679 = LUT4v8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #4678 = LUT4v16f8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #4677 = LUT2v8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #4676 = LUT2v16f8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #4675 = LSR_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #4674 = LSR_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #4673 = LSR_ZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #4672 = LSR_ZZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4671 = LSR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4670 = LSR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4669 = LSR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4668 = LSR_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #4667 = LSR_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #4666 = LSR_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #4665 = LSR_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #4664 = LSR_ZPmI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4663 = LSR_WIDE_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4662 = LSR_WIDE_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4661 = LSR_WIDE_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4660 = LSR_WIDE_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4659 = LSR_WIDE_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4658 = LSR_WIDE_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #4657 = LSRVXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #4656 = LSRVWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4655 = LSRR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4654 = LSRR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4653 = LSRR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4652 = LSRR_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #4651 = LSL_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #4650 = LSL_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #4649 = LSL_ZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #4648 = LSL_ZZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4647 = LSL_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4646 = LSL_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4645 = LSL_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4644 = LSL_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #4643 = LSL_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #4642 = LSL_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #4641 = LSL_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #4640 = LSL_ZPmI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4639 = LSL_WIDE_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4638 = LSL_WIDE_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #4637 = LSL_WIDE_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4636 = LSL_WIDE_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4635 = LSL_WIDE_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4634 = LSL_WIDE_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #4633 = LSLVXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #4632 = LSLVWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4631 = LSLR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4630 = LSLR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4629 = LSLR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #4628 = LSLR_ZPmZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #4627 = LDXRX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4626 = LDXRW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4625 = LDXRH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4624 = LDXRB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4623 = LDXPX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4622 = LDXPW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4621 = LDURXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4620 = LDURWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1503] }, // Inst #4619 = LDURSi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4618 = LDURSWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4617 = LDURSHXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4616 = LDURSHWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4615 = LDURSBXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4614 = LDURSBWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1500] }, // Inst #4613 = LDURQi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1497] }, // Inst #4612 = LDURHi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4611 = LDURHHi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1494] }, // Inst #4610 = LDURDi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1491] }, // Inst #4609 = LDURBi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4608 = LDURBBi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4607 = LDUMINX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4606 = LDUMINW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4605 = LDUMINLX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4604 = LDUMINLW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4603 = LDUMINLH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4602 = LDUMINLB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4601 = LDUMINH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4600 = LDUMINB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4599 = LDUMINAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4598 = LDUMINAW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4597 = LDUMINALX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4596 = LDUMINALW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4595 = LDUMINALH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4594 = LDUMINALB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4593 = LDUMINAH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4592 = LDUMINAB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4591 = LDUMAXX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4590 = LDUMAXW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4589 = LDUMAXLX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4588 = LDUMAXLW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4587 = LDUMAXLH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4586 = LDUMAXLB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4585 = LDUMAXH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4584 = LDUMAXB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4583 = LDUMAXAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4582 = LDUMAXAW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4581 = LDUMAXALX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4580 = LDUMAXALW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4579 = LDUMAXALH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4578 = LDUMAXALB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4577 = LDUMAXAH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4576 = LDUMAXAB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4575 = LDTRXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4574 = LDTRWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4573 = LDTRSWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4572 = LDTRSHXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4571 = LDTRSHWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4570 = LDTRSBXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4569 = LDTRSBWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4568 = LDTRHi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4567 = LDTRBi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4566 = LDSMINX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4565 = LDSMINW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4564 = LDSMINLX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4563 = LDSMINLW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4562 = LDSMINLH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4561 = LDSMINLB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4560 = LDSMINH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4559 = LDSMINB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4558 = LDSMINAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4557 = LDSMINAW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4556 = LDSMINALX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4555 = LDSMINALW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4554 = LDSMINALH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4553 = LDSMINALB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4552 = LDSMINAH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4551 = LDSMINAB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4550 = LDSMAXX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4549 = LDSMAXW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4548 = LDSMAXLX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4547 = LDSMAXLW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4546 = LDSMAXLH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4545 = LDSMAXLB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4544 = LDSMAXH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4543 = LDSMAXB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4542 = LDSMAXAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4541 = LDSMAXAW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4540 = LDSMAXALX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4539 = LDSMAXALW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4538 = LDSMAXALH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4537 = LDSMAXALB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4536 = LDSMAXAH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4535 = LDSMAXAB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4534 = LDSETX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4533 = LDSETW
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #4532 = LDSETPL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #4531 = LDSETPAL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #4530 = LDSETPA
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #4529 = LDSETP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4528 = LDSETLX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4527 = LDSETLW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4526 = LDSETLH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4525 = LDSETLB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4524 = LDSETH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4523 = LDSETB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4522 = LDSETAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4521 = LDSETAW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4520 = LDSETALX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4519 = LDSETALW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4518 = LDSETALH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4517 = LDSETALB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4516 = LDSETAH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4515 = LDSETAB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1680] }, // Inst #4514 = LDR_ZXI
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1675] }, // Inst #4513 = LDR_ZA
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[322] }, // Inst #4512 = LDR_TX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1672] }, // Inst #4511 = LDR_PXI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4510 = LDRXui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1651] }, // Inst #4509 = LDRXroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1646] }, // Inst #4508 = LDRXroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #4507 = LDRXpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #4506 = LDRXpost
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[582] }, // Inst #4505 = LDRXl
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4504 = LDRWui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1581] }, // Inst #4503 = LDRWroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1576] }, // Inst #4502 = LDRWroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #4501 = LDRWpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #4500 = LDRWpost
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[776] }, // Inst #4499 = LDRWl
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1503] }, // Inst #4498 = LDRSui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1667] }, // Inst #4497 = LDRSroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1662] }, // Inst #4496 = LDRSroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1658] }, // Inst #4495 = LDRSpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1658] }, // Inst #4494 = LDRSpost
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1656] }, // Inst #4493 = LDRSl
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4492 = LDRSWui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1651] }, // Inst #4491 = LDRSWroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1646] }, // Inst #4490 = LDRSWroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #4489 = LDRSWpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #4488 = LDRSWpost
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[582] }, // Inst #4487 = LDRSWl
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4486 = LDRSHXui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1651] }, // Inst #4485 = LDRSHXroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1646] }, // Inst #4484 = LDRSHXroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #4483 = LDRSHXpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #4482 = LDRSHXpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4481 = LDRSHWui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1581] }, // Inst #4480 = LDRSHWroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1576] }, // Inst #4479 = LDRSHWroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #4478 = LDRSHWpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #4477 = LDRSHWpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4476 = LDRSBXui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1651] }, // Inst #4475 = LDRSBXroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1646] }, // Inst #4474 = LDRSBXroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #4473 = LDRSBXpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #4472 = LDRSBXpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4471 = LDRSBWui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1581] }, // Inst #4470 = LDRSBWroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1576] }, // Inst #4469 = LDRSBWroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #4468 = LDRSBWpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #4467 = LDRSBWpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1500] }, // Inst #4466 = LDRQui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1641] }, // Inst #4465 = LDRQroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1636] }, // Inst #4464 = LDRQroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1632] }, // Inst #4463 = LDRQpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1632] }, // Inst #4462 = LDRQpost
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1630] }, // Inst #4461 = LDRQl
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1497] }, // Inst #4460 = LDRHui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1625] }, // Inst #4459 = LDRHroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1620] }, // Inst #4458 = LDRHroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1616] }, // Inst #4457 = LDRHpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1616] }, // Inst #4456 = LDRHpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4455 = LDRHHui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1581] }, // Inst #4454 = LDRHHroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1576] }, // Inst #4453 = LDRHHroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #4452 = LDRHHpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #4451 = LDRHHpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1494] }, // Inst #4450 = LDRDui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1611] }, // Inst #4449 = LDRDroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1606] }, // Inst #4448 = LDRDroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1602] }, // Inst #4447 = LDRDpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1602] }, // Inst #4446 = LDRDpost
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1600] }, // Inst #4445 = LDRDl
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1491] }, // Inst #4444 = LDRBui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1595] }, // Inst #4443 = LDRBroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1590] }, // Inst #4442 = LDRBroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1586] }, // Inst #4441 = LDRBpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1586] }, // Inst #4440 = LDRBpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4439 = LDRBBui
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1581] }, // Inst #4438 = LDRBBroX
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1576] }, // Inst #4437 = LDRBBroW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #4436 = LDRBBpre
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1572] }, // Inst #4435 = LDRBBpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #4434 = LDRABwriteback
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4433 = LDRABindexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1568] }, // Inst #4432 = LDRAAwriteback
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4431 = LDRAAindexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1553] }, // Inst #4430 = LDPXpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1553] }, // Inst #4429 = LDPXpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1539] }, // Inst #4428 = LDPXi
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1563] }, // Inst #4427 = LDPWpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1563] }, // Inst #4426 = LDPWpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1535] }, // Inst #4425 = LDPWi
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1558] }, // Inst #4424 = LDPSpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1558] }, // Inst #4423 = LDPSpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1531] }, // Inst #4422 = LDPSi
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1553] }, // Inst #4421 = LDPSWpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1553] }, // Inst #4420 = LDPSWpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1539] }, // Inst #4419 = LDPSWi
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1548] }, // Inst #4418 = LDPQpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1548] }, // Inst #4417 = LDPQpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1527] }, // Inst #4416 = LDPQi
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1543] }, // Inst #4415 = LDPDpre
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1543] }, // Inst #4414 = LDPDpost
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1523] }, // Inst #4413 = LDPDi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4412 = LDNT1W_ZZR_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4411 = LDNT1W_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4410 = LDNT1W_ZRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4409 = LDNT1W_ZRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #4408 = LDNT1W_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #4407 = LDNT1W_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #4406 = LDNT1W_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #4405 = LDNT1W_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #4404 = LDNT1W_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #4403 = LDNT1W_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #4402 = LDNT1W_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #4401 = LDNT1W_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4400 = LDNT1SW_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4399 = LDNT1SH_ZZR_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4398 = LDNT1SH_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4397 = LDNT1SB_ZZR_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4396 = LDNT1SB_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4395 = LDNT1H_ZZR_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4394 = LDNT1H_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4393 = LDNT1H_ZRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4392 = LDNT1H_ZRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #4391 = LDNT1H_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #4390 = LDNT1H_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #4389 = LDNT1H_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #4388 = LDNT1H_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #4387 = LDNT1H_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #4386 = LDNT1H_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #4385 = LDNT1H_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #4384 = LDNT1H_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4383 = LDNT1D_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4382 = LDNT1D_ZRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4381 = LDNT1D_ZRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #4380 = LDNT1D_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #4379 = LDNT1D_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #4378 = LDNT1D_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #4377 = LDNT1D_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #4376 = LDNT1D_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #4375 = LDNT1D_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #4374 = LDNT1D_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #4373 = LDNT1D_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4372 = LDNT1B_ZZR_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #4371 = LDNT1B_ZZR_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4370 = LDNT1B_ZRR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4369 = LDNT1B_ZRI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #4368 = LDNT1B_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #4367 = LDNT1B_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #4366 = LDNT1B_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #4365 = LDNT1B_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #4364 = LDNT1B_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #4363 = LDNT1B_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #4362 = LDNT1B_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #4361 = LDNT1B_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1539] }, // Inst #4360 = LDNPXi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1535] }, // Inst #4359 = LDNPWi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1531] }, // Inst #4358 = LDNPSi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1527] }, // Inst #4357 = LDNPQi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1523] }, // Inst #4356 = LDNPDi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4355 = LDNF1W_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4354 = LDNF1W_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4353 = LDNF1SW_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4352 = LDNF1SH_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4351 = LDNF1SH_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4350 = LDNF1SB_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4349 = LDNF1SB_H_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4348 = LDNF1SB_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4347 = LDNF1H_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4346 = LDNF1H_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4345 = LDNF1H_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4344 = LDNF1D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4343 = LDNF1B_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4342 = LDNF1B_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4341 = LDNF1B_H_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4340 = LDNF1B_D_IMM_REAL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #4339 = LDLARX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4338 = LDLARW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4337 = LDLARH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4336 = LDLARB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1519] }, // Inst #4335 = LDIAPPXpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4334 = LDIAPPX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1515] }, // Inst #4333 = LDIAPPWpost
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4332 = LDIAPPW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #4331 = LDGM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1511] }, // Inst #4330 = LDG
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4329 = LDFF1W_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4328 = LDFF1W_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4327 = LDFF1SW_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4326 = LDFF1SH_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4325 = LDFF1SH_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4324 = LDFF1SB_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4323 = LDFF1SB_H_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4322 = LDFF1SB_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4321 = LDFF1H_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4320 = LDFF1H_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4319 = LDFF1H_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4318 = LDFF1D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4317 = LDFF1B_S_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4316 = LDFF1B_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4315 = LDFF1B_H_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #4314 = LDFF1B_D_REAL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4313 = LDEORX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4312 = LDEORW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4311 = LDEORLX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4310 = LDEORLW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4309 = LDEORLH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4308 = LDEORLB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4307 = LDEORH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4306 = LDEORB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4305 = LDEORAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4304 = LDEORAW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4303 = LDEORALX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4302 = LDEORALW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4301 = LDEORALH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4300 = LDEORALB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4299 = LDEORAH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4298 = LDEORAB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4297 = LDCLRX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4296 = LDCLRW
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #4295 = LDCLRPL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #4294 = LDCLRPAL
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #4293 = LDCLRPA
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1506] }, // Inst #4292 = LDCLRP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4291 = LDCLRLX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4290 = LDCLRLW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4289 = LDCLRLH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4288 = LDCLRLB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4287 = LDCLRH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4286 = LDCLRB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4285 = LDCLRAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4284 = LDCLRAW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4283 = LDCLRALX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4282 = LDCLRALW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4281 = LDCLRALH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4280 = LDCLRALB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4279 = LDCLRAH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4278 = LDCLRAB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #4277 = LDAXRX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4276 = LDAXRW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4275 = LDAXRH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4274 = LDAXRB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4273 = LDAXPX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4272 = LDAXPW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #4271 = LDARX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4270 = LDARW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4269 = LDARH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4268 = LDARB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1503] }, // Inst #4267 = LDAPURsi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1500] }, // Inst #4266 = LDAPURqi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4265 = LDAPURi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1497] }, // Inst #4264 = LDAPURhi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1494] }, // Inst #4263 = LDAPURdi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1491] }, // Inst #4262 = LDAPURbi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4261 = LDAPURXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4260 = LDAPURSWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4259 = LDAPURSHXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4258 = LDAPURSHWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #4257 = LDAPURSBXi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4256 = LDAPURSBWi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4255 = LDAPURHi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1488] }, // Inst #4254 = LDAPURBi
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1485] }, // Inst #4253 = LDAPRXpost
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #4252 = LDAPRX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1482] }, // Inst #4251 = LDAPRWpost
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4250 = LDAPRW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4249 = LDAPRH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1480] }, // Inst #4248 = LDAPRB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1408] }, // Inst #4247 = LDAP1
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4246 = LDADDX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4245 = LDADDW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4244 = LDADDLX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4243 = LDADDLW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4242 = LDADDLH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4241 = LDADDLB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4240 = LDADDH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4239 = LDADDB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4238 = LDADDAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4237 = LDADDAW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1477] }, // Inst #4236 = LDADDALX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4235 = LDADDALW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4234 = LDADDALH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4233 = LDADDALB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4232 = LDADDAH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1474] }, // Inst #4231 = LDADDAB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1472] }, // Inst #4230 = LD64B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1466] }, // Inst #4229 = LD4i8_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1462] }, // Inst #4228 = LD4i8
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1466] }, // Inst #4227 = LD4i64_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1462] }, // Inst #4226 = LD4i64
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1466] }, // Inst #4225 = LD4i32_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1462] }, // Inst #4224 = LD4i32
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1466] }, // Inst #4223 = LD4i16_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1462] }, // Inst #4222 = LD4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1458] }, // Inst #4221 = LD4W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1454] }, // Inst #4220 = LD4W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #4219 = LD4Rv8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #4218 = LD4Rv8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #4217 = LD4Rv8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #4216 = LD4Rv8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #4215 = LD4Rv4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #4214 = LD4Rv4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #4213 = LD4Rv4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #4212 = LD4Rv4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #4211 = LD4Rv2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #4210 = LD4Rv2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #4209 = LD4Rv2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #4208 = LD4Rv2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #4207 = LD4Rv1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #4206 = LD4Rv1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #4205 = LD4Rv16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #4204 = LD4Rv16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1458] }, // Inst #4203 = LD4Q_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1454] }, // Inst #4202 = LD4Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1458] }, // Inst #4201 = LD4H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1454] }, // Inst #4200 = LD4H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #4199 = LD4Fourv8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #4198 = LD4Fourv8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #4197 = LD4Fourv8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #4196 = LD4Fourv8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #4195 = LD4Fourv4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #4194 = LD4Fourv4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #4193 = LD4Fourv4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #4192 = LD4Fourv4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #4191 = LD4Fourv2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #4190 = LD4Fourv2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #4189 = LD4Fourv2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #4188 = LD4Fourv2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #4187 = LD4Fourv16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #4186 = LD4Fourv16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1458] }, // Inst #4185 = LD4D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1454] }, // Inst #4184 = LD4D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1458] }, // Inst #4183 = LD4B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1454] }, // Inst #4182 = LD4B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1448] }, // Inst #4181 = LD3i8_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1444] }, // Inst #4180 = LD3i8
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1448] }, // Inst #4179 = LD3i64_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1444] }, // Inst #4178 = LD3i64
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1448] }, // Inst #4177 = LD3i32_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1444] }, // Inst #4176 = LD3i32
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1448] }, // Inst #4175 = LD3i16_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1444] }, // Inst #4174 = LD3i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1440] }, // Inst #4173 = LD3W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1436] }, // Inst #4172 = LD3W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4171 = LD3Threev8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4170 = LD3Threev8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4169 = LD3Threev8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4168 = LD3Threev8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4167 = LD3Threev4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4166 = LD3Threev4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4165 = LD3Threev4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4164 = LD3Threev4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4163 = LD3Threev2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4162 = LD3Threev2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4161 = LD3Threev2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4160 = LD3Threev2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4159 = LD3Threev16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4158 = LD3Threev16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4157 = LD3Rv8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4156 = LD3Rv8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4155 = LD3Rv8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4154 = LD3Rv8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4153 = LD3Rv4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4152 = LD3Rv4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4151 = LD3Rv4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4150 = LD3Rv4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4149 = LD3Rv2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4148 = LD3Rv2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4147 = LD3Rv2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4146 = LD3Rv2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4145 = LD3Rv1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4144 = LD3Rv1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4143 = LD3Rv16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4142 = LD3Rv16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1440] }, // Inst #4141 = LD3Q_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1436] }, // Inst #4140 = LD3Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1440] }, // Inst #4139 = LD3H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1436] }, // Inst #4138 = LD3H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1440] }, // Inst #4137 = LD3D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1436] }, // Inst #4136 = LD3D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1440] }, // Inst #4135 = LD3B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1436] }, // Inst #4134 = LD3B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1430] }, // Inst #4133 = LD2i8_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1426] }, // Inst #4132 = LD2i8
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1430] }, // Inst #4131 = LD2i64_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1426] }, // Inst #4130 = LD2i64
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1430] }, // Inst #4129 = LD2i32_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1426] }, // Inst #4128 = LD2i32
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1430] }, // Inst #4127 = LD2i16_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1426] }, // Inst #4126 = LD2i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1422] }, // Inst #4125 = LD2W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1418] }, // Inst #4124 = LD2W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4123 = LD2Twov8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4122 = LD2Twov8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4121 = LD2Twov8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4120 = LD2Twov8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4119 = LD2Twov4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4118 = LD2Twov4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4117 = LD2Twov4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4116 = LD2Twov4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4115 = LD2Twov2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4114 = LD2Twov2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4113 = LD2Twov2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4112 = LD2Twov2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4111 = LD2Twov16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4110 = LD2Twov16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4109 = LD2Rv8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4108 = LD2Rv8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4107 = LD2Rv8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4106 = LD2Rv8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4105 = LD2Rv4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4104 = LD2Rv4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4103 = LD2Rv4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4102 = LD2Rv4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4101 = LD2Rv2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4100 = LD2Rv2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4099 = LD2Rv2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4098 = LD2Rv2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4097 = LD2Rv1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4096 = LD2Rv1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4095 = LD2Rv16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4094 = LD2Rv16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1422] }, // Inst #4093 = LD2Q_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1418] }, // Inst #4092 = LD2Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1422] }, // Inst #4091 = LD2H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1418] }, // Inst #4090 = LD2H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1422] }, // Inst #4089 = LD2D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1418] }, // Inst #4088 = LD2D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1422] }, // Inst #4087 = LD2B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1418] }, // Inst #4086 = LD2B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1412] }, // Inst #4085 = LD1i8_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1408] }, // Inst #4084 = LD1i8
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1412] }, // Inst #4083 = LD1i64_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1408] }, // Inst #4082 = LD1i64
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1412] }, // Inst #4081 = LD1i32_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1408] }, // Inst #4080 = LD1i32
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1412] }, // Inst #4079 = LD1i16_POST
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1408] }, // Inst #4078 = LD1i16
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1402] }, // Inst #4077 = LD1_MXIPXX_V_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1396] }, // Inst #4076 = LD1_MXIPXX_V_Q
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1390] }, // Inst #4075 = LD1_MXIPXX_V_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1384] }, // Inst #4074 = LD1_MXIPXX_V_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1378] }, // Inst #4073 = LD1_MXIPXX_V_B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1402] }, // Inst #4072 = LD1_MXIPXX_H_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1396] }, // Inst #4071 = LD1_MXIPXX_H_Q
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1390] }, // Inst #4070 = LD1_MXIPXX_H_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1384] }, // Inst #4069 = LD1_MXIPXX_H_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1378] }, // Inst #4068 = LD1_MXIPXX_H_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4067 = LD1W_Q_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4066 = LD1W_Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4065 = LD1W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4064 = LD1W_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4063 = LD1W_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #4062 = LD1W_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #4061 = LD1W_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #4060 = LD1W_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #4059 = LD1W_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #4058 = LD1W_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #4057 = LD1W_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #4056 = LD1W_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #4055 = LD1W_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4054 = LD1W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4053 = LD1Twov8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4052 = LD1Twov8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4051 = LD1Twov8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4050 = LD1Twov8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4049 = LD1Twov4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4048 = LD1Twov4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4047 = LD1Twov4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4046 = LD1Twov4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4045 = LD1Twov2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4044 = LD1Twov2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4043 = LD1Twov2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4042 = LD1Twov2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1374] }, // Inst #4041 = LD1Twov1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1372] }, // Inst #4040 = LD1Twov1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1368] }, // Inst #4039 = LD1Twov16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1366] }, // Inst #4038 = LD1Twov16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4037 = LD1Threev8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4036 = LD1Threev8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4035 = LD1Threev8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4034 = LD1Threev8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4033 = LD1Threev4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4032 = LD1Threev4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4031 = LD1Threev4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4030 = LD1Threev4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4029 = LD1Threev2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4028 = LD1Threev2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4027 = LD1Threev2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4026 = LD1Threev2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1362] }, // Inst #4025 = LD1Threev1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1360] }, // Inst #4024 = LD1Threev1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1356] }, // Inst #4023 = LD1Threev16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1354] }, // Inst #4022 = LD1Threev16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4021 = LD1SW_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4020 = LD1SW_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4019 = LD1SH_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4018 = LD1SH_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4017 = LD1SH_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4016 = LD1SH_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4015 = LD1SB_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4014 = LD1SB_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4013 = LD1SB_H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4012 = LD1SB_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #4011 = LD1SB_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #4010 = LD1SB_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #4009 = LD1Rv8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #4008 = LD1Rv8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #4007 = LD1Rv8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #4006 = LD1Rv8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #4005 = LD1Rv4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #4004 = LD1Rv4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #4003 = LD1Rv4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #4002 = LD1Rv4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #4001 = LD1Rv2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #4000 = LD1Rv2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #3999 = LD1Rv2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #3998 = LD1Rv2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #3997 = LD1Rv1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #3996 = LD1Rv1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #3995 = LD1Rv16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #3994 = LD1Rv16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3993 = LD1RW_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3992 = LD1RW_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3991 = LD1RSW_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3990 = LD1RSH_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3989 = LD1RSH_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3988 = LD1RSB_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3987 = LD1RSB_H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3986 = LD1RSB_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3985 = LD1RQ_W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3984 = LD1RQ_W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3983 = LD1RQ_H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3982 = LD1RQ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3981 = LD1RQ_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3980 = LD1RQ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3979 = LD1RQ_B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3978 = LD1RQ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3977 = LD1RO_W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3976 = LD1RO_W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3975 = LD1RO_H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3974 = LD1RO_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3973 = LD1RO_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3972 = LD1RO_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3971 = LD1RO_B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3970 = LD1RO_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3969 = LD1RH_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3968 = LD1RH_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3967 = LD1RH_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3966 = LD1RD_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3965 = LD1RB_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3964 = LD1RB_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3963 = LD1RB_H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3962 = LD1RB_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #3961 = LD1Onev8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #3960 = LD1Onev8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #3959 = LD1Onev8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #3958 = LD1Onev8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #3957 = LD1Onev4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #3956 = LD1Onev4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #3955 = LD1Onev4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #3954 = LD1Onev4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #3953 = LD1Onev2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #3952 = LD1Onev2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #3951 = LD1Onev2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #3950 = LD1Onev2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1350] }, // Inst #3949 = LD1Onev1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1348] }, // Inst #3948 = LD1Onev1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1344] }, // Inst #3947 = LD1Onev16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1342] }, // Inst #3946 = LD1Onev16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3945 = LD1H_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3944 = LD1H_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3943 = LD1H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3942 = LD1H_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3941 = LD1H_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #3940 = LD1H_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #3939 = LD1H_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #3938 = LD1H_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #3937 = LD1H_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #3936 = LD1H_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #3935 = LD1H_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #3934 = LD1H_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #3933 = LD1H_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3932 = LD1H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #3931 = LD1Fourv8h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #3930 = LD1Fourv8h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #3929 = LD1Fourv8b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #3928 = LD1Fourv8b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #3927 = LD1Fourv4s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #3926 = LD1Fourv4s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #3925 = LD1Fourv4h_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #3924 = LD1Fourv4h
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #3923 = LD1Fourv2s_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #3922 = LD1Fourv2s
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #3921 = LD1Fourv2d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #3920 = LD1Fourv2d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1338] }, // Inst #3919 = LD1Fourv1d_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1336] }, // Inst #3918 = LD1Fourv1d
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1332] }, // Inst #3917 = LD1Fourv16b_POST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1330] }, // Inst #3916 = LD1Fourv16b
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3915 = LD1D_Q_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3914 = LD1D_Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3913 = LD1D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #3912 = LD1D_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #3911 = LD1D_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #3910 = LD1D_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #3909 = LD1D_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #3908 = LD1D_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #3907 = LD1D_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #3906 = LD1D_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #3905 = LD1D_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3904 = LD1D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3903 = LD1B_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3902 = LD1B_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3901 = LD1B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3900 = LD1B_H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3899 = LD1B_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #3898 = LD1B_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3897 = LD1B_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1326] }, // Inst #3896 = LD1B_4Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1322] }, // Inst #3895 = LD1B_4Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1318] }, // Inst #3894 = LD1B_4Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1314] }, // Inst #3893 = LD1B_4Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1310] }, // Inst #3892 = LD1B_2Z_STRIDED_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1306] }, // Inst #3891 = LD1B_2Z_STRIDED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1302] }, // Inst #3890 = LD1B_2Z_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1298] }, // Inst #3889 = LD1B_2Z
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1294] }, // Inst #3888 = LD1B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1291] }, // Inst #3887 = LASTB_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1288] }, // Inst #3886 = LASTB_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1285] }, // Inst #3885 = LASTB_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1282] }, // Inst #3884 = LASTB_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1276] }, // Inst #3883 = LASTB_RPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1276] }, // Inst #3882 = LASTB_RPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1279] }, // Inst #3881 = LASTB_RPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1276] }, // Inst #3880 = LASTB_RPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1291] }, // Inst #3879 = LASTA_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1288] }, // Inst #3878 = LASTA_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1285] }, // Inst #3877 = LASTA_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1282] }, // Inst #3876 = LASTA_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1276] }, // Inst #3875 = LASTA_RPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1276] }, // Inst #3874 = LASTA_RPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1279] }, // Inst #3873 = LASTA_RPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1276] }, // Inst #3872 = LASTA_RPZ_B
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #3871 = ISB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[279] }, // Inst #3870 = IRG
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1267] }, // Inst #3869 = INSvi8lane
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1263] }, // Inst #3868 = INSvi8gpr
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1267] }, // Inst #3867 = INSvi64lane
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1272] }, // Inst #3866 = INSvi64gpr
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1267] }, // Inst #3865 = INSvi32lane
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1263] }, // Inst #3864 = INSvi32gpr
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1267] }, // Inst #3863 = INSvi16lane
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1263] }, // Inst #3862 = INSvi16gpr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #3861 = INSR_ZV_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #3860 = INSR_ZV_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #3859 = INSR_ZV_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #3858 = INSR_ZV_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1257] }, // Inst #3857 = INSR_ZR_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1257] }, // Inst #3856 = INSR_ZR_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1260] }, // Inst #3855 = INSR_ZR_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1257] }, // Inst #3854 = INSR_ZR_B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1251] }, // Inst #3853 = INSERT_MXIPZ_V_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1245] }, // Inst #3852 = INSERT_MXIPZ_V_Q
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1239] }, // Inst #3851 = INSERT_MXIPZ_V_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1233] }, // Inst #3850 = INSERT_MXIPZ_V_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1227] }, // Inst #3849 = INSERT_MXIPZ_V_B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1251] }, // Inst #3848 = INSERT_MXIPZ_H_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1245] }, // Inst #3847 = INSERT_MXIPZ_H_Q
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1239] }, // Inst #3846 = INSERT_MXIPZ_H_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1233] }, // Inst #3845 = INSERT_MXIPZ_H_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1227] }, // Inst #3844 = INSERT_MXIPZ_H_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1221] }, // Inst #3843 = INDEX_RR_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1221] }, // Inst #3842 = INDEX_RR_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1224] }, // Inst #3841 = INDEX_RR_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1221] }, // Inst #3840 = INDEX_RR_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1215] }, // Inst #3839 = INDEX_RI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1215] }, // Inst #3838 = INDEX_RI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1218] }, // Inst #3837 = INDEX_RI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1215] }, // Inst #3836 = INDEX_RI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1209] }, // Inst #3835 = INDEX_IR_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1209] }, // Inst #3834 = INDEX_IR_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1212] }, // Inst #3833 = INDEX_IR_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1209] }, // Inst #3832 = INDEX_IR_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[912] }, // Inst #3831 = INDEX_II_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[912] }, // Inst #3830 = INDEX_II_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[912] }, // Inst #3829 = INDEX_II_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[912] }, // Inst #3828 = INDEX_II_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #3827 = INCW_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #3826 = INCW_XPiI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #3825 = INCP_ZP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #3824 = INCP_ZP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #3823 = INCP_ZP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #3822 = INCP_XP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #3821 = INCP_XP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #3820 = INCP_XP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #3819 = INCP_XP_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #3818 = INCH_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #3817 = INCH_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #3816 = INCD_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #3815 = INCD_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #3814 = INCB_XPiI
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #3813 = HVC
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #3812 = HLT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3811 = HISTSEG_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #3810 = HISTCNT_ZPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #3809 = HISTCNT_ZPzZZ_D
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #3808 = HINT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1206] }, // Inst #3807 = GMI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3806 = GLDFF1W_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3805 = GLDFF1W_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3804 = GLDFF1W_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3803 = GLDFF1W_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3802 = GLDFF1W_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3801 = GLDFF1W_D_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3800 = GLDFF1W_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3799 = GLDFF1W_D_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3798 = GLDFF1W_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3797 = GLDFF1W_D_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3796 = GLDFF1W_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3795 = GLDFF1W_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3794 = GLDFF1SW_D_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3793 = GLDFF1SW_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3792 = GLDFF1SW_D_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3791 = GLDFF1SW_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3790 = GLDFF1SW_D_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3789 = GLDFF1SW_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3788 = GLDFF1SW_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3787 = GLDFF1SH_S_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3786 = GLDFF1SH_S_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3785 = GLDFF1SH_S_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3784 = GLDFF1SH_S_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3783 = GLDFF1SH_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3782 = GLDFF1SH_D_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3781 = GLDFF1SH_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3780 = GLDFF1SH_D_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3779 = GLDFF1SH_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3778 = GLDFF1SH_D_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3777 = GLDFF1SH_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3776 = GLDFF1SH_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3775 = GLDFF1SB_S_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3774 = GLDFF1SB_S_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #3773 = GLDFF1SB_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3772 = GLDFF1SB_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3771 = GLDFF1SB_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3770 = GLDFF1SB_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #3769 = GLDFF1SB_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3768 = GLDFF1H_S_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3767 = GLDFF1H_S_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3766 = GLDFF1H_S_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3765 = GLDFF1H_S_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3764 = GLDFF1H_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3763 = GLDFF1H_D_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3762 = GLDFF1H_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3761 = GLDFF1H_D_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3760 = GLDFF1H_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3759 = GLDFF1H_D_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3758 = GLDFF1H_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3757 = GLDFF1H_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3756 = GLDFF1D_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3755 = GLDFF1D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3754 = GLDFF1D_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3753 = GLDFF1D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3752 = GLDFF1D_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3751 = GLDFF1D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3750 = GLDFF1D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3749 = GLDFF1B_S_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3748 = GLDFF1B_S_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #3747 = GLDFF1B_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3746 = GLDFF1B_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3745 = GLDFF1B_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3744 = GLDFF1B_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #3743 = GLDFF1B_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3742 = GLD1W_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3741 = GLD1W_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3740 = GLD1W_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3739 = GLD1W_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3738 = GLD1W_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3737 = GLD1W_D_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3736 = GLD1W_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3735 = GLD1W_D_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3734 = GLD1W_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3733 = GLD1W_D_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3732 = GLD1W_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3731 = GLD1W_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3730 = GLD1SW_D_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3729 = GLD1SW_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3728 = GLD1SW_D_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3727 = GLD1SW_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3726 = GLD1SW_D_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3725 = GLD1SW_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3724 = GLD1SW_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3723 = GLD1SH_S_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3722 = GLD1SH_S_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3721 = GLD1SH_S_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3720 = GLD1SH_S_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3719 = GLD1SH_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3718 = GLD1SH_D_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3717 = GLD1SH_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3716 = GLD1SH_D_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3715 = GLD1SH_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3714 = GLD1SH_D_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3713 = GLD1SH_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3712 = GLD1SH_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3711 = GLD1SB_S_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3710 = GLD1SB_S_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #3709 = GLD1SB_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3708 = GLD1SB_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3707 = GLD1SB_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3706 = GLD1SB_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #3705 = GLD1SB_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1202] }, // Inst #3704 = GLD1Q
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3703 = GLD1H_S_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3702 = GLD1H_S_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3701 = GLD1H_S_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3700 = GLD1H_S_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3699 = GLD1H_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3698 = GLD1H_D_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3697 = GLD1H_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3696 = GLD1H_D_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3695 = GLD1H_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3694 = GLD1H_D_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3693 = GLD1H_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3692 = GLD1H_D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3691 = GLD1D_UXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3690 = GLD1D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3689 = GLD1D_SXTW_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3688 = GLD1D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3687 = GLD1D_SCALED_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3686 = GLD1D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #3685 = GLD1D_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3684 = GLD1B_S_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3683 = GLD1B_S_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #3682 = GLD1B_S_IMM_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3681 = GLD1B_D_UXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3680 = GLD1B_D_SXTW_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #3679 = GLD1B_D_REAL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #3678 = GLD1B_D_IMM_REAL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #3677 = GCSSTTR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #3676 = GCSSTR
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #3675 = GCSSS2
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #3674 = GCSSS1
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #3673 = GCSPUSHX
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #3672 = GCSPUSHM
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #3671 = GCSPOPX
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #3670 = GCSPOPM
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #3669 = GCSPOPCX
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3668 = FVDOT_VG2_M2ZZI_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3667 = FVDOT_VG2_M2ZZI_BtoH
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3666 = FVDOTT_VG4_M2ZZI_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3665 = FVDOTB_VG4_M2ZZI_BtoS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3664 = FTSSEL_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3663 = FTSSEL_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3662 = FTSSEL_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3661 = FTSMUL_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3660 = FTSMUL_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3659 = FTSMUL_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[940] }, // Inst #3658 = FTMAD_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[940] }, // Inst #3657 = FTMAD_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[940] }, // Inst #3656 = FTMAD_ZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3655 = FSUBv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3654 = FSUBv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3653 = FSUBv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3652 = FSUBv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3651 = FSUBv2f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3650 = FSUB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3649 = FSUB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3648 = FSUB_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3647 = FSUB_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3646 = FSUB_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3645 = FSUB_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3644 = FSUB_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3643 = FSUB_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3642 = FSUB_ZPmI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #3641 = FSUB_VG4_M4Z_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #3640 = FSUB_VG4_M4Z_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #3639 = FSUB_VG4_M4Z_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #3638 = FSUB_VG2_M2Z_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #3637 = FSUB_VG2_M2Z_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #3636 = FSUB_VG2_M2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #3635 = FSUBSrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3634 = FSUBR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3633 = FSUBR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3632 = FSUBR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3631 = FSUBR_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3630 = FSUBR_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3629 = FSUBR_ZPmI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #3628 = FSUBHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3627 = FSUBDrr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3626 = FSQRTv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3625 = FSQRTv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3624 = FSQRTv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3623 = FSQRTv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3622 = FSQRTv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3621 = FSQRT_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3620 = FSQRT_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3619 = FSQRT_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3618 = FSQRTSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3617 = FSQRTHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3616 = FSQRTDr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3615 = FSCALEv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3614 = FSCALEv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3613 = FSCALEv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3612 = FSCALEv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3611 = FSCALEv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3610 = FSCALE_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3609 = FSCALE_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3608 = FSCALE_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3607 = FSCALE_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3606 = FSCALE_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3605 = FSCALE_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3604 = FSCALE_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3603 = FSCALE_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3602 = FSCALE_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3601 = FSCALE_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3600 = FSCALE_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3599 = FSCALE_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3598 = FSCALE_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3597 = FSCALE_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3596 = FSCALE_2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3595 = FRSQRTSv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3594 = FRSQRTSv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3593 = FRSQRTSv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3592 = FRSQRTSv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3591 = FRSQRTSv2f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3590 = FRSQRTS_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3589 = FRSQRTS_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3588 = FRSQRTS_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3587 = FRSQRTS64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #3586 = FRSQRTS32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #3585 = FRSQRTS16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3584 = FRSQRTEv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3583 = FRSQRTEv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3582 = FRSQRTEv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3581 = FRSQRTEv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3580 = FRSQRTEv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3579 = FRSQRTEv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3578 = FRSQRTEv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3577 = FRSQRTEv1f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #3576 = FRSQRTE_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #3575 = FRSQRTE_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #3574 = FRSQRTE_ZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3573 = FRINTZv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3572 = FRINTZv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3571 = FRINTZv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3570 = FRINTZv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3569 = FRINTZv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3568 = FRINTZ_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3567 = FRINTZ_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3566 = FRINTZ_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3565 = FRINTZSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3564 = FRINTZHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3563 = FRINTZDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3562 = FRINTXv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3561 = FRINTXv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3560 = FRINTXv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3559 = FRINTXv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3558 = FRINTXv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3557 = FRINTX_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3556 = FRINTX_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3555 = FRINTX_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3554 = FRINTXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3553 = FRINTXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3552 = FRINTXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3551 = FRINTPv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3550 = FRINTPv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3549 = FRINTPv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3548 = FRINTPv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3547 = FRINTPv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3546 = FRINTP_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3545 = FRINTP_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3544 = FRINTP_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #3543 = FRINTP_4Z4Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1102] }, // Inst #3542 = FRINTP_2Z2Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3541 = FRINTPSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3540 = FRINTPHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3539 = FRINTPDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3538 = FRINTNv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3537 = FRINTNv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3536 = FRINTNv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3535 = FRINTNv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3534 = FRINTNv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3533 = FRINTN_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3532 = FRINTN_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3531 = FRINTN_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #3530 = FRINTN_4Z4Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1102] }, // Inst #3529 = FRINTN_2Z2Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3528 = FRINTNSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3527 = FRINTNHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3526 = FRINTNDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3525 = FRINTMv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3524 = FRINTMv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3523 = FRINTMv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3522 = FRINTMv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3521 = FRINTMv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3520 = FRINTM_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3519 = FRINTM_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3518 = FRINTM_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #3517 = FRINTM_4Z4Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1102] }, // Inst #3516 = FRINTM_2Z2Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3515 = FRINTMSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3514 = FRINTMHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3513 = FRINTMDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3512 = FRINTIv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3511 = FRINTIv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3510 = FRINTIv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3509 = FRINTIv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3508 = FRINTIv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3507 = FRINTI_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3506 = FRINTI_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3505 = FRINTI_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3504 = FRINTISr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3503 = FRINTIHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3502 = FRINTIDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3501 = FRINTAv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3500 = FRINTAv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3499 = FRINTAv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3498 = FRINTAv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3497 = FRINTAv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3496 = FRINTA_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3495 = FRINTA_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3494 = FRINTA_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #3493 = FRINTA_4Z4Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1102] }, // Inst #3492 = FRINTA_2Z2Z_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3491 = FRINTASr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3490 = FRINTAHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3489 = FRINTADr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3488 = FRINT64Zv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3487 = FRINT64Zv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3486 = FRINT64Zv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3485 = FRINT64ZSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3484 = FRINT64ZDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3483 = FRINT64Xv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3482 = FRINT64Xv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3481 = FRINT64Xv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3480 = FRINT64XSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3479 = FRINT64XDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3478 = FRINT32Zv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3477 = FRINT32Zv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3476 = FRINT32Zv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3475 = FRINT32ZSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3474 = FRINT32ZDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3473 = FRINT32Xv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3472 = FRINT32Xv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3471 = FRINT32Xv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3470 = FRINT32XSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3469 = FRINT32XDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3468 = FRECPXv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3467 = FRECPXv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3466 = FRECPXv1f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3465 = FRECPX_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3464 = FRECPX_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3463 = FRECPX_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3462 = FRECPSv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3461 = FRECPSv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3460 = FRECPSv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3459 = FRECPSv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3458 = FRECPSv2f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3457 = FRECPS_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3456 = FRECPS_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3455 = FRECPS_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3454 = FRECPS64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #3453 = FRECPS32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #3452 = FRECPS16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3451 = FRECPEv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3450 = FRECPEv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3449 = FRECPEv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3448 = FRECPEv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3447 = FRECPEv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3446 = FRECPEv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3445 = FRECPEv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3444 = FRECPEv1f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #3443 = FRECPE_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #3442 = FRECPE_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #3441 = FRECPE_ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #3440 = FNMULSrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #3439 = FNMULHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3438 = FNMULDrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1126] }, // Inst #3437 = FNMSUBSrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1122] }, // Inst #3436 = FNMSUBHrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[223] }, // Inst #3435 = FNMSUBDrrr
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3434 = FNMSB_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3433 = FNMSB_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3432 = FNMSB_ZPmZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3431 = FNMLS_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3430 = FNMLS_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3429 = FNMLS_ZPmZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3428 = FNMLA_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3427 = FNMLA_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3426 = FNMLA_ZPmZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3425 = FNMAD_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3424 = FNMAD_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3423 = FNMAD_ZPmZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1126] }, // Inst #3422 = FNMADDSrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1122] }, // Inst #3421 = FNMADDHrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[223] }, // Inst #3420 = FNMADDDrrr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3419 = FNEGv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3418 = FNEGv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3417 = FNEGv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #3416 = FNEGv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3415 = FNEGv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3414 = FNEG_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3413 = FNEG_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #3412 = FNEG_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3411 = FNEGSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3410 = FNEGHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3409 = FNEGDr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1194] }, // Inst #3408 = FMULv8i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3407 = FMULv8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #3406 = FMULv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1190] }, // Inst #3405 = FMULv4i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3404 = FMULv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3403 = FMULv4f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #3402 = FMULv2i64_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1186] }, // Inst #3401 = FMULv2i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3400 = FMULv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3399 = FMULv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1186] }, // Inst #3398 = FMULv1i64_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1182] }, // Inst #3397 = FMULv1i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1178] }, // Inst #3396 = FMULv1i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3395 = FMUL_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3394 = FMUL_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #3393 = FMUL_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #3392 = FMUL_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #3391 = FMUL_ZZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1198] }, // Inst #3390 = FMUL_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3389 = FMUL_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3388 = FMUL_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3387 = FMUL_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3386 = FMUL_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3385 = FMUL_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3384 = FMUL_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1194] }, // Inst #3383 = FMULXv8i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3382 = FMULXv8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #3381 = FMULXv4i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1190] }, // Inst #3380 = FMULXv4i16_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3379 = FMULXv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3378 = FMULXv4f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #3377 = FMULXv2i64_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1186] }, // Inst #3376 = FMULXv2i32_indexed
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3375 = FMULXv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3374 = FMULXv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1186] }, // Inst #3373 = FMULXv1i64_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1182] }, // Inst #3372 = FMULXv1i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1178] }, // Inst #3371 = FMULXv1i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3370 = FMULX_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3369 = FMULX_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3368 = FMULX_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3367 = FMULX64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #3366 = FMULX32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #3365 = FMULX16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #3364 = FMULSrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #3363 = FMULHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3362 = FMULDrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1126] }, // Inst #3361 = FMSUBSrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1122] }, // Inst #3360 = FMSUBHrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[223] }, // Inst #3359 = FMSUBDrrr
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3358 = FMSB_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3357 = FMSB_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3356 = FMSB_ZPmZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1176] }, // Inst #3355 = FMOVv8f16_ns
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1176] }, // Inst #3354 = FMOVv4f32_ns
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1159] }, // Inst #3353 = FMOVv4f16_ns
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1176] }, // Inst #3352 = FMOVv2f64_ns
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1159] }, // Inst #3351 = FMOVv2f32_ns
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1174] }, // Inst #3350 = FMOVXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1172] }, // Inst #3349 = FMOVXDr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1169] }, // Inst #3348 = FMOVXDHighr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1167] }, // Inst #3347 = FMOVWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1165] }, // Inst #3346 = FMOVWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #3345 = FMOVSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1163] }, // Inst #3344 = FMOVSi
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #3343 = FMOVSWr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #3342 = FMOVHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1161] }, // Inst #3341 = FMOVHi
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #3340 = FMOVHXr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #3339 = FMOVHWr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #3338 = FMOVDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1159] }, // Inst #3337 = FMOVDi
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #3336 = FMOVDXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1156] }, // Inst #3335 = FMOVDXHighr
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #3334 = FMOPS_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[715] }, // Inst #3333 = FMOPS_MPPZZ_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1150] }, // Inst #3332 = FMOPS_MPPZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #3331 = FMOPSL_MPPZZ
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #3330 = FMOPA_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[715] }, // Inst #3329 = FMOPA_MPPZZ_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1150] }, // Inst #3328 = FMOPA_MPPZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #3327 = FMOPA_MPPZZ_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[715] }, // Inst #3326 = FMOPA_MPPZZ_BtoH
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #3325 = FMOPAL_MPPZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3324 = FMMLA_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3323 = FMMLA_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #3322 = FMLSv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3321 = FMLSv8f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #3320 = FMLSv4i32_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #3319 = FMLSv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3318 = FMLSv4f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #3317 = FMLSv4f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #3316 = FMLSv2i64_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #3315 = FMLSv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3314 = FMLSv2f64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #3313 = FMLSv2f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #3312 = FMLSv1i64_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1145] }, // Inst #3311 = FMLSv1i32_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1140] }, // Inst #3310 = FMLSv1i16_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3309 = FMLS_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3308 = FMLS_ZZZI_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #3307 = FMLS_ZZZI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3306 = FMLS_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3305 = FMLS_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3304 = FMLS_ZPmZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #3303 = FMLS_VG4_M4ZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #3302 = FMLS_VG4_M4ZZ_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #3301 = FMLS_VG4_M4ZZ_D
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #3300 = FMLS_VG4_M4ZZI_S
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #3299 = FMLS_VG4_M4ZZI_H
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #3298 = FMLS_VG4_M4ZZI_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #3297 = FMLS_VG4_M4Z4Z_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #3296 = FMLS_VG4_M4Z4Z_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #3295 = FMLS_VG4_M4Z2Z_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #3294 = FMLS_VG2_M2ZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #3293 = FMLS_VG2_M2ZZ_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #3292 = FMLS_VG2_M2ZZ_D
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3291 = FMLS_VG2_M2ZZI_S
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3290 = FMLS_VG2_M2ZZI_H
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3289 = FMLS_VG2_M2ZZI_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #3288 = FMLS_VG2_M2Z2Z_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #3287 = FMLS_VG2_M2Z2Z_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #3286 = FMLS_VG2_M2Z2Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3285 = FMLSLv8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #3284 = FMLSLv4f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #3283 = FMLSLlanev8f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #3282 = FMLSLlanev4f16
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #3281 = FMLSL_VG4_M4ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #3280 = FMLSL_VG4_M4ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #3279 = FMLSL_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #3278 = FMLSL_VG2_M2ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3277 = FMLSL_VG2_M2ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #3276 = FMLSL_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #3275 = FMLSL_MZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #3274 = FMLSL_MZZI_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3273 = FMLSLT_ZZZ_SHH
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3272 = FMLSLT_ZZZI_SHH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3271 = FMLSLB_ZZZ_SHH
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3270 = FMLSLB_ZZZI_SHH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3269 = FMLSL2v8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #3268 = FMLSL2v4f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #3267 = FMLSL2lanev8f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #3266 = FMLSL2lanev4f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #3265 = FMLAv8i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3264 = FMLAv8f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #3263 = FMLAv4i32_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #3262 = FMLAv4i16_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3261 = FMLAv4f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #3260 = FMLAv4f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #3259 = FMLAv2i64_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #3258 = FMLAv2i32_indexed
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3257 = FMLAv2f64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #3256 = FMLAv2f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #3255 = FMLAv1i64_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1145] }, // Inst #3254 = FMLAv1i32_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1140] }, // Inst #3253 = FMLAv1i16_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3252 = FMLA_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3251 = FMLA_ZZZI_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1135] }, // Inst #3250 = FMLA_ZZZI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3249 = FMLA_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3248 = FMLA_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #3247 = FMLA_ZPmZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #3246 = FMLA_VG4_M4ZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #3245 = FMLA_VG4_M4ZZ_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #3244 = FMLA_VG4_M4ZZ_D
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #3243 = FMLA_VG4_M4ZZI_S
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #3242 = FMLA_VG4_M4ZZI_H
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #3241 = FMLA_VG4_M4ZZI_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #3240 = FMLA_VG4_M4Z4Z_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #3239 = FMLA_VG4_M4Z4Z_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #3238 = FMLA_VG4_M4Z4Z_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #3237 = FMLA_VG2_M2ZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #3236 = FMLA_VG2_M2ZZ_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #3235 = FMLA_VG2_M2ZZ_D
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3234 = FMLA_VG2_M2ZZI_S
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3233 = FMLA_VG2_M2ZZI_H
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3232 = FMLA_VG2_M2ZZI_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #3231 = FMLA_VG2_M2Z4Z_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #3230 = FMLA_VG2_M2Z2Z_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #3229 = FMLA_VG2_M2Z2Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3228 = FMLALv8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #3227 = FMLALv4f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #3226 = FMLALlanev8f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #3225 = FMLALlanev4f16
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #3224 = FMLAL_VG4_M4ZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #3223 = FMLAL_VG4_M4ZZ_BtoH
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #3222 = FMLAL_VG4_M4ZZI_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #3221 = FMLAL_VG4_M4ZZI_BtoH
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #3220 = FMLAL_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #3219 = FMLAL_VG4_M4Z4Z_BtoH
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #3218 = FMLAL_VG2_MZZ_BtoH
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #3217 = FMLAL_VG2_M2ZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #3216 = FMLAL_VG2_M2ZZ_BtoH
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3215 = FMLAL_VG2_M2ZZI_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3214 = FMLAL_VG2_M2ZZI_BtoH
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #3213 = FMLAL_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #3212 = FMLAL_VG2_M2Z2Z_BtoH
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #3211 = FMLAL_MZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #3210 = FMLAL_MZZI_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #3209 = FMLAL_MZZI_BtoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3208 = FMLALTv8f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1130] }, // Inst #3207 = FMLALTlanev8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3206 = FMLALT_ZZZ_SHH
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3205 = FMLALT_ZZZI_SHH
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3204 = FMLALT_ZZZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3203 = FMLALT_ZZZ
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #3202 = FMLALL_VG4_M4ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #3201 = FMLALL_VG4_M4ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #3200 = FMLALL_VG4_M4Z4Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #3199 = FMLALL_VG2_M2ZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #3198 = FMLALL_VG2_M2ZZI_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #3197 = FMLALL_VG2_M2Z2Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #3196 = FMLALL_MZZ_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #3195 = FMLALL_MZZI_BtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3194 = FMLALLTTv4f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1130] }, // Inst #3193 = FMLALLTTlanev4f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3192 = FMLALLTT_ZZZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3191 = FMLALLTT_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3190 = FMLALLTBv4f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1130] }, // Inst #3189 = FMLALLTBlanev4f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3188 = FMLALLTB_ZZZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3187 = FMLALLTB_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3186 = FMLALLBTv4f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1130] }, // Inst #3185 = FMLALLBTlanev4f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3184 = FMLALLBT_ZZZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3183 = FMLALLBT_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3182 = FMLALLBBv4f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1130] }, // Inst #3181 = FMLALLBBlanev4f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3180 = FMLALLBB_ZZZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3179 = FMLALLBB_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3178 = FMLALBv8f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1130] }, // Inst #3177 = FMLALBlanev8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3176 = FMLALB_ZZZ_SHH
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3175 = FMLALB_ZZZI_SHH
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #3174 = FMLALB_ZZZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #3173 = FMLALB_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #3172 = FMLAL2v8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #3171 = FMLAL2v4f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #3170 = FMLAL2lanev8f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #3169 = FMLAL2lanev4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3168 = FMINv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3167 = FMINv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3166 = FMINv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3165 = FMINv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3164 = FMINv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3163 = FMIN_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3162 = FMIN_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3161 = FMIN_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3160 = FMIN_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3159 = FMIN_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3158 = FMIN_ZPmI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3157 = FMIN_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3156 = FMIN_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3155 = FMIN_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3154 = FMIN_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3153 = FMIN_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3152 = FMIN_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3151 = FMIN_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3150 = FMIN_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3149 = FMIN_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3148 = FMIN_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3147 = FMIN_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3146 = FMIN_VG2_2Z2Z_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #3145 = FMINVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #3144 = FMINVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #3143 = FMINVv4i16v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3142 = FMINV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3141 = FMINV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3140 = FMINV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #3139 = FMINSrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3138 = FMINQV_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3137 = FMINQV_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3136 = FMINQV_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3135 = FMINPv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3134 = FMINPv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3133 = FMINPv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #3132 = FMINPv2i64p
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #3131 = FMINPv2i32p
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #3130 = FMINPv2i16p
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3129 = FMINPv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3128 = FMINPv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3127 = FMINP_ZPmZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3126 = FMINP_ZPmZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3125 = FMINP_ZPmZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3124 = FMINNMv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3123 = FMINNMv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3122 = FMINNMv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3121 = FMINNMv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3120 = FMINNMv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3119 = FMINNM_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3118 = FMINNM_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3117 = FMINNM_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3116 = FMINNM_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3115 = FMINNM_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3114 = FMINNM_ZPmI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3113 = FMINNM_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3112 = FMINNM_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3111 = FMINNM_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3110 = FMINNM_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3109 = FMINNM_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3108 = FMINNM_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3107 = FMINNM_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3106 = FMINNM_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3105 = FMINNM_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3104 = FMINNM_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3103 = FMINNM_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3102 = FMINNM_VG2_2Z2Z_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #3101 = FMINNMVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #3100 = FMINNMVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #3099 = FMINNMVv4i16v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3098 = FMINNMV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3097 = FMINNMV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3096 = FMINNMV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #3095 = FMINNMSrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3094 = FMINNMQV_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3093 = FMINNMQV_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3092 = FMINNMQV_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3091 = FMINNMPv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3090 = FMINNMPv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3089 = FMINNMPv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #3088 = FMINNMPv2i64p
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #3087 = FMINNMPv2i32p
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #3086 = FMINNMPv2i16p
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3085 = FMINNMPv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3084 = FMINNMPv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3083 = FMINNMP_ZPmZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3082 = FMINNMP_ZPmZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3081 = FMINNMP_ZPmZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #3080 = FMINNMHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3079 = FMINNMDrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #3078 = FMINHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3077 = FMINDrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3076 = FMAXv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3075 = FMAXv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3074 = FMAXv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3073 = FMAXv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3072 = FMAXv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3071 = FMAX_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3070 = FMAX_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3069 = FMAX_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3068 = FMAX_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3067 = FMAX_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3066 = FMAX_ZPmI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3065 = FMAX_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3064 = FMAX_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3063 = FMAX_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3062 = FMAX_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3061 = FMAX_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3060 = FMAX_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3059 = FMAX_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3058 = FMAX_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3057 = FMAX_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3056 = FMAX_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3055 = FMAX_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3054 = FMAX_VG2_2Z2Z_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #3053 = FMAXVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #3052 = FMAXVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #3051 = FMAXVv4i16v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3050 = FMAXV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3049 = FMAXV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3048 = FMAXV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #3047 = FMAXSrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3046 = FMAXQV_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3045 = FMAXQV_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3044 = FMAXQV_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3043 = FMAXPv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3042 = FMAXPv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3041 = FMAXPv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #3040 = FMAXPv2i64p
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #3039 = FMAXPv2i32p
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #3038 = FMAXPv2i16p
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3037 = FMAXPv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3036 = FMAXPv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3035 = FMAXP_ZPmZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3034 = FMAXP_ZPmZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3033 = FMAXP_ZPmZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3032 = FMAXNMv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3031 = FMAXNMv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3030 = FMAXNMv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #3029 = FMAXNMv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #3028 = FMAXNMv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3027 = FMAXNM_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3026 = FMAXNM_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #3025 = FMAXNM_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3024 = FMAXNM_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3023 = FMAXNM_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #3022 = FMAXNM_ZPmI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3021 = FMAXNM_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3020 = FMAXNM_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #3019 = FMAXNM_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3018 = FMAXNM_VG4_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3017 = FMAXNM_VG4_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #3016 = FMAXNM_VG4_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3015 = FMAXNM_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3014 = FMAXNM_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #3013 = FMAXNM_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3012 = FMAXNM_VG2_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3011 = FMAXNM_VG2_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #3010 = FMAXNM_VG2_2Z2Z_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #3009 = FMAXNMVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #3008 = FMAXNMVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #3007 = FMAXNMVv4i16v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3006 = FMAXNMV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3005 = FMAXNMV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #3004 = FMAXNMV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #3003 = FMAXNMSrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3002 = FMAXNMQV_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3001 = FMAXNMQV_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #3000 = FMAXNMQV_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2999 = FMAXNMPv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2998 = FMAXNMPv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2997 = FMAXNMPv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #2996 = FMAXNMPv2i64p
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #2995 = FMAXNMPv2i32p
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #2994 = FMAXNMPv2i16p
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2993 = FMAXNMPv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2992 = FMAXNMPv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2991 = FMAXNMP_ZPmZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2990 = FMAXNMP_ZPmZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2989 = FMAXNMP_ZPmZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #2988 = FMAXNMHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2987 = FMAXNMDrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #2986 = FMAXHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2985 = FMAXDrr
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #2984 = FMAD_ZPmZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #2983 = FMAD_ZPmZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #2982 = FMAD_ZPmZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1126] }, // Inst #2981 = FMADDSrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1122] }, // Inst #2980 = FMADDHrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[223] }, // Inst #2979 = FMADDDrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2978 = FLOGB_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2977 = FLOGB_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2976 = FLOGB_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2975 = FJCVTZS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #2974 = FEXPA_ZZ_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #2973 = FEXPA_ZZ_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #2972 = FEXPA_ZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1120] }, // Inst #2971 = FDUP_ZI_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1120] }, // Inst #2970 = FDUP_ZI_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1120] }, // Inst #2969 = FDUP_ZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #2968 = FDOTv8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #2967 = FDOTv4f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #2966 = FDOTv4f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #2965 = FDOTv2f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #2964 = FDOTlanev8f8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #2963 = FDOTlanev8f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1115] }, // Inst #2962 = FDOTlanev4f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #2961 = FDOTlanev16f8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2960 = FDOT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2959 = FDOT_ZZZ_BtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2958 = FDOT_ZZZ_BtoH
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #2957 = FDOT_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #2956 = FDOT_ZZZI_BtoS
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #2955 = FDOT_ZZZI_BtoH
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #2954 = FDOT_VG4_M4ZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #2953 = FDOT_VG4_M4ZZ_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #2952 = FDOT_VG4_M4ZZ_BtoH
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #2951 = FDOT_VG4_M4ZZI_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #2950 = FDOT_VG4_M4ZZI_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #2949 = FDOT_VG4_M4ZZI_BtoH
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #2948 = FDOT_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #2947 = FDOT_VG4_M4Z4Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #2946 = FDOT_VG4_M4Z4Z_BtoH
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #2945 = FDOT_VG2_M2ZZ_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #2944 = FDOT_VG2_M2ZZ_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #2943 = FDOT_VG2_M2ZZ_BtoH
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #2942 = FDOT_VG2_M2ZZI_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #2941 = FDOT_VG2_M2ZZI_BtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #2940 = FDOT_VG2_M2ZZI_BtoH
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #2939 = FDOT_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #2938 = FDOT_VG2_M2Z2Z_BtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #2937 = FDOT_VG2_M2Z2Z_BtoH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2936 = FDIVv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2935 = FDIVv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2934 = FDIVv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2933 = FDIVv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2932 = FDIVv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2931 = FDIV_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2930 = FDIV_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2929 = FDIV_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #2928 = FDIVSrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2927 = FDIVR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2926 = FDIVR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2925 = FDIVR_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #2924 = FDIVHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2923 = FDIVDrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2922 = FCVT_ZPmZ_StoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2921 = FCVT_ZPmZ_StoD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2920 = FCVT_ZPmZ_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2919 = FCVT_ZPmZ_HtoD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2918 = FCVT_ZPmZ_DtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2917 = FCVT_ZPmZ_DtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #2916 = FCVT_Z4Z_StoB_NAME
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #2915 = FCVT_Z2Z_StoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #2914 = FCVT_Z2Z_HtoB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #2913 = FCVT_2ZZ_H_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #2912 = FCVTZUv8i16_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2911 = FCVTZUv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #2910 = FCVTZUv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #2909 = FCVTZUv4i16_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2908 = FCVTZUv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2907 = FCVTZUv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #2906 = FCVTZUv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #2905 = FCVTZUv2i32_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2904 = FCVTZUv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2903 = FCVTZUv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2902 = FCVTZUv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2901 = FCVTZUv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2900 = FCVTZUv1f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1112] }, // Inst #2899 = FCVTZUs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1109] }, // Inst #2898 = FCVTZUh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #2897 = FCVTZUd
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2896 = FCVTZU_ZPmZ_StoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2895 = FCVTZU_ZPmZ_StoD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2894 = FCVTZU_ZPmZ_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2893 = FCVTZU_ZPmZ_HtoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2892 = FCVTZU_ZPmZ_HtoD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2891 = FCVTZU_ZPmZ_DtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2890 = FCVTZU_ZPmZ_DtoD
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #2889 = FCVTZU_4Z4Z_StoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1102] }, // Inst #2888 = FCVTZU_2Z2Z_StoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1074] }, // Inst #2887 = FCVTZUUXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #2886 = FCVTZUUXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #2885 = FCVTZUUXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #2884 = FCVTZUUWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #2883 = FCVTZUUWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2882 = FCVTZUUWDr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1099] }, // Inst #2881 = FCVTZUSXSri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1096] }, // Inst #2880 = FCVTZUSXHri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1093] }, // Inst #2879 = FCVTZUSXDri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1090] }, // Inst #2878 = FCVTZUSWSri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1087] }, // Inst #2877 = FCVTZUSWHri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1084] }, // Inst #2876 = FCVTZUSWDri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #2875 = FCVTZSv8i16_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2874 = FCVTZSv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #2873 = FCVTZSv4i32_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #2872 = FCVTZSv4i16_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2871 = FCVTZSv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2870 = FCVTZSv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #2869 = FCVTZSv2i64_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #2868 = FCVTZSv2i32_shift
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2867 = FCVTZSv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2866 = FCVTZSv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2865 = FCVTZSv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2864 = FCVTZSv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2863 = FCVTZSv1f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1112] }, // Inst #2862 = FCVTZSs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1109] }, // Inst #2861 = FCVTZSh
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1106] }, // Inst #2860 = FCVTZSd
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2859 = FCVTZS_ZPmZ_StoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2858 = FCVTZS_ZPmZ_StoD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2857 = FCVTZS_ZPmZ_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2856 = FCVTZS_ZPmZ_HtoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2855 = FCVTZS_ZPmZ_HtoD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2854 = FCVTZS_ZPmZ_DtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2853 = FCVTZS_ZPmZ_DtoD
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1104] }, // Inst #2852 = FCVTZS_4Z4Z_StoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1102] }, // Inst #2851 = FCVTZS_2Z2Z_StoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1074] }, // Inst #2850 = FCVTZSUXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #2849 = FCVTZSUXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #2848 = FCVTZSUXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #2847 = FCVTZSUWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #2846 = FCVTZSUWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2845 = FCVTZSUWDr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1099] }, // Inst #2844 = FCVTZSSXSri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1096] }, // Inst #2843 = FCVTZSSXHri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1093] }, // Inst #2842 = FCVTZSSXDri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1090] }, // Inst #2841 = FCVTZSSWSri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1087] }, // Inst #2840 = FCVTZSSWHri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1084] }, // Inst #2839 = FCVTZSSWDri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2838 = FCVTX_ZPmZ_DtoS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #2837 = FCVTXNv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #2836 = FCVTXNv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #2835 = FCVTXNv1i64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2834 = FCVTXNT_ZPmZ_DtoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1082] }, // Inst #2833 = FCVTSHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #2832 = FCVTSDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2831 = FCVTPUv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2830 = FCVTPUv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2829 = FCVTPUv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2828 = FCVTPUv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2827 = FCVTPUv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2826 = FCVTPUv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2825 = FCVTPUv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2824 = FCVTPUv1f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1074] }, // Inst #2823 = FCVTPUUXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #2822 = FCVTPUUXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #2821 = FCVTPUUXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #2820 = FCVTPUUWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #2819 = FCVTPUUWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2818 = FCVTPUUWDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2817 = FCVTPSv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2816 = FCVTPSv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2815 = FCVTPSv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2814 = FCVTPSv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2813 = FCVTPSv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2812 = FCVTPSv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2811 = FCVTPSv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2810 = FCVTPSv1f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1074] }, // Inst #2809 = FCVTPSUXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #2808 = FCVTPSUXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #2807 = FCVTPSUXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #2806 = FCVTPSUWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #2805 = FCVTPSUWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2804 = FCVTPSUWDr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #2803 = FCVTNv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #2802 = FCVTNv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #2801 = FCVTNv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #2800 = FCVTNv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1080] }, // Inst #2799 = FCVTN_Z4Z_StoB_NAME
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #2798 = FCVTN_Z2Z_StoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #2797 = FCVTN_Z2Z_HtoB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #2796 = FCVTN_F32_F8v8f8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #2795 = FCVTN_F32_F82v16f8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2794 = FCVTN_F16_F8v8f8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2793 = FCVTN_F16_F8v16f8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2792 = FCVTNUv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2791 = FCVTNUv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2790 = FCVTNUv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2789 = FCVTNUv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2788 = FCVTNUv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2787 = FCVTNUv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2786 = FCVTNUv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2785 = FCVTNUv1f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1074] }, // Inst #2784 = FCVTNUUXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #2783 = FCVTNUUXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #2782 = FCVTNUUXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #2781 = FCVTNUUWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #2780 = FCVTNUUWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2779 = FCVTNUUWDr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2778 = FCVTNT_ZPmZ_StoH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2777 = FCVTNT_ZPmZ_DtoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #2776 = FCVTNT_Z2Z_StoB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2775 = FCVTNSv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2774 = FCVTNSv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2773 = FCVTNSv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2772 = FCVTNSv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2771 = FCVTNSv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2770 = FCVTNSv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2769 = FCVTNSv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2768 = FCVTNSv1f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1074] }, // Inst #2767 = FCVTNSUXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #2766 = FCVTNSUXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #2765 = FCVTNSUXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #2764 = FCVTNSUWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #2763 = FCVTNSUWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2762 = FCVTNSUWDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #2761 = FCVTNB_Z2Z_StoB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2760 = FCVTMUv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2759 = FCVTMUv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2758 = FCVTMUv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2757 = FCVTMUv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2756 = FCVTMUv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2755 = FCVTMUv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2754 = FCVTMUv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2753 = FCVTMUv1f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1074] }, // Inst #2752 = FCVTMUUXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #2751 = FCVTMUUXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #2750 = FCVTMUUXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #2749 = FCVTMUUWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #2748 = FCVTMUUWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2747 = FCVTMUUWDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2746 = FCVTMSv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2745 = FCVTMSv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2744 = FCVTMSv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2743 = FCVTMSv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2742 = FCVTMSv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2741 = FCVTMSv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2740 = FCVTMSv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2739 = FCVTMSv1f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1074] }, // Inst #2738 = FCVTMSUXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #2737 = FCVTMSUXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #2736 = FCVTMSUXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #2735 = FCVTMSUWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #2734 = FCVTMSUWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2733 = FCVTMSUWDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2732 = FCVTLv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2731 = FCVTLv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[643] }, // Inst #2730 = FCVTLv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[643] }, // Inst #2729 = FCVTLv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #2728 = FCVTL_2ZZ_H_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2727 = FCVTLT_ZPmZ_StoD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2726 = FCVTLT_ZPmZ_HtoS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[653] }, // Inst #2725 = FCVTHSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #2724 = FCVTHDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1078] }, // Inst #2723 = FCVTDSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1076] }, // Inst #2722 = FCVTDHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2721 = FCVTAUv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2720 = FCVTAUv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2719 = FCVTAUv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2718 = FCVTAUv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2717 = FCVTAUv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2716 = FCVTAUv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2715 = FCVTAUv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2714 = FCVTAUv1f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1074] }, // Inst #2713 = FCVTAUUXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #2712 = FCVTAUUXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #2711 = FCVTAUUXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #2710 = FCVTAUUWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #2709 = FCVTAUUWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2708 = FCVTAUUWDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2707 = FCVTASv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2706 = FCVTASv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2705 = FCVTASv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2704 = FCVTASv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2703 = FCVTASv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2702 = FCVTASv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2701 = FCVTASv1i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2700 = FCVTASv1f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1074] }, // Inst #2699 = FCVTASUXSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1072] }, // Inst #2698 = FCVTASUXHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1070] }, // Inst #2697 = FCVTASUXDr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1068] }, // Inst #2696 = FCVTASUWSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1066] }, // Inst #2695 = FCVTASUWHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1064] }, // Inst #2694 = FCVTASUWDr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1060] }, // Inst #2693 = FCSELSrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1056] }, // Inst #2692 = FCSELHrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1010] }, // Inst #2691 = FCSELDrrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1052] }, // Inst #2690 = FCPY_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1052] }, // Inst #2689 = FCPY_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1052] }, // Inst #2688 = FCPY_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2687 = FCMUO_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2686 = FCMUO_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2685 = FCMUO_PPzZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2684 = FCMPSrr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[263] }, // Inst #2683 = FCMPSri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2682 = FCMPHrr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[262] }, // Inst #2681 = FCMPHri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2680 = FCMPESrr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[263] }, // Inst #2679 = FCMPESri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2678 = FCMPEHrr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[262] }, // Inst #2677 = FCMPEHri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2676 = FCMPEDrr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[261] }, // Inst #2675 = FCMPEDri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2674 = FCMPDrr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[261] }, // Inst #2673 = FCMPDri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2672 = FCMNE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2671 = FCMNE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2670 = FCMNE_PPzZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2669 = FCMNE_PPzZ0_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2668 = FCMNE_PPzZ0_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2667 = FCMNE_PPzZ0_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2666 = FCMLTv8i16rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2665 = FCMLTv4i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2664 = FCMLTv4i16rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2663 = FCMLTv2i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2662 = FCMLTv2i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2661 = FCMLTv1i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2660 = FCMLTv1i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2659 = FCMLTv1i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2658 = FCMLT_PPzZ0_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2657 = FCMLT_PPzZ0_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2656 = FCMLT_PPzZ0_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2655 = FCMLEv8i16rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2654 = FCMLEv4i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2653 = FCMLEv4i16rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2652 = FCMLEv2i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2651 = FCMLEv2i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2650 = FCMLEv1i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2649 = FCMLEv1i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2648 = FCMLEv1i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2647 = FCMLE_PPzZ0_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2646 = FCMLE_PPzZ0_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2645 = FCMLE_PPzZ0_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1046] }, // Inst #2644 = FCMLAv8f16_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #2643 = FCMLAv8f16
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1046] }, // Inst #2642 = FCMLAv4f32_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #2641 = FCMLAv4f32
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1040] }, // Inst #2640 = FCMLAv4f16_indexed
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1035] }, // Inst #2639 = FCMLAv4f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #2638 = FCMLAv2f64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1035] }, // Inst #2637 = FCMLAv2f32
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[794] }, // Inst #2636 = FCMLA_ZZZI_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[800] }, // Inst #2635 = FCMLA_ZZZI_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1029] }, // Inst #2634 = FCMLA_ZPmZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1029] }, // Inst #2633 = FCMLA_ZPmZZ_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[1029] }, // Inst #2632 = FCMLA_ZPmZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2631 = FCMGTv8i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2630 = FCMGTv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2629 = FCMGTv4i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2628 = FCMGTv4i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2627 = FCMGTv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2626 = FCMGTv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2625 = FCMGTv2i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2624 = FCMGTv2i32rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2623 = FCMGTv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2622 = FCMGTv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2621 = FCMGTv1i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2620 = FCMGTv1i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2619 = FCMGTv1i16rz
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2618 = FCMGT_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2617 = FCMGT_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2616 = FCMGT_PPzZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2615 = FCMGT_PPzZ0_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2614 = FCMGT_PPzZ0_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2613 = FCMGT_PPzZ0_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2612 = FCMGT64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #2611 = FCMGT32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #2610 = FCMGT16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2609 = FCMGEv8i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2608 = FCMGEv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2607 = FCMGEv4i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2606 = FCMGEv4i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2605 = FCMGEv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2604 = FCMGEv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2603 = FCMGEv2i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2602 = FCMGEv2i32rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2601 = FCMGEv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2600 = FCMGEv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2599 = FCMGEv1i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2598 = FCMGEv1i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2597 = FCMGEv1i16rz
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2596 = FCMGE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2595 = FCMGE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2594 = FCMGE_PPzZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2593 = FCMGE_PPzZ0_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2592 = FCMGE_PPzZ0_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2591 = FCMGE_PPzZ0_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2590 = FCMGE64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #2589 = FCMGE32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #2588 = FCMGE16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2587 = FCMEQv8i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2586 = FCMEQv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2585 = FCMEQv4i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2584 = FCMEQv4i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2583 = FCMEQv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2582 = FCMEQv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2581 = FCMEQv2i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2580 = FCMEQv2i32rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2579 = FCMEQv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2578 = FCMEQv2f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2577 = FCMEQv1i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2576 = FCMEQv1i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2575 = FCMEQv1i16rz
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2574 = FCMEQ_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2573 = FCMEQ_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2572 = FCMEQ_PPzZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2571 = FCMEQ_PPzZ0_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2570 = FCMEQ_PPzZ0_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[1026] }, // Inst #2569 = FCMEQ_PPzZ0_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2568 = FCMEQ64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #2567 = FCMEQ32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #2566 = FCMEQ16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2565 = FCLAMP_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2564 = FCLAMP_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2563 = FCLAMP_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #2562 = FCLAMP_VG4_4Z4Z_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #2561 = FCLAMP_VG4_4Z4Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #2560 = FCLAMP_VG4_4Z4Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #2559 = FCLAMP_VG2_2Z2Z_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #2558 = FCLAMP_VG2_2Z2Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #2557 = FCLAMP_VG2_2Z2Z_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1022] }, // Inst #2556 = FCCMPSrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1018] }, // Inst #2555 = FCCMPHrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1022] }, // Inst #2554 = FCCMPESrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1018] }, // Inst #2553 = FCCMPEHrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1014] }, // Inst #2552 = FCCMPEDrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1014] }, // Inst #2551 = FCCMPDrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #2550 = FCADDv8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #2549 = FCADDv4f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1010] }, // Inst #2548 = FCADDv4f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #2547 = FCADDv2f64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[1010] }, // Inst #2546 = FCADDv2f32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1005] }, // Inst #2545 = FCADD_ZPmZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1005] }, // Inst #2544 = FCADD_ZPmZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[1005] }, // Inst #2543 = FCADD_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2542 = FAMINv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2541 = FAMINv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2540 = FAMINv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2539 = FAMINv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2538 = FAMINv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2537 = FAMIN_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2536 = FAMIN_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2535 = FAMIN_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #2534 = FAMIN_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #2533 = FAMIN_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #2532 = FAMIN_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #2531 = FAMIN_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #2530 = FAMIN_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #2529 = FAMIN_2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2528 = FAMAXv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2527 = FAMAXv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2526 = FAMAXv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2525 = FAMAXv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2524 = FAMAXv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2523 = FAMAX_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2522 = FAMAX_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2521 = FAMAX_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #2520 = FAMAX_4Z4Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #2519 = FAMAX_4Z4Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #2518 = FAMAX_4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #2517 = FAMAX_2Z2Z_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #2516 = FAMAX_2Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #2515 = FAMAX_2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2514 = FADDv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2513 = FADDv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2512 = FADDv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2511 = FADDv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2510 = FADDv2f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #2509 = FADD_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #2508 = FADD_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #2507 = FADD_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2506 = FADD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2505 = FADD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2504 = FADD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #2503 = FADD_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #2502 = FADD_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #2501 = FADD_ZPmI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #2500 = FADD_VG4_M4Z_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #2499 = FADD_VG4_M4Z_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #2498 = FADD_VG4_M4Z_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #2497 = FADD_VG2_M2Z_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #2496 = FADD_VG2_M2Z_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #2495 = FADD_VG2_M2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #2494 = FADDV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #2493 = FADDV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #2492 = FADDV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #2491 = FADDSrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #2490 = FADDQV_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #2489 = FADDQV_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #2488 = FADDQV_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2487 = FADDPv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2486 = FADDPv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2485 = FADDPv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #2484 = FADDPv2i64p
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1003] }, // Inst #2483 = FADDPv2i32p
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #2482 = FADDPv2i16p
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2481 = FADDPv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2480 = FADDPv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2479 = FADDP_ZPmZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2478 = FADDP_ZPmZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2477 = FADDP_ZPmZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #2476 = FADDHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2475 = FADDDrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2474 = FADDA_VPZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2473 = FADDA_VPZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2472 = FADDA_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2471 = FACGTv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2470 = FACGTv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2469 = FACGTv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2468 = FACGTv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2467 = FACGTv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2466 = FACGT_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2465 = FACGT_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2464 = FACGT_PPzZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2463 = FACGT64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #2462 = FACGT32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #2461 = FACGT16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2460 = FACGEv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2459 = FACGEv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2458 = FACGEv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2457 = FACGEv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2456 = FACGEv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2455 = FACGE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2454 = FACGE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2453 = FACGE_PPzZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2452 = FACGE64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #2451 = FACGE32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #2450 = FACGE16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2449 = FABSv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2448 = FABSv4f32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2447 = FABSv4f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2446 = FABSv2f64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2445 = FABSv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2444 = FABS_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2443 = FABS_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2442 = FABS_ZPmZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[1001] }, // Inst #2441 = FABSSr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[999] }, // Inst #2440 = FABSHr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2439 = FABSDr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2438 = FABDv8f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2437 = FABDv4f32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2436 = FABDv4f16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2435 = FABDv2f64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2434 = FABDv2f32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2433 = FABD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2432 = FABD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2431 = FABD_ZPmZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2430 = FABD64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[996] }, // Inst #2429 = FABD32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[993] }, // Inst #2428 = FABD16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #2427 = F2CVT_ZZ_BtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #2426 = F2CVT_2ZZ_BtoH_NAME
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[643] }, // Inst #2425 = F2CVTLv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #2424 = F2CVTL_2ZZ_BtoH_NAME
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #2423 = F2CVTLT_ZZ_BtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2422 = F2CVTL2v8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #2421 = F1CVT_ZZ_BtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #2420 = F1CVT_2ZZ_BtoH_NAME
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[643] }, // Inst #2419 = F1CVTLv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #2418 = F1CVTL_2ZZ_BtoH_NAME
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #2417 = F1CVTLT_ZZ_BtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2416 = F1CVTL2v8f16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[989] }, // Inst #2415 = EXTv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[985] }, // Inst #2414 = EXTv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[982] }, // Inst #2413 = EXT_ZZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[940] }, // Inst #2412 = EXT_ZZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[978] }, // Inst #2411 = EXTRXrri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[974] }, // Inst #2410 = EXTRWrri
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[968] }, // Inst #2409 = EXTRACT_ZPMXI_V_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[962] }, // Inst #2408 = EXTRACT_ZPMXI_V_Q
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[956] }, // Inst #2407 = EXTRACT_ZPMXI_V_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[950] }, // Inst #2406 = EXTRACT_ZPMXI_V_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[944] }, // Inst #2405 = EXTRACT_ZPMXI_V_B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[968] }, // Inst #2404 = EXTRACT_ZPMXI_H_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[962] }, // Inst #2403 = EXTRACT_ZPMXI_H_Q
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[956] }, // Inst #2402 = EXTRACT_ZPMXI_H_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[950] }, // Inst #2401 = EXTRACT_ZPMXI_H_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[944] }, // Inst #2400 = EXTRACT_ZPMXI_H_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[940] }, // Inst #2399 = EXTQ_ZZI
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #2398 = ERETAB
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #2397 = ERETAA
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #2396 = ERET
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2395 = EORv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2394 = EORv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #2393 = EOR_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2392 = EOR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2391 = EOR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2390 = EOR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #2389 = EOR_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #2388 = EOR_ZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #2387 = EOR_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #2386 = EORXrs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[608] }, // Inst #2385 = EORXri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #2384 = EORWrs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[605] }, // Inst #2383 = EORWri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #2382 = EORV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #2381 = EORV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #2380 = EORV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #2379 = EORV_VPZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2378 = EORTB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2377 = EORTB_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2376 = EORTB_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2375 = EORTB_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #2374 = EORS_PPzPP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #2373 = EORQV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #2372 = EORQV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #2371 = EORQV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #2370 = EORQV_VPZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2369 = EORBT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2368 = EORBT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2367 = EORBT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2366 = EORBT_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #2365 = EOR3_ZZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[219] }, // Inst #2364 = EOR3
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #2363 = EONXrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #2362 = EONWrs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #2361 = DUPv8i8lane
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[936] }, // Inst #2360 = DUPv8i8gpr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #2359 = DUPv8i16lane
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[931] }, // Inst #2358 = DUPv8i16gpr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #2357 = DUPv4i32lane
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[931] }, // Inst #2356 = DUPv4i32gpr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #2355 = DUPv4i16lane
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[936] }, // Inst #2354 = DUPv4i16gpr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #2353 = DUPv2i64lane
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[938] }, // Inst #2352 = DUPv2i64gpr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #2351 = DUPv2i32lane
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[936] }, // Inst #2350 = DUPv2i32gpr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[933] }, // Inst #2349 = DUPv16i8lane
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[931] }, // Inst #2348 = DUPv16i8gpr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[928] }, // Inst #2347 = DUPi8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[925] }, // Inst #2346 = DUPi64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[922] }, // Inst #2345 = DUPi32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[919] }, // Inst #2344 = DUPi16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #2343 = DUP_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #2342 = DUP_ZZI_Q
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #2341 = DUP_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #2340 = DUP_ZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #2339 = DUP_ZZI_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[915] }, // Inst #2338 = DUP_ZR_S
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[915] }, // Inst #2337 = DUP_ZR_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[917] }, // Inst #2336 = DUP_ZR_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[915] }, // Inst #2335 = DUP_ZR_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[912] }, // Inst #2334 = DUP_ZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[912] }, // Inst #2333 = DUP_ZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[912] }, // Inst #2332 = DUP_ZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[912] }, // Inst #2331 = DUP_ZI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #2330 = DUPQ_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #2329 = DUPQ_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #2328 = DUPQ_ZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #2327 = DUPQ_ZZI_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[910] }, // Inst #2326 = DUPM_ZI
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #2325 = DSBnXS
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #2324 = DSB
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #2323 = DRPS
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #2322 = DMB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #2321 = DECW_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #2320 = DECW_XPiI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #2319 = DECP_ZP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #2318 = DECP_ZP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[907] }, // Inst #2317 = DECP_ZP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #2316 = DECP_XP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #2315 = DECP_XP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #2314 = DECP_XP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[904] }, // Inst #2313 = DECP_XP_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #2312 = DECH_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #2311 = DECH_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #2310 = DECD_ZPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #2309 = DECD_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[900] }, // Inst #2308 = DECB_XPiI
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #2307 = DCPS3
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #2306 = DCPS2
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #2305 = DCPS1
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #2304 = CTZXr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #2303 = CTZWr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #2302 = CTERMNE_XX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #2301 = CTERMNE_WW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #2300 = CTERMEQ_XX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #2299 = CTERMEQ_WW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[896] }, // Inst #2298 = CSNEGXr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[892] }, // Inst #2297 = CSNEGWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[896] }, // Inst #2296 = CSINVXr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[892] }, // Inst #2295 = CSINVWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[896] }, // Inst #2294 = CSINCXr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[892] }, // Inst #2293 = CSINCWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[896] }, // Inst #2292 = CSELXr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[892] }, // Inst #2291 = CSELWr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[889] }, // Inst #2290 = CRC32Xrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #2289 = CRC32Wrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #2288 = CRC32Hrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[889] }, // Inst #2287 = CRC32CXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #2286 = CRC32CWrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #2285 = CRC32CHrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #2284 = CRC32CBrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #2283 = CRC32Brr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[885] }, // Inst #2282 = CPY_ZPzI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[885] }, // Inst #2281 = CPY_ZPzI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[885] }, // Inst #2280 = CPY_ZPzI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[885] }, // Inst #2279 = CPY_ZPzI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[881] }, // Inst #2278 = CPY_ZPmV_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[877] }, // Inst #2277 = CPY_ZPmV_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[873] }, // Inst #2276 = CPY_ZPmV_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[869] }, // Inst #2275 = CPY_ZPmV_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[861] }, // Inst #2274 = CPY_ZPmR_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[861] }, // Inst #2273 = CPY_ZPmR_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[865] }, // Inst #2272 = CPY_ZPmR_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[861] }, // Inst #2271 = CPY_ZPmR_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[856] }, // Inst #2270 = CPY_ZPmI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[856] }, // Inst #2269 = CPY_ZPmI_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[856] }, // Inst #2268 = CPY_ZPmI_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[856] }, // Inst #2267 = CPY_ZPmI_B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2266 = CPYPWTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2265 = CPYPWTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2264 = CPYPWTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2263 = CPYPWT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2262 = CPYPWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2261 = CPYPTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2260 = CPYPTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2259 = CPYPTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2258 = CPYPT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2257 = CPYPRTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2256 = CPYPRTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2255 = CPYPRTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2254 = CPYPRT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2253 = CPYPRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2252 = CPYPN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2251 = CPYP
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2250 = CPYMWTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2249 = CPYMWTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2248 = CPYMWTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2247 = CPYMWT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2246 = CPYMWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2245 = CPYMTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2244 = CPYMTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2243 = CPYMTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2242 = CPYMT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2241 = CPYMRTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2240 = CPYMRTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2239 = CPYMRTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2238 = CPYMRT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2237 = CPYMRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2236 = CPYMN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2235 = CPYM
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2234 = CPYFPWTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2233 = CPYFPWTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2232 = CPYFPWTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2231 = CPYFPWT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2230 = CPYFPWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2229 = CPYFPTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2228 = CPYFPTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2227 = CPYFPTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2226 = CPYFPT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2225 = CPYFPRTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2224 = CPYFPRTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2223 = CPYFPRTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2222 = CPYFPRT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2221 = CPYFPRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2220 = CPYFPN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2219 = CPYFP
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2218 = CPYFMWTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2217 = CPYFMWTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2216 = CPYFMWTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2215 = CPYFMWT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2214 = CPYFMWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2213 = CPYFMTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2212 = CPYFMTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2211 = CPYFMTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2210 = CPYFMT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2209 = CPYFMRTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2208 = CPYFMRTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2207 = CPYFMRTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2206 = CPYFMRT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2205 = CPYFMRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2204 = CPYFMN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2203 = CPYFM
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2202 = CPYFEWTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2201 = CPYFEWTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2200 = CPYFEWTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2199 = CPYFEWT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2198 = CPYFEWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2197 = CPYFETWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2196 = CPYFETRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2195 = CPYFETN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2194 = CPYFET
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2193 = CPYFERTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2192 = CPYFERTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2191 = CPYFERTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2190 = CPYFERT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2189 = CPYFERN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2188 = CPYFEN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2187 = CPYFE
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2186 = CPYEWTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2185 = CPYEWTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2184 = CPYEWTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2183 = CPYEWT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2182 = CPYEWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2181 = CPYETWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2180 = CPYETRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2179 = CPYETN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2178 = CPYET
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2177 = CPYERTWN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2176 = CPYERTRN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2175 = CPYERTN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2174 = CPYERT
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2173 = CPYERN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2172 = CPYEN
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #2171 = CPYE
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #2170 = COMPACT_ZPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #2169 = COMPACT_ZPZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2168 = CNTv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2167 = CNTv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2166 = CNT_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2165 = CNT_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2164 = CNT_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2163 = CNT_ZPmZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #2162 = CNTXr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #2161 = CNTWr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[847] }, // Inst #2160 = CNTW_XPiI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[853] }, // Inst #2159 = CNTP_XPP_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[853] }, // Inst #2158 = CNTP_XPP_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[853] }, // Inst #2157 = CNTP_XPP_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[853] }, // Inst #2156 = CNTP_XPP_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[850] }, // Inst #2155 = CNTP_XCI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[850] }, // Inst #2154 = CNTP_XCI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[850] }, // Inst #2153 = CNTP_XCI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[850] }, // Inst #2152 = CNTP_XCI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[847] }, // Inst #2151 = CNTH_XPiI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[847] }, // Inst #2150 = CNTD_XPiI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[847] }, // Inst #2149 = CNTB_XPiI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2148 = CNOT_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2147 = CNOT_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2146 = CNOT_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #2145 = CNOT_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2144 = CMTSTv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2143 = CMTSTv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2142 = CMTSTv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2141 = CMTSTv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2140 = CMTSTv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2139 = CMTSTv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2138 = CMTSTv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2137 = CMTSTv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2136 = CMPNE_WIDE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2135 = CMPNE_WIDE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2134 = CMPNE_WIDE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2133 = CMPNE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2132 = CMPNE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2131 = CMPNE_PPzZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2130 = CMPNE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2129 = CMPNE_PPzZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2128 = CMPNE_PPzZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2127 = CMPNE_PPzZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2126 = CMPNE_PPzZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2125 = CMPLT_WIDE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2124 = CMPLT_WIDE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2123 = CMPLT_WIDE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2122 = CMPLT_PPzZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2121 = CMPLT_PPzZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2120 = CMPLT_PPzZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2119 = CMPLT_PPzZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2118 = CMPLS_WIDE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2117 = CMPLS_WIDE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2116 = CMPLS_WIDE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2115 = CMPLS_PPzZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2114 = CMPLS_PPzZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2113 = CMPLS_PPzZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2112 = CMPLS_PPzZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2111 = CMPLO_WIDE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2110 = CMPLO_WIDE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2109 = CMPLO_WIDE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2108 = CMPLO_PPzZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2107 = CMPLO_PPzZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2106 = CMPLO_PPzZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2105 = CMPLO_PPzZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2104 = CMPLE_WIDE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2103 = CMPLE_WIDE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2102 = CMPLE_WIDE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2101 = CMPLE_PPzZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2100 = CMPLE_PPzZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2099 = CMPLE_PPzZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2098 = CMPLE_PPzZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2097 = CMPHS_WIDE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2096 = CMPHS_WIDE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2095 = CMPHS_WIDE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2094 = CMPHS_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2093 = CMPHS_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2092 = CMPHS_PPzZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2091 = CMPHS_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2090 = CMPHS_PPzZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2089 = CMPHS_PPzZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2088 = CMPHS_PPzZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2087 = CMPHS_PPzZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2086 = CMPHI_WIDE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2085 = CMPHI_WIDE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2084 = CMPHI_WIDE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2083 = CMPHI_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2082 = CMPHI_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2081 = CMPHI_PPzZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2080 = CMPHI_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2079 = CMPHI_PPzZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2078 = CMPHI_PPzZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2077 = CMPHI_PPzZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[843] }, // Inst #2076 = CMPHI_PPzZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2075 = CMPGT_WIDE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2074 = CMPGT_WIDE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2073 = CMPGT_WIDE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2072 = CMPGT_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2071 = CMPGT_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2070 = CMPGT_PPzZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2069 = CMPGT_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2068 = CMPGT_PPzZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2067 = CMPGT_PPzZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2066 = CMPGT_PPzZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2065 = CMPGT_PPzZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2064 = CMPGE_WIDE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2063 = CMPGE_WIDE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2062 = CMPGE_WIDE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2061 = CMPGE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2060 = CMPGE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2059 = CMPGE_PPzZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2058 = CMPGE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2057 = CMPGE_PPzZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2056 = CMPGE_PPzZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2055 = CMPGE_PPzZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2054 = CMPGE_PPzZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2053 = CMPEQ_WIDE_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2052 = CMPEQ_WIDE_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2051 = CMPEQ_WIDE_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2050 = CMPEQ_PPzZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2049 = CMPEQ_PPzZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2048 = CMPEQ_PPzZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[839] }, // Inst #2047 = CMPEQ_PPzZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2046 = CMPEQ_PPzZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2045 = CMPEQ_PPzZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2044 = CMPEQ_PPzZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[835] }, // Inst #2043 = CMPEQ_PPzZI_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2042 = CMLTv8i8rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2041 = CMLTv8i16rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2040 = CMLTv4i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2039 = CMLTv4i16rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2038 = CMLTv2i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2037 = CMLTv2i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2036 = CMLTv1i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2035 = CMLTv16i8rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2034 = CMLEv8i8rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2033 = CMLEv8i16rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2032 = CMLEv4i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2031 = CMLEv4i16rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2030 = CMLEv2i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2029 = CMLEv2i32rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2028 = CMLEv1i64rz
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2027 = CMLEv16i8rz
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[806] }, // Inst #2026 = CMLA_ZZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[806] }, // Inst #2025 = CMLA_ZZZ_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[806] }, // Inst #2024 = CMLA_ZZZ_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[806] }, // Inst #2023 = CMLA_ZZZ_B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[794] }, // Inst #2022 = CMLA_ZZZI_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[800] }, // Inst #2021 = CMLA_ZZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2020 = CMHSv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2019 = CMHSv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2018 = CMHSv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2017 = CMHSv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2016 = CMHSv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2015 = CMHSv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2014 = CMHSv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2013 = CMHSv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2012 = CMHIv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2011 = CMHIv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2010 = CMHIv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2009 = CMHIv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2008 = CMHIv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2007 = CMHIv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2006 = CMHIv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2005 = CMHIv16i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #2004 = CMGTv8i8rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #2003 = CMGTv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2002 = CMGTv8i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #2001 = CMGTv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #2000 = CMGTv4i32rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1999 = CMGTv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1998 = CMGTv4i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1997 = CMGTv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1996 = CMGTv2i64rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1995 = CMGTv2i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1994 = CMGTv2i32rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1993 = CMGTv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1992 = CMGTv1i64rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1991 = CMGTv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1990 = CMGTv16i8rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1989 = CMGTv16i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1988 = CMGEv8i8rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1987 = CMGEv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1986 = CMGEv8i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1985 = CMGEv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1984 = CMGEv4i32rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1983 = CMGEv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1982 = CMGEv4i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1981 = CMGEv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1980 = CMGEv2i64rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1979 = CMGEv2i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1978 = CMGEv2i32rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1977 = CMGEv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1976 = CMGEv1i64rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1975 = CMGEv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1974 = CMGEv16i8rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1973 = CMGEv16i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1972 = CMEQv8i8rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1971 = CMEQv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1970 = CMEQv8i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1969 = CMEQv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1968 = CMEQv4i32rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1967 = CMEQv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1966 = CMEQv4i16rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1965 = CMEQv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1964 = CMEQv2i64rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1963 = CMEQv2i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1962 = CMEQv2i32rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1961 = CMEQv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1960 = CMEQv1i64rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1959 = CMEQv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1958 = CMEQv16i8rz
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1957 = CMEQv16i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1956 = CLZv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1955 = CLZv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1954 = CLZv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1953 = CLZv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1952 = CLZv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1951 = CLZv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1950 = CLZ_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1949 = CLZ_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1948 = CLZ_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1947 = CLZ_ZPmZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #1946 = CLZXr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #1945 = CLZWr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1944 = CLSv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1943 = CLSv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1942 = CLSv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1941 = CLSv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1940 = CLSv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1939 = CLSv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1938 = CLS_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1937 = CLS_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1936 = CLS_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1935 = CLS_ZPmZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #1934 = CLSXr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #1933 = CLSWr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #1932 = CLREX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1931 = CLASTB_ZPZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1930 = CLASTB_ZPZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1929 = CLASTB_ZPZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1928 = CLASTB_ZPZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[831] }, // Inst #1927 = CLASTB_VPZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[827] }, // Inst #1926 = CLASTB_VPZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[823] }, // Inst #1925 = CLASTB_VPZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[819] }, // Inst #1924 = CLASTB_VPZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[811] }, // Inst #1923 = CLASTB_RPZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[811] }, // Inst #1922 = CLASTB_RPZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[815] }, // Inst #1921 = CLASTB_RPZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[811] }, // Inst #1920 = CLASTB_RPZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1919 = CLASTA_ZPZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1918 = CLASTA_ZPZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1917 = CLASTA_ZPZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1916 = CLASTA_ZPZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[831] }, // Inst #1915 = CLASTA_VPZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[827] }, // Inst #1914 = CLASTA_VPZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[823] }, // Inst #1913 = CLASTA_VPZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[819] }, // Inst #1912 = CLASTA_VPZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[811] }, // Inst #1911 = CLASTA_RPZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[811] }, // Inst #1910 = CLASTA_RPZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[815] }, // Inst #1909 = CLASTA_RPZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[811] }, // Inst #1908 = CLASTA_RPZ_B
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1907 = CHKFEAT
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1906 = CFINV
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[806] }, // Inst #1905 = CDOT_ZZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[806] }, // Inst #1904 = CDOT_ZZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[800] }, // Inst #1903 = CDOT_ZZZI_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[794] }, // Inst #1902 = CDOT_ZZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[790] }, // Inst #1901 = CCMPXr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[786] }, // Inst #1900 = CCMPXi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[782] }, // Inst #1899 = CCMPWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[778] }, // Inst #1898 = CCMPWi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[790] }, // Inst #1897 = CCMNXr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[786] }, // Inst #1896 = CCMNXi
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[782] }, // Inst #1895 = CCMNWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[778] }, // Inst #1894 = CCMNWi
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[582] }, // Inst #1893 = CBZX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[776] }, // Inst #1892 = CBZW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[582] }, // Inst #1891 = CBNZX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[776] }, // Inst #1890 = CBNZW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #1889 = CASX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1888 = CASW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #1887 = CASPX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[768] }, // Inst #1886 = CASPW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #1885 = CASPLX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[768] }, // Inst #1884 = CASPLW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #1883 = CASPAX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[768] }, // Inst #1882 = CASPAW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[772] }, // Inst #1881 = CASPALX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[768] }, // Inst #1880 = CASPALW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #1879 = CASLX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1878 = CASLW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1877 = CASLH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1876 = CASLB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1875 = CASH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1874 = CASB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #1873 = CASAX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1872 = CASAW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[764] }, // Inst #1871 = CASALX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1870 = CASALW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1869 = CASALH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1868 = CASALB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1867 = CASAH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[760] }, // Inst #1866 = CASAB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #1865 = CADD_ZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #1864 = CADD_ZZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #1863 = CADD_ZZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[756] }, // Inst #1862 = CADD_ZZI_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[627] }, // Inst #1861 = Bcc
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #1860 = BSLv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #1859 = BSLv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1858 = BSL_ZZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1857 = BSL2N_ZZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1856 = BSL1N_ZZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #1855 = BRKPB_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #1854 = BRKPBS_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #1853 = BRKPA_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #1852 = BRKPAS_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[752] }, // Inst #1851 = BRKN_PPzP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[752] }, // Inst #1850 = BRKNS_PPzP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #1849 = BRKB_PPzP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[748] }, // Inst #1848 = BRKB_PPmP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #1847 = BRKBS_PPzP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #1846 = BRKA_PPzP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[748] }, // Inst #1845 = BRKA_PPmP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[745] }, // Inst #1844 = BRKAS_PPzP
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #1843 = BRK
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1842 = BRB_INJ
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1841 = BRB_IALL
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1840 = BRABZ
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #1839 = BRAB
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1838 = BRAAZ
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #1837 = BRAA
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1836 = BR
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #1835 = BMOPS_MPPZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #1834 = BMOPA_MPPZZ_S
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1833 = BLRABZ
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #1832 = BLRAB
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1831 = BLRAAZ
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[743] }, // Inst #1830 = BLRAA
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1829 = BLR
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[626] }, // Inst #1828 = BL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #1827 = BITv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #1826 = BITv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #1825 = BIFv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #1824 = BIFv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1823 = BICv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[739] }, // Inst #1822 = BICv8i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[739] }, // Inst #1821 = BICv4i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[735] }, // Inst #1820 = BICv4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[735] }, // Inst #1819 = BICv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1818 = BICv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1817 = BIC_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1816 = BIC_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1815 = BIC_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1814 = BIC_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1813 = BIC_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #1812 = BIC_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #1811 = BICXrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #1810 = BICWrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #1809 = BICS_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #1808 = BICSXrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #1807 = BICSWrs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1806 = BGRP_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1805 = BGRP_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1804 = BGRP_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1803 = BGRP_ZZZ_B
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #1802 = BFVDOT_VG2_M2ZZI_HtoS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1801 = BFSUB_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1800 = BFSUB_ZPmZZ
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #1799 = BFSUB_VG4_M4Z_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #1798 = BFSUB_VG2_M2Z_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[730] }, // Inst #1797 = BFMXri
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[725] }, // Inst #1796 = BFMWri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[721] }, // Inst #1795 = BFMUL_ZZZI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1794 = BFMUL_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1793 = BFMUL_ZPmZZ
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[715] }, // Inst #1792 = BFMOPS_MPPZZ_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #1791 = BFMOPS_MPPZZ
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[715] }, // Inst #1790 = BFMOPA_MPPZZ_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[709] }, // Inst #1789 = BFMOPA_MPPZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1788 = BFMMLA_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #1787 = BFMMLA
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #1786 = BFMLS_ZZZI
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #1785 = BFMLS_ZPmZZ
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #1784 = BFMLS_VG4_M4ZZI
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #1783 = BFMLS_VG4_M4ZZ
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #1782 = BFMLS_VG4_M4Z4Z
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #1781 = BFMLS_VG2_M2ZZI
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #1780 = BFMLS_VG2_M2ZZ
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #1779 = BFMLS_VG2_M2Z2Z
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #1778 = BFMLSL_VG4_M4ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #1777 = BFMLSL_VG4_M4ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #1776 = BFMLSL_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #1775 = BFMLSL_VG2_M2ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #1774 = BFMLSL_VG2_M2ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #1773 = BFMLSL_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #1772 = BFMLSL_MZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #1771 = BFMLSL_MZZI_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1770 = BFMLSLT_ZZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #1769 = BFMLSLT_ZZZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1768 = BFMLSLB_ZZZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #1767 = BFMLSLB_ZZZI_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #1766 = BFMLA_ZZZI
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[704] }, // Inst #1765 = BFMLA_ZPmZZ
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #1764 = BFMLA_VG4_M4ZZI
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #1763 = BFMLA_VG4_M4ZZ
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #1762 = BFMLA_VG4_M4Z4Z
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #1761 = BFMLA_VG2_M2ZZI
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #1760 = BFMLA_VG2_M2ZZ
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #1759 = BFMLA_VG2_M2Z2Z
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #1758 = BFMLAL_VG4_M4ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #1757 = BFMLAL_VG4_M4ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #1756 = BFMLAL_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #1755 = BFMLAL_VG2_M2ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #1754 = BFMLAL_VG2_M2ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #1753 = BFMLAL_VG2_M2Z2Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[698] }, // Inst #1752 = BFMLAL_MZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[691] }, // Inst #1751 = BFMLAL_MZZI_HtoS
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #1750 = BFMLALT_ZZZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1749 = BFMLALT_ZZZ
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #1748 = BFMLALTIdx
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #1747 = BFMLALT
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #1746 = BFMLALB_ZZZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1745 = BFMLALB_ZZZ
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[686] }, // Inst #1744 = BFMLALBIdx
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #1743 = BFMLALB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1742 = BFMIN_ZPmZZ
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #1741 = BFMIN_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #1740 = BFMIN_VG4_4Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #1739 = BFMIN_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #1738 = BFMIN_VG2_2Z2Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1737 = BFMINNM_ZPmZZ
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #1736 = BFMINNM_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #1735 = BFMINNM_VG4_4Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #1734 = BFMINNM_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #1733 = BFMINNM_VG2_2Z2Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1732 = BFMAX_ZPmZZ
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #1731 = BFMAX_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #1730 = BFMAX_VG4_4Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #1729 = BFMAX_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #1728 = BFMAX_VG2_2Z2Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1727 = BFMAXNM_ZPmZZ
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #1726 = BFMAXNM_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[683] }, // Inst #1725 = BFMAXNM_VG4_4Z2Z_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #1724 = BFMAXNM_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[680] }, // Inst #1723 = BFMAXNM_VG2_2Z2Z_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #1722 = BFDOTv8bf16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[676] }, // Inst #1721 = BFDOTv4bf16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1720 = BFDOT_ZZZ
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[671] }, // Inst #1719 = BFDOT_ZZI
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #1718 = BFDOT_VG4_M4ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[664] }, // Inst #1717 = BFDOT_VG4_M4ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #1716 = BFDOT_VG4_M4Z4Z_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #1715 = BFDOT_VG2_M2ZZ_HtoS
|
||
|
|
{ 7, &AArch64Descs.OperandInfo[657] }, // Inst #1714 = BFDOT_VG2_M2ZZI_HtoS
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #1713 = BFDOT_VG2_M2Z2Z_HtoS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1712 = BFCVT_ZPmZ
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #1711 = BFCVT_Z2Z_StoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #1710 = BFCVT_Z2Z_HtoB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #1709 = BFCVTN_Z2Z_StoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[655] }, // Inst #1708 = BFCVTN_Z2Z_HtoB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1707 = BFCVTNT_ZPmZ
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #1706 = BFCVTN2
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1705 = BFCVTN
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[653] }, // Inst #1704 = BFCVT
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1703 = BFCLAMP_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[649] }, // Inst #1702 = BFCLAMP_VG4_4ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[645] }, // Inst #1701 = BFCLAMP_VG2_2ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1700 = BFADD_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1699 = BFADD_ZPmZZ
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #1698 = BFADD_VG4_M4Z_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #1697 = BFADD_VG2_M2Z_H
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #1696 = BF2CVT_ZZ_BtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #1695 = BF2CVT_2ZZ_BtoH_NAME
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[643] }, // Inst #1694 = BF2CVTLv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #1693 = BF2CVTL_2ZZ_BtoH_NAME
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #1692 = BF2CVTLT_ZZ_BtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1691 = BF2CVTL2v8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #1690 = BF1CVT_ZZ_BtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #1689 = BF1CVT_2ZZ_BtoH_NAME
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[643] }, // Inst #1688 = BF1CVTLv8f16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[641] }, // Inst #1687 = BF1CVTL_2ZZ_BtoH_NAME
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[639] }, // Inst #1686 = BF1CVTLT_ZZ_BtoH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1685 = BF1CVTL2v8f16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[634] }, // Inst #1684 = BF16DOTlanev8bf16
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[629] }, // Inst #1683 = BF16DOTlanev4bf16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1682 = BEXT_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1681 = BEXT_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1680 = BEXT_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1679 = BEXT_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1678 = BDEP_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1677 = BDEP_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1676 = BDEP_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1675 = BDEP_ZZZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[627] }, // Inst #1674 = BCcc
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1673 = BCAX_ZZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[219] }, // Inst #1672 = BCAX
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[626] }, // Inst #1671 = B
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1670 = AXFLAG
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[624] }, // Inst #1669 = AUTIZB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[624] }, // Inst #1668 = AUTIZA
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1667 = AUTIBZ
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1666 = AUTIBSPPCr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[626] }, // Inst #1665 = AUTIBSPPCi
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1664 = AUTIBSP
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1663 = AUTIB171615
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1662 = AUTIB1716
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[621] }, // Inst #1661 = AUTIB
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1660 = AUTIAZ
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1659 = AUTIASPPCr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[626] }, // Inst #1658 = AUTIASPPCi
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1657 = AUTIASP
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1656 = AUTIA171615
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1655 = AUTIA1716
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[621] }, // Inst #1654 = AUTIA
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[624] }, // Inst #1653 = AUTDZB
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[624] }, // Inst #1652 = AUTDZA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[621] }, // Inst #1651 = AUTDB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[621] }, // Inst #1650 = AUTDA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #1649 = ASR_ZZI_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #1648 = ASR_ZZI_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #1647 = ASR_ZZI_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[618] }, // Inst #1646 = ASR_ZZI_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1645 = ASR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1644 = ASR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1643 = ASR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1642 = ASR_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #1641 = ASR_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #1640 = ASR_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #1639 = ASR_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #1638 = ASR_ZPmI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1637 = ASR_WIDE_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1636 = ASR_WIDE_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1635 = ASR_WIDE_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1634 = ASR_WIDE_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1633 = ASR_WIDE_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1632 = ASR_WIDE_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #1631 = ASRVXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #1630 = ASRVWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1629 = ASRR_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1628 = ASRR_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1627 = ASRR_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1626 = ASRR_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #1625 = ASRD_ZPmI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #1624 = ASRD_ZPmI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #1623 = ASRD_ZPmI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[614] }, // Inst #1622 = ASRD_ZPmI_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1621 = ANDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1620 = ANDv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1619 = AND_ZZZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1618 = AND_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1617 = AND_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1616 = AND_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1615 = AND_ZPmZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[611] }, // Inst #1614 = AND_ZI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #1613 = AND_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #1612 = ANDXrs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[608] }, // Inst #1611 = ANDXri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #1610 = ANDWrs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[605] }, // Inst #1609 = ANDWri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #1608 = ANDV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #1607 = ANDV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #1606 = ANDV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[602] }, // Inst #1605 = ANDV_VPZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[598] }, // Inst #1604 = ANDS_PPzPP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #1603 = ANDSXrs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[595] }, // Inst #1602 = ANDSXri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #1601 = ANDSWrs
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[592] }, // Inst #1600 = ANDSWri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #1599 = ANDQV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #1598 = ANDQV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #1597 = ANDQV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #1596 = ANDQV_VPZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1595 = AESMCrr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[590] }, // Inst #1594 = AESMC_ZZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1593 = AESIMCrr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[590] }, // Inst #1592 = AESIMC_ZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #1591 = AESErr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #1590 = AESE_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[587] }, // Inst #1589 = AESDrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[584] }, // Inst #1588 = AESD_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1587 = ADR_UXTW_ZZZ_D_3
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1586 = ADR_UXTW_ZZZ_D_2
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1585 = ADR_UXTW_ZZZ_D_1
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1584 = ADR_UXTW_ZZZ_D_0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1583 = ADR_SXTW_ZZZ_D_3
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1582 = ADR_SXTW_ZZZ_D_2
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1581 = ADR_SXTW_ZZZ_D_1
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1580 = ADR_SXTW_ZZZ_D_0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1579 = ADR_LSL_ZZZ_S_3
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1578 = ADR_LSL_ZZZ_S_2
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1577 = ADR_LSL_ZZZ_S_1
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1576 = ADR_LSL_ZZZ_S_0
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1575 = ADR_LSL_ZZZ_D_3
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1574 = ADR_LSL_ZZZ_D_2
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1573 = ADR_LSL_ZZZ_D_1
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1572 = ADR_LSL_ZZZ_D_0
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[582] }, // Inst #1571 = ADRP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[582] }, // Inst #1570 = ADR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1569 = ADDv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1568 = ADDv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1567 = ADDv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1566 = ADDv4i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1565 = ADDv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1564 = ADDv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1563 = ADDv1i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1562 = ADDv16i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1561 = ADD_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1560 = ADD_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1559 = ADD_ZZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1558 = ADD_ZZZ_CPA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1557 = ADD_ZZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1556 = ADD_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1555 = ADD_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1554 = ADD_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1553 = ADD_ZPmZ_CPA
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1552 = ADD_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #1551 = ADD_ZI_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #1550 = ADD_ZI_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #1549 = ADD_ZI_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[578] }, // Inst #1548 = ADD_ZI_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #1547 = ADD_VG4_M4Z_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[573] }, // Inst #1546 = ADD_VG4_M4Z_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #1545 = ADD_VG4_M4ZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[567] }, // Inst #1544 = ADD_VG4_M4ZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #1543 = ADD_VG4_M4Z4Z_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[561] }, // Inst #1542 = ADD_VG4_M4Z4Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #1541 = ADD_VG4_4ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #1540 = ADD_VG4_4ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #1539 = ADD_VG4_4ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[558] }, // Inst #1538 = ADD_VG4_4ZZ_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #1537 = ADD_VG2_M2Z_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[553] }, // Inst #1536 = ADD_VG2_M2Z_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #1535 = ADD_VG2_M2ZZ_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[547] }, // Inst #1534 = ADD_VG2_M2ZZ_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #1533 = ADD_VG2_M2Z2Z_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[541] }, // Inst #1532 = ADD_VG2_M2Z2Z_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #1531 = ADD_VG2_2ZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #1530 = ADD_VG2_2ZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #1529 = ADD_VG2_2ZZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[538] }, // Inst #1528 = ADD_VG2_2ZZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[465] }, // Inst #1527 = ADDXrx64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[534] }, // Inst #1526 = ADDXrx
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #1525 = ADDXrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[530] }, // Inst #1524 = ADDXri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[526] }, // Inst #1523 = ADDWrx
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #1522 = ADDWrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[522] }, // Inst #1521 = ADDWri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[520] }, // Inst #1520 = ADDVv8i8v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[518] }, // Inst #1519 = ADDVv8i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[516] }, // Inst #1518 = ADDVv4i32v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[514] }, // Inst #1517 = ADDVv4i16v
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[512] }, // Inst #1516 = ADDVv16i8v
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[462] }, // Inst #1515 = ADDVL_XXI
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[447] }, // Inst #1514 = ADDVA_MPPZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[442] }, // Inst #1513 = ADDVA_MPPZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[508] }, // Inst #1512 = ADDSXrx64
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[504] }, // Inst #1511 = ADDSXrx
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[500] }, // Inst #1510 = ADDSXrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[496] }, // Inst #1509 = ADDSXri
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[492] }, // Inst #1508 = ADDSWrx
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[488] }, // Inst #1507 = ADDSWrs
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[484] }, // Inst #1506 = ADDSWri
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[462] }, // Inst #1505 = ADDSVL_XXI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[462] }, // Inst #1504 = ADDSPL_XXI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #1503 = ADDQV_VPZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #1502 = ADDQV_VPZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #1501 = ADDQV_VPZ_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[481] }, // Inst #1500 = ADDQV_VPZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1499 = ADDPv8i8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1498 = ADDPv8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1497 = ADDPv4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1496 = ADDPv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[479] }, // Inst #1495 = ADDPv2i64p
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1494 = ADDPv2i64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[476] }, // Inst #1493 = ADDPv2i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[473] }, // Inst #1492 = ADDPv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1491 = ADDP_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1490 = ADDP_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1489 = ADDP_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[469] }, // Inst #1488 = ADDP_ZPmZ_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[465] }, // Inst #1487 = ADDPT_shift
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[462] }, // Inst #1486 = ADDPL_XXI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #1485 = ADDHNv8i16_v8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #1484 = ADDHNv8i16_v16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #1483 = ADDHNv4i32_v8i16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #1482 = ADDHNv4i32_v4i16
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[458] }, // Inst #1481 = ADDHNv2i64_v4i32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[455] }, // Inst #1480 = ADDHNv2i64_v2i32
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1479 = ADDHNT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1478 = ADDHNT_ZZZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1477 = ADDHNT_ZZZ_B
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1476 = ADDHNB_ZZZ_S
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1475 = ADDHNB_ZZZ_H
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[452] }, // Inst #1474 = ADDHNB_ZZZ_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[447] }, // Inst #1473 = ADDHA_MPPZ_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[442] }, // Inst #1472 = ADDHA_MPPZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[438] }, // Inst #1471 = ADDG
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #1470 = ADCXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #1469 = ADCWr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #1468 = ADCSXr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #1467 = ADCSWr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1466 = ADCLT_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1465 = ADCLT_ZZZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1464 = ADCLB_ZZZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[434] }, // Inst #1463 = ADCLB_ZZZ_D
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1462 = ABSv8i8
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1461 = ABSv8i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1460 = ABSv4i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1459 = ABSv4i16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1458 = ABSv2i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1457 = ABSv2i32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[432] }, // Inst #1456 = ABSv1i64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[430] }, // Inst #1455 = ABSv16i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1454 = ABS_ZPmZ_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1453 = ABS_ZPmZ_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1452 = ABS_ZPmZ_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[426] }, // Inst #1451 = ABS_ZPmZ_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #1450 = ABSXr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #1449 = ABSWr
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[425] }, // Inst #1448 = ZERO_T_PSEUDO
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #1447 = ZERO_M_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1446 = UXTW_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1445 = UXTH_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1444 = UXTH_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1443 = UXTB_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1442 = UXTB_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1441 = UXTB_ZPmZ_D_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1440 = UVDOT_VG4_M4ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1439 = UVDOT_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1438 = UVDOT_VG2_M2ZZI_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1437 = USVDOT_VG4_M4ZZI_BToS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1436 = USMOPS_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1435 = USMOPS_MPPZZ_D_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1434 = USMOPA_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1433 = USMOPA_MPPZZ_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1432 = USMLALL_VG4_M4ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1431 = USMLALL_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1430 = USMLALL_VG4_M4Z4Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1429 = USMLALL_VG2_M2ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1428 = USMLALL_VG2_M2ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1427 = USMLALL_VG2_M2Z2Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1426 = USMLALL_MZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1425 = USMLALL_MZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1424 = USDOT_VG4_M4ZZ_BToS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1423 = USDOT_VG4_M4ZZI_BToS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1422 = USDOT_VG4_M4Z4Z_BToS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1421 = USDOT_VG2_M2ZZ_BToS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1420 = USDOT_VG2_M2ZZI_BToS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1419 = USDOT_VG2_M2Z2Z_BToS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1418 = URSQRTE_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1417 = URSHR_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1416 = URSHR_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1415 = URSHR_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1414 = URSHR_ZPZI_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1413 = URSHL_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1412 = URSHL_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1411 = URSHL_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1410 = URSHL_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1409 = URECPE_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1408 = UQSHL_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1407 = UQSHL_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1406 = UQSHL_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1405 = UQSHL_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1404 = UQSHL_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1403 = UQSHL_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1402 = UQSHL_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1401 = UQSHL_ZPZI_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1400 = UQRSHL_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1399 = UQRSHL_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1398 = UQRSHL_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1397 = UQRSHL_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1396 = UMULH_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1395 = UMULH_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1394 = UMULH_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1393 = UMULH_ZPZZ_B_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1392 = UMOPS_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1391 = UMOPS_MPPZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1390 = UMOPS_MPPZZ_D_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1389 = UMOPA_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1388 = UMOPA_MPPZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1387 = UMOPA_MPPZZ_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1386 = UMLSL_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1385 = UMLSL_VG4_M4ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1384 = UMLSL_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1383 = UMLSL_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1382 = UMLSL_VG2_M2ZZI_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1381 = UMLSL_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1380 = UMLSL_MZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1379 = UMLSL_MZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1378 = UMLSLL_VG4_M4ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1377 = UMLSLL_VG4_M4ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1376 = UMLSLL_VG4_M4ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1375 = UMLSLL_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1374 = UMLSLL_VG4_M4Z4Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1373 = UMLSLL_VG4_M4Z4Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1372 = UMLSLL_VG2_M2ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1371 = UMLSLL_VG2_M2ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1370 = UMLSLL_VG2_M2ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1369 = UMLSLL_VG2_M2ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1368 = UMLSLL_VG2_M2Z2Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1367 = UMLSLL_VG2_M2Z2Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1366 = UMLSLL_MZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1365 = UMLSLL_MZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1364 = UMLSLL_MZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1363 = UMLSLL_MZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1362 = UMLAL_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1361 = UMLAL_VG4_M4ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1360 = UMLAL_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1359 = UMLAL_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1358 = UMLAL_VG2_M2ZZI_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1357 = UMLAL_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1356 = UMLAL_MZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1355 = UMLAL_MZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1354 = UMLALL_VG4_M4ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1353 = UMLALL_VG4_M4ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1352 = UMLALL_VG4_M4ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1351 = UMLALL_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1350 = UMLALL_VG4_M4Z4Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1349 = UMLALL_VG4_M4Z4Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1348 = UMLALL_VG2_M2ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1347 = UMLALL_VG2_M2ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1346 = UMLALL_VG2_M2ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1345 = UMLALL_VG2_M2ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1344 = UMLALL_VG2_M2Z2Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1343 = UMLALL_VG2_M2Z2Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1342 = UMLALL_MZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1341 = UMLALL_MZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1340 = UMLALL_MZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1339 = UMLALL_MZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1338 = UMIN_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1337 = UMIN_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1336 = UMIN_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1335 = UMIN_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1334 = UMAX_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1333 = UMAX_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1332 = UMAX_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1331 = UMAX_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1330 = UDOT_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1329 = UDOT_VG4_M4ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1328 = UDOT_VG4_M4ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1327 = UDOT_VG4_M4ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1326 = UDOT_VG4_M4ZZI_HToS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1325 = UDOT_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1324 = UDOT_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1323 = UDOT_VG4_M4Z4Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1322 = UDOT_VG4_M4Z4Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1321 = UDOT_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1320 = UDOT_VG2_M2ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1319 = UDOT_VG2_M2ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1318 = UDOT_VG2_M2ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1317 = UDOT_VG2_M2ZZI_HToS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1316 = UDOT_VG2_M2ZZI_BToS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1315 = UDOT_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1314 = UDOT_VG2_M2Z2Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1313 = UDOT_VG2_M2Z2Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1312 = UDIV_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1311 = UDIV_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1310 = UCVTF_ZPmZ_StoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1309 = UCVTF_ZPmZ_StoH_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1308 = UCVTF_ZPmZ_StoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1307 = UCVTF_ZPmZ_HtoH_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1306 = UCVTF_ZPmZ_DtoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1305 = UCVTF_ZPmZ_DtoH_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1304 = UCVTF_ZPmZ_DtoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1303 = UABD_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1302 = UABD_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1301 = UABD_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1300 = UABD_ZPZZ_B_UNDEF
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #1299 = TLSDESC_CALLSEQ
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #1298 = TLSDESCCALL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[423] }, // Inst #1297 = TCRETURNriBTI
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[287] }, // Inst #1296 = TCRETURNriALL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[421] }, // Inst #1295 = TCRETURNri
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[21] }, // Inst #1294 = TCRETURNdi
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[416] }, // Inst #1293 = TAGPstack
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[413] }, // Inst #1292 = StoreSwiftAsyncContext
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[411] }, // Inst #1291 = SpeculationSafeValueX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[409] }, // Inst #1290 = SpeculationSafeValueW
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1289 = SpeculationBarrierSBEndBB
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1288 = SpeculationBarrierISBDSBEndBB
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1287 = SXTW_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1286 = SXTH_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1285 = SXTH_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1284 = SXTB_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1283 = SXTB_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1282 = SXTB_ZPmZ_D_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1281 = SVDOT_VG4_M4ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1280 = SVDOT_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1279 = SVDOT_VG2_M2ZZI_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1278 = SUVDOT_VG4_M4ZZI_BToS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1277 = SUMOPS_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1276 = SUMOPS_MPPZZ_D_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1275 = SUMOPA_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1274 = SUMOPA_MPPZZ_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1273 = SUMLALL_VG4_M4ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1272 = SUMLALL_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1271 = SUMLALL_VG2_M2ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1270 = SUMLALL_VG2_M2ZZI_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1269 = SUMLALL_MZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1268 = SUDOT_VG4_M4ZZ_BToS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1267 = SUDOT_VG4_M4ZZI_BToS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1266 = SUDOT_VG2_M2ZZ_BToS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1265 = SUDOT_VG2_M2ZZI_BToS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1264 = SUB_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1263 = SUB_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1262 = SUB_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1261 = SUB_ZPZZ_B_ZERO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #1260 = SUB_VG4_M4Z_S_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #1259 = SUB_VG4_M4Z_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1258 = SUB_VG4_M4ZZ_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1257 = SUB_VG4_M4ZZ_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1256 = SUB_VG4_M4Z4Z_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1255 = SUB_VG4_M4Z4Z_D_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #1254 = SUB_VG2_M2Z_S_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #1253 = SUB_VG2_M2Z_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1252 = SUB_VG2_M2ZZ_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1251 = SUB_VG2_M2ZZ_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1250 = SUB_VG2_M2Z2Z_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1249 = SUB_VG2_M2Z2Z_D_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #1248 = SUBXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #1247 = SUBWrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #1246 = SUBSXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #1245 = SUBSWrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1244 = SUBR_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1243 = SUBR_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1242 = SUBR_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1241 = SUBR_ZPZZ_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[405] }, // Inst #1240 = STZGloop_wback
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[401] }, // Inst #1239 = STZGloop
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[333] }, // Inst #1238 = STR_ZZZZXI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[330] }, // Inst #1237 = STR_ZZZXI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[327] }, // Inst #1236 = STR_ZZXI
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[322] }, // Inst #1235 = STR_TX_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[319] }, // Inst #1234 = STR_PPXI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[405] }, // Inst #1233 = STGloop_wback
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[401] }, // Inst #1232 = STGloop
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1231 = SRSHR_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1230 = SRSHR_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1229 = SRSHR_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1228 = SRSHR_ZPZI_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1227 = SRSHL_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1226 = SRSHL_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1225 = SRSHL_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1224 = SRSHL_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1223 = SQSHL_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1222 = SQSHL_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1221 = SQSHL_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1220 = SQSHL_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1219 = SQSHL_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1218 = SQSHL_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1217 = SQSHL_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1216 = SQSHL_ZPZI_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1215 = SQSHLU_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1214 = SQSHLU_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1213 = SQSHLU_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1212 = SQSHLU_ZPZI_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1211 = SQRSHL_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1210 = SQRSHL_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1209 = SQRSHL_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1208 = SQRSHL_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1207 = SQNEG_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1206 = SQNEG_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1205 = SQNEG_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1204 = SQNEG_ZPmZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1203 = SQABS_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1202 = SQABS_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1201 = SQABS_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1200 = SQABS_ZPmZ_B_UNDEF
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[398] }, // Inst #1199 = SPACE
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1198 = SMULH_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1197 = SMULH_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1196 = SMULH_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1195 = SMULH_ZPZZ_B_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1194 = SMOPS_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1193 = SMOPS_MPPZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1192 = SMOPS_MPPZZ_D_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1191 = SMOPA_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1190 = SMOPA_MPPZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #1189 = SMOPA_MPPZZ_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1188 = SMLSL_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1187 = SMLSL_VG4_M4ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1186 = SMLSL_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1185 = SMLSL_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1184 = SMLSL_VG2_M2ZZI_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1183 = SMLSL_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1182 = SMLSL_MZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1181 = SMLSL_MZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1180 = SMLSLL_VG4_M4ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1179 = SMLSLL_VG4_M4ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1178 = SMLSLL_VG4_M4ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1177 = SMLSLL_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1176 = SMLSLL_VG4_M4Z4Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1175 = SMLSLL_VG4_M4Z4Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1174 = SMLSLL_VG2_M2ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1173 = SMLSLL_VG2_M2ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1172 = SMLSLL_VG2_M2ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1171 = SMLSLL_VG2_M2ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1170 = SMLSLL_VG2_M2Z2Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1169 = SMLSLL_VG2_M2Z2Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1168 = SMLSLL_MZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1167 = SMLSLL_MZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1166 = SMLSLL_MZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1165 = SMLSLL_MZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1164 = SMLAL_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1163 = SMLAL_VG4_M4ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1162 = SMLAL_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1161 = SMLAL_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1160 = SMLAL_VG2_M2ZZI_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1159 = SMLAL_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1158 = SMLAL_MZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1157 = SMLAL_MZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1156 = SMLALL_VG4_M4ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1155 = SMLALL_VG4_M4ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1154 = SMLALL_VG4_M4ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1153 = SMLALL_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1152 = SMLALL_VG4_M4Z4Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1151 = SMLALL_VG4_M4Z4Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1150 = SMLALL_VG2_M2ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1149 = SMLALL_VG2_M2ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1148 = SMLALL_VG2_M2ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1147 = SMLALL_VG2_M2ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1146 = SMLALL_VG2_M2Z2Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1145 = SMLALL_VG2_M2Z2Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1144 = SMLALL_MZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #1143 = SMLALL_MZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1142 = SMLALL_MZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #1141 = SMLALL_MZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1140 = SMIN_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1139 = SMIN_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1138 = SMIN_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1137 = SMIN_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1136 = SMAX_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1135 = SMAX_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1134 = SMAX_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1133 = SMAX_ZPZZ_B_UNDEF
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #1132 = SEH_StackAlloc
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1131 = SEH_SetFP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[21] }, // Inst #1130 = SEH_SaveReg_X
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[395] }, // Inst #1129 = SEH_SaveRegP_X
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[395] }, // Inst #1128 = SEH_SaveRegP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[21] }, // Inst #1127 = SEH_SaveReg
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[21] }, // Inst #1126 = SEH_SaveFReg_X
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[395] }, // Inst #1125 = SEH_SaveFRegP_X
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[395] }, // Inst #1124 = SEH_SaveFRegP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[21] }, // Inst #1123 = SEH_SaveFReg
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #1122 = SEH_SaveFPLR_X
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #1121 = SEH_SaveFPLR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[395] }, // Inst #1120 = SEH_SaveAnyRegQPX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[395] }, // Inst #1119 = SEH_SaveAnyRegQP
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1118 = SEH_PrologEnd
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1117 = SEH_PACSignLR
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1116 = SEH_Nop
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1115 = SEH_EpilogStart
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1114 = SEH_EpilogEnd
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #1113 = SEH_AddFP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1112 = SDOT_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1111 = SDOT_VG4_M4ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #1110 = SDOT_VG4_M4ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1109 = SDOT_VG4_M4ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1108 = SDOT_VG4_M4ZZI_HToS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #1107 = SDOT_VG4_M4ZZI_BToS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1106 = SDOT_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1105 = SDOT_VG4_M4Z4Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #1104 = SDOT_VG4_M4Z4Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1103 = SDOT_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1102 = SDOT_VG2_M2ZZ_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #1101 = SDOT_VG2_M2ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1100 = SDOT_VG2_M2ZZI_HtoD_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1099 = SDOT_VG2_M2ZZI_HToS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #1098 = SDOT_VG2_M2ZZI_BToS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1097 = SDOT_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1096 = SDOT_VG2_M2Z2Z_HtoD_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #1095 = SDOT_VG2_M2Z2Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1094 = SDIV_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1093 = SDIV_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1092 = SCVTF_ZPmZ_StoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1091 = SCVTF_ZPmZ_StoH_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1090 = SCVTF_ZPmZ_StoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1089 = SCVTF_ZPmZ_HtoH_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1088 = SCVTF_ZPmZ_DtoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1087 = SCVTF_ZPmZ_DtoH_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1086 = SCVTF_ZPmZ_DtoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1085 = SABD_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1084 = SABD_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1083 = SABD_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1082 = SABD_ZPZZ_B_UNDEF
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[392] }, // Inst #1081 = RestoreZAPseudo
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1080 = RET_ReallyLR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #1079 = RDFFR_PPz
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[391] }, // Inst #1078 = RDFFR_P
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[389] }, // Inst #1077 = PTEST_PP_ANY
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[388] }, // Inst #1076 = PROBED_STACKALLOC_VAR
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[387] }, // Inst #1075 = PROBED_STACKALLOC_DYN
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[383] }, // Inst #1074 = PROBED_STACKALLOC
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1073 = PAUTH_PROLOGUE
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1072 = PAUTH_EPILOGUE
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1071 = ORR_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1070 = ORR_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1069 = ORR_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1068 = ORR_ZPZZ_B_ZERO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #1067 = ORRXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #1066 = ORRWrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #1065 = ORNXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #1064 = ORNWrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1063 = NOT_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1062 = NOT_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1061 = NOT_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1060 = NOT_ZPmZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1059 = NEG_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1058 = NEG_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1057 = NEG_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #1056 = NEG_ZPmZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1055 = MUL_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1054 = MUL_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1053 = MUL_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1052 = MUL_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[379] }, // Inst #1051 = MSRpstatePseudo
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1050 = MSR_FPCR
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1049 = MRS_FPCR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[287] }, // Inst #1048 = MOVi64imm
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[377] }, // Inst #1047 = MOVi32imm
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[376] }, // Inst #1046 = MOVbaseTLS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[373] }, // Inst #1045 = MOVaddrTLS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[373] }, // Inst #1044 = MOVaddrJT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[373] }, // Inst #1043 = MOVaddrEXT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[373] }, // Inst #1042 = MOVaddrCP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[373] }, // Inst #1041 = MOVaddrBA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[373] }, // Inst #1040 = MOVaddr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[287] }, // Inst #1039 = MOVMCSym
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #1038 = MOVA_VG4_MXI4Z_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #1037 = MOVA_VG2_MXI2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[365] }, // Inst #1036 = MOVA_MXI4Z_V_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[369] }, // Inst #1035 = MOVA_MXI4Z_V_H_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[365] }, // Inst #1034 = MOVA_MXI4Z_V_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[361] }, // Inst #1033 = MOVA_MXI4Z_V_B_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[365] }, // Inst #1032 = MOVA_MXI4Z_H_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[369] }, // Inst #1031 = MOVA_MXI4Z_H_H_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[365] }, // Inst #1030 = MOVA_MXI4Z_H_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[361] }, // Inst #1029 = MOVA_MXI4Z_H_B_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[357] }, // Inst #1028 = MOVA_MXI2Z_V_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[357] }, // Inst #1027 = MOVA_MXI2Z_V_H_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[353] }, // Inst #1026 = MOVA_MXI2Z_V_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[349] }, // Inst #1025 = MOVA_MXI2Z_V_B_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[357] }, // Inst #1024 = MOVA_MXI2Z_H_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[357] }, // Inst #1023 = MOVA_MXI2Z_H_H_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[353] }, // Inst #1022 = MOVA_MXI2Z_H_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[349] }, // Inst #1021 = MOVA_MXI2Z_H_B_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #1020 = MOPSMemorySetTaggingPseudo
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[344] }, // Inst #1019 = MOPSMemorySetPseudo
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #1018 = MOPSMemoryMovePseudo
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[338] }, // Inst #1017 = MOPSMemoryCopyPseudo
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #1016 = MLS_ZPZZZ_S_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #1015 = MLS_ZPZZZ_H_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #1014 = MLS_ZPZZZ_D_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #1013 = MLS_ZPZZZ_B_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #1012 = MLA_ZPZZZ_S_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #1011 = MLA_ZPZZZ_H_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #1010 = MLA_ZPZZZ_D_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #1009 = MLA_ZPZZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1008 = LSR_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1007 = LSR_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1006 = LSR_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1005 = LSR_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1004 = LSR_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1003 = LSR_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1002 = LSR_ZPZZ_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #1001 = LSR_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #1000 = LSR_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #999 = LSR_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #998 = LSR_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #997 = LSR_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #996 = LSR_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #995 = LSR_ZPZI_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #994 = LSR_ZPZI_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #993 = LSR_ZPZI_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #992 = LSL_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #991 = LSL_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #990 = LSL_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #989 = LSL_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #988 = LSL_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #987 = LSL_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #986 = LSL_ZPZZ_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #985 = LSL_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #984 = LSL_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #983 = LSL_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #982 = LSL_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #981 = LSL_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #980 = LSL_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #979 = LSL_ZPZI_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #978 = LSL_ZPZI_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #977 = LSL_ZPZI_B_UNDEF
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[336] }, // Inst #976 = LOADgot
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[333] }, // Inst #975 = LDR_ZZZZXI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[330] }, // Inst #974 = LDR_ZZZXI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[327] }, // Inst #973 = LDR_ZZXI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[324] }, // Inst #972 = LDR_ZA_PSEUDO
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[322] }, // Inst #971 = LDR_TX_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[319] }, // Inst #970 = LDR_PPXI
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[301] }, // Inst #969 = LDNT1W_4Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[297] }, // Inst #968 = LDNT1W_4Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[293] }, // Inst #967 = LDNT1W_2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[289] }, // Inst #966 = LDNT1W_2Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[301] }, // Inst #965 = LDNT1H_4Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[297] }, // Inst #964 = LDNT1H_4Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[293] }, // Inst #963 = LDNT1H_2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[289] }, // Inst #962 = LDNT1H_2Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[301] }, // Inst #961 = LDNT1D_4Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[297] }, // Inst #960 = LDNT1D_4Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[293] }, // Inst #959 = LDNT1D_2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[289] }, // Inst #958 = LDNT1D_2Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[301] }, // Inst #957 = LDNT1B_4Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[297] }, // Inst #956 = LDNT1B_4Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[293] }, // Inst #955 = LDNT1B_2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[289] }, // Inst #954 = LDNT1B_2Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #953 = LDNF1W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #952 = LDNF1W_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #951 = LDNF1SW_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #950 = LDNF1SH_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #949 = LDNF1SH_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #948 = LDNF1SB_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #947 = LDNF1SB_H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #946 = LDNF1SB_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #945 = LDNF1H_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #944 = LDNF1H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #943 = LDNF1H_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #942 = LDNF1D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #941 = LDNF1B_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #940 = LDNF1B_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #939 = LDNF1B_H_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[315] }, // Inst #938 = LDNF1B_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #937 = LDFF1W_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #936 = LDFF1W
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #935 = LDFF1SW_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #934 = LDFF1SH_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #933 = LDFF1SH_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #932 = LDFF1SB_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #931 = LDFF1SB_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #930 = LDFF1SB_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #929 = LDFF1H_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #928 = LDFF1H_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #927 = LDFF1H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #926 = LDFF1D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #925 = LDFF1B_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #924 = LDFF1B_H
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #923 = LDFF1B_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[311] }, // Inst #922 = LDFF1B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[305] }, // Inst #921 = LD1_MXIPXX_V_PSEUDO_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[305] }, // Inst #920 = LD1_MXIPXX_V_PSEUDO_Q
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[305] }, // Inst #919 = LD1_MXIPXX_V_PSEUDO_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[305] }, // Inst #918 = LD1_MXIPXX_V_PSEUDO_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[305] }, // Inst #917 = LD1_MXIPXX_V_PSEUDO_B
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[305] }, // Inst #916 = LD1_MXIPXX_H_PSEUDO_S
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[305] }, // Inst #915 = LD1_MXIPXX_H_PSEUDO_Q
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[305] }, // Inst #914 = LD1_MXIPXX_H_PSEUDO_H
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[305] }, // Inst #913 = LD1_MXIPXX_H_PSEUDO_D
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[305] }, // Inst #912 = LD1_MXIPXX_H_PSEUDO_B
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[301] }, // Inst #911 = LD1W_4Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[297] }, // Inst #910 = LD1W_4Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[293] }, // Inst #909 = LD1W_2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[289] }, // Inst #908 = LD1W_2Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[301] }, // Inst #907 = LD1H_4Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[297] }, // Inst #906 = LD1H_4Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[293] }, // Inst #905 = LD1H_2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[289] }, // Inst #904 = LD1H_2Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[301] }, // Inst #903 = LD1D_4Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[297] }, // Inst #902 = LD1D_4Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[293] }, // Inst #901 = LD1D_2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[289] }, // Inst #900 = LD1D_2Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[301] }, // Inst #899 = LD1B_4Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[297] }, // Inst #898 = LD1B_4Z_IMM_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[293] }, // Inst #897 = LD1B_2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[289] }, // Inst #896 = LD1B_2Z_IMM_PSEUDO
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[287] }, // Inst #895 = KCFI_CHECK
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[282] }, // Inst #894 = JumpTableDest8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[282] }, // Inst #893 = JumpTableDest32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[282] }, // Inst #892 = JumpTableDest16
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[279] }, // Inst #891 = IRGstack
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[274] }, // Inst #890 = INSERT_MXIPZ_V_PSEUDO_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[274] }, // Inst #889 = INSERT_MXIPZ_V_PSEUDO_Q
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[274] }, // Inst #888 = INSERT_MXIPZ_V_PSEUDO_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[274] }, // Inst #887 = INSERT_MXIPZ_V_PSEUDO_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[274] }, // Inst #886 = INSERT_MXIPZ_V_PSEUDO_B
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[274] }, // Inst #885 = INSERT_MXIPZ_H_PSEUDO_S
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[274] }, // Inst #884 = INSERT_MXIPZ_H_PSEUDO_Q
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[274] }, // Inst #883 = INSERT_MXIPZ_H_PSEUDO_H
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[274] }, // Inst #882 = INSERT_MXIPZ_H_PSEUDO_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[274] }, // Inst #881 = INSERT_MXIPZ_H_PSEUDO_B
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[272] }, // Inst #880 = HWASAN_CHECK_MEMACCESS_SHORTGRANULES
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[272] }, // Inst #879 = HWASAN_CHECK_MEMACCESS
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #878 = HOM_Prolog
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #877 = HOM_Epilog
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #876 = G_ZIP2
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #875 = G_ZIP1
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[40] }, // Inst #874 = G_VLSHR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[40] }, // Inst #873 = G_VASHR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #872 = G_UZP2
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #871 = G_UZP1
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #870 = G_UMULL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #869 = G_UITOF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[46] }, // Inst #868 = G_UDOT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #867 = G_UADDLV
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #866 = G_UADDLP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #865 = G_TRN2
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #864 = G_TRN1
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #863 = G_SMULL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #862 = G_SITOF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[46] }, // Inst #861 = G_SDOT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #860 = G_SADDLV
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #859 = G_SADDLP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #858 = G_REV64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #857 = G_REV32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #856 = G_REV16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #855 = G_FCMLTZ
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #854 = G_FCMLEZ
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #853 = G_FCMGTZ
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #852 = G_FCMGT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #851 = G_FCMGEZ
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #850 = G_FCMGE
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #849 = G_FCMEQZ
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #848 = G_FCMEQ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[112] }, // Inst #847 = G_EXT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #846 = G_DUPLANE8
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #845 = G_DUPLANE64
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #844 = G_DUPLANE32
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #843 = G_DUPLANE16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #842 = G_DUP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[46] }, // Inst #841 = G_BSP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[123] }, // Inst #840 = G_ADD_LOW
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #839 = G_AARCH64_PREFETCH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #838 = GLDFF1W_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #837 = GLDFF1W_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #836 = GLDFF1W_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #835 = GLDFF1W_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #834 = GLDFF1W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #833 = GLDFF1W_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #832 = GLDFF1W_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #831 = GLDFF1W_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #830 = GLDFF1W_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #829 = GLDFF1W_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #828 = GLDFF1W_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #827 = GLDFF1W_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #826 = GLDFF1SW_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #825 = GLDFF1SW_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #824 = GLDFF1SW_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #823 = GLDFF1SW_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #822 = GLDFF1SW_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #821 = GLDFF1SW_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #820 = GLDFF1SW_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #819 = GLDFF1SH_S_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #818 = GLDFF1SH_S_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #817 = GLDFF1SH_S_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #816 = GLDFF1SH_S_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #815 = GLDFF1SH_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #814 = GLDFF1SH_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #813 = GLDFF1SH_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #812 = GLDFF1SH_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #811 = GLDFF1SH_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #810 = GLDFF1SH_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #809 = GLDFF1SH_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #808 = GLDFF1SH_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #807 = GLDFF1SB_S_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #806 = GLDFF1SB_S_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #805 = GLDFF1SB_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #804 = GLDFF1SB_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #803 = GLDFF1SB_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #802 = GLDFF1SB_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #801 = GLDFF1SB_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #800 = GLDFF1H_S_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #799 = GLDFF1H_S_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #798 = GLDFF1H_S_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #797 = GLDFF1H_S_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #796 = GLDFF1H_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #795 = GLDFF1H_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #794 = GLDFF1H_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #793 = GLDFF1H_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #792 = GLDFF1H_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #791 = GLDFF1H_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #790 = GLDFF1H_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #789 = GLDFF1H_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #788 = GLDFF1D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #787 = GLDFF1D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #786 = GLDFF1D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #785 = GLDFF1D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #784 = GLDFF1D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #783 = GLDFF1D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #782 = GLDFF1D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #781 = GLDFF1B_S_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #780 = GLDFF1B_S_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #779 = GLDFF1B_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #778 = GLDFF1B_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #777 = GLDFF1B_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #776 = GLDFF1B_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #775 = GLDFF1B_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #774 = GLD1W_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #773 = GLD1W_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #772 = GLD1W_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #771 = GLD1W_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #770 = GLD1W_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #769 = GLD1W_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #768 = GLD1W_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #767 = GLD1W_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #766 = GLD1W_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #765 = GLD1W_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #764 = GLD1W_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #763 = GLD1W_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #762 = GLD1SW_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #761 = GLD1SW_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #760 = GLD1SW_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #759 = GLD1SW_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #758 = GLD1SW_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #757 = GLD1SW_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #756 = GLD1SW_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #755 = GLD1SH_S_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #754 = GLD1SH_S_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #753 = GLD1SH_S_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #752 = GLD1SH_S_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #751 = GLD1SH_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #750 = GLD1SH_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #749 = GLD1SH_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #748 = GLD1SH_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #747 = GLD1SH_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #746 = GLD1SH_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #745 = GLD1SH_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #744 = GLD1SH_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #743 = GLD1SB_S_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #742 = GLD1SB_S_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #741 = GLD1SB_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #740 = GLD1SB_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #739 = GLD1SB_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #738 = GLD1SB_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #737 = GLD1SB_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #736 = GLD1H_S_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #735 = GLD1H_S_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #734 = GLD1H_S_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #733 = GLD1H_S_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #732 = GLD1H_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #731 = GLD1H_D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #730 = GLD1H_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #729 = GLD1H_D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #728 = GLD1H_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #727 = GLD1H_D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #726 = GLD1H_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #725 = GLD1H_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #724 = GLD1D_UXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #723 = GLD1D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #722 = GLD1D_SXTW_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #721 = GLD1D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #720 = GLD1D_SCALED
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #719 = GLD1D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #718 = GLD1D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #717 = GLD1B_S_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #716 = GLD1B_S_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #715 = GLD1B_S_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #714 = GLD1B_D_UXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #713 = GLD1B_D_SXTW
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[268] }, // Inst #712 = GLD1B_D_IMM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[264] }, // Inst #711 = GLD1B_D
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #710 = FVDOT_VG2_M2ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #709 = FSUB_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #708 = FSUB_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #707 = FSUB_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #706 = FSUB_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #705 = FSUB_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #704 = FSUB_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #703 = FSUB_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #702 = FSUB_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #701 = FSUB_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #700 = FSUB_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #699 = FSUB_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #698 = FSUB_ZPZI_D_UNDEF
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #697 = FSUB_VG4_M4Z_S_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #696 = FSUB_VG4_M4Z_H_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #695 = FSUB_VG4_M4Z_D_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #694 = FSUB_VG2_M2Z_S_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #693 = FSUB_VG2_M2Z_H_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #692 = FSUB_VG2_M2Z_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #691 = FSUBR_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #690 = FSUBR_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #689 = FSUBR_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #688 = FSUBR_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #687 = FSUBR_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #686 = FSUBR_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #685 = FSUBR_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #684 = FSUBR_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #683 = FSUBR_ZPZI_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #682 = FSQRT_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #681 = FSQRT_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #680 = FSQRT_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #679 = FRINTZ_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #678 = FRINTZ_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #677 = FRINTZ_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #676 = FRINTX_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #675 = FRINTX_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #674 = FRINTX_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #673 = FRINTP_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #672 = FRINTP_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #671 = FRINTP_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #670 = FRINTN_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #669 = FRINTN_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #668 = FRINTN_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #667 = FRINTM_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #666 = FRINTM_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #665 = FRINTM_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #664 = FRINTI_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #663 = FRINTI_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #662 = FRINTI_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #661 = FRINTA_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #660 = FRINTA_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #659 = FRINTA_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #658 = FRECPX_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #657 = FRECPX_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #656 = FRECPX_ZPmZ_D_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #655 = FNMLS_ZPZZZ_S_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #654 = FNMLS_ZPZZZ_H_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #653 = FNMLS_ZPZZZ_D_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #652 = FNMLA_ZPZZZ_S_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #651 = FNMLA_ZPZZZ_H_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #650 = FNMLA_ZPZZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #649 = FNEG_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #648 = FNEG_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #647 = FNEG_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #646 = FMUL_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #645 = FMUL_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #644 = FMUL_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #643 = FMUL_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #642 = FMUL_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #641 = FMUL_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #640 = FMUL_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #639 = FMUL_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #638 = FMUL_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #637 = FMUL_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #636 = FMUL_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #635 = FMUL_ZPZI_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #634 = FMULX_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #633 = FMULX_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #632 = FMULX_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #631 = FMULX_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #630 = FMULX_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #629 = FMULX_ZPZZ_D_UNDEF
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[263] }, // Inst #628 = FMOVS0
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[262] }, // Inst #627 = FMOVH0
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[261] }, // Inst #626 = FMOVD0
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #625 = FMOPS_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #624 = FMOPS_MPPZZ_D_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #623 = FMOPSL_MPPZZ_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #622 = FMOPA_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #621 = FMOPA_MPPZZ_D_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #620 = FMOPA_MPPZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #619 = FMOPAL_MPPZZ_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #618 = FMLS_ZPZZZ_S_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #617 = FMLS_ZPZZZ_H_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #616 = FMLS_ZPZZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #615 = FMLS_VG4_M4ZZ_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #614 = FMLS_VG4_M4ZZ_D_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #613 = FMLS_VG4_M4ZZI_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #612 = FMLS_VG4_M4ZZI_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #611 = FMLS_VG4_M4Z4Z_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #610 = FMLS_VG4_M4Z4Z_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #609 = FMLS_VG4_M4Z2Z_H_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #608 = FMLS_VG2_M2ZZ_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #607 = FMLS_VG2_M2ZZ_D_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #606 = FMLS_VG2_M2ZZI_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #605 = FMLS_VG2_M2ZZI_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #604 = FMLS_VG2_M2Z2Z_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #603 = FMLS_VG2_M2Z2Z_H_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #602 = FMLS_VG2_M2Z2Z_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #601 = FMLSL_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #600 = FMLSL_VG4_M4ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #599 = FMLSL_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #598 = FMLSL_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #597 = FMLSL_VG2_M2ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #596 = FMLSL_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #595 = FMLSL_MZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #594 = FMLSL_MZZI_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #593 = FMLA_ZPZZZ_S_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #592 = FMLA_ZPZZZ_H_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #591 = FMLA_ZPZZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #590 = FMLA_VG4_M4ZZ_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #589 = FMLA_VG4_M4ZZ_D_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #588 = FMLA_VG4_M4ZZI_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #587 = FMLA_VG4_M4ZZI_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #586 = FMLA_VG4_M4Z4Z_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #585 = FMLA_VG4_M4Z4Z_H_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #584 = FMLA_VG4_M4Z4Z_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #583 = FMLA_VG2_M2ZZ_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #582 = FMLA_VG2_M2ZZ_D_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #581 = FMLA_VG2_M2ZZI_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #580 = FMLA_VG2_M2ZZI_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #579 = FMLA_VG2_M2Z4Z_H_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #578 = FMLA_VG2_M2Z2Z_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #577 = FMLA_VG2_M2Z2Z_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #576 = FMLAL_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #575 = FMLAL_VG4_M4ZZ_BtoH_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #574 = FMLAL_VG4_M4ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #573 = FMLAL_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #572 = FMLAL_VG4_M4Z4Z_BtoH_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #571 = FMLAL_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #570 = FMLAL_VG2_M2ZZ_BtoH_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #569 = FMLAL_VG2_M2ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #568 = FMLAL_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #567 = FMLAL_VG2_M2Z2Z_BtoH_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #566 = FMLAL_MZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #565 = FMLAL_MZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #564 = FMLALL_VG4_M4ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #563 = FMLALL_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #562 = FMLALL_VG4_M4Z4Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #561 = FMLALL_VG2_M2ZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #560 = FMLALL_VG2_M2ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #559 = FMLALL_VG2_M2Z2Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #558 = FMLALL_MZZ_BtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #557 = FMLALL_MZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #556 = FMIN_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #555 = FMIN_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #554 = FMIN_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #553 = FMIN_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #552 = FMIN_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #551 = FMIN_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #550 = FMIN_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #549 = FMIN_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #548 = FMIN_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #547 = FMIN_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #546 = FMIN_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #545 = FMIN_ZPZI_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #544 = FMINNM_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #543 = FMINNM_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #542 = FMINNM_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #541 = FMINNM_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #540 = FMINNM_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #539 = FMINNM_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #538 = FMINNM_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #537 = FMINNM_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #536 = FMINNM_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #535 = FMINNM_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #534 = FMINNM_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #533 = FMINNM_ZPZI_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #532 = FMAX_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #531 = FMAX_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #530 = FMAX_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #529 = FMAX_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #528 = FMAX_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #527 = FMAX_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #526 = FMAX_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #525 = FMAX_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #524 = FMAX_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #523 = FMAX_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #522 = FMAX_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #521 = FMAX_ZPZI_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #520 = FMAXNM_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #519 = FMAXNM_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #518 = FMAXNM_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #517 = FMAXNM_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #516 = FMAXNM_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #515 = FMAXNM_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #514 = FMAXNM_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #513 = FMAXNM_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #512 = FMAXNM_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #511 = FMAXNM_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #510 = FMAXNM_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #509 = FMAXNM_ZPZI_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[257] }, // Inst #508 = FLOGB_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[257] }, // Inst #507 = FLOGB_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[257] }, // Inst #506 = FLOGB_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #505 = FDOT_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #504 = FDOT_VG4_M4ZZI_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #503 = FDOT_VG4_M4ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #502 = FDOT_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #501 = FDOT_VG4_M4Z4Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #500 = FDOT_VG4_M4Z4Z_BtoH_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #499 = FDOT_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #498 = FDOT_VG2_M2ZZI_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #497 = FDOT_VG2_M2ZZI_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #496 = FDOT_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #495 = FDOT_VG2_M2Z2Z_BtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #494 = FDOT_VG2_M2Z2Z_BtoH_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #493 = FDIV_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #492 = FDIV_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #491 = FDIV_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #490 = FDIV_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #489 = FDIV_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #488 = FDIV_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #487 = FDIVR_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #486 = FDIVR_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #485 = FDIVR_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #484 = FCVT_ZPmZ_StoH_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #483 = FCVT_ZPmZ_StoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #482 = FCVT_ZPmZ_HtoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #481 = FCVT_ZPmZ_HtoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #480 = FCVT_ZPmZ_DtoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #479 = FCVT_ZPmZ_DtoH_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #478 = FCVTZU_ZPmZ_StoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #477 = FCVTZU_ZPmZ_StoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #476 = FCVTZU_ZPmZ_HtoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #475 = FCVTZU_ZPmZ_HtoH_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #474 = FCVTZU_ZPmZ_HtoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #473 = FCVTZU_ZPmZ_DtoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #472 = FCVTZU_ZPmZ_DtoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #471 = FCVTZS_ZPmZ_StoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #470 = FCVTZS_ZPmZ_StoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #469 = FCVTZS_ZPmZ_HtoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #468 = FCVTZS_ZPmZ_HtoH_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #467 = FCVTZS_ZPmZ_HtoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #466 = FCVTZS_ZPmZ_DtoS_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #465 = FCVTZS_ZPmZ_DtoD_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #464 = FADD_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #463 = FADD_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #462 = FADD_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #461 = FADD_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #460 = FADD_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #459 = FADD_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #458 = FADD_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #457 = FADD_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #456 = FADD_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #455 = FADD_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #454 = FADD_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #453 = FADD_ZPZI_D_UNDEF
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #452 = FADD_VG4_M4Z_S_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #451 = FADD_VG4_M4Z_H_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #450 = FADD_VG4_M4Z_D_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #449 = FADD_VG2_M2Z_S_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #448 = FADD_VG2_M2Z_H_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #447 = FADD_VG2_M2Z_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #446 = FABS_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #445 = FABS_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #444 = FABS_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #443 = FABD_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #442 = FABD_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #441 = FABD_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #440 = FABD_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #439 = FABD_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #438 = FABD_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[253] }, // Inst #437 = F128CSEL
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #436 = EOR_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #435 = EOR_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #434 = EOR_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #433 = EOR_ZPZZ_B_ZERO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #432 = EORXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #431 = EORWrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #430 = EONXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #429 = EONWrr
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #428 = EMITMTETAGGED
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #427 = EMITBKEY
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[251] }, // Inst #426 = COALESCER_BARRIER_FPR64
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[249] }, // Inst #425 = COALESCER_BARRIER_FPR32
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[247] }, // Inst #424 = COALESCER_BARRIER_FPR16
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[183] }, // Inst #423 = COALESCER_BARRIER_FPR128
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #422 = CNT_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #421 = CNT_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #420 = CNT_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #419 = CNT_ZPmZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #418 = CNOT_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #417 = CNOT_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #416 = CNOT_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #415 = CNOT_ZPmZ_B_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[237] }, // Inst #414 = CMP_SWAP_8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[242] }, // Inst #413 = CMP_SWAP_64
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[237] }, // Inst #412 = CMP_SWAP_32
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[237] }, // Inst #411 = CMP_SWAP_16
|
||
|
|
{ 8, &AArch64Descs.OperandInfo[229] }, // Inst #410 = CMP_SWAP_128_RELEASE
|
||
|
|
{ 8, &AArch64Descs.OperandInfo[229] }, // Inst #409 = CMP_SWAP_128_MONOTONIC
|
||
|
|
{ 8, &AArch64Descs.OperandInfo[229] }, // Inst #408 = CMP_SWAP_128_ACQUIRE
|
||
|
|
{ 8, &AArch64Descs.OperandInfo[229] }, // Inst #407 = CMP_SWAP_128
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #406 = CLZ_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #405 = CLZ_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #404 = CLZ_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #403 = CLZ_ZPmZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #402 = CLS_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #401 = CLS_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #400 = CLS_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #399 = CLS_ZPmZ_B_UNDEF
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #398 = CLEANUPRET
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[227] }, // Inst #397 = CATCHRET
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[223] }, // Inst #396 = BSPv8i8
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[219] }, // Inst #395 = BSPv16i8
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #394 = BMOPS_MPPZZ_S_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #393 = BMOPA_MPPZZ_S_PSEUDO
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #392 = BLR_X16
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #391 = BLR_RVMARKER
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #390 = BLR_BTI
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[218] }, // Inst #389 = BLRNoIP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #388 = BIC_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #387 = BIC_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #386 = BIC_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #385 = BIC_ZPZZ_B_ZERO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #384 = BICXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #383 = BICWrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #382 = BICSXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #381 = BICSWrr
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #380 = BFVDOT_VG2_M2ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #379 = BFSUB_ZPZZ_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #378 = BFSUB_ZPZZ_UNDEF
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #377 = BFSUB_VG4_M4Z_H_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #376 = BFSUB_VG2_M2Z_H_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #375 = BFMUL_ZPZZ_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #374 = BFMUL_ZPZZ_UNDEF
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #373 = BFMOPS_MPPZZ_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[213] }, // Inst #372 = BFMOPA_MPPZZ_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #371 = BFMLS_ZPZZZ_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #370 = BFMLS_VG4_M4Z4Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #369 = BFMLS_VG2_M2Z2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #368 = BFMLSL_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #367 = BFMLSL_VG4_M4ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #366 = BFMLSL_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #365 = BFMLSL_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #364 = BFMLSL_VG2_M2ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #363 = BFMLSL_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #362 = BFMLSL_MZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #361 = BFMLSL_MZZI_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[208] }, // Inst #360 = BFMLA_ZPZZZ_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #359 = BFMLA_VG4_M4Z4Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #358 = BFMLA_VG2_M2Z2Z_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #357 = BFMLAL_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #356 = BFMLAL_VG4_M4ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #355 = BFMLAL_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #354 = BFMLAL_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #353 = BFMLAL_VG2_M2ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #352 = BFMLAL_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[204] }, // Inst #351 = BFMLAL_MZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[199] }, // Inst #350 = BFMLAL_MZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #349 = BFMIN_ZPZZ_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #348 = BFMIN_ZPZZ_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #347 = BFMINNM_ZPZZ_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #346 = BFMINNM_ZPZZ_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #345 = BFMAX_ZPZZ_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #344 = BFMAX_ZPZZ_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #343 = BFMAXNM_ZPZZ_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #342 = BFMAXNM_ZPZZ_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #341 = BFDOT_VG4_M4ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[194] }, // Inst #340 = BFDOT_VG4_M4ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #339 = BFDOT_VG4_M4Z4Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #338 = BFDOT_VG2_M2ZZ_HtoS_PSEUDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[189] }, // Inst #337 = BFDOT_VG2_M2ZZI_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #336 = BFDOT_VG2_M2Z2Z_HtoS_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #335 = BFADD_ZPZZ_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #334 = BFADD_ZPZZ_UNDEF
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #333 = BFADD_VG4_M4Z_H_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #332 = BFADD_VG2_M2Z_H_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #331 = ASR_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #330 = ASR_ZPZZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #329 = ASR_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #328 = ASR_ZPZZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #327 = ASR_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #326 = ASR_ZPZZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #325 = ASR_ZPZZ_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #324 = ASR_ZPZZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #323 = ASR_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #322 = ASR_ZPZI_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #321 = ASR_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #320 = ASR_ZPZI_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #319 = ASR_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #318 = ASR_ZPZI_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #317 = ASR_ZPZI_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #316 = ASR_ZPZI_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #315 = ASRD_ZPZI_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #314 = ASRD_ZPZI_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #313 = ASRD_ZPZI_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[185] }, // Inst #312 = ASRD_ZPZI_B_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #311 = AND_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #310 = AND_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #309 = AND_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #308 = AND_ZPZZ_B_ZERO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #307 = ANDXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #306 = ANDWrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #305 = ANDSXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #304 = ANDSWrr
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[183] }, // Inst #303 = AESMCrrTied
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[183] }, // Inst #302 = AESIMCrrTied
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[21] }, // Inst #301 = ADJCALLSTACKUP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[21] }, // Inst #300 = ADJCALLSTACKDOWN
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[180] }, // Inst #299 = ADDlowTLS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #298 = ADD_ZPZZ_S_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #297 = ADD_ZPZZ_H_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #296 = ADD_ZPZZ_D_ZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[176] }, // Inst #295 = ADD_ZPZZ_B_ZERO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #294 = ADD_VG4_M4Z_S_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[173] }, // Inst #293 = ADD_VG4_M4Z_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #292 = ADD_VG4_M4ZZ_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[169] }, // Inst #291 = ADD_VG4_M4ZZ_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #290 = ADD_VG4_M4Z4Z_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[165] }, // Inst #289 = ADD_VG4_M4Z4Z_D_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #288 = ADD_VG2_M2Z_S_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[162] }, // Inst #287 = ADD_VG2_M2Z_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #286 = ADD_VG2_M2ZZ_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[158] }, // Inst #285 = ADD_VG2_M2ZZ_D_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #284 = ADD_VG2_M2Z2Z_S_PSEUDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[154] }, // Inst #283 = ADD_VG2_M2Z2Z_D_PSEUDO
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #282 = ADDXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #281 = ADDWrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[144] }, // Inst #280 = ADDVA_MPPZ_S_PSEUDO_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[144] }, // Inst #279 = ADDVA_MPPZ_D_PSEUDO_D
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[151] }, // Inst #278 = ADDSXrr
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[148] }, // Inst #277 = ADDSWrr
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[144] }, // Inst #276 = ADDHA_MPPZ_S_PSEUDO_S
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[144] }, // Inst #275 = ADDHA_MPPZ_D_PSEUDO_D
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #274 = ABS_ZPmZ_S_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #273 = ABS_ZPmZ_H_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #272 = ABS_ZPmZ_D_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[140] }, // Inst #271 = ABS_ZPmZ_B_UNDEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[136] }, // Inst #270 = G_UBFX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[136] }, // Inst #269 = G_SBFX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #268 = G_VECREDUCE_UMIN
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #267 = G_VECREDUCE_UMAX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #266 = G_VECREDUCE_SMIN
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #265 = G_VECREDUCE_SMAX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #264 = G_VECREDUCE_XOR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #263 = G_VECREDUCE_OR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #262 = G_VECREDUCE_AND
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #261 = G_VECREDUCE_MUL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #260 = G_VECREDUCE_ADD
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #259 = G_VECREDUCE_FMINIMUM
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #258 = G_VECREDUCE_FMAXIMUM
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #257 = G_VECREDUCE_FMIN
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #256 = G_VECREDUCE_FMAX
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #255 = G_VECREDUCE_FMUL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #254 = G_VECREDUCE_FADD
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[123] }, // Inst #253 = G_VECREDUCE_SEQ_FMUL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[123] }, // Inst #252 = G_VECREDUCE_SEQ_FADD
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[53] }, // Inst #251 = G_BZERO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[132] }, // Inst #250 = G_MEMSET
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[132] }, // Inst #249 = G_MEMMOVE
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[123] }, // Inst #248 = G_MEMCPY_INLINE
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[132] }, // Inst #247 = G_MEMCPY
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[130] }, // Inst #246 = G_WRITE_REGISTER
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[51] }, // Inst #245 = G_READ_REGISTER
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #244 = G_STRICT_FLDEXP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #243 = G_STRICT_FSQRT
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[46] }, // Inst #242 = G_STRICT_FMA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #241 = G_STRICT_FREM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #240 = G_STRICT_FDIV
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #239 = G_STRICT_FMUL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #238 = G_STRICT_FSUB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #237 = G_STRICT_FADD
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #236 = G_STACKRESTORE
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #235 = G_STACKSAVE
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[64] }, // Inst #234 = G_DYN_STACKALLOC
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[51] }, // Inst #233 = G_JUMP_TABLE
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[51] }, // Inst #232 = G_BLOCK_ADDR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #231 = G_ADDRSPACE_CAST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #230 = G_FNEARBYINT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #229 = G_FRINT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #228 = G_FFLOOR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #227 = G_FSQRT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #226 = G_FSIN
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #225 = G_FCOS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #224 = G_FCEIL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #223 = G_BITREVERSE
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #222 = G_BSWAP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #221 = G_CTPOP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #220 = G_CTLZ_ZERO_UNDEF
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #219 = G_CTLZ
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #218 = G_CTTZ_ZERO_UNDEF
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #217 = G_CTTZ
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[126] }, // Inst #216 = G_SHUFFLE_VECTOR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[123] }, // Inst #215 = G_EXTRACT_VECTOR_ELT
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[119] }, // Inst #214 = G_INSERT_VECTOR_ELT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[116] }, // Inst #213 = G_BRJT
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #212 = G_BR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #211 = G_LLROUND
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #210 = G_LROUND
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #209 = G_ABS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #208 = G_UMAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #207 = G_UMIN
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #206 = G_SMAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #205 = G_SMIN
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #204 = G_PTRMASK
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #203 = G_PTR_ADD
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #202 = G_RESET_FPMODE
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #201 = G_SET_FPMODE
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #200 = G_GET_FPMODE
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #199 = G_RESET_FPENV
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #198 = G_SET_FPENV
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #197 = G_GET_FPENV
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #196 = G_FMAXIMUM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #195 = G_FMINIMUM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #194 = G_FMAXNUM_IEEE
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #193 = G_FMINNUM_IEEE
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #192 = G_FMAXNUM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #191 = G_FMINNUM
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #190 = G_FCANONICALIZE
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[93] }, // Inst #189 = G_IS_FPCLASS
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #188 = G_FCOPYSIGN
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #187 = G_FABS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #186 = G_UITOFP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #185 = G_SITOFP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #184 = G_FPTOUI
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #183 = G_FPTOSI
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #182 = G_FPTRUNC
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #181 = G_FPEXT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #180 = G_FNEG
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #179 = G_FFREXP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #178 = G_FLDEXP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #177 = G_FLOG10
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #176 = G_FLOG2
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #175 = G_FLOG
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #174 = G_FEXP10
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #173 = G_FEXP2
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #172 = G_FEXP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #171 = G_FPOWI
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #170 = G_FPOW
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #169 = G_FREM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #168 = G_FDIV
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[46] }, // Inst #167 = G_FMAD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[46] }, // Inst #166 = G_FMA
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #165 = G_FMUL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #164 = G_FSUB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #163 = G_FADD
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[112] }, // Inst #162 = G_UDIVFIXSAT
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[112] }, // Inst #161 = G_SDIVFIXSAT
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[112] }, // Inst #160 = G_UDIVFIX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[112] }, // Inst #159 = G_SDIVFIX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[112] }, // Inst #158 = G_UMULFIXSAT
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[112] }, // Inst #157 = G_SMULFIXSAT
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[112] }, // Inst #156 = G_UMULFIX
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[112] }, // Inst #155 = G_SMULFIX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #154 = G_SSHLSAT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #153 = G_USHLSAT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #152 = G_SSUBSAT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #151 = G_USUBSAT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #150 = G_SADDSAT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #149 = G_UADDSAT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #148 = G_SMULH
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #147 = G_UMULH
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[82] }, // Inst #146 = G_SMULO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[82] }, // Inst #145 = G_UMULO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[107] }, // Inst #144 = G_SSUBE
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[82] }, // Inst #143 = G_SSUBO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[107] }, // Inst #142 = G_SADDE
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[82] }, // Inst #141 = G_SADDO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[107] }, // Inst #140 = G_USUBE
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[82] }, // Inst #139 = G_USUBO
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[107] }, // Inst #138 = G_UADDE
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[82] }, // Inst #137 = G_UADDO
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[82] }, // Inst #136 = G_SELECT
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[103] }, // Inst #135 = G_FCMP
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[103] }, // Inst #134 = G_ICMP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #133 = G_ROTL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #132 = G_ROTR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[99] }, // Inst #131 = G_FSHR
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[99] }, // Inst #130 = G_FSHL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #129 = G_ASHR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #128 = G_LSHR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[96] }, // Inst #127 = G_SHL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #126 = G_ZEXT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[40] }, // Inst #125 = G_SEXT_INREG
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #124 = G_SEXT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[93] }, // Inst #123 = G_VAARG
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #122 = G_VASTART
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[51] }, // Inst #121 = G_FCONSTANT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[51] }, // Inst #120 = G_CONSTANT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #119 = G_TRUNC
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #118 = G_ANYEXT
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #117 = G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #116 = G_INTRINSIC_CONVERGENT
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #115 = G_INTRINSIC_W_SIDE_EFFECTS
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #114 = G_INTRINSIC
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #113 = G_INVOKE_REGION_START
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #112 = G_BRINDIRECT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[51] }, // Inst #111 = G_BRCOND
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[89] }, // Inst #110 = G_PREFETCH
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[21] }, // Inst #109 = G_FENCE
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #108 = G_ATOMICRMW_UDEC_WRAP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #107 = G_ATOMICRMW_UINC_WRAP
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #106 = G_ATOMICRMW_FMIN
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #105 = G_ATOMICRMW_FMAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #104 = G_ATOMICRMW_FSUB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #103 = G_ATOMICRMW_FADD
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #102 = G_ATOMICRMW_UMIN
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #101 = G_ATOMICRMW_UMAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #100 = G_ATOMICRMW_MIN
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #99 = G_ATOMICRMW_MAX
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #98 = G_ATOMICRMW_XOR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #97 = G_ATOMICRMW_OR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #96 = G_ATOMICRMW_NAND
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #95 = G_ATOMICRMW_AND
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #94 = G_ATOMICRMW_SUB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #93 = G_ATOMICRMW_ADD
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[86] }, // Inst #92 = G_ATOMICRMW_XCHG
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[82] }, // Inst #91 = G_ATOMIC_CMPXCHG
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[77] }, // Inst #90 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[72] }, // Inst #89 = G_INDEXED_STORE
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #88 = G_STORE
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[67] }, // Inst #87 = G_INDEXED_ZEXTLOAD
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[67] }, // Inst #86 = G_INDEXED_SEXTLOAD
|
||
|
|
{ 5, &AArch64Descs.OperandInfo[67] }, // Inst #85 = G_INDEXED_LOAD
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #84 = G_ZEXTLOAD
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #83 = G_SEXTLOAD
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #82 = G_LOAD
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #81 = G_READCYCLECOUNTER
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #80 = G_INTRINSIC_ROUNDEVEN
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #79 = G_INTRINSIC_LRINT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #78 = G_INTRINSIC_ROUND
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #77 = G_INTRINSIC_TRUNC
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[64] }, // Inst #76 = G_INTRINSIC_FPTRUNC_ROUND
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #75 = G_CONSTANT_FOLD_BARRIER
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[62] }, // Inst #74 = G_FREEZE
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #73 = G_BITCAST
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #72 = G_INTTOPTR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #71 = G_PTRTOINT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #70 = G_CONCAT_VECTORS
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #69 = G_BUILD_VECTOR_TRUNC
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #68 = G_BUILD_VECTOR
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #67 = G_MERGE_VALUES
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[58] }, // Inst #66 = G_INSERT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[56] }, // Inst #65 = G_UNMERGE_VALUES
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[53] }, // Inst #64 = G_EXTRACT
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[51] }, // Inst #63 = G_CONSTANT_POOL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[51] }, // Inst #62 = G_GLOBAL_VALUE
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[51] }, // Inst #61 = G_FRAME_INDEX
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #60 = G_PHI
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[50] }, // Inst #59 = G_IMPLICIT_DEF
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #58 = G_XOR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #57 = G_OR
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #56 = G_AND
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[46] }, // Inst #55 = G_UDIVREM
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[46] }, // Inst #54 = G_SDIVREM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #53 = G_UREM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #52 = G_SREM
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #51 = G_UDIV
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #50 = G_SDIV
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #49 = G_MUL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #48 = G_SUB
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[43] }, // Inst #47 = G_ADD
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[40] }, // Inst #46 = G_ASSERT_ALIGN
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[40] }, // Inst #45 = G_ASSERT_ZEXT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[40] }, // Inst #44 = G_ASSERT_SEXT
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #43 = JUMP_TABLE_DEBUG_INFO
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #42 = MEMBARRIER
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #41 = ICALL_BRANCH_FUNNEL
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[37] }, // Inst #40 = PATCHABLE_TYPED_EVENT_CALL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[35] }, // Inst #39 = PATCHABLE_EVENT_CALL
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #38 = PATCHABLE_TAIL_CALL
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #37 = PATCHABLE_FUNCTION_EXIT
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #36 = PATCHABLE_RET
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #35 = PATCHABLE_FUNCTION_ENTER
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #34 = PATCHABLE_OP
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #33 = FAULTING_OP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[33] }, // Inst #32 = LOCAL_ESCAPE
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #31 = STATEPOINT
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[30] }, // Inst #30 = PREALLOCATED_ARG
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #29 = PREALLOCATED_SETUP
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[29] }, // Inst #28 = LOAD_STACK_GUARD
|
||
|
|
{ 6, &AArch64Descs.OperandInfo[23] }, // Inst #27 = PATCHPOINT
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #26 = FENTRY_CALL
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[21] }, // Inst #25 = STACKMAP
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[19] }, // Inst #24 = ARITH_FENCE
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[15] }, // Inst #23 = PSEUDO_PROBE
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #22 = LIFETIME_END
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #21 = LIFETIME_START
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #20 = BUNDLE
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[13] }, // Inst #19 = COPY
|
||
|
|
{ 2, &AArch64Descs.OperandInfo[13] }, // Inst #18 = REG_SEQUENCE
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #17 = DBG_LABEL
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #16 = DBG_PHI
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #15 = DBG_INSTR_REF
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #14 = DBG_VALUE_LIST
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #13 = DBG_VALUE
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2] }, // Inst #12 = COPY_TO_REGCLASS
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[9] }, // Inst #11 = SUBREG_TO_REG
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #10 = IMPLICIT_DEF
|
||
|
|
{ 4, &AArch64Descs.OperandInfo[5] }, // Inst #9 = INSERT_SUBREG
|
||
|
|
{ 3, &AArch64Descs.OperandInfo[2] }, // Inst #8 = EXTRACT_SUBREG
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #7 = KILL
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #6 = ANNOTATION_LABEL
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #5 = GC_LABEL
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #4 = EH_LABEL
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[1] }, // Inst #3 = CFI_INSTRUCTION
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #2 = INLINEASM_BR
|
||
|
|
{ 0, &AArch64Descs.OperandInfo[1] }, // Inst #1 = INLINEASM
|
||
|
|
{ 1, &AArch64Descs.OperandInfo[0] }, // Inst #0 = PHI
|
||
|
|
}, {
|
||
|
|
/* 0 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1 */
|
||
|
|
/* 1 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 2 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 5 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 9 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 13 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 15 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 19 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 21 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 23 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 29 */ { 0, 0|(1<<MCOI_LookupPtrRegClass), MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 30 */ { 0, 0|(1<<MCOI_LookupPtrRegClass), MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 33 */ { 0, 0|(1<<MCOI_LookupPtrRegClass), MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 35 */ { 0, 0|(1<<MCOI_LookupPtrRegClass), MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 37 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI_LookupPtrRegClass), MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 40 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_IMM_0, 0 },
|
||
|
|
/* 43 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
|
||
|
|
/* 46 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
|
||
|
|
/* 50 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
|
||
|
|
/* 51 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 53 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_IMM_0, 0 },
|
||
|
|
/* 56 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
|
||
|
|
/* 58 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_IMM_0, 0 },
|
||
|
|
/* 62 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
|
||
|
|
/* 64 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 67 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 72 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 77 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
|
||
|
|
/* 82 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
|
||
|
|
/* 86 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
|
||
|
|
/* 89 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 93 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 96 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
|
||
|
|
/* 99 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
|
||
|
|
/* 103 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
|
||
|
|
/* 107 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
|
||
|
|
/* 112 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_IMM_0, 0 },
|
||
|
|
/* 116 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
|
||
|
|
/* 119 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 },
|
||
|
|
/* 123 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 },
|
||
|
|
/* 126 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 130 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
|
||
|
|
/* 132 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_IMM_0, 0 },
|
||
|
|
/* 136 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
|
||
|
|
/* 140 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 144 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 148 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 151 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 154 */ { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 158 */ { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 162 */ { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 165 */ { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 169 */ { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 173 */ { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 176 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 180 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 183 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 185 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 189 */ { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 194 */ { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 199 */ { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 204 */ { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 208 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 213 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 218 */ { AArch64_GPR64noipRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 219 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 223 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 227 */ { -1, 0, MCOI_OPERAND_PCREL, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 },
|
||
|
|
/* 229 */ { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR32commonRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 237 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 242 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 247 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 249 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 251 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 253 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 257 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 261 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 262 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 263 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 264 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 268 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 272 */ { AArch64_GPR64noipRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 274 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 279 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 282 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 287 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 289 */ { AArch64_ZPR2StridedOrContiguousRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 293 */ { AArch64_ZPR2StridedOrContiguousRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 297 */ { AArch64_ZPR4StridedOrContiguousRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 301 */ { AArch64_ZPR4StridedOrContiguousRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 305 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 311 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 315 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 319 */ { AArch64_PPR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 322 */ { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 324 */ { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 327 */ { AArch64_ZPR2StridedOrContiguousRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 330 */ { AArch64_ZPR3RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 333 */ { AArch64_ZPR4StridedOrContiguousRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 336 */ { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 338 */ { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) },
|
||
|
|
/* 344 */ { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 349 */ { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 353 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 357 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 361 */ { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 365 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 369 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 373 */ { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 376 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 377 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 379 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 383 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 387 */ { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 388 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 389 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 391 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 392 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 395 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 398 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 401 */ { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 405 */ { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) },
|
||
|
|
/* 409 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 411 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 413 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 416 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 421 */ { AArch64_tcGPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 423 */ { AArch64_rtcGPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 425 */ { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 426 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 430 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 432 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 434 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 438 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 442 */ { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 447 */ { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 452 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 455 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 458 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 462 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 465 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 469 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 473 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 476 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 479 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 481 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 484 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 488 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 492 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 496 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 500 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 504 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 508 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 512 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 514 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 516 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 518 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 520 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 522 */ { AArch64_GPR32spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 526 */ { AArch64_GPR32spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 530 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 534 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 538 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 541 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 547 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 553 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 558 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 561 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 567 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 573 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 578 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 582 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 },
|
||
|
|
/* 584 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 587 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 590 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 592 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 595 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 598 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 602 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 605 */ { AArch64_GPR32spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 608 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 611 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 614 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 618 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 621 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 624 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 626 */ { -1, 0, MCOI_OPERAND_PCREL, 0 },
|
||
|
|
/* 627 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 },
|
||
|
|
/* 629 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 634 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 639 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 641 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 643 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 645 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 649 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 653 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 655 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 657 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 664 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 671 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 676 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 680 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 683 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 686 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_loRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 691 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 698 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 704 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 709 */ { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 715 */ { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 721 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 725 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 730 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 735 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 739 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 743 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 745 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 748 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 752 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 756 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 760 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 764 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 768 */ { AArch64_WSeqPairsClassRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_WSeqPairsClassRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_WSeqPairsClassRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 772 */ { AArch64_XSeqPairsClassRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_XSeqPairsClassRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_XSeqPairsClassRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 776 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 },
|
||
|
|
/* 778 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 782 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 786 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 790 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 794 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 800 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 806 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 811 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 815 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 819 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 823 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 827 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 831 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 835 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 839 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 843 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 847 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 850 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 853 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 856 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 861 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 865 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 869 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 873 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 877 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 881 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 885 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 889 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 892 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 896 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 900 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 904 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 907 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 910 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 912 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 915 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 917 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 919 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 922 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 925 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 928 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 931 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 933 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 936 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 938 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 940 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 944 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 950 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 956 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 962 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 968 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 974 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 978 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 982 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 985 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 989 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 993 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 996 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 999 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1001 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1003 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1005 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1010 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1014 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1018 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1022 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1026 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1029 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1035 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1040 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1046 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1052 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1056 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1060 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1064 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1066 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1068 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1070 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1072 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1074 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1076 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1078 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1080 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1082 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1084 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1087 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1090 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1093 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1096 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1099 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1102 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1104 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1106 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1109 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1112 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1115 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_loRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1120 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1122 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1126 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1130 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_0to7RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1135 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1140 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_loRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1145 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1150 */ { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1156 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1159 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1161 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1163 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1165 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1167 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1169 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1172 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1174 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1176 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1178 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_loRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1182 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1186 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1190 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_loRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1194 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_loRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1198 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR_4bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1202 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1206 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1209 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1212 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1215 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1218 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1221 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1224 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1227 */ { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1233 */ { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1239 */ { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1245 */ { AArch64_MPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1251 */ { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1257 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1260 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1263 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1267 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1272 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1276 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1279 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1282 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1285 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1288 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1291 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1294 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1298 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1302 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1306 */ { AArch64_ZPR2StridedRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1310 */ { AArch64_ZPR2StridedRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1314 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1318 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1322 */ { AArch64_ZPR4StridedRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1326 */ { AArch64_ZPR4StridedRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1330 */ { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1332 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1336 */ { AArch64_DDDDRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1338 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_DDDDRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1342 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1344 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1348 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1350 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1354 */ { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1356 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1360 */ { AArch64_DDDRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1362 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_DDDRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1366 */ { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1368 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1372 */ { AArch64_DDRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1374 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_DDRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1378 */ { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1384 */ { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1390 */ { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1396 */ { AArch64_MPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1402 */ { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1408 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1412 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1418 */ { AArch64_ZPR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1422 */ { AArch64_ZPR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1426 */ { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1430 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1436 */ { AArch64_ZPR3RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1440 */ { AArch64_ZPR3RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1444 */ { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1448 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1454 */ { AArch64_ZPR4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1458 */ { AArch64_ZPR4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1462 */ { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1466 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1472 */ { AArch64_GPR64x8ClassRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1474 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1477 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1480 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1482 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 1485 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 1488 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1491 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1494 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1497 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1500 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1503 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1506 */ { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1511 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1515 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 1519 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 1523 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1527 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1531 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1535 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1539 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1543 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1548 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1553 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1558 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1563 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1568 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1572 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1576 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1581 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1586 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1590 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1595 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1600 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 },
|
||
|
|
/* 1602 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1606 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1611 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1616 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1620 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1625 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1630 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 },
|
||
|
|
/* 1632 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1636 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1641 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1646 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1651 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1656 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 },
|
||
|
|
/* 1658 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1662 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1667 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1672 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1675 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 1680 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1683 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1687 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1691 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1695 */ { AArch64_ZPR2StridedRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1699 */ { AArch64_ZPR4StridedRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1703 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1707 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1711 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1714 */ { AArch64_ZPR4StridedRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1717 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1721 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1725 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1729 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1734 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 1739 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1744 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1749 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1754 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 1759 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1764 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 1769 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1774 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1779 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1784 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1789 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1794 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 1799 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1804 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1808 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 1812 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1816 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1820 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1824 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 1828 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1832 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 1836 */ { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1841 */ { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1846 */ { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1851 */ { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1856 */ { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR8RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1861 */ { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1866 */ { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1871 */ { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1876 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1880 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1884 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 1886 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1889 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1892 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 1894 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1898 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1901 */ { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1904 */ { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1907 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZTRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1910 */ { AArch64_XSeqPairsClassRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1912 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1914 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1916 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_XSeqPairsClassRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1918 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 1920 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1923 */ { AArch64_PPR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1926 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1929 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 1932 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 1935 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1938 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1942 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1946 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1949 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 1953 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1957 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1961 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64commonRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1965 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1969 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1974 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1979 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1982 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MatrixIndexGPR32_12_15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1987 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 1989 */ { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1990 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 1993 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 1996 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2000 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2004 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2007 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2010 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 2014 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 2018 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2021 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2024 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2027 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2030 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2033 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2036 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2038 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2042 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2046 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2050 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2051 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2055 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2059 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2063 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2066 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2069 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2074 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_loRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2079 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2082 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 2085 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, AARCH64_OP_IMPLICIT_IMM_0, 0 },
|
||
|
|
/* 2088 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2092 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_loRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2096 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPR_3bRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2099 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2101 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2104 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2108 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2112 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_loRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2117 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2122 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2125 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2128 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128_loRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2132 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2136 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2140 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2144 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2147 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2150 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2153 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2156 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2159 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2162 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2164 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2167 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2170 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2175 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2179 */ { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2182 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2187 */ { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2190 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2195 */ { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2198 */ { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2203 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64x8ClassRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2206 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2210 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2214 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2217 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2220 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64spRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2223 */ { AArch64_ZPR4Mul4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2225 */ { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR16RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2228 */ { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2231 */ { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2234 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
|
||
|
|
/* 2239 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_XSeqPairsClassRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2244 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2249 */ { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2252 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2255 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2258 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2261 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2264 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2267 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2270 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2273 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 },
|
||
|
|
/* 2276 */ { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 },
|
||
|
|
/* 2279 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2283 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2287 */ { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2291 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_QQQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2295 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_FPR128RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2299 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_QQQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2303 */ { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_QQRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_FPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2307 */ { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
|
||
|
|
/* 2310 */ { AArch64_ZPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_ZPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2313 */ { AArch64_PPR2Mul2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2316 */ { AArch64_PNR_p8to15RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
/* 2320 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR32RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2323 */ { AArch64_PPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_GPR64RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
|
||
|
|
/* 2326 */ { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { AArch64_MPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { AArch64_MatrixIndexGPR32_8_11RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
|
||
|
|
}, {
|
||
|
|
/* 0 */
|
||
|
|
/* 0 */ AArch64_NZCV,
|
||
|
|
/* 1 */ AArch64_SP, AArch64_SP,
|
||
|
|
/* 3 */ AArch64_SP, AArch64_LR,
|
||
|
|
/* 5 */ AArch64_X16, AArch64_SP, AArch64_LR,
|
||
|
|
/* 8 */ AArch64_X9, AArch64_X16, AArch64_X17, AArch64_LR, AArch64_NZCV,
|
||
|
|
/* 13 */ AArch64_X20, AArch64_X16, AArch64_X17, AArch64_LR, AArch64_NZCV,
|
||
|
|
/* 18 */ AArch64_X9, AArch64_X16, AArch64_X17, AArch64_NZCV,
|
||
|
|
/* 22 */ AArch64_FPCR,
|
||
|
|
/* 23 */ AArch64_LR, AArch64_SP, AArch64_LR,
|
||
|
|
/* 26 */ AArch64_SP, AArch64_SP, AArch64_NZCV,
|
||
|
|
/* 29 */ AArch64_X16, AArch64_X17,
|
||
|
|
/* 31 */ AArch64_SP,
|
||
|
|
/* 32 */ AArch64_NZCV, AArch64_LR, AArch64_X0, AArch64_X1,
|
||
|
|
/* 36 */ AArch64_NZCV, AArch64_NZCV,
|
||
|
|
/* 38 */ AArch64_X16, AArch64_X17, AArch64_X17,
|
||
|
|
/* 41 */ AArch64_LR, AArch64_LR,
|
||
|
|
/* 43 */ AArch64_X16, AArch64_X16,
|
||
|
|
/* 45 */ AArch64_LR, AArch64_SP,
|
||
|
|
/* 47 */ AArch64_FPCR, AArch64_NZCV,
|
||
|
|
/* 49 */ AArch64_FFR, AArch64_FFR,
|
||
|
|
/* 51 */ AArch64_FFR, AArch64_NZCV,
|
||
|
|
/* 53 */ AArch64_FFR,
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
#endif // GET_INSTRINFO_MC_DESC
|
||
|
|
|
||
|
|
#ifdef GET_COMPUTE_FEATURES
|
||
|
|
#undef GET_COMPUTE_FEATURES
|
||
|
|
|
||
|
|
#endif // GET_COMPUTE_FEATURES
|
||
|
|
|
||
|
|
#ifdef GET_AVAILABLE_OPCODE_CHECKER
|
||
|
|
#undef GET_AVAILABLE_OPCODE_CHECKER
|
||
|
|
|
||
|
|
#endif // GET_AVAILABLE_OPCODE_CHECKER
|
||
|
|
|
||
|
|
#ifdef GET_INSTRMAP_INFO
|
||
|
|
#undef GET_INSTRMAP_INFO
|
||
|
|
enum IsInstr {
|
||
|
|
IsInstr_1
|
||
|
|
};
|
||
|
|
|
||
|
|
enum isReverseInstr {
|
||
|
|
isReverseInstr_0,
|
||
|
|
isReverseInstr_1
|
||
|
|
};
|
||
|
|
|
||
|
|
// getSMEPseudoMap
|
||
|
|
int getSMEPseudoMap(uint16_t Opcode) {
|
||
|
|
static const uint16_t getSMEPseudoMapTable[][2] = {
|
||
|
|
{ AArch64_ADDHA_MPPZ_D_PSEUDO_D, AArch64_ADDHA_MPPZ_D },
|
||
|
|
{ AArch64_ADDHA_MPPZ_S_PSEUDO_S, AArch64_ADDHA_MPPZ_S },
|
||
|
|
{ AArch64_ADDVA_MPPZ_D_PSEUDO_D, AArch64_ADDVA_MPPZ_D },
|
||
|
|
{ AArch64_ADDVA_MPPZ_S_PSEUDO_S, AArch64_ADDVA_MPPZ_S },
|
||
|
|
{ AArch64_ADD_VG2_M2Z2Z_D_PSEUDO, AArch64_ADD_VG2_M2Z2Z_D },
|
||
|
|
{ AArch64_ADD_VG2_M2Z2Z_S_PSEUDO, AArch64_ADD_VG2_M2Z2Z_S },
|
||
|
|
{ AArch64_ADD_VG2_M2ZZ_D_PSEUDO, AArch64_ADD_VG2_M2ZZ_D },
|
||
|
|
{ AArch64_ADD_VG2_M2ZZ_S_PSEUDO, AArch64_ADD_VG2_M2ZZ_S },
|
||
|
|
{ AArch64_ADD_VG2_M2Z_D_PSEUDO, AArch64_ADD_VG2_M2Z_D },
|
||
|
|
{ AArch64_ADD_VG2_M2Z_S_PSEUDO, AArch64_ADD_VG2_M2Z_S },
|
||
|
|
{ AArch64_ADD_VG4_M4Z4Z_D_PSEUDO, AArch64_ADD_VG4_M4Z4Z_D },
|
||
|
|
{ AArch64_ADD_VG4_M4Z4Z_S_PSEUDO, AArch64_ADD_VG4_M4Z4Z_S },
|
||
|
|
{ AArch64_ADD_VG4_M4ZZ_D_PSEUDO, AArch64_ADD_VG4_M4ZZ_D },
|
||
|
|
{ AArch64_ADD_VG4_M4ZZ_S_PSEUDO, AArch64_ADD_VG4_M4ZZ_S },
|
||
|
|
{ AArch64_ADD_VG4_M4Z_D_PSEUDO, AArch64_ADD_VG4_M4Z_D },
|
||
|
|
{ AArch64_ADD_VG4_M4Z_S_PSEUDO, AArch64_ADD_VG4_M4Z_S },
|
||
|
|
{ AArch64_BFADD_VG2_M2Z_H_PSEUDO, AArch64_BFADD_VG2_M2Z_H },
|
||
|
|
{ AArch64_BFADD_VG4_M4Z_H_PSEUDO, AArch64_BFADD_VG4_M4Z_H },
|
||
|
|
{ AArch64_BFDOT_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_BFDOT_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_BFDOT_VG2_M2ZZI_HtoS_PSEUDO, AArch64_BFDOT_VG2_M2ZZI_HtoS },
|
||
|
|
{ AArch64_BFDOT_VG2_M2ZZ_HtoS_PSEUDO, AArch64_BFDOT_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_BFDOT_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_BFDOT_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_BFDOT_VG4_M4ZZI_HtoS_PSEUDO, AArch64_BFDOT_VG4_M4ZZI_HtoS },
|
||
|
|
{ AArch64_BFDOT_VG4_M4ZZ_HtoS_PSEUDO, AArch64_BFDOT_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_BFMLAL_MZZI_HtoS_PSEUDO, AArch64_BFMLAL_MZZI_HtoS },
|
||
|
|
{ AArch64_BFMLAL_MZZ_HtoS_PSEUDO, AArch64_BFMLAL_MZZ_HtoS },
|
||
|
|
{ AArch64_BFMLAL_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_BFMLAL_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_BFMLAL_VG2_M2ZZI_HtoS_PSEUDO, AArch64_BFMLAL_VG2_M2ZZI_HtoS },
|
||
|
|
{ AArch64_BFMLAL_VG2_M2ZZ_HtoS_PSEUDO, AArch64_BFMLAL_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_BFMLAL_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_BFMLAL_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_BFMLAL_VG4_M4ZZI_HtoS_PSEUDO, AArch64_BFMLAL_VG4_M4ZZI_HtoS },
|
||
|
|
{ AArch64_BFMLAL_VG4_M4ZZ_HtoS_PSEUDO, AArch64_BFMLAL_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_BFMLA_VG2_M2Z2Z_PSEUDO, AArch64_BFMLA_VG2_M2Z2Z },
|
||
|
|
{ AArch64_BFMLA_VG4_M4Z4Z_PSEUDO, AArch64_BFMLA_VG4_M4Z4Z },
|
||
|
|
{ AArch64_BFMLSL_MZZI_HtoS_PSEUDO, AArch64_BFMLSL_MZZI_HtoS },
|
||
|
|
{ AArch64_BFMLSL_MZZ_HtoS_PSEUDO, AArch64_BFMLSL_MZZ_HtoS },
|
||
|
|
{ AArch64_BFMLSL_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_BFMLSL_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_BFMLSL_VG2_M2ZZI_HtoS_PSEUDO, AArch64_BFMLSL_VG2_M2ZZI_HtoS },
|
||
|
|
{ AArch64_BFMLSL_VG2_M2ZZ_HtoS_PSEUDO, AArch64_BFMLSL_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_BFMLSL_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_BFMLSL_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_BFMLSL_VG4_M4ZZI_HtoS_PSEUDO, AArch64_BFMLSL_VG4_M4ZZI_HtoS },
|
||
|
|
{ AArch64_BFMLSL_VG4_M4ZZ_HtoS_PSEUDO, AArch64_BFMLSL_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_BFMLS_VG2_M2Z2Z_PSEUDO, AArch64_BFMLS_VG2_M2Z2Z },
|
||
|
|
{ AArch64_BFMLS_VG4_M4Z4Z_PSEUDO, AArch64_BFMLS_VG4_M4Z4Z },
|
||
|
|
{ AArch64_BFMOPA_MPPZZ_PSEUDO, AArch64_BFMOPA_MPPZZ },
|
||
|
|
{ AArch64_BFMOPS_MPPZZ_PSEUDO, AArch64_BFMOPS_MPPZZ },
|
||
|
|
{ AArch64_BFSUB_VG2_M2Z_H_PSEUDO, AArch64_BFSUB_VG2_M2Z_H },
|
||
|
|
{ AArch64_BFSUB_VG4_M4Z_H_PSEUDO, AArch64_BFSUB_VG4_M4Z_H },
|
||
|
|
{ AArch64_BFVDOT_VG2_M2ZZI_HtoS_PSEUDO, AArch64_BFVDOT_VG2_M2ZZI_HtoS },
|
||
|
|
{ AArch64_BMOPA_MPPZZ_S_PSEUDO, AArch64_BMOPA_MPPZZ_S },
|
||
|
|
{ AArch64_BMOPS_MPPZZ_S_PSEUDO, AArch64_BMOPS_MPPZZ_S },
|
||
|
|
{ AArch64_FADD_VG2_M2Z_D_PSEUDO, AArch64_FADD_VG2_M2Z_D },
|
||
|
|
{ AArch64_FADD_VG2_M2Z_H_PSEUDO, AArch64_FADD_VG2_M2Z_H },
|
||
|
|
{ AArch64_FADD_VG2_M2Z_S_PSEUDO, AArch64_FADD_VG2_M2Z_S },
|
||
|
|
{ AArch64_FADD_VG4_M4Z_D_PSEUDO, AArch64_FADD_VG4_M4Z_D },
|
||
|
|
{ AArch64_FADD_VG4_M4Z_H_PSEUDO, AArch64_FADD_VG4_M4Z_H },
|
||
|
|
{ AArch64_FADD_VG4_M4Z_S_PSEUDO, AArch64_FADD_VG4_M4Z_S },
|
||
|
|
{ AArch64_FDOT_VG2_M2Z2Z_BtoH_PSEUDO, AArch64_FDOT_VG2_M2Z2Z_BtoH },
|
||
|
|
{ AArch64_FDOT_VG2_M2Z2Z_BtoS_PSEUDO, AArch64_FDOT_VG2_M2Z2Z_BtoS },
|
||
|
|
{ AArch64_FDOT_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_FDOT_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_FDOT_VG2_M2ZZI_BtoS_PSEUDO, AArch64_FDOT_VG2_M2ZZI_BtoS },
|
||
|
|
{ AArch64_FDOT_VG2_M2ZZI_HtoS_PSEUDO, AArch64_FDOT_VG2_M2ZZI_HtoS },
|
||
|
|
{ AArch64_FDOT_VG2_M2ZZ_HtoS_PSEUDO, AArch64_FDOT_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_FDOT_VG4_M4Z4Z_BtoH_PSEUDO, AArch64_FDOT_VG4_M4Z4Z_BtoH },
|
||
|
|
{ AArch64_FDOT_VG4_M4Z4Z_BtoS_PSEUDO, AArch64_FDOT_VG4_M4Z4Z_BtoS },
|
||
|
|
{ AArch64_FDOT_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_FDOT_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_FDOT_VG4_M4ZZI_BtoS_PSEUDO, AArch64_FDOT_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_FDOT_VG4_M4ZZI_HtoS_PSEUDO, AArch64_FDOT_VG4_M4ZZI_HtoS },
|
||
|
|
{ AArch64_FDOT_VG4_M4ZZ_HtoS_PSEUDO, AArch64_FDOT_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_FMLALL_MZZI_BtoS_PSEUDO, AArch64_FMLALL_MZZI_BtoS },
|
||
|
|
{ AArch64_FMLALL_MZZ_BtoS_PSEUDO, AArch64_FMLALL_MZZ_BtoS },
|
||
|
|
{ AArch64_FMLALL_VG2_M2Z2Z_BtoS_PSEUDO, AArch64_FMLALL_VG2_M2Z2Z_BtoS },
|
||
|
|
{ AArch64_FMLALL_VG2_M2ZZI_BtoS_PSEUDO, AArch64_FMLALL_VG2_M2ZZI_BtoS },
|
||
|
|
{ AArch64_FMLALL_VG2_M2ZZ_BtoS_PSEUDO, AArch64_FMLALL_VG2_M2ZZ_BtoS },
|
||
|
|
{ AArch64_FMLALL_VG4_M4Z4Z_BtoS_PSEUDO, AArch64_FMLALL_VG4_M4Z4Z_BtoS },
|
||
|
|
{ AArch64_FMLALL_VG4_M4ZZI_BtoS_PSEUDO, AArch64_FMLALL_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_FMLALL_VG4_M4ZZ_BtoS_PSEUDO, AArch64_FMLALL_VG4_M4ZZ_BtoS },
|
||
|
|
{ AArch64_FMLAL_MZZI_HtoS_PSEUDO, AArch64_FMLAL_MZZI_HtoS },
|
||
|
|
{ AArch64_FMLAL_MZZ_HtoS_PSEUDO, AArch64_FMLAL_MZZ_HtoS },
|
||
|
|
{ AArch64_FMLAL_VG2_M2Z2Z_BtoH_PSEUDO, AArch64_FMLAL_VG2_M2Z2Z_BtoH },
|
||
|
|
{ AArch64_FMLAL_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_FMLAL_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_FMLAL_VG2_M2ZZI_HtoS_PSEUDO, AArch64_FMLAL_VG2_M2ZZI_HtoS },
|
||
|
|
{ AArch64_FMLAL_VG2_M2ZZ_BtoH_PSEUDO, AArch64_FMLAL_VG2_M2ZZ_BtoH },
|
||
|
|
{ AArch64_FMLAL_VG2_M2ZZ_HtoS_PSEUDO, AArch64_FMLAL_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_FMLAL_VG4_M4Z4Z_BtoH_PSEUDO, AArch64_FMLAL_VG4_M4Z4Z_BtoH },
|
||
|
|
{ AArch64_FMLAL_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_FMLAL_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_FMLAL_VG4_M4ZZI_HtoS_PSEUDO, AArch64_FMLAL_VG4_M4ZZI_HtoS },
|
||
|
|
{ AArch64_FMLAL_VG4_M4ZZ_BtoH_PSEUDO, AArch64_FMLAL_VG4_M4ZZ_BtoH },
|
||
|
|
{ AArch64_FMLAL_VG4_M4ZZ_HtoS_PSEUDO, AArch64_FMLAL_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_FMLA_VG2_M2Z2Z_D_PSEUDO, AArch64_FMLA_VG2_M2Z2Z_D },
|
||
|
|
{ AArch64_FMLA_VG2_M2Z2Z_S_PSEUDO, AArch64_FMLA_VG2_M2Z2Z_S },
|
||
|
|
{ AArch64_FMLA_VG2_M2Z4Z_H_PSEUDO, AArch64_FMLA_VG2_M2Z4Z_H },
|
||
|
|
{ AArch64_FMLA_VG2_M2ZZI_D_PSEUDO, AArch64_FMLA_VG2_M2ZZI_D },
|
||
|
|
{ AArch64_FMLA_VG2_M2ZZI_S_PSEUDO, AArch64_FMLA_VG2_M2ZZI_S },
|
||
|
|
{ AArch64_FMLA_VG2_M2ZZ_D_PSEUDO, AArch64_FMLA_VG2_M2ZZ_D },
|
||
|
|
{ AArch64_FMLA_VG2_M2ZZ_S_PSEUDO, AArch64_FMLA_VG2_M2ZZ_S },
|
||
|
|
{ AArch64_FMLA_VG4_M4Z4Z_D_PSEUDO, AArch64_FMLA_VG4_M4Z4Z_D },
|
||
|
|
{ AArch64_FMLA_VG4_M4Z4Z_H_PSEUDO, AArch64_FMLA_VG4_M4Z4Z_H },
|
||
|
|
{ AArch64_FMLA_VG4_M4Z4Z_S_PSEUDO, AArch64_FMLA_VG4_M4Z4Z_S },
|
||
|
|
{ AArch64_FMLA_VG4_M4ZZI_D_PSEUDO, AArch64_FMLA_VG4_M4ZZI_D },
|
||
|
|
{ AArch64_FMLA_VG4_M4ZZI_S_PSEUDO, AArch64_FMLA_VG4_M4ZZI_S },
|
||
|
|
{ AArch64_FMLA_VG4_M4ZZ_D_PSEUDO, AArch64_FMLA_VG4_M4ZZ_D },
|
||
|
|
{ AArch64_FMLA_VG4_M4ZZ_S_PSEUDO, AArch64_FMLA_VG4_M4ZZ_S },
|
||
|
|
{ AArch64_FMLSL_MZZI_HtoS_PSEUDO, AArch64_FMLSL_MZZI_HtoS },
|
||
|
|
{ AArch64_FMLSL_MZZ_HtoS_PSEUDO, AArch64_FMLSL_MZZ_HtoS },
|
||
|
|
{ AArch64_FMLSL_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_FMLSL_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_FMLSL_VG2_M2ZZI_HtoS_PSEUDO, AArch64_FMLSL_VG2_M2ZZI_HtoS },
|
||
|
|
{ AArch64_FMLSL_VG2_M2ZZ_HtoS_PSEUDO, AArch64_FMLSL_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_FMLSL_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_FMLSL_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_FMLSL_VG4_M4ZZI_HtoS_PSEUDO, AArch64_FMLSL_VG4_M4ZZI_HtoS },
|
||
|
|
{ AArch64_FMLSL_VG4_M4ZZ_HtoS_PSEUDO, AArch64_FMLSL_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_FMLS_VG2_M2Z2Z_D_PSEUDO, AArch64_FMLS_VG2_M2Z2Z_D },
|
||
|
|
{ AArch64_FMLS_VG2_M2Z2Z_H_PSEUDO, AArch64_FMLS_VG2_M2Z2Z_H },
|
||
|
|
{ AArch64_FMLS_VG2_M2Z2Z_S_PSEUDO, AArch64_FMLS_VG2_M2Z2Z_S },
|
||
|
|
{ AArch64_FMLS_VG2_M2ZZI_D_PSEUDO, AArch64_FMLS_VG2_M2ZZI_D },
|
||
|
|
{ AArch64_FMLS_VG2_M2ZZI_S_PSEUDO, AArch64_FMLS_VG2_M2ZZI_S },
|
||
|
|
{ AArch64_FMLS_VG2_M2ZZ_D_PSEUDO, AArch64_FMLS_VG2_M2ZZ_D },
|
||
|
|
{ AArch64_FMLS_VG2_M2ZZ_S_PSEUDO, AArch64_FMLS_VG2_M2ZZ_S },
|
||
|
|
{ AArch64_FMLS_VG4_M4Z2Z_H_PSEUDO, AArch64_FMLS_VG4_M4Z2Z_H },
|
||
|
|
{ AArch64_FMLS_VG4_M4Z4Z_D_PSEUDO, AArch64_FMLS_VG4_M4Z4Z_D },
|
||
|
|
{ AArch64_FMLS_VG4_M4Z4Z_S_PSEUDO, AArch64_FMLS_VG4_M4Z4Z_S },
|
||
|
|
{ AArch64_FMLS_VG4_M4ZZI_D_PSEUDO, AArch64_FMLS_VG4_M4ZZI_D },
|
||
|
|
{ AArch64_FMLS_VG4_M4ZZI_S_PSEUDO, AArch64_FMLS_VG4_M4ZZI_S },
|
||
|
|
{ AArch64_FMLS_VG4_M4ZZ_D_PSEUDO, AArch64_FMLS_VG4_M4ZZ_D },
|
||
|
|
{ AArch64_FMLS_VG4_M4ZZ_S_PSEUDO, AArch64_FMLS_VG4_M4ZZ_S },
|
||
|
|
{ AArch64_FMOPAL_MPPZZ_PSEUDO, AArch64_FMOPAL_MPPZZ },
|
||
|
|
{ AArch64_FMOPA_MPPZZ_BtoS_PSEUDO, AArch64_FMOPA_MPPZZ_BtoS },
|
||
|
|
{ AArch64_FMOPA_MPPZZ_D_PSEUDO, AArch64_FMOPA_MPPZZ_D },
|
||
|
|
{ AArch64_FMOPA_MPPZZ_S_PSEUDO, AArch64_FMOPA_MPPZZ_S },
|
||
|
|
{ AArch64_FMOPSL_MPPZZ_PSEUDO, AArch64_FMOPSL_MPPZZ },
|
||
|
|
{ AArch64_FMOPS_MPPZZ_D_PSEUDO, AArch64_FMOPS_MPPZZ_D },
|
||
|
|
{ AArch64_FMOPS_MPPZZ_S_PSEUDO, AArch64_FMOPS_MPPZZ_S },
|
||
|
|
{ AArch64_FSUB_VG2_M2Z_D_PSEUDO, AArch64_FSUB_VG2_M2Z_D },
|
||
|
|
{ AArch64_FSUB_VG2_M2Z_H_PSEUDO, AArch64_FSUB_VG2_M2Z_H },
|
||
|
|
{ AArch64_FSUB_VG2_M2Z_S_PSEUDO, AArch64_FSUB_VG2_M2Z_S },
|
||
|
|
{ AArch64_FSUB_VG4_M4Z_D_PSEUDO, AArch64_FSUB_VG4_M4Z_D },
|
||
|
|
{ AArch64_FSUB_VG4_M4Z_H_PSEUDO, AArch64_FSUB_VG4_M4Z_H },
|
||
|
|
{ AArch64_FSUB_VG4_M4Z_S_PSEUDO, AArch64_FSUB_VG4_M4Z_S },
|
||
|
|
{ AArch64_FVDOT_VG2_M2ZZI_HtoS_PSEUDO, AArch64_FVDOT_VG2_M2ZZI_HtoS },
|
||
|
|
{ AArch64_INSERT_MXIPZ_H_PSEUDO_B, AArch64_INSERT_MXIPZ_H_B },
|
||
|
|
{ AArch64_INSERT_MXIPZ_H_PSEUDO_D, AArch64_INSERT_MXIPZ_H_D },
|
||
|
|
{ AArch64_INSERT_MXIPZ_H_PSEUDO_H, AArch64_INSERT_MXIPZ_H_H },
|
||
|
|
{ AArch64_INSERT_MXIPZ_H_PSEUDO_Q, AArch64_INSERT_MXIPZ_H_Q },
|
||
|
|
{ AArch64_INSERT_MXIPZ_H_PSEUDO_S, AArch64_INSERT_MXIPZ_H_S },
|
||
|
|
{ AArch64_INSERT_MXIPZ_V_PSEUDO_B, AArch64_INSERT_MXIPZ_V_B },
|
||
|
|
{ AArch64_INSERT_MXIPZ_V_PSEUDO_D, AArch64_INSERT_MXIPZ_V_D },
|
||
|
|
{ AArch64_INSERT_MXIPZ_V_PSEUDO_H, AArch64_INSERT_MXIPZ_V_H },
|
||
|
|
{ AArch64_INSERT_MXIPZ_V_PSEUDO_Q, AArch64_INSERT_MXIPZ_V_Q },
|
||
|
|
{ AArch64_INSERT_MXIPZ_V_PSEUDO_S, AArch64_INSERT_MXIPZ_V_S },
|
||
|
|
{ AArch64_MOVA_MXI2Z_H_B_PSEUDO, AArch64_MOVA_MXI2Z_H_B },
|
||
|
|
{ AArch64_MOVA_MXI2Z_H_D_PSEUDO, AArch64_MOVA_MXI2Z_H_D },
|
||
|
|
{ AArch64_MOVA_MXI2Z_H_H_PSEUDO, AArch64_MOVA_MXI2Z_H_H },
|
||
|
|
{ AArch64_MOVA_MXI2Z_H_S_PSEUDO, AArch64_MOVA_MXI2Z_H_S },
|
||
|
|
{ AArch64_MOVA_MXI2Z_V_B_PSEUDO, AArch64_MOVA_MXI2Z_V_B },
|
||
|
|
{ AArch64_MOVA_MXI2Z_V_D_PSEUDO, AArch64_MOVA_MXI2Z_V_D },
|
||
|
|
{ AArch64_MOVA_MXI2Z_V_H_PSEUDO, AArch64_MOVA_MXI2Z_V_H },
|
||
|
|
{ AArch64_MOVA_MXI2Z_V_S_PSEUDO, AArch64_MOVA_MXI2Z_V_S },
|
||
|
|
{ AArch64_MOVA_MXI4Z_H_B_PSEUDO, AArch64_MOVA_MXI4Z_H_B },
|
||
|
|
{ AArch64_MOVA_MXI4Z_H_D_PSEUDO, AArch64_MOVA_MXI4Z_H_D },
|
||
|
|
{ AArch64_MOVA_MXI4Z_H_H_PSEUDO, AArch64_MOVA_MXI4Z_H_H },
|
||
|
|
{ AArch64_MOVA_MXI4Z_H_S_PSEUDO, AArch64_MOVA_MXI4Z_H_S },
|
||
|
|
{ AArch64_MOVA_MXI4Z_V_B_PSEUDO, AArch64_MOVA_MXI4Z_V_B },
|
||
|
|
{ AArch64_MOVA_MXI4Z_V_D_PSEUDO, AArch64_MOVA_MXI4Z_V_D },
|
||
|
|
{ AArch64_MOVA_MXI4Z_V_H_PSEUDO, AArch64_MOVA_MXI4Z_V_H },
|
||
|
|
{ AArch64_MOVA_MXI4Z_V_S_PSEUDO, AArch64_MOVA_MXI4Z_V_S },
|
||
|
|
{ AArch64_MOVA_VG2_MXI2Z_PSEUDO, AArch64_MOVA_VG2_MXI2Z },
|
||
|
|
{ AArch64_MOVA_VG4_MXI4Z_PSEUDO, AArch64_MOVA_VG4_MXI4Z },
|
||
|
|
{ AArch64_SDOT_VG2_M2Z2Z_BtoS_PSEUDO, AArch64_SDOT_VG2_M2Z2Z_BtoS },
|
||
|
|
{ AArch64_SDOT_VG2_M2Z2Z_HtoD_PSEUDO, AArch64_SDOT_VG2_M2Z2Z_HtoD },
|
||
|
|
{ AArch64_SDOT_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_SDOT_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_SDOT_VG2_M2ZZI_BToS_PSEUDO, AArch64_SDOT_VG2_M2ZZI_BToS },
|
||
|
|
{ AArch64_SDOT_VG2_M2ZZI_HToS_PSEUDO, AArch64_SDOT_VG2_M2ZZI_HToS },
|
||
|
|
{ AArch64_SDOT_VG2_M2ZZI_HtoD_PSEUDO, AArch64_SDOT_VG2_M2ZZI_HtoD },
|
||
|
|
{ AArch64_SDOT_VG2_M2ZZ_BtoS_PSEUDO, AArch64_SDOT_VG2_M2ZZ_BtoS },
|
||
|
|
{ AArch64_SDOT_VG2_M2ZZ_HtoD_PSEUDO, AArch64_SDOT_VG2_M2ZZ_HtoD },
|
||
|
|
{ AArch64_SDOT_VG2_M2ZZ_HtoS_PSEUDO, AArch64_SDOT_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_SDOT_VG4_M4Z4Z_BtoS_PSEUDO, AArch64_SDOT_VG4_M4Z4Z_BtoS },
|
||
|
|
{ AArch64_SDOT_VG4_M4Z4Z_HtoD_PSEUDO, AArch64_SDOT_VG4_M4Z4Z_HtoD },
|
||
|
|
{ AArch64_SDOT_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_SDOT_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_SDOT_VG4_M4ZZI_BToS_PSEUDO, AArch64_SDOT_VG4_M4ZZI_BToS },
|
||
|
|
{ AArch64_SDOT_VG4_M4ZZI_HToS_PSEUDO, AArch64_SDOT_VG4_M4ZZI_HToS },
|
||
|
|
{ AArch64_SDOT_VG4_M4ZZI_HtoD_PSEUDO, AArch64_SDOT_VG4_M4ZZI_HtoD },
|
||
|
|
{ AArch64_SDOT_VG4_M4ZZ_BtoS_PSEUDO, AArch64_SDOT_VG4_M4ZZ_BtoS },
|
||
|
|
{ AArch64_SDOT_VG4_M4ZZ_HtoD_PSEUDO, AArch64_SDOT_VG4_M4ZZ_HtoD },
|
||
|
|
{ AArch64_SDOT_VG4_M4ZZ_HtoS_PSEUDO, AArch64_SDOT_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_SMLALL_MZZI_BtoS_PSEUDO, AArch64_SMLALL_MZZI_BtoS },
|
||
|
|
{ AArch64_SMLALL_MZZI_HtoD_PSEUDO, AArch64_SMLALL_MZZI_HtoD },
|
||
|
|
{ AArch64_SMLALL_MZZ_BtoS_PSEUDO, AArch64_SMLALL_MZZ_BtoS },
|
||
|
|
{ AArch64_SMLALL_MZZ_HtoD_PSEUDO, AArch64_SMLALL_MZZ_HtoD },
|
||
|
|
{ AArch64_SMLALL_VG2_M2Z2Z_BtoS_PSEUDO, AArch64_SMLALL_VG2_M2Z2Z_BtoS },
|
||
|
|
{ AArch64_SMLALL_VG2_M2Z2Z_HtoD_PSEUDO, AArch64_SMLALL_VG2_M2Z2Z_HtoD },
|
||
|
|
{ AArch64_SMLALL_VG2_M2ZZI_BtoS_PSEUDO, AArch64_SMLALL_VG2_M2ZZI_BtoS },
|
||
|
|
{ AArch64_SMLALL_VG2_M2ZZI_HtoD_PSEUDO, AArch64_SMLALL_VG2_M2ZZI_HtoD },
|
||
|
|
{ AArch64_SMLALL_VG2_M2ZZ_BtoS_PSEUDO, AArch64_SMLALL_VG2_M2ZZ_BtoS },
|
||
|
|
{ AArch64_SMLALL_VG2_M2ZZ_HtoD_PSEUDO, AArch64_SMLALL_VG2_M2ZZ_HtoD },
|
||
|
|
{ AArch64_SMLALL_VG4_M4Z4Z_BtoS_PSEUDO, AArch64_SMLALL_VG4_M4Z4Z_BtoS },
|
||
|
|
{ AArch64_SMLALL_VG4_M4Z4Z_HtoD_PSEUDO, AArch64_SMLALL_VG4_M4Z4Z_HtoD },
|
||
|
|
{ AArch64_SMLALL_VG4_M4ZZI_BtoS_PSEUDO, AArch64_SMLALL_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_SMLALL_VG4_M4ZZI_HtoD_PSEUDO, AArch64_SMLALL_VG4_M4ZZI_HtoD },
|
||
|
|
{ AArch64_SMLALL_VG4_M4ZZ_BtoS_PSEUDO, AArch64_SMLALL_VG4_M4ZZ_BtoS },
|
||
|
|
{ AArch64_SMLALL_VG4_M4ZZ_HtoD_PSEUDO, AArch64_SMLALL_VG4_M4ZZ_HtoD },
|
||
|
|
{ AArch64_SMLAL_MZZI_HtoS_PSEUDO, AArch64_SMLAL_MZZI_HtoS },
|
||
|
|
{ AArch64_SMLAL_MZZ_HtoS_PSEUDO, AArch64_SMLAL_MZZ_HtoS },
|
||
|
|
{ AArch64_SMLAL_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_SMLAL_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_SMLAL_VG2_M2ZZI_S_PSEUDO, AArch64_SMLAL_VG2_M2ZZI_S },
|
||
|
|
{ AArch64_SMLAL_VG2_M2ZZ_HtoS_PSEUDO, AArch64_SMLAL_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_SMLAL_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_SMLAL_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_SMLAL_VG4_M4ZZI_HtoS_PSEUDO, AArch64_SMLAL_VG4_M4ZZI_HtoS },
|
||
|
|
{ AArch64_SMLAL_VG4_M4ZZ_HtoS_PSEUDO, AArch64_SMLAL_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_SMLSLL_MZZI_BtoS_PSEUDO, AArch64_SMLSLL_MZZI_BtoS },
|
||
|
|
{ AArch64_SMLSLL_MZZI_HtoD_PSEUDO, AArch64_SMLSLL_MZZI_HtoD },
|
||
|
|
{ AArch64_SMLSLL_MZZ_BtoS_PSEUDO, AArch64_SMLSLL_MZZ_BtoS },
|
||
|
|
{ AArch64_SMLSLL_MZZ_HtoD_PSEUDO, AArch64_SMLSLL_MZZ_HtoD },
|
||
|
|
{ AArch64_SMLSLL_VG2_M2Z2Z_BtoS_PSEUDO, AArch64_SMLSLL_VG2_M2Z2Z_BtoS },
|
||
|
|
{ AArch64_SMLSLL_VG2_M2Z2Z_HtoD_PSEUDO, AArch64_SMLSLL_VG2_M2Z2Z_HtoD },
|
||
|
|
{ AArch64_SMLSLL_VG2_M2ZZI_BtoS_PSEUDO, AArch64_SMLSLL_VG2_M2ZZI_BtoS },
|
||
|
|
{ AArch64_SMLSLL_VG2_M2ZZI_HtoD_PSEUDO, AArch64_SMLSLL_VG2_M2ZZI_HtoD },
|
||
|
|
{ AArch64_SMLSLL_VG2_M2ZZ_BtoS_PSEUDO, AArch64_SMLSLL_VG2_M2ZZ_BtoS },
|
||
|
|
{ AArch64_SMLSLL_VG2_M2ZZ_HtoD_PSEUDO, AArch64_SMLSLL_VG2_M2ZZ_HtoD },
|
||
|
|
{ AArch64_SMLSLL_VG4_M4Z4Z_BtoS_PSEUDO, AArch64_SMLSLL_VG4_M4Z4Z_BtoS },
|
||
|
|
{ AArch64_SMLSLL_VG4_M4Z4Z_HtoD_PSEUDO, AArch64_SMLSLL_VG4_M4Z4Z_HtoD },
|
||
|
|
{ AArch64_SMLSLL_VG4_M4ZZI_BtoS_PSEUDO, AArch64_SMLSLL_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_SMLSLL_VG4_M4ZZI_HtoD_PSEUDO, AArch64_SMLSLL_VG4_M4ZZI_HtoD },
|
||
|
|
{ AArch64_SMLSLL_VG4_M4ZZ_BtoS_PSEUDO, AArch64_SMLSLL_VG4_M4ZZ_BtoS },
|
||
|
|
{ AArch64_SMLSLL_VG4_M4ZZ_HtoD_PSEUDO, AArch64_SMLSLL_VG4_M4ZZ_HtoD },
|
||
|
|
{ AArch64_SMLSL_MZZI_HtoS_PSEUDO, AArch64_SMLSL_MZZI_HtoS },
|
||
|
|
{ AArch64_SMLSL_MZZ_HtoS_PSEUDO, AArch64_SMLSL_MZZ_HtoS },
|
||
|
|
{ AArch64_SMLSL_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_SMLSL_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_SMLSL_VG2_M2ZZI_S_PSEUDO, AArch64_SMLSL_VG2_M2ZZI_S },
|
||
|
|
{ AArch64_SMLSL_VG2_M2ZZ_HtoS_PSEUDO, AArch64_SMLSL_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_SMLSL_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_SMLSL_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_SMLSL_VG4_M4ZZI_HtoS_PSEUDO, AArch64_SMLSL_VG4_M4ZZI_HtoS },
|
||
|
|
{ AArch64_SMLSL_VG4_M4ZZ_HtoS_PSEUDO, AArch64_SMLSL_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_SMOPA_MPPZZ_D_PSEUDO, AArch64_SMOPA_MPPZZ_D },
|
||
|
|
{ AArch64_SMOPA_MPPZZ_HtoS_PSEUDO, AArch64_SMOPA_MPPZZ_HtoS },
|
||
|
|
{ AArch64_SMOPA_MPPZZ_S_PSEUDO, AArch64_SMOPA_MPPZZ_S },
|
||
|
|
{ AArch64_SMOPS_MPPZZ_D_PSEUDO, AArch64_SMOPS_MPPZZ_D },
|
||
|
|
{ AArch64_SMOPS_MPPZZ_HtoS_PSEUDO, AArch64_SMOPS_MPPZZ_HtoS },
|
||
|
|
{ AArch64_SMOPS_MPPZZ_S_PSEUDO, AArch64_SMOPS_MPPZZ_S },
|
||
|
|
{ AArch64_SUB_VG2_M2Z2Z_D_PSEUDO, AArch64_SUB_VG2_M2Z2Z_D },
|
||
|
|
{ AArch64_SUB_VG2_M2Z2Z_S_PSEUDO, AArch64_SUB_VG2_M2Z2Z_S },
|
||
|
|
{ AArch64_SUB_VG2_M2ZZ_D_PSEUDO, AArch64_SUB_VG2_M2ZZ_D },
|
||
|
|
{ AArch64_SUB_VG2_M2ZZ_S_PSEUDO, AArch64_SUB_VG2_M2ZZ_S },
|
||
|
|
{ AArch64_SUB_VG2_M2Z_D_PSEUDO, AArch64_SUB_VG2_M2Z_D },
|
||
|
|
{ AArch64_SUB_VG2_M2Z_S_PSEUDO, AArch64_SUB_VG2_M2Z_S },
|
||
|
|
{ AArch64_SUB_VG4_M4Z4Z_D_PSEUDO, AArch64_SUB_VG4_M4Z4Z_D },
|
||
|
|
{ AArch64_SUB_VG4_M4Z4Z_S_PSEUDO, AArch64_SUB_VG4_M4Z4Z_S },
|
||
|
|
{ AArch64_SUB_VG4_M4ZZ_D_PSEUDO, AArch64_SUB_VG4_M4ZZ_D },
|
||
|
|
{ AArch64_SUB_VG4_M4ZZ_S_PSEUDO, AArch64_SUB_VG4_M4ZZ_S },
|
||
|
|
{ AArch64_SUB_VG4_M4Z_D_PSEUDO, AArch64_SUB_VG4_M4Z_D },
|
||
|
|
{ AArch64_SUB_VG4_M4Z_S_PSEUDO, AArch64_SUB_VG4_M4Z_S },
|
||
|
|
{ AArch64_SUDOT_VG2_M2ZZI_BToS_PSEUDO, AArch64_SUDOT_VG2_M2ZZI_BToS },
|
||
|
|
{ AArch64_SUDOT_VG2_M2ZZ_BToS_PSEUDO, AArch64_SUDOT_VG2_M2ZZ_BToS },
|
||
|
|
{ AArch64_SUDOT_VG4_M4ZZI_BToS_PSEUDO, AArch64_SUDOT_VG4_M4ZZI_BToS },
|
||
|
|
{ AArch64_SUDOT_VG4_M4ZZ_BToS_PSEUDO, AArch64_SUDOT_VG4_M4ZZ_BToS },
|
||
|
|
{ AArch64_SUMLALL_MZZI_BtoS_PSEUDO, AArch64_SUMLALL_MZZI_BtoS },
|
||
|
|
{ AArch64_SUMLALL_VG2_M2ZZI_BtoS_PSEUDO, AArch64_SUMLALL_VG2_M2ZZI_BtoS },
|
||
|
|
{ AArch64_SUMLALL_VG2_M2ZZ_BtoS_PSEUDO, AArch64_SUMLALL_VG2_M2ZZ_BtoS },
|
||
|
|
{ AArch64_SUMLALL_VG4_M4ZZI_BtoS_PSEUDO, AArch64_SUMLALL_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_SUMLALL_VG4_M4ZZ_BtoS_PSEUDO, AArch64_SUMLALL_VG4_M4ZZ_BtoS },
|
||
|
|
{ AArch64_SUMOPA_MPPZZ_D_PSEUDO, AArch64_SUMOPA_MPPZZ_D },
|
||
|
|
{ AArch64_SUMOPA_MPPZZ_S_PSEUDO, AArch64_SUMOPA_MPPZZ_S },
|
||
|
|
{ AArch64_SUMOPS_MPPZZ_D_PSEUDO, AArch64_SUMOPS_MPPZZ_D },
|
||
|
|
{ AArch64_SUMOPS_MPPZZ_S_PSEUDO, AArch64_SUMOPS_MPPZZ_S },
|
||
|
|
{ AArch64_SUVDOT_VG4_M4ZZI_BToS_PSEUDO, AArch64_SUVDOT_VG4_M4ZZI_BToS },
|
||
|
|
{ AArch64_SVDOT_VG2_M2ZZI_HtoS_PSEUDO, AArch64_SVDOT_VG2_M2ZZI_HtoS },
|
||
|
|
{ AArch64_SVDOT_VG4_M4ZZI_BtoS_PSEUDO, AArch64_SVDOT_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_SVDOT_VG4_M4ZZI_HtoD_PSEUDO, AArch64_SVDOT_VG4_M4ZZI_HtoD },
|
||
|
|
{ AArch64_UDOT_VG2_M2Z2Z_BtoS_PSEUDO, AArch64_UDOT_VG2_M2Z2Z_BtoS },
|
||
|
|
{ AArch64_UDOT_VG2_M2Z2Z_HtoD_PSEUDO, AArch64_UDOT_VG2_M2Z2Z_HtoD },
|
||
|
|
{ AArch64_UDOT_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_UDOT_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_UDOT_VG2_M2ZZI_BToS_PSEUDO, AArch64_UDOT_VG2_M2ZZI_BToS },
|
||
|
|
{ AArch64_UDOT_VG2_M2ZZI_HToS_PSEUDO, AArch64_UDOT_VG2_M2ZZI_HToS },
|
||
|
|
{ AArch64_UDOT_VG2_M2ZZI_HtoD_PSEUDO, AArch64_UDOT_VG2_M2ZZI_HtoD },
|
||
|
|
{ AArch64_UDOT_VG2_M2ZZ_BtoS_PSEUDO, AArch64_UDOT_VG2_M2ZZ_BtoS },
|
||
|
|
{ AArch64_UDOT_VG2_M2ZZ_HtoD_PSEUDO, AArch64_UDOT_VG2_M2ZZ_HtoD },
|
||
|
|
{ AArch64_UDOT_VG2_M2ZZ_HtoS_PSEUDO, AArch64_UDOT_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_UDOT_VG4_M4Z4Z_BtoS_PSEUDO, AArch64_UDOT_VG4_M4Z4Z_BtoS },
|
||
|
|
{ AArch64_UDOT_VG4_M4Z4Z_HtoD_PSEUDO, AArch64_UDOT_VG4_M4Z4Z_HtoD },
|
||
|
|
{ AArch64_UDOT_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_UDOT_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_UDOT_VG4_M4ZZI_BtoS_PSEUDO, AArch64_UDOT_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_UDOT_VG4_M4ZZI_HToS_PSEUDO, AArch64_UDOT_VG4_M4ZZI_HToS },
|
||
|
|
{ AArch64_UDOT_VG4_M4ZZI_HtoD_PSEUDO, AArch64_UDOT_VG4_M4ZZI_HtoD },
|
||
|
|
{ AArch64_UDOT_VG4_M4ZZ_BtoS_PSEUDO, AArch64_UDOT_VG4_M4ZZ_BtoS },
|
||
|
|
{ AArch64_UDOT_VG4_M4ZZ_HtoD_PSEUDO, AArch64_UDOT_VG4_M4ZZ_HtoD },
|
||
|
|
{ AArch64_UDOT_VG4_M4ZZ_HtoS_PSEUDO, AArch64_UDOT_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_UMLALL_MZZI_BtoS_PSEUDO, AArch64_UMLALL_MZZI_BtoS },
|
||
|
|
{ AArch64_UMLALL_MZZI_HtoD_PSEUDO, AArch64_UMLALL_MZZI_HtoD },
|
||
|
|
{ AArch64_UMLALL_MZZ_BtoS_PSEUDO, AArch64_UMLALL_MZZ_BtoS },
|
||
|
|
{ AArch64_UMLALL_MZZ_HtoD_PSEUDO, AArch64_UMLALL_MZZ_HtoD },
|
||
|
|
{ AArch64_UMLALL_VG2_M2Z2Z_BtoS_PSEUDO, AArch64_UMLALL_VG2_M2Z2Z_BtoS },
|
||
|
|
{ AArch64_UMLALL_VG2_M2Z2Z_HtoD_PSEUDO, AArch64_UMLALL_VG2_M2Z2Z_HtoD },
|
||
|
|
{ AArch64_UMLALL_VG2_M2ZZI_BtoS_PSEUDO, AArch64_UMLALL_VG2_M2ZZI_BtoS },
|
||
|
|
{ AArch64_UMLALL_VG2_M2ZZI_HtoD_PSEUDO, AArch64_UMLALL_VG2_M2ZZI_HtoD },
|
||
|
|
{ AArch64_UMLALL_VG2_M2ZZ_BtoS_PSEUDO, AArch64_UMLALL_VG2_M2ZZ_BtoS },
|
||
|
|
{ AArch64_UMLALL_VG2_M2ZZ_HtoD_PSEUDO, AArch64_UMLALL_VG2_M2ZZ_HtoD },
|
||
|
|
{ AArch64_UMLALL_VG4_M4Z4Z_BtoS_PSEUDO, AArch64_UMLALL_VG4_M4Z4Z_BtoS },
|
||
|
|
{ AArch64_UMLALL_VG4_M4Z4Z_HtoD_PSEUDO, AArch64_UMLALL_VG4_M4Z4Z_HtoD },
|
||
|
|
{ AArch64_UMLALL_VG4_M4ZZI_BtoS_PSEUDO, AArch64_UMLALL_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_UMLALL_VG4_M4ZZI_HtoD_PSEUDO, AArch64_UMLALL_VG4_M4ZZI_HtoD },
|
||
|
|
{ AArch64_UMLALL_VG4_M4ZZ_BtoS_PSEUDO, AArch64_UMLALL_VG4_M4ZZ_BtoS },
|
||
|
|
{ AArch64_UMLALL_VG4_M4ZZ_HtoD_PSEUDO, AArch64_UMLALL_VG4_M4ZZ_HtoD },
|
||
|
|
{ AArch64_UMLAL_MZZI_HtoS_PSEUDO, AArch64_UMLAL_MZZI_HtoS },
|
||
|
|
{ AArch64_UMLAL_MZZ_HtoS_PSEUDO, AArch64_UMLAL_MZZ_HtoS },
|
||
|
|
{ AArch64_UMLAL_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_UMLAL_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_UMLAL_VG2_M2ZZI_S_PSEUDO, AArch64_UMLAL_VG2_M2ZZI_S },
|
||
|
|
{ AArch64_UMLAL_VG2_M2ZZ_HtoS_PSEUDO, AArch64_UMLAL_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_UMLAL_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_UMLAL_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_UMLAL_VG4_M4ZZI_HtoS_PSEUDO, AArch64_UMLAL_VG4_M4ZZI_HtoS },
|
||
|
|
{ AArch64_UMLAL_VG4_M4ZZ_HtoS_PSEUDO, AArch64_UMLAL_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_UMLSLL_MZZI_BtoS_PSEUDO, AArch64_UMLSLL_MZZI_BtoS },
|
||
|
|
{ AArch64_UMLSLL_MZZI_HtoD_PSEUDO, AArch64_UMLSLL_MZZI_HtoD },
|
||
|
|
{ AArch64_UMLSLL_MZZ_BtoS_PSEUDO, AArch64_UMLSLL_MZZ_BtoS },
|
||
|
|
{ AArch64_UMLSLL_MZZ_HtoD_PSEUDO, AArch64_UMLSLL_MZZ_HtoD },
|
||
|
|
{ AArch64_UMLSLL_VG2_M2Z2Z_BtoS_PSEUDO, AArch64_UMLSLL_VG2_M2Z2Z_BtoS },
|
||
|
|
{ AArch64_UMLSLL_VG2_M2Z2Z_HtoD_PSEUDO, AArch64_UMLSLL_VG2_M2Z2Z_HtoD },
|
||
|
|
{ AArch64_UMLSLL_VG2_M2ZZI_BtoS_PSEUDO, AArch64_UMLSLL_VG2_M2ZZI_BtoS },
|
||
|
|
{ AArch64_UMLSLL_VG2_M2ZZI_HtoD_PSEUDO, AArch64_UMLSLL_VG2_M2ZZI_HtoD },
|
||
|
|
{ AArch64_UMLSLL_VG2_M2ZZ_BtoS_PSEUDO, AArch64_UMLSLL_VG2_M2ZZ_BtoS },
|
||
|
|
{ AArch64_UMLSLL_VG2_M2ZZ_HtoD_PSEUDO, AArch64_UMLSLL_VG2_M2ZZ_HtoD },
|
||
|
|
{ AArch64_UMLSLL_VG4_M4Z4Z_BtoS_PSEUDO, AArch64_UMLSLL_VG4_M4Z4Z_BtoS },
|
||
|
|
{ AArch64_UMLSLL_VG4_M4Z4Z_HtoD_PSEUDO, AArch64_UMLSLL_VG4_M4Z4Z_HtoD },
|
||
|
|
{ AArch64_UMLSLL_VG4_M4ZZI_BtoS_PSEUDO, AArch64_UMLSLL_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_UMLSLL_VG4_M4ZZI_HtoD_PSEUDO, AArch64_UMLSLL_VG4_M4ZZI_HtoD },
|
||
|
|
{ AArch64_UMLSLL_VG4_M4ZZ_BtoS_PSEUDO, AArch64_UMLSLL_VG4_M4ZZ_BtoS },
|
||
|
|
{ AArch64_UMLSLL_VG4_M4ZZ_HtoD_PSEUDO, AArch64_UMLSLL_VG4_M4ZZ_HtoD },
|
||
|
|
{ AArch64_UMLSL_MZZI_HtoS_PSEUDO, AArch64_UMLSL_MZZI_HtoS },
|
||
|
|
{ AArch64_UMLSL_MZZ_HtoS_PSEUDO, AArch64_UMLSL_MZZ_HtoS },
|
||
|
|
{ AArch64_UMLSL_VG2_M2Z2Z_HtoS_PSEUDO, AArch64_UMLSL_VG2_M2Z2Z_HtoS },
|
||
|
|
{ AArch64_UMLSL_VG2_M2ZZI_S_PSEUDO, AArch64_UMLSL_VG2_M2ZZI_S },
|
||
|
|
{ AArch64_UMLSL_VG2_M2ZZ_HtoS_PSEUDO, AArch64_UMLSL_VG2_M2ZZ_HtoS },
|
||
|
|
{ AArch64_UMLSL_VG4_M4Z4Z_HtoS_PSEUDO, AArch64_UMLSL_VG4_M4Z4Z_HtoS },
|
||
|
|
{ AArch64_UMLSL_VG4_M4ZZI_HtoS_PSEUDO, AArch64_UMLSL_VG4_M4ZZI_HtoS },
|
||
|
|
{ AArch64_UMLSL_VG4_M4ZZ_HtoS_PSEUDO, AArch64_UMLSL_VG4_M4ZZ_HtoS },
|
||
|
|
{ AArch64_UMOPA_MPPZZ_D_PSEUDO, AArch64_UMOPA_MPPZZ_D },
|
||
|
|
{ AArch64_UMOPA_MPPZZ_HtoS_PSEUDO, AArch64_UMOPA_MPPZZ_HtoS },
|
||
|
|
{ AArch64_UMOPA_MPPZZ_S_PSEUDO, AArch64_UMOPA_MPPZZ_S },
|
||
|
|
{ AArch64_UMOPS_MPPZZ_D_PSEUDO, AArch64_UMOPS_MPPZZ_D },
|
||
|
|
{ AArch64_UMOPS_MPPZZ_HtoS_PSEUDO, AArch64_UMOPS_MPPZZ_HtoS },
|
||
|
|
{ AArch64_UMOPS_MPPZZ_S_PSEUDO, AArch64_UMOPS_MPPZZ_S },
|
||
|
|
{ AArch64_USDOT_VG2_M2Z2Z_BToS_PSEUDO, AArch64_USDOT_VG2_M2Z2Z_BToS },
|
||
|
|
{ AArch64_USDOT_VG2_M2ZZI_BToS_PSEUDO, AArch64_USDOT_VG2_M2ZZI_BToS },
|
||
|
|
{ AArch64_USDOT_VG2_M2ZZ_BToS_PSEUDO, AArch64_USDOT_VG2_M2ZZ_BToS },
|
||
|
|
{ AArch64_USDOT_VG4_M4Z4Z_BToS_PSEUDO, AArch64_USDOT_VG4_M4Z4Z_BToS },
|
||
|
|
{ AArch64_USDOT_VG4_M4ZZI_BToS_PSEUDO, AArch64_USDOT_VG4_M4ZZI_BToS },
|
||
|
|
{ AArch64_USDOT_VG4_M4ZZ_BToS_PSEUDO, AArch64_USDOT_VG4_M4ZZ_BToS },
|
||
|
|
{ AArch64_USMLALL_MZZI_BtoS_PSEUDO, AArch64_USMLALL_MZZI_BtoS },
|
||
|
|
{ AArch64_USMLALL_MZZ_BtoS_PSEUDO, AArch64_USMLALL_MZZ_BtoS },
|
||
|
|
{ AArch64_USMLALL_VG2_M2Z2Z_BtoS_PSEUDO, AArch64_USMLALL_VG2_M2Z2Z_BtoS },
|
||
|
|
{ AArch64_USMLALL_VG2_M2ZZI_BtoS_PSEUDO, AArch64_USMLALL_VG2_M2ZZI_BtoS },
|
||
|
|
{ AArch64_USMLALL_VG2_M2ZZ_BtoS_PSEUDO, AArch64_USMLALL_VG2_M2ZZ_BtoS },
|
||
|
|
{ AArch64_USMLALL_VG4_M4Z4Z_BtoS_PSEUDO, AArch64_USMLALL_VG4_M4Z4Z_BtoS },
|
||
|
|
{ AArch64_USMLALL_VG4_M4ZZI_BtoS_PSEUDO, AArch64_USMLALL_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_USMLALL_VG4_M4ZZ_BtoS_PSEUDO, AArch64_USMLALL_VG4_M4ZZ_BtoS },
|
||
|
|
{ AArch64_USMOPA_MPPZZ_D_PSEUDO, AArch64_USMOPA_MPPZZ_D },
|
||
|
|
{ AArch64_USMOPA_MPPZZ_S_PSEUDO, AArch64_USMOPA_MPPZZ_S },
|
||
|
|
{ AArch64_USMOPS_MPPZZ_D_PSEUDO, AArch64_USMOPS_MPPZZ_D },
|
||
|
|
{ AArch64_USMOPS_MPPZZ_S_PSEUDO, AArch64_USMOPS_MPPZZ_S },
|
||
|
|
{ AArch64_USVDOT_VG4_M4ZZI_BToS_PSEUDO, AArch64_USVDOT_VG4_M4ZZI_BToS },
|
||
|
|
{ AArch64_UVDOT_VG2_M2ZZI_HtoS_PSEUDO, AArch64_UVDOT_VG2_M2ZZI_HtoS },
|
||
|
|
{ AArch64_UVDOT_VG4_M4ZZI_BtoS_PSEUDO, AArch64_UVDOT_VG4_M4ZZI_BtoS },
|
||
|
|
{ AArch64_UVDOT_VG4_M4ZZI_HtoD_PSEUDO, AArch64_UVDOT_VG4_M4ZZI_HtoD },
|
||
|
|
}; // End of getSMEPseudoMapTable
|
||
|
|
|
||
|
|
unsigned mid;
|
||
|
|
unsigned start = 0;
|
||
|
|
unsigned end = 362;
|
||
|
|
while (start < end) {
|
||
|
|
mid = start + (end - start) / 2;
|
||
|
|
if (Opcode == getSMEPseudoMapTable[mid][0]) {
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
if (Opcode < getSMEPseudoMapTable[mid][0])
|
||
|
|
end = mid;
|
||
|
|
else
|
||
|
|
start = mid + 1;
|
||
|
|
}
|
||
|
|
if (start == end)
|
||
|
|
return -1; // Instruction doesn't exist in this table.
|
||
|
|
|
||
|
|
return getSMEPseudoMapTable[mid][1];
|
||
|
|
}
|
||
|
|
|
||
|
|
// getSVENonRevInstr
|
||
|
|
int getSVENonRevInstr(uint16_t Opcode) {
|
||
|
|
static const uint16_t getSVENonRevInstrTable[][2] = {
|
||
|
|
{ AArch64_ASRR_ZPmZ_B, AArch64_ASR_ZPmZ_B },
|
||
|
|
{ AArch64_ASRR_ZPmZ_D, AArch64_ASR_ZPmZ_D },
|
||
|
|
{ AArch64_ASRR_ZPmZ_H, AArch64_ASR_ZPmZ_H },
|
||
|
|
{ AArch64_ASRR_ZPmZ_S, AArch64_ASR_ZPmZ_S },
|
||
|
|
{ AArch64_FDIVR_ZPmZ_D, AArch64_FDIV_ZPmZ_D },
|
||
|
|
{ AArch64_FDIVR_ZPmZ_H, AArch64_FDIV_ZPmZ_H },
|
||
|
|
{ AArch64_FDIVR_ZPmZ_S, AArch64_FDIV_ZPmZ_S },
|
||
|
|
{ AArch64_FMAD_ZPmZZ_D, AArch64_FMLA_ZPmZZ_D },
|
||
|
|
{ AArch64_FMAD_ZPmZZ_H, AArch64_FMLA_ZPmZZ_H },
|
||
|
|
{ AArch64_FMAD_ZPmZZ_S, AArch64_FMLA_ZPmZZ_S },
|
||
|
|
{ AArch64_FMSB_ZPmZZ_D, AArch64_FMLS_ZPmZZ_D },
|
||
|
|
{ AArch64_FMSB_ZPmZZ_H, AArch64_FMLS_ZPmZZ_H },
|
||
|
|
{ AArch64_FMSB_ZPmZZ_S, AArch64_FMLS_ZPmZZ_S },
|
||
|
|
{ AArch64_FNMAD_ZPmZZ_D, AArch64_FNMLA_ZPmZZ_D },
|
||
|
|
{ AArch64_FNMAD_ZPmZZ_H, AArch64_FNMLA_ZPmZZ_H },
|
||
|
|
{ AArch64_FNMAD_ZPmZZ_S, AArch64_FNMLA_ZPmZZ_S },
|
||
|
|
{ AArch64_FNMSB_ZPmZZ_D, AArch64_FNMLS_ZPmZZ_D },
|
||
|
|
{ AArch64_FNMSB_ZPmZZ_H, AArch64_FNMLS_ZPmZZ_H },
|
||
|
|
{ AArch64_FNMSB_ZPmZZ_S, AArch64_FNMLS_ZPmZZ_S },
|
||
|
|
{ AArch64_FSUBR_ZPmZ_D, AArch64_FSUB_ZPmZ_D },
|
||
|
|
{ AArch64_FSUBR_ZPmZ_H, AArch64_FSUB_ZPmZ_H },
|
||
|
|
{ AArch64_FSUBR_ZPmZ_S, AArch64_FSUB_ZPmZ_S },
|
||
|
|
{ AArch64_LSLR_ZPmZ_B, AArch64_LSL_ZPmZ_B },
|
||
|
|
{ AArch64_LSLR_ZPmZ_D, AArch64_LSL_ZPmZ_D },
|
||
|
|
{ AArch64_LSLR_ZPmZ_H, AArch64_LSL_ZPmZ_H },
|
||
|
|
{ AArch64_LSLR_ZPmZ_S, AArch64_LSL_ZPmZ_S },
|
||
|
|
{ AArch64_LSRR_ZPmZ_B, AArch64_LSR_ZPmZ_B },
|
||
|
|
{ AArch64_LSRR_ZPmZ_D, AArch64_LSR_ZPmZ_D },
|
||
|
|
{ AArch64_LSRR_ZPmZ_H, AArch64_LSR_ZPmZ_H },
|
||
|
|
{ AArch64_LSRR_ZPmZ_S, AArch64_LSR_ZPmZ_S },
|
||
|
|
{ AArch64_MAD_ZPmZZ_B, AArch64_MLA_ZPmZZ_B },
|
||
|
|
{ AArch64_MAD_ZPmZZ_D, AArch64_MLA_ZPmZZ_D },
|
||
|
|
{ AArch64_MAD_ZPmZZ_H, AArch64_MLA_ZPmZZ_H },
|
||
|
|
{ AArch64_MAD_ZPmZZ_S, AArch64_MLA_ZPmZZ_S },
|
||
|
|
{ AArch64_MSB_ZPmZZ_B, AArch64_MLS_ZPmZZ_B },
|
||
|
|
{ AArch64_MSB_ZPmZZ_D, AArch64_MLS_ZPmZZ_D },
|
||
|
|
{ AArch64_MSB_ZPmZZ_H, AArch64_MLS_ZPmZZ_H },
|
||
|
|
{ AArch64_MSB_ZPmZZ_S, AArch64_MLS_ZPmZZ_S },
|
||
|
|
{ AArch64_SDIVR_ZPmZ_D, AArch64_SDIV_ZPmZ_D },
|
||
|
|
{ AArch64_SDIVR_ZPmZ_S, AArch64_SDIV_ZPmZ_S },
|
||
|
|
{ AArch64_SQRSHLR_ZPmZ_B, AArch64_SQRSHL_ZPmZ_B },
|
||
|
|
{ AArch64_SQRSHLR_ZPmZ_D, AArch64_SQRSHL_ZPmZ_D },
|
||
|
|
{ AArch64_SQRSHLR_ZPmZ_H, AArch64_SQRSHL_ZPmZ_H },
|
||
|
|
{ AArch64_SQRSHLR_ZPmZ_S, AArch64_SQRSHL_ZPmZ_S },
|
||
|
|
{ AArch64_SQSHLR_ZPmZ_B, AArch64_SQSHL_ZPmZ_B },
|
||
|
|
{ AArch64_SQSHLR_ZPmZ_D, AArch64_SQSHL_ZPmZ_D },
|
||
|
|
{ AArch64_SQSHLR_ZPmZ_H, AArch64_SQSHL_ZPmZ_H },
|
||
|
|
{ AArch64_SQSHLR_ZPmZ_S, AArch64_SQSHL_ZPmZ_S },
|
||
|
|
{ AArch64_SRSHLR_ZPmZ_B, AArch64_SRSHL_ZPmZ_B },
|
||
|
|
{ AArch64_SRSHLR_ZPmZ_D, AArch64_SRSHL_ZPmZ_D },
|
||
|
|
{ AArch64_SRSHLR_ZPmZ_H, AArch64_SRSHL_ZPmZ_H },
|
||
|
|
{ AArch64_SRSHLR_ZPmZ_S, AArch64_SRSHL_ZPmZ_S },
|
||
|
|
{ AArch64_SUBR_ZPmZ_B, AArch64_SUB_ZPmZ_B },
|
||
|
|
{ AArch64_SUBR_ZPmZ_D, AArch64_SUB_ZPmZ_D },
|
||
|
|
{ AArch64_SUBR_ZPmZ_H, AArch64_SUB_ZPmZ_H },
|
||
|
|
{ AArch64_SUBR_ZPmZ_S, AArch64_SUB_ZPmZ_S },
|
||
|
|
{ AArch64_UDIVR_ZPmZ_D, AArch64_UDIV_ZPmZ_D },
|
||
|
|
{ AArch64_UDIVR_ZPmZ_S, AArch64_UDIV_ZPmZ_S },
|
||
|
|
{ AArch64_UQRSHLR_ZPmZ_B, AArch64_UQRSHL_ZPmZ_B },
|
||
|
|
{ AArch64_UQRSHLR_ZPmZ_D, AArch64_UQRSHL_ZPmZ_D },
|
||
|
|
{ AArch64_UQRSHLR_ZPmZ_H, AArch64_UQRSHL_ZPmZ_H },
|
||
|
|
{ AArch64_UQRSHLR_ZPmZ_S, AArch64_UQRSHL_ZPmZ_S },
|
||
|
|
{ AArch64_UQSHLR_ZPmZ_B, AArch64_UQSHL_ZPmZ_B },
|
||
|
|
{ AArch64_UQSHLR_ZPmZ_D, AArch64_UQSHL_ZPmZ_D },
|
||
|
|
{ AArch64_UQSHLR_ZPmZ_H, AArch64_UQSHL_ZPmZ_H },
|
||
|
|
{ AArch64_UQSHLR_ZPmZ_S, AArch64_UQSHL_ZPmZ_S },
|
||
|
|
{ AArch64_URSHLR_ZPmZ_B, AArch64_URSHL_ZPmZ_B },
|
||
|
|
{ AArch64_URSHLR_ZPmZ_D, AArch64_URSHL_ZPmZ_D },
|
||
|
|
{ AArch64_URSHLR_ZPmZ_H, AArch64_URSHL_ZPmZ_H },
|
||
|
|
{ AArch64_URSHLR_ZPmZ_S, AArch64_URSHL_ZPmZ_S },
|
||
|
|
}; // End of getSVENonRevInstrTable
|
||
|
|
|
||
|
|
unsigned mid;
|
||
|
|
unsigned start = 0;
|
||
|
|
unsigned end = 70;
|
||
|
|
while (start < end) {
|
||
|
|
mid = start + (end - start) / 2;
|
||
|
|
if (Opcode == getSVENonRevInstrTable[mid][0]) {
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
if (Opcode < getSVENonRevInstrTable[mid][0])
|
||
|
|
end = mid;
|
||
|
|
else
|
||
|
|
start = mid + 1;
|
||
|
|
}
|
||
|
|
if (start == end)
|
||
|
|
return -1; // Instruction doesn't exist in this table.
|
||
|
|
|
||
|
|
return getSVENonRevInstrTable[mid][1];
|
||
|
|
}
|
||
|
|
|
||
|
|
// getSVEPseudoMap
|
||
|
|
int getSVEPseudoMap(uint16_t Opcode) {
|
||
|
|
static const uint16_t getSVEPseudoMapTable[][2] = {
|
||
|
|
{ AArch64_ABS_ZPmZ_B_UNDEF, AArch64_ABS_ZPmZ_B },
|
||
|
|
{ AArch64_ABS_ZPmZ_D_UNDEF, AArch64_ABS_ZPmZ_D },
|
||
|
|
{ AArch64_ABS_ZPmZ_H_UNDEF, AArch64_ABS_ZPmZ_H },
|
||
|
|
{ AArch64_ABS_ZPmZ_S_UNDEF, AArch64_ABS_ZPmZ_S },
|
||
|
|
{ AArch64_ADD_ZPZZ_B_ZERO, AArch64_ADD_ZPmZ_B },
|
||
|
|
{ AArch64_ADD_ZPZZ_D_ZERO, AArch64_ADD_ZPmZ_D },
|
||
|
|
{ AArch64_ADD_ZPZZ_H_ZERO, AArch64_ADD_ZPmZ_H },
|
||
|
|
{ AArch64_ADD_ZPZZ_S_ZERO, AArch64_ADD_ZPmZ_S },
|
||
|
|
{ AArch64_AND_ZPZZ_B_ZERO, AArch64_AND_ZPmZ_B },
|
||
|
|
{ AArch64_AND_ZPZZ_D_ZERO, AArch64_AND_ZPmZ_D },
|
||
|
|
{ AArch64_AND_ZPZZ_H_ZERO, AArch64_AND_ZPmZ_H },
|
||
|
|
{ AArch64_AND_ZPZZ_S_ZERO, AArch64_AND_ZPmZ_S },
|
||
|
|
{ AArch64_ASRD_ZPZI_B_ZERO, AArch64_ASRD_ZPmI_B },
|
||
|
|
{ AArch64_ASRD_ZPZI_D_ZERO, AArch64_ASRD_ZPmI_D },
|
||
|
|
{ AArch64_ASRD_ZPZI_H_ZERO, AArch64_ASRD_ZPmI_H },
|
||
|
|
{ AArch64_ASRD_ZPZI_S_ZERO, AArch64_ASRD_ZPmI_S },
|
||
|
|
{ AArch64_ASR_ZPZI_B_UNDEF, AArch64_ASR_ZPmI_B },
|
||
|
|
{ AArch64_ASR_ZPZI_B_ZERO, AArch64_ASR_ZPmI_B },
|
||
|
|
{ AArch64_ASR_ZPZI_D_UNDEF, AArch64_ASR_ZPmI_D },
|
||
|
|
{ AArch64_ASR_ZPZI_D_ZERO, AArch64_ASR_ZPmI_D },
|
||
|
|
{ AArch64_ASR_ZPZI_H_UNDEF, AArch64_ASR_ZPmI_H },
|
||
|
|
{ AArch64_ASR_ZPZI_H_ZERO, AArch64_ASR_ZPmI_H },
|
||
|
|
{ AArch64_ASR_ZPZI_S_UNDEF, AArch64_ASR_ZPmI_S },
|
||
|
|
{ AArch64_ASR_ZPZI_S_ZERO, AArch64_ASR_ZPmI_S },
|
||
|
|
{ AArch64_ASR_ZPZZ_B_UNDEF, AArch64_ASR_ZPmZ_B },
|
||
|
|
{ AArch64_ASR_ZPZZ_B_ZERO, AArch64_ASR_ZPmZ_B },
|
||
|
|
{ AArch64_ASR_ZPZZ_D_UNDEF, AArch64_ASR_ZPmZ_D },
|
||
|
|
{ AArch64_ASR_ZPZZ_D_ZERO, AArch64_ASR_ZPmZ_D },
|
||
|
|
{ AArch64_ASR_ZPZZ_H_UNDEF, AArch64_ASR_ZPmZ_H },
|
||
|
|
{ AArch64_ASR_ZPZZ_H_ZERO, AArch64_ASR_ZPmZ_H },
|
||
|
|
{ AArch64_ASR_ZPZZ_S_UNDEF, AArch64_ASR_ZPmZ_S },
|
||
|
|
{ AArch64_ASR_ZPZZ_S_ZERO, AArch64_ASR_ZPmZ_S },
|
||
|
|
{ AArch64_BFADD_ZPZZ_UNDEF, AArch64_BFADD_ZPmZZ },
|
||
|
|
{ AArch64_BFADD_ZPZZ_ZERO, AArch64_BFADD_ZPmZZ },
|
||
|
|
{ AArch64_BFMAXNM_ZPZZ_UNDEF, AArch64_BFMAXNM_ZPmZZ },
|
||
|
|
{ AArch64_BFMAXNM_ZPZZ_ZERO, AArch64_BFMAXNM_ZPmZZ },
|
||
|
|
{ AArch64_BFMAX_ZPZZ_UNDEF, AArch64_BFMAX_ZPmZZ },
|
||
|
|
{ AArch64_BFMAX_ZPZZ_ZERO, AArch64_BFMAX_ZPmZZ },
|
||
|
|
{ AArch64_BFMINNM_ZPZZ_UNDEF, AArch64_BFMINNM_ZPmZZ },
|
||
|
|
{ AArch64_BFMINNM_ZPZZ_ZERO, AArch64_BFMINNM_ZPmZZ },
|
||
|
|
{ AArch64_BFMIN_ZPZZ_UNDEF, AArch64_BFMIN_ZPmZZ },
|
||
|
|
{ AArch64_BFMIN_ZPZZ_ZERO, AArch64_BFMIN_ZPmZZ },
|
||
|
|
{ AArch64_BFMLA_ZPZZZ_UNDEF, AArch64_BFMLA_ZPmZZ },
|
||
|
|
{ AArch64_BFMLS_ZPZZZ_UNDEF, AArch64_BFMLS_ZPmZZ },
|
||
|
|
{ AArch64_BFMUL_ZPZZ_UNDEF, AArch64_BFMUL_ZPmZZ },
|
||
|
|
{ AArch64_BFMUL_ZPZZ_ZERO, AArch64_BFMUL_ZPmZZ },
|
||
|
|
{ AArch64_BFSUB_ZPZZ_UNDEF, AArch64_BFSUB_ZPmZZ },
|
||
|
|
{ AArch64_BFSUB_ZPZZ_ZERO, AArch64_BFSUB_ZPmZZ },
|
||
|
|
{ AArch64_BIC_ZPZZ_B_ZERO, AArch64_BIC_ZPmZ_B },
|
||
|
|
{ AArch64_BIC_ZPZZ_D_ZERO, AArch64_BIC_ZPmZ_D },
|
||
|
|
{ AArch64_BIC_ZPZZ_H_ZERO, AArch64_BIC_ZPmZ_H },
|
||
|
|
{ AArch64_BIC_ZPZZ_S_ZERO, AArch64_BIC_ZPmZ_S },
|
||
|
|
{ AArch64_CLS_ZPmZ_B_UNDEF, AArch64_CLS_ZPmZ_B },
|
||
|
|
{ AArch64_CLS_ZPmZ_D_UNDEF, AArch64_CLS_ZPmZ_D },
|
||
|
|
{ AArch64_CLS_ZPmZ_H_UNDEF, AArch64_CLS_ZPmZ_H },
|
||
|
|
{ AArch64_CLS_ZPmZ_S_UNDEF, AArch64_CLS_ZPmZ_S },
|
||
|
|
{ AArch64_CLZ_ZPmZ_B_UNDEF, AArch64_CLZ_ZPmZ_B },
|
||
|
|
{ AArch64_CLZ_ZPmZ_D_UNDEF, AArch64_CLZ_ZPmZ_D },
|
||
|
|
{ AArch64_CLZ_ZPmZ_H_UNDEF, AArch64_CLZ_ZPmZ_H },
|
||
|
|
{ AArch64_CLZ_ZPmZ_S_UNDEF, AArch64_CLZ_ZPmZ_S },
|
||
|
|
{ AArch64_CNOT_ZPmZ_B_UNDEF, AArch64_CNOT_ZPmZ_B },
|
||
|
|
{ AArch64_CNOT_ZPmZ_D_UNDEF, AArch64_CNOT_ZPmZ_D },
|
||
|
|
{ AArch64_CNOT_ZPmZ_H_UNDEF, AArch64_CNOT_ZPmZ_H },
|
||
|
|
{ AArch64_CNOT_ZPmZ_S_UNDEF, AArch64_CNOT_ZPmZ_S },
|
||
|
|
{ AArch64_CNT_ZPmZ_B_UNDEF, AArch64_CNT_ZPmZ_B },
|
||
|
|
{ AArch64_CNT_ZPmZ_D_UNDEF, AArch64_CNT_ZPmZ_D },
|
||
|
|
{ AArch64_CNT_ZPmZ_H_UNDEF, AArch64_CNT_ZPmZ_H },
|
||
|
|
{ AArch64_CNT_ZPmZ_S_UNDEF, AArch64_CNT_ZPmZ_S },
|
||
|
|
{ AArch64_EOR_ZPZZ_B_ZERO, AArch64_EOR_ZPmZ_B },
|
||
|
|
{ AArch64_EOR_ZPZZ_D_ZERO, AArch64_EOR_ZPmZ_D },
|
||
|
|
{ AArch64_EOR_ZPZZ_H_ZERO, AArch64_EOR_ZPmZ_H },
|
||
|
|
{ AArch64_EOR_ZPZZ_S_ZERO, AArch64_EOR_ZPmZ_S },
|
||
|
|
{ AArch64_FABD_ZPZZ_D_UNDEF, AArch64_FABD_ZPmZ_D },
|
||
|
|
{ AArch64_FABD_ZPZZ_D_ZERO, AArch64_FABD_ZPmZ_D },
|
||
|
|
{ AArch64_FABD_ZPZZ_H_UNDEF, AArch64_FABD_ZPmZ_H },
|
||
|
|
{ AArch64_FABD_ZPZZ_H_ZERO, AArch64_FABD_ZPmZ_H },
|
||
|
|
{ AArch64_FABD_ZPZZ_S_UNDEF, AArch64_FABD_ZPmZ_S },
|
||
|
|
{ AArch64_FABD_ZPZZ_S_ZERO, AArch64_FABD_ZPmZ_S },
|
||
|
|
{ AArch64_FABS_ZPmZ_D_UNDEF, AArch64_FABS_ZPmZ_D },
|
||
|
|
{ AArch64_FABS_ZPmZ_H_UNDEF, AArch64_FABS_ZPmZ_H },
|
||
|
|
{ AArch64_FABS_ZPmZ_S_UNDEF, AArch64_FABS_ZPmZ_S },
|
||
|
|
{ AArch64_FADD_ZPZI_D_UNDEF, AArch64_FADD_ZPmI_D },
|
||
|
|
{ AArch64_FADD_ZPZI_D_ZERO, AArch64_FADD_ZPmI_D },
|
||
|
|
{ AArch64_FADD_ZPZI_H_UNDEF, AArch64_FADD_ZPmI_H },
|
||
|
|
{ AArch64_FADD_ZPZI_H_ZERO, AArch64_FADD_ZPmI_H },
|
||
|
|
{ AArch64_FADD_ZPZI_S_UNDEF, AArch64_FADD_ZPmI_S },
|
||
|
|
{ AArch64_FADD_ZPZI_S_ZERO, AArch64_FADD_ZPmI_S },
|
||
|
|
{ AArch64_FADD_ZPZZ_D_UNDEF, AArch64_FADD_ZPmZ_D },
|
||
|
|
{ AArch64_FADD_ZPZZ_D_ZERO, AArch64_FADD_ZPmZ_D },
|
||
|
|
{ AArch64_FADD_ZPZZ_H_UNDEF, AArch64_FADD_ZPmZ_H },
|
||
|
|
{ AArch64_FADD_ZPZZ_H_ZERO, AArch64_FADD_ZPmZ_H },
|
||
|
|
{ AArch64_FADD_ZPZZ_S_UNDEF, AArch64_FADD_ZPmZ_S },
|
||
|
|
{ AArch64_FADD_ZPZZ_S_ZERO, AArch64_FADD_ZPmZ_S },
|
||
|
|
{ AArch64_FCVTZS_ZPmZ_DtoD_UNDEF, AArch64_FCVTZS_ZPmZ_DtoD },
|
||
|
|
{ AArch64_FCVTZS_ZPmZ_DtoS_UNDEF, AArch64_FCVTZS_ZPmZ_DtoS },
|
||
|
|
{ AArch64_FCVTZS_ZPmZ_HtoD_UNDEF, AArch64_FCVTZS_ZPmZ_HtoD },
|
||
|
|
{ AArch64_FCVTZS_ZPmZ_HtoH_UNDEF, AArch64_FCVTZS_ZPmZ_HtoH },
|
||
|
|
{ AArch64_FCVTZS_ZPmZ_HtoS_UNDEF, AArch64_FCVTZS_ZPmZ_HtoS },
|
||
|
|
{ AArch64_FCVTZS_ZPmZ_StoD_UNDEF, AArch64_FCVTZS_ZPmZ_StoD },
|
||
|
|
{ AArch64_FCVTZS_ZPmZ_StoS_UNDEF, AArch64_FCVTZS_ZPmZ_StoS },
|
||
|
|
{ AArch64_FCVTZU_ZPmZ_DtoD_UNDEF, AArch64_FCVTZU_ZPmZ_DtoD },
|
||
|
|
{ AArch64_FCVTZU_ZPmZ_DtoS_UNDEF, AArch64_FCVTZU_ZPmZ_DtoS },
|
||
|
|
{ AArch64_FCVTZU_ZPmZ_HtoD_UNDEF, AArch64_FCVTZU_ZPmZ_HtoD },
|
||
|
|
{ AArch64_FCVTZU_ZPmZ_HtoH_UNDEF, AArch64_FCVTZU_ZPmZ_HtoH },
|
||
|
|
{ AArch64_FCVTZU_ZPmZ_HtoS_UNDEF, AArch64_FCVTZU_ZPmZ_HtoS },
|
||
|
|
{ AArch64_FCVTZU_ZPmZ_StoD_UNDEF, AArch64_FCVTZU_ZPmZ_StoD },
|
||
|
|
{ AArch64_FCVTZU_ZPmZ_StoS_UNDEF, AArch64_FCVTZU_ZPmZ_StoS },
|
||
|
|
{ AArch64_FCVT_ZPmZ_DtoH_UNDEF, AArch64_FCVT_ZPmZ_DtoH },
|
||
|
|
{ AArch64_FCVT_ZPmZ_DtoS_UNDEF, AArch64_FCVT_ZPmZ_DtoS },
|
||
|
|
{ AArch64_FCVT_ZPmZ_HtoD_UNDEF, AArch64_FCVT_ZPmZ_HtoD },
|
||
|
|
{ AArch64_FCVT_ZPmZ_HtoS_UNDEF, AArch64_FCVT_ZPmZ_HtoS },
|
||
|
|
{ AArch64_FCVT_ZPmZ_StoD_UNDEF, AArch64_FCVT_ZPmZ_StoD },
|
||
|
|
{ AArch64_FCVT_ZPmZ_StoH_UNDEF, AArch64_FCVT_ZPmZ_StoH },
|
||
|
|
{ AArch64_FDIVR_ZPZZ_D_ZERO, AArch64_FDIVR_ZPmZ_D },
|
||
|
|
{ AArch64_FDIVR_ZPZZ_H_ZERO, AArch64_FDIVR_ZPmZ_H },
|
||
|
|
{ AArch64_FDIVR_ZPZZ_S_ZERO, AArch64_FDIVR_ZPmZ_S },
|
||
|
|
{ AArch64_FDIV_ZPZZ_D_UNDEF, AArch64_FDIV_ZPmZ_D },
|
||
|
|
{ AArch64_FDIV_ZPZZ_D_ZERO, AArch64_FDIV_ZPmZ_D },
|
||
|
|
{ AArch64_FDIV_ZPZZ_H_UNDEF, AArch64_FDIV_ZPmZ_H },
|
||
|
|
{ AArch64_FDIV_ZPZZ_H_ZERO, AArch64_FDIV_ZPmZ_H },
|
||
|
|
{ AArch64_FDIV_ZPZZ_S_UNDEF, AArch64_FDIV_ZPmZ_S },
|
||
|
|
{ AArch64_FDIV_ZPZZ_S_ZERO, AArch64_FDIV_ZPmZ_S },
|
||
|
|
{ AArch64_FLOGB_ZPZZ_D_ZERO, AArch64_FLOGB_ZPmZ_D },
|
||
|
|
{ AArch64_FLOGB_ZPZZ_H_ZERO, AArch64_FLOGB_ZPmZ_H },
|
||
|
|
{ AArch64_FLOGB_ZPZZ_S_ZERO, AArch64_FLOGB_ZPmZ_S },
|
||
|
|
{ AArch64_FMAXNM_ZPZI_D_UNDEF, AArch64_FMAXNM_ZPmI_D },
|
||
|
|
{ AArch64_FMAXNM_ZPZI_D_ZERO, AArch64_FMAXNM_ZPmI_D },
|
||
|
|
{ AArch64_FMAXNM_ZPZI_H_UNDEF, AArch64_FMAXNM_ZPmI_H },
|
||
|
|
{ AArch64_FMAXNM_ZPZI_H_ZERO, AArch64_FMAXNM_ZPmI_H },
|
||
|
|
{ AArch64_FMAXNM_ZPZI_S_UNDEF, AArch64_FMAXNM_ZPmI_S },
|
||
|
|
{ AArch64_FMAXNM_ZPZI_S_ZERO, AArch64_FMAXNM_ZPmI_S },
|
||
|
|
{ AArch64_FMAXNM_ZPZZ_D_UNDEF, AArch64_FMAXNM_ZPmZ_D },
|
||
|
|
{ AArch64_FMAXNM_ZPZZ_D_ZERO, AArch64_FMAXNM_ZPmZ_D },
|
||
|
|
{ AArch64_FMAXNM_ZPZZ_H_UNDEF, AArch64_FMAXNM_ZPmZ_H },
|
||
|
|
{ AArch64_FMAXNM_ZPZZ_H_ZERO, AArch64_FMAXNM_ZPmZ_H },
|
||
|
|
{ AArch64_FMAXNM_ZPZZ_S_UNDEF, AArch64_FMAXNM_ZPmZ_S },
|
||
|
|
{ AArch64_FMAXNM_ZPZZ_S_ZERO, AArch64_FMAXNM_ZPmZ_S },
|
||
|
|
{ AArch64_FMAX_ZPZI_D_UNDEF, AArch64_FMAX_ZPmI_D },
|
||
|
|
{ AArch64_FMAX_ZPZI_D_ZERO, AArch64_FMAX_ZPmI_D },
|
||
|
|
{ AArch64_FMAX_ZPZI_H_UNDEF, AArch64_FMAX_ZPmI_H },
|
||
|
|
{ AArch64_FMAX_ZPZI_H_ZERO, AArch64_FMAX_ZPmI_H },
|
||
|
|
{ AArch64_FMAX_ZPZI_S_UNDEF, AArch64_FMAX_ZPmI_S },
|
||
|
|
{ AArch64_FMAX_ZPZI_S_ZERO, AArch64_FMAX_ZPmI_S },
|
||
|
|
{ AArch64_FMAX_ZPZZ_D_UNDEF, AArch64_FMAX_ZPmZ_D },
|
||
|
|
{ AArch64_FMAX_ZPZZ_D_ZERO, AArch64_FMAX_ZPmZ_D },
|
||
|
|
{ AArch64_FMAX_ZPZZ_H_UNDEF, AArch64_FMAX_ZPmZ_H },
|
||
|
|
{ AArch64_FMAX_ZPZZ_H_ZERO, AArch64_FMAX_ZPmZ_H },
|
||
|
|
{ AArch64_FMAX_ZPZZ_S_UNDEF, AArch64_FMAX_ZPmZ_S },
|
||
|
|
{ AArch64_FMAX_ZPZZ_S_ZERO, AArch64_FMAX_ZPmZ_S },
|
||
|
|
{ AArch64_FMINNM_ZPZI_D_UNDEF, AArch64_FMINNM_ZPmI_D },
|
||
|
|
{ AArch64_FMINNM_ZPZI_D_ZERO, AArch64_FMINNM_ZPmI_D },
|
||
|
|
{ AArch64_FMINNM_ZPZI_H_UNDEF, AArch64_FMINNM_ZPmI_H },
|
||
|
|
{ AArch64_FMINNM_ZPZI_H_ZERO, AArch64_FMINNM_ZPmI_H },
|
||
|
|
{ AArch64_FMINNM_ZPZI_S_UNDEF, AArch64_FMINNM_ZPmI_S },
|
||
|
|
{ AArch64_FMINNM_ZPZI_S_ZERO, AArch64_FMINNM_ZPmI_S },
|
||
|
|
{ AArch64_FMINNM_ZPZZ_D_UNDEF, AArch64_FMINNM_ZPmZ_D },
|
||
|
|
{ AArch64_FMINNM_ZPZZ_D_ZERO, AArch64_FMINNM_ZPmZ_D },
|
||
|
|
{ AArch64_FMINNM_ZPZZ_H_UNDEF, AArch64_FMINNM_ZPmZ_H },
|
||
|
|
{ AArch64_FMINNM_ZPZZ_H_ZERO, AArch64_FMINNM_ZPmZ_H },
|
||
|
|
{ AArch64_FMINNM_ZPZZ_S_UNDEF, AArch64_FMINNM_ZPmZ_S },
|
||
|
|
{ AArch64_FMINNM_ZPZZ_S_ZERO, AArch64_FMINNM_ZPmZ_S },
|
||
|
|
{ AArch64_FMIN_ZPZI_D_UNDEF, AArch64_FMIN_ZPmI_D },
|
||
|
|
{ AArch64_FMIN_ZPZI_D_ZERO, AArch64_FMIN_ZPmI_D },
|
||
|
|
{ AArch64_FMIN_ZPZI_H_UNDEF, AArch64_FMIN_ZPmI_H },
|
||
|
|
{ AArch64_FMIN_ZPZI_H_ZERO, AArch64_FMIN_ZPmI_H },
|
||
|
|
{ AArch64_FMIN_ZPZI_S_UNDEF, AArch64_FMIN_ZPmI_S },
|
||
|
|
{ AArch64_FMIN_ZPZI_S_ZERO, AArch64_FMIN_ZPmI_S },
|
||
|
|
{ AArch64_FMIN_ZPZZ_D_UNDEF, AArch64_FMIN_ZPmZ_D },
|
||
|
|
{ AArch64_FMIN_ZPZZ_D_ZERO, AArch64_FMIN_ZPmZ_D },
|
||
|
|
{ AArch64_FMIN_ZPZZ_H_UNDEF, AArch64_FMIN_ZPmZ_H },
|
||
|
|
{ AArch64_FMIN_ZPZZ_H_ZERO, AArch64_FMIN_ZPmZ_H },
|
||
|
|
{ AArch64_FMIN_ZPZZ_S_UNDEF, AArch64_FMIN_ZPmZ_S },
|
||
|
|
{ AArch64_FMIN_ZPZZ_S_ZERO, AArch64_FMIN_ZPmZ_S },
|
||
|
|
{ AArch64_FMLA_ZPZZZ_D_UNDEF, AArch64_FMLA_ZPmZZ_D },
|
||
|
|
{ AArch64_FMLA_ZPZZZ_H_UNDEF, AArch64_FMLA_ZPmZZ_H },
|
||
|
|
{ AArch64_FMLA_ZPZZZ_S_UNDEF, AArch64_FMLA_ZPmZZ_S },
|
||
|
|
{ AArch64_FMLS_ZPZZZ_D_UNDEF, AArch64_FMLS_ZPmZZ_D },
|
||
|
|
{ AArch64_FMLS_ZPZZZ_H_UNDEF, AArch64_FMLS_ZPmZZ_H },
|
||
|
|
{ AArch64_FMLS_ZPZZZ_S_UNDEF, AArch64_FMLS_ZPmZZ_S },
|
||
|
|
{ AArch64_FMULX_ZPZZ_D_UNDEF, AArch64_FMULX_ZPmZ_D },
|
||
|
|
{ AArch64_FMULX_ZPZZ_D_ZERO, AArch64_FMULX_ZPmZ_D },
|
||
|
|
{ AArch64_FMULX_ZPZZ_H_UNDEF, AArch64_FMULX_ZPmZ_H },
|
||
|
|
{ AArch64_FMULX_ZPZZ_H_ZERO, AArch64_FMULX_ZPmZ_H },
|
||
|
|
{ AArch64_FMULX_ZPZZ_S_UNDEF, AArch64_FMULX_ZPmZ_S },
|
||
|
|
{ AArch64_FMULX_ZPZZ_S_ZERO, AArch64_FMULX_ZPmZ_S },
|
||
|
|
{ AArch64_FMUL_ZPZI_D_UNDEF, AArch64_FMUL_ZPmI_D },
|
||
|
|
{ AArch64_FMUL_ZPZI_D_ZERO, AArch64_FMUL_ZPmI_D },
|
||
|
|
{ AArch64_FMUL_ZPZI_H_UNDEF, AArch64_FMUL_ZPmI_H },
|
||
|
|
{ AArch64_FMUL_ZPZI_H_ZERO, AArch64_FMUL_ZPmI_H },
|
||
|
|
{ AArch64_FMUL_ZPZI_S_UNDEF, AArch64_FMUL_ZPmI_S },
|
||
|
|
{ AArch64_FMUL_ZPZI_S_ZERO, AArch64_FMUL_ZPmI_S },
|
||
|
|
{ AArch64_FMUL_ZPZZ_D_UNDEF, AArch64_FMUL_ZPmZ_D },
|
||
|
|
{ AArch64_FMUL_ZPZZ_D_ZERO, AArch64_FMUL_ZPmZ_D },
|
||
|
|
{ AArch64_FMUL_ZPZZ_H_UNDEF, AArch64_FMUL_ZPmZ_H },
|
||
|
|
{ AArch64_FMUL_ZPZZ_H_ZERO, AArch64_FMUL_ZPmZ_H },
|
||
|
|
{ AArch64_FMUL_ZPZZ_S_UNDEF, AArch64_FMUL_ZPmZ_S },
|
||
|
|
{ AArch64_FMUL_ZPZZ_S_ZERO, AArch64_FMUL_ZPmZ_S },
|
||
|
|
{ AArch64_FNEG_ZPmZ_D_UNDEF, AArch64_FNEG_ZPmZ_D },
|
||
|
|
{ AArch64_FNEG_ZPmZ_H_UNDEF, AArch64_FNEG_ZPmZ_H },
|
||
|
|
{ AArch64_FNEG_ZPmZ_S_UNDEF, AArch64_FNEG_ZPmZ_S },
|
||
|
|
{ AArch64_FNMLA_ZPZZZ_D_UNDEF, AArch64_FNMLA_ZPmZZ_D },
|
||
|
|
{ AArch64_FNMLA_ZPZZZ_H_UNDEF, AArch64_FNMLA_ZPmZZ_H },
|
||
|
|
{ AArch64_FNMLA_ZPZZZ_S_UNDEF, AArch64_FNMLA_ZPmZZ_S },
|
||
|
|
{ AArch64_FNMLS_ZPZZZ_D_UNDEF, AArch64_FNMLS_ZPmZZ_D },
|
||
|
|
{ AArch64_FNMLS_ZPZZZ_H_UNDEF, AArch64_FNMLS_ZPmZZ_H },
|
||
|
|
{ AArch64_FNMLS_ZPZZZ_S_UNDEF, AArch64_FNMLS_ZPmZZ_S },
|
||
|
|
{ AArch64_FRECPX_ZPmZ_D_UNDEF, AArch64_FRECPX_ZPmZ_D },
|
||
|
|
{ AArch64_FRECPX_ZPmZ_H_UNDEF, AArch64_FRECPX_ZPmZ_H },
|
||
|
|
{ AArch64_FRECPX_ZPmZ_S_UNDEF, AArch64_FRECPX_ZPmZ_S },
|
||
|
|
{ AArch64_FRINTA_ZPmZ_D_UNDEF, AArch64_FRINTA_ZPmZ_D },
|
||
|
|
{ AArch64_FRINTA_ZPmZ_H_UNDEF, AArch64_FRINTA_ZPmZ_H },
|
||
|
|
{ AArch64_FRINTA_ZPmZ_S_UNDEF, AArch64_FRINTA_ZPmZ_S },
|
||
|
|
{ AArch64_FRINTI_ZPmZ_D_UNDEF, AArch64_FRINTI_ZPmZ_D },
|
||
|
|
{ AArch64_FRINTI_ZPmZ_H_UNDEF, AArch64_FRINTI_ZPmZ_H },
|
||
|
|
{ AArch64_FRINTI_ZPmZ_S_UNDEF, AArch64_FRINTI_ZPmZ_S },
|
||
|
|
{ AArch64_FRINTM_ZPmZ_D_UNDEF, AArch64_FRINTM_ZPmZ_D },
|
||
|
|
{ AArch64_FRINTM_ZPmZ_H_UNDEF, AArch64_FRINTM_ZPmZ_H },
|
||
|
|
{ AArch64_FRINTM_ZPmZ_S_UNDEF, AArch64_FRINTM_ZPmZ_S },
|
||
|
|
{ AArch64_FRINTN_ZPmZ_D_UNDEF, AArch64_FRINTN_ZPmZ_D },
|
||
|
|
{ AArch64_FRINTN_ZPmZ_H_UNDEF, AArch64_FRINTN_ZPmZ_H },
|
||
|
|
{ AArch64_FRINTN_ZPmZ_S_UNDEF, AArch64_FRINTN_ZPmZ_S },
|
||
|
|
{ AArch64_FRINTP_ZPmZ_D_UNDEF, AArch64_FRINTP_ZPmZ_D },
|
||
|
|
{ AArch64_FRINTP_ZPmZ_H_UNDEF, AArch64_FRINTP_ZPmZ_H },
|
||
|
|
{ AArch64_FRINTP_ZPmZ_S_UNDEF, AArch64_FRINTP_ZPmZ_S },
|
||
|
|
{ AArch64_FRINTX_ZPmZ_D_UNDEF, AArch64_FRINTX_ZPmZ_D },
|
||
|
|
{ AArch64_FRINTX_ZPmZ_H_UNDEF, AArch64_FRINTX_ZPmZ_H },
|
||
|
|
{ AArch64_FRINTX_ZPmZ_S_UNDEF, AArch64_FRINTX_ZPmZ_S },
|
||
|
|
{ AArch64_FRINTZ_ZPmZ_D_UNDEF, AArch64_FRINTZ_ZPmZ_D },
|
||
|
|
{ AArch64_FRINTZ_ZPmZ_H_UNDEF, AArch64_FRINTZ_ZPmZ_H },
|
||
|
|
{ AArch64_FRINTZ_ZPmZ_S_UNDEF, AArch64_FRINTZ_ZPmZ_S },
|
||
|
|
{ AArch64_FSQRT_ZPmZ_D_UNDEF, AArch64_FSQRT_ZPmZ_D },
|
||
|
|
{ AArch64_FSQRT_ZPmZ_H_UNDEF, AArch64_FSQRT_ZPmZ_H },
|
||
|
|
{ AArch64_FSQRT_ZPmZ_S_UNDEF, AArch64_FSQRT_ZPmZ_S },
|
||
|
|
{ AArch64_FSUBR_ZPZI_D_UNDEF, AArch64_FSUBR_ZPmI_D },
|
||
|
|
{ AArch64_FSUBR_ZPZI_D_ZERO, AArch64_FSUBR_ZPmI_D },
|
||
|
|
{ AArch64_FSUBR_ZPZI_H_UNDEF, AArch64_FSUBR_ZPmI_H },
|
||
|
|
{ AArch64_FSUBR_ZPZI_H_ZERO, AArch64_FSUBR_ZPmI_H },
|
||
|
|
{ AArch64_FSUBR_ZPZI_S_UNDEF, AArch64_FSUBR_ZPmI_S },
|
||
|
|
{ AArch64_FSUBR_ZPZI_S_ZERO, AArch64_FSUBR_ZPmI_S },
|
||
|
|
{ AArch64_FSUBR_ZPZZ_D_ZERO, AArch64_FSUBR_ZPmZ_D },
|
||
|
|
{ AArch64_FSUBR_ZPZZ_H_ZERO, AArch64_FSUBR_ZPmZ_H },
|
||
|
|
{ AArch64_FSUBR_ZPZZ_S_ZERO, AArch64_FSUBR_ZPmZ_S },
|
||
|
|
{ AArch64_FSUB_ZPZI_D_UNDEF, AArch64_FSUB_ZPmI_D },
|
||
|
|
{ AArch64_FSUB_ZPZI_D_ZERO, AArch64_FSUB_ZPmI_D },
|
||
|
|
{ AArch64_FSUB_ZPZI_H_UNDEF, AArch64_FSUB_ZPmI_H },
|
||
|
|
{ AArch64_FSUB_ZPZI_H_ZERO, AArch64_FSUB_ZPmI_H },
|
||
|
|
{ AArch64_FSUB_ZPZI_S_UNDEF, AArch64_FSUB_ZPmI_S },
|
||
|
|
{ AArch64_FSUB_ZPZI_S_ZERO, AArch64_FSUB_ZPmI_S },
|
||
|
|
{ AArch64_FSUB_ZPZZ_D_UNDEF, AArch64_FSUB_ZPmZ_D },
|
||
|
|
{ AArch64_FSUB_ZPZZ_D_ZERO, AArch64_FSUB_ZPmZ_D },
|
||
|
|
{ AArch64_FSUB_ZPZZ_H_UNDEF, AArch64_FSUB_ZPmZ_H },
|
||
|
|
{ AArch64_FSUB_ZPZZ_H_ZERO, AArch64_FSUB_ZPmZ_H },
|
||
|
|
{ AArch64_FSUB_ZPZZ_S_UNDEF, AArch64_FSUB_ZPmZ_S },
|
||
|
|
{ AArch64_FSUB_ZPZZ_S_ZERO, AArch64_FSUB_ZPmZ_S },
|
||
|
|
{ AArch64_LSL_ZPZI_B_UNDEF, AArch64_LSL_ZPmI_B },
|
||
|
|
{ AArch64_LSL_ZPZI_B_ZERO, AArch64_LSL_ZPmI_B },
|
||
|
|
{ AArch64_LSL_ZPZI_D_UNDEF, AArch64_LSL_ZPmI_D },
|
||
|
|
{ AArch64_LSL_ZPZI_D_ZERO, AArch64_LSL_ZPmI_D },
|
||
|
|
{ AArch64_LSL_ZPZI_H_UNDEF, AArch64_LSL_ZPmI_H },
|
||
|
|
{ AArch64_LSL_ZPZI_H_ZERO, AArch64_LSL_ZPmI_H },
|
||
|
|
{ AArch64_LSL_ZPZI_S_UNDEF, AArch64_LSL_ZPmI_S },
|
||
|
|
{ AArch64_LSL_ZPZI_S_ZERO, AArch64_LSL_ZPmI_S },
|
||
|
|
{ AArch64_LSL_ZPZZ_B_UNDEF, AArch64_LSL_ZPmZ_B },
|
||
|
|
{ AArch64_LSL_ZPZZ_B_ZERO, AArch64_LSL_ZPmZ_B },
|
||
|
|
{ AArch64_LSL_ZPZZ_D_UNDEF, AArch64_LSL_ZPmZ_D },
|
||
|
|
{ AArch64_LSL_ZPZZ_D_ZERO, AArch64_LSL_ZPmZ_D },
|
||
|
|
{ AArch64_LSL_ZPZZ_H_UNDEF, AArch64_LSL_ZPmZ_H },
|
||
|
|
{ AArch64_LSL_ZPZZ_H_ZERO, AArch64_LSL_ZPmZ_H },
|
||
|
|
{ AArch64_LSL_ZPZZ_S_UNDEF, AArch64_LSL_ZPmZ_S },
|
||
|
|
{ AArch64_LSL_ZPZZ_S_ZERO, AArch64_LSL_ZPmZ_S },
|
||
|
|
{ AArch64_LSR_ZPZI_B_UNDEF, AArch64_LSR_ZPmI_B },
|
||
|
|
{ AArch64_LSR_ZPZI_B_ZERO, AArch64_LSR_ZPmI_B },
|
||
|
|
{ AArch64_LSR_ZPZI_D_UNDEF, AArch64_LSR_ZPmI_D },
|
||
|
|
{ AArch64_LSR_ZPZI_D_ZERO, AArch64_LSR_ZPmI_D },
|
||
|
|
{ AArch64_LSR_ZPZI_H_UNDEF, AArch64_LSR_ZPmI_H },
|
||
|
|
{ AArch64_LSR_ZPZI_H_ZERO, AArch64_LSR_ZPmI_H },
|
||
|
|
{ AArch64_LSR_ZPZI_S_UNDEF, AArch64_LSR_ZPmI_S },
|
||
|
|
{ AArch64_LSR_ZPZI_S_ZERO, AArch64_LSR_ZPmI_S },
|
||
|
|
{ AArch64_LSR_ZPZZ_B_UNDEF, AArch64_LSR_ZPmZ_B },
|
||
|
|
{ AArch64_LSR_ZPZZ_B_ZERO, AArch64_LSR_ZPmZ_B },
|
||
|
|
{ AArch64_LSR_ZPZZ_D_UNDEF, AArch64_LSR_ZPmZ_D },
|
||
|
|
{ AArch64_LSR_ZPZZ_D_ZERO, AArch64_LSR_ZPmZ_D },
|
||
|
|
{ AArch64_LSR_ZPZZ_H_UNDEF, AArch64_LSR_ZPmZ_H },
|
||
|
|
{ AArch64_LSR_ZPZZ_H_ZERO, AArch64_LSR_ZPmZ_H },
|
||
|
|
{ AArch64_LSR_ZPZZ_S_UNDEF, AArch64_LSR_ZPmZ_S },
|
||
|
|
{ AArch64_LSR_ZPZZ_S_ZERO, AArch64_LSR_ZPmZ_S },
|
||
|
|
{ AArch64_MLA_ZPZZZ_B_UNDEF, AArch64_MLA_ZPmZZ_B },
|
||
|
|
{ AArch64_MLA_ZPZZZ_D_UNDEF, AArch64_MLA_ZPmZZ_D },
|
||
|
|
{ AArch64_MLA_ZPZZZ_H_UNDEF, AArch64_MLA_ZPmZZ_H },
|
||
|
|
{ AArch64_MLA_ZPZZZ_S_UNDEF, AArch64_MLA_ZPmZZ_S },
|
||
|
|
{ AArch64_MLS_ZPZZZ_B_UNDEF, AArch64_MLS_ZPmZZ_B },
|
||
|
|
{ AArch64_MLS_ZPZZZ_D_UNDEF, AArch64_MLS_ZPmZZ_D },
|
||
|
|
{ AArch64_MLS_ZPZZZ_H_UNDEF, AArch64_MLS_ZPmZZ_H },
|
||
|
|
{ AArch64_MLS_ZPZZZ_S_UNDEF, AArch64_MLS_ZPmZZ_S },
|
||
|
|
{ AArch64_MUL_ZPZZ_B_UNDEF, AArch64_MUL_ZPmZ_B },
|
||
|
|
{ AArch64_MUL_ZPZZ_D_UNDEF, AArch64_MUL_ZPmZ_D },
|
||
|
|
{ AArch64_MUL_ZPZZ_H_UNDEF, AArch64_MUL_ZPmZ_H },
|
||
|
|
{ AArch64_MUL_ZPZZ_S_UNDEF, AArch64_MUL_ZPmZ_S },
|
||
|
|
{ AArch64_NEG_ZPmZ_B_UNDEF, AArch64_NEG_ZPmZ_B },
|
||
|
|
{ AArch64_NEG_ZPmZ_D_UNDEF, AArch64_NEG_ZPmZ_D },
|
||
|
|
{ AArch64_NEG_ZPmZ_H_UNDEF, AArch64_NEG_ZPmZ_H },
|
||
|
|
{ AArch64_NEG_ZPmZ_S_UNDEF, AArch64_NEG_ZPmZ_S },
|
||
|
|
{ AArch64_NOT_ZPmZ_B_UNDEF, AArch64_NOT_ZPmZ_B },
|
||
|
|
{ AArch64_NOT_ZPmZ_D_UNDEF, AArch64_NOT_ZPmZ_D },
|
||
|
|
{ AArch64_NOT_ZPmZ_H_UNDEF, AArch64_NOT_ZPmZ_H },
|
||
|
|
{ AArch64_NOT_ZPmZ_S_UNDEF, AArch64_NOT_ZPmZ_S },
|
||
|
|
{ AArch64_ORR_ZPZZ_B_ZERO, AArch64_ORR_ZPmZ_B },
|
||
|
|
{ AArch64_ORR_ZPZZ_D_ZERO, AArch64_ORR_ZPmZ_D },
|
||
|
|
{ AArch64_ORR_ZPZZ_H_ZERO, AArch64_ORR_ZPmZ_H },
|
||
|
|
{ AArch64_ORR_ZPZZ_S_ZERO, AArch64_ORR_ZPmZ_S },
|
||
|
|
{ AArch64_SABD_ZPZZ_B_UNDEF, AArch64_SABD_ZPmZ_B },
|
||
|
|
{ AArch64_SABD_ZPZZ_D_UNDEF, AArch64_SABD_ZPmZ_D },
|
||
|
|
{ AArch64_SABD_ZPZZ_H_UNDEF, AArch64_SABD_ZPmZ_H },
|
||
|
|
{ AArch64_SABD_ZPZZ_S_UNDEF, AArch64_SABD_ZPmZ_S },
|
||
|
|
{ AArch64_SCVTF_ZPmZ_DtoD_UNDEF, AArch64_SCVTF_ZPmZ_DtoD },
|
||
|
|
{ AArch64_SCVTF_ZPmZ_DtoH_UNDEF, AArch64_SCVTF_ZPmZ_DtoH },
|
||
|
|
{ AArch64_SCVTF_ZPmZ_DtoS_UNDEF, AArch64_SCVTF_ZPmZ_DtoS },
|
||
|
|
{ AArch64_SCVTF_ZPmZ_HtoH_UNDEF, AArch64_SCVTF_ZPmZ_HtoH },
|
||
|
|
{ AArch64_SCVTF_ZPmZ_StoD_UNDEF, AArch64_SCVTF_ZPmZ_StoD },
|
||
|
|
{ AArch64_SCVTF_ZPmZ_StoH_UNDEF, AArch64_SCVTF_ZPmZ_StoH },
|
||
|
|
{ AArch64_SCVTF_ZPmZ_StoS_UNDEF, AArch64_SCVTF_ZPmZ_StoS },
|
||
|
|
{ AArch64_SDIV_ZPZZ_D_UNDEF, AArch64_SDIV_ZPmZ_D },
|
||
|
|
{ AArch64_SDIV_ZPZZ_S_UNDEF, AArch64_SDIV_ZPmZ_S },
|
||
|
|
{ AArch64_SMAX_ZPZZ_B_UNDEF, AArch64_SMAX_ZPmZ_B },
|
||
|
|
{ AArch64_SMAX_ZPZZ_D_UNDEF, AArch64_SMAX_ZPmZ_D },
|
||
|
|
{ AArch64_SMAX_ZPZZ_H_UNDEF, AArch64_SMAX_ZPmZ_H },
|
||
|
|
{ AArch64_SMAX_ZPZZ_S_UNDEF, AArch64_SMAX_ZPmZ_S },
|
||
|
|
{ AArch64_SMIN_ZPZZ_B_UNDEF, AArch64_SMIN_ZPmZ_B },
|
||
|
|
{ AArch64_SMIN_ZPZZ_D_UNDEF, AArch64_SMIN_ZPmZ_D },
|
||
|
|
{ AArch64_SMIN_ZPZZ_H_UNDEF, AArch64_SMIN_ZPmZ_H },
|
||
|
|
{ AArch64_SMIN_ZPZZ_S_UNDEF, AArch64_SMIN_ZPmZ_S },
|
||
|
|
{ AArch64_SMULH_ZPZZ_B_UNDEF, AArch64_SMULH_ZPmZ_B },
|
||
|
|
{ AArch64_SMULH_ZPZZ_D_UNDEF, AArch64_SMULH_ZPmZ_D },
|
||
|
|
{ AArch64_SMULH_ZPZZ_H_UNDEF, AArch64_SMULH_ZPmZ_H },
|
||
|
|
{ AArch64_SMULH_ZPZZ_S_UNDEF, AArch64_SMULH_ZPmZ_S },
|
||
|
|
{ AArch64_SQABS_ZPmZ_B_UNDEF, AArch64_SQABS_ZPmZ_B },
|
||
|
|
{ AArch64_SQABS_ZPmZ_D_UNDEF, AArch64_SQABS_ZPmZ_D },
|
||
|
|
{ AArch64_SQABS_ZPmZ_H_UNDEF, AArch64_SQABS_ZPmZ_H },
|
||
|
|
{ AArch64_SQABS_ZPmZ_S_UNDEF, AArch64_SQABS_ZPmZ_S },
|
||
|
|
{ AArch64_SQNEG_ZPmZ_B_UNDEF, AArch64_SQNEG_ZPmZ_B },
|
||
|
|
{ AArch64_SQNEG_ZPmZ_D_UNDEF, AArch64_SQNEG_ZPmZ_D },
|
||
|
|
{ AArch64_SQNEG_ZPmZ_H_UNDEF, AArch64_SQNEG_ZPmZ_H },
|
||
|
|
{ AArch64_SQNEG_ZPmZ_S_UNDEF, AArch64_SQNEG_ZPmZ_S },
|
||
|
|
{ AArch64_SQRSHL_ZPZZ_B_UNDEF, AArch64_SQRSHL_ZPmZ_B },
|
||
|
|
{ AArch64_SQRSHL_ZPZZ_D_UNDEF, AArch64_SQRSHL_ZPmZ_D },
|
||
|
|
{ AArch64_SQRSHL_ZPZZ_H_UNDEF, AArch64_SQRSHL_ZPmZ_H },
|
||
|
|
{ AArch64_SQRSHL_ZPZZ_S_UNDEF, AArch64_SQRSHL_ZPmZ_S },
|
||
|
|
{ AArch64_SQSHLU_ZPZI_B_ZERO, AArch64_SQSHLU_ZPmI_B },
|
||
|
|
{ AArch64_SQSHLU_ZPZI_D_ZERO, AArch64_SQSHLU_ZPmI_D },
|
||
|
|
{ AArch64_SQSHLU_ZPZI_H_ZERO, AArch64_SQSHLU_ZPmI_H },
|
||
|
|
{ AArch64_SQSHLU_ZPZI_S_ZERO, AArch64_SQSHLU_ZPmI_S },
|
||
|
|
{ AArch64_SQSHL_ZPZI_B_ZERO, AArch64_SQSHL_ZPmI_B },
|
||
|
|
{ AArch64_SQSHL_ZPZI_D_ZERO, AArch64_SQSHL_ZPmI_D },
|
||
|
|
{ AArch64_SQSHL_ZPZI_H_ZERO, AArch64_SQSHL_ZPmI_H },
|
||
|
|
{ AArch64_SQSHL_ZPZI_S_ZERO, AArch64_SQSHL_ZPmI_S },
|
||
|
|
{ AArch64_SQSHL_ZPZZ_B_UNDEF, AArch64_SQSHL_ZPmZ_B },
|
||
|
|
{ AArch64_SQSHL_ZPZZ_D_UNDEF, AArch64_SQSHL_ZPmZ_D },
|
||
|
|
{ AArch64_SQSHL_ZPZZ_H_UNDEF, AArch64_SQSHL_ZPmZ_H },
|
||
|
|
{ AArch64_SQSHL_ZPZZ_S_UNDEF, AArch64_SQSHL_ZPmZ_S },
|
||
|
|
{ AArch64_SRSHL_ZPZZ_B_UNDEF, AArch64_SRSHL_ZPmZ_B },
|
||
|
|
{ AArch64_SRSHL_ZPZZ_D_UNDEF, AArch64_SRSHL_ZPmZ_D },
|
||
|
|
{ AArch64_SRSHL_ZPZZ_H_UNDEF, AArch64_SRSHL_ZPmZ_H },
|
||
|
|
{ AArch64_SRSHL_ZPZZ_S_UNDEF, AArch64_SRSHL_ZPmZ_S },
|
||
|
|
{ AArch64_SRSHR_ZPZI_B_ZERO, AArch64_SRSHR_ZPmI_B },
|
||
|
|
{ AArch64_SRSHR_ZPZI_D_ZERO, AArch64_SRSHR_ZPmI_D },
|
||
|
|
{ AArch64_SRSHR_ZPZI_H_ZERO, AArch64_SRSHR_ZPmI_H },
|
||
|
|
{ AArch64_SRSHR_ZPZI_S_ZERO, AArch64_SRSHR_ZPmI_S },
|
||
|
|
{ AArch64_SUBR_ZPZZ_B_ZERO, AArch64_SUBR_ZPmZ_B },
|
||
|
|
{ AArch64_SUBR_ZPZZ_D_ZERO, AArch64_SUBR_ZPmZ_D },
|
||
|
|
{ AArch64_SUBR_ZPZZ_H_ZERO, AArch64_SUBR_ZPmZ_H },
|
||
|
|
{ AArch64_SUBR_ZPZZ_S_ZERO, AArch64_SUBR_ZPmZ_S },
|
||
|
|
{ AArch64_SUB_ZPZZ_B_ZERO, AArch64_SUB_ZPmZ_B },
|
||
|
|
{ AArch64_SUB_ZPZZ_D_ZERO, AArch64_SUB_ZPmZ_D },
|
||
|
|
{ AArch64_SUB_ZPZZ_H_ZERO, AArch64_SUB_ZPmZ_H },
|
||
|
|
{ AArch64_SUB_ZPZZ_S_ZERO, AArch64_SUB_ZPmZ_S },
|
||
|
|
{ AArch64_SXTB_ZPmZ_D_UNDEF, AArch64_SXTB_ZPmZ_D },
|
||
|
|
{ AArch64_SXTB_ZPmZ_H_UNDEF, AArch64_SXTB_ZPmZ_H },
|
||
|
|
{ AArch64_SXTB_ZPmZ_S_UNDEF, AArch64_SXTB_ZPmZ_S },
|
||
|
|
{ AArch64_SXTH_ZPmZ_D_UNDEF, AArch64_SXTH_ZPmZ_D },
|
||
|
|
{ AArch64_SXTH_ZPmZ_S_UNDEF, AArch64_SXTH_ZPmZ_S },
|
||
|
|
{ AArch64_SXTW_ZPmZ_D_UNDEF, AArch64_SXTW_ZPmZ_D },
|
||
|
|
{ AArch64_UABD_ZPZZ_B_UNDEF, AArch64_UABD_ZPmZ_B },
|
||
|
|
{ AArch64_UABD_ZPZZ_D_UNDEF, AArch64_UABD_ZPmZ_D },
|
||
|
|
{ AArch64_UABD_ZPZZ_H_UNDEF, AArch64_UABD_ZPmZ_H },
|
||
|
|
{ AArch64_UABD_ZPZZ_S_UNDEF, AArch64_UABD_ZPmZ_S },
|
||
|
|
{ AArch64_UCVTF_ZPmZ_DtoD_UNDEF, AArch64_UCVTF_ZPmZ_DtoD },
|
||
|
|
{ AArch64_UCVTF_ZPmZ_DtoH_UNDEF, AArch64_UCVTF_ZPmZ_DtoH },
|
||
|
|
{ AArch64_UCVTF_ZPmZ_DtoS_UNDEF, AArch64_UCVTF_ZPmZ_DtoS },
|
||
|
|
{ AArch64_UCVTF_ZPmZ_HtoH_UNDEF, AArch64_UCVTF_ZPmZ_HtoH },
|
||
|
|
{ AArch64_UCVTF_ZPmZ_StoD_UNDEF, AArch64_UCVTF_ZPmZ_StoD },
|
||
|
|
{ AArch64_UCVTF_ZPmZ_StoH_UNDEF, AArch64_UCVTF_ZPmZ_StoH },
|
||
|
|
{ AArch64_UCVTF_ZPmZ_StoS_UNDEF, AArch64_UCVTF_ZPmZ_StoS },
|
||
|
|
{ AArch64_UDIV_ZPZZ_D_UNDEF, AArch64_UDIV_ZPmZ_D },
|
||
|
|
{ AArch64_UDIV_ZPZZ_S_UNDEF, AArch64_UDIV_ZPmZ_S },
|
||
|
|
{ AArch64_UMAX_ZPZZ_B_UNDEF, AArch64_UMAX_ZPmZ_B },
|
||
|
|
{ AArch64_UMAX_ZPZZ_D_UNDEF, AArch64_UMAX_ZPmZ_D },
|
||
|
|
{ AArch64_UMAX_ZPZZ_H_UNDEF, AArch64_UMAX_ZPmZ_H },
|
||
|
|
{ AArch64_UMAX_ZPZZ_S_UNDEF, AArch64_UMAX_ZPmZ_S },
|
||
|
|
{ AArch64_UMIN_ZPZZ_B_UNDEF, AArch64_UMIN_ZPmZ_B },
|
||
|
|
{ AArch64_UMIN_ZPZZ_D_UNDEF, AArch64_UMIN_ZPmZ_D },
|
||
|
|
{ AArch64_UMIN_ZPZZ_H_UNDEF, AArch64_UMIN_ZPmZ_H },
|
||
|
|
{ AArch64_UMIN_ZPZZ_S_UNDEF, AArch64_UMIN_ZPmZ_S },
|
||
|
|
{ AArch64_UMULH_ZPZZ_B_UNDEF, AArch64_UMULH_ZPmZ_B },
|
||
|
|
{ AArch64_UMULH_ZPZZ_D_UNDEF, AArch64_UMULH_ZPmZ_D },
|
||
|
|
{ AArch64_UMULH_ZPZZ_H_UNDEF, AArch64_UMULH_ZPmZ_H },
|
||
|
|
{ AArch64_UMULH_ZPZZ_S_UNDEF, AArch64_UMULH_ZPmZ_S },
|
||
|
|
{ AArch64_UQRSHL_ZPZZ_B_UNDEF, AArch64_UQRSHL_ZPmZ_B },
|
||
|
|
{ AArch64_UQRSHL_ZPZZ_D_UNDEF, AArch64_UQRSHL_ZPmZ_D },
|
||
|
|
{ AArch64_UQRSHL_ZPZZ_H_UNDEF, AArch64_UQRSHL_ZPmZ_H },
|
||
|
|
{ AArch64_UQRSHL_ZPZZ_S_UNDEF, AArch64_UQRSHL_ZPmZ_S },
|
||
|
|
{ AArch64_UQSHL_ZPZI_B_ZERO, AArch64_UQSHL_ZPmI_B },
|
||
|
|
{ AArch64_UQSHL_ZPZI_D_ZERO, AArch64_UQSHL_ZPmI_D },
|
||
|
|
{ AArch64_UQSHL_ZPZI_H_ZERO, AArch64_UQSHL_ZPmI_H },
|
||
|
|
{ AArch64_UQSHL_ZPZI_S_ZERO, AArch64_UQSHL_ZPmI_S },
|
||
|
|
{ AArch64_UQSHL_ZPZZ_B_UNDEF, AArch64_UQSHL_ZPmZ_B },
|
||
|
|
{ AArch64_UQSHL_ZPZZ_D_UNDEF, AArch64_UQSHL_ZPmZ_D },
|
||
|
|
{ AArch64_UQSHL_ZPZZ_H_UNDEF, AArch64_UQSHL_ZPmZ_H },
|
||
|
|
{ AArch64_UQSHL_ZPZZ_S_UNDEF, AArch64_UQSHL_ZPmZ_S },
|
||
|
|
{ AArch64_URECPE_ZPmZ_S_UNDEF, AArch64_URECPE_ZPmZ_S },
|
||
|
|
{ AArch64_URSHL_ZPZZ_B_UNDEF, AArch64_URSHL_ZPmZ_B },
|
||
|
|
{ AArch64_URSHL_ZPZZ_D_UNDEF, AArch64_URSHL_ZPmZ_D },
|
||
|
|
{ AArch64_URSHL_ZPZZ_H_UNDEF, AArch64_URSHL_ZPmZ_H },
|
||
|
|
{ AArch64_URSHL_ZPZZ_S_UNDEF, AArch64_URSHL_ZPmZ_S },
|
||
|
|
{ AArch64_URSHR_ZPZI_B_ZERO, AArch64_URSHR_ZPmI_B },
|
||
|
|
{ AArch64_URSHR_ZPZI_D_ZERO, AArch64_URSHR_ZPmI_D },
|
||
|
|
{ AArch64_URSHR_ZPZI_H_ZERO, AArch64_URSHR_ZPmI_H },
|
||
|
|
{ AArch64_URSHR_ZPZI_S_ZERO, AArch64_URSHR_ZPmI_S },
|
||
|
|
{ AArch64_URSQRTE_ZPmZ_S_UNDEF, AArch64_URSQRTE_ZPmZ_S },
|
||
|
|
{ AArch64_UXTB_ZPmZ_D_UNDEF, AArch64_UXTB_ZPmZ_D },
|
||
|
|
{ AArch64_UXTB_ZPmZ_H_UNDEF, AArch64_UXTB_ZPmZ_H },
|
||
|
|
{ AArch64_UXTB_ZPmZ_S_UNDEF, AArch64_UXTB_ZPmZ_S },
|
||
|
|
{ AArch64_UXTH_ZPmZ_D_UNDEF, AArch64_UXTH_ZPmZ_D },
|
||
|
|
{ AArch64_UXTH_ZPmZ_S_UNDEF, AArch64_UXTH_ZPmZ_S },
|
||
|
|
{ AArch64_UXTW_ZPmZ_D_UNDEF, AArch64_UXTW_ZPmZ_D },
|
||
|
|
}; // End of getSVEPseudoMapTable
|
||
|
|
|
||
|
|
unsigned mid;
|
||
|
|
unsigned start = 0;
|
||
|
|
unsigned end = 434;
|
||
|
|
while (start < end) {
|
||
|
|
mid = start + (end - start) / 2;
|
||
|
|
if (Opcode == getSVEPseudoMapTable[mid][0]) {
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
if (Opcode < getSVEPseudoMapTable[mid][0])
|
||
|
|
end = mid;
|
||
|
|
else
|
||
|
|
start = mid + 1;
|
||
|
|
}
|
||
|
|
if (start == end)
|
||
|
|
return -1; // Instruction doesn't exist in this table.
|
||
|
|
|
||
|
|
return getSVEPseudoMapTable[mid][1];
|
||
|
|
}
|
||
|
|
|
||
|
|
// getSVERevInstr
|
||
|
|
int getSVERevInstr(uint16_t Opcode) {
|
||
|
|
static const uint16_t getSVERevInstrTable[][2] = {
|
||
|
|
{ AArch64_ASR_ZPmZ_B, AArch64_ASRR_ZPmZ_B },
|
||
|
|
{ AArch64_ASR_ZPmZ_D, AArch64_ASRR_ZPmZ_D },
|
||
|
|
{ AArch64_ASR_ZPmZ_H, AArch64_ASRR_ZPmZ_H },
|
||
|
|
{ AArch64_ASR_ZPmZ_S, AArch64_ASRR_ZPmZ_S },
|
||
|
|
{ AArch64_FDIV_ZPmZ_D, AArch64_FDIVR_ZPmZ_D },
|
||
|
|
{ AArch64_FDIV_ZPmZ_H, AArch64_FDIVR_ZPmZ_H },
|
||
|
|
{ AArch64_FDIV_ZPmZ_S, AArch64_FDIVR_ZPmZ_S },
|
||
|
|
{ AArch64_FMLA_ZPmZZ_D, AArch64_FMAD_ZPmZZ_D },
|
||
|
|
{ AArch64_FMLA_ZPmZZ_H, AArch64_FMAD_ZPmZZ_H },
|
||
|
|
{ AArch64_FMLA_ZPmZZ_S, AArch64_FMAD_ZPmZZ_S },
|
||
|
|
{ AArch64_FMLS_ZPmZZ_D, AArch64_FMSB_ZPmZZ_D },
|
||
|
|
{ AArch64_FMLS_ZPmZZ_H, AArch64_FMSB_ZPmZZ_H },
|
||
|
|
{ AArch64_FMLS_ZPmZZ_S, AArch64_FMSB_ZPmZZ_S },
|
||
|
|
{ AArch64_FNMLA_ZPmZZ_D, AArch64_FNMAD_ZPmZZ_D },
|
||
|
|
{ AArch64_FNMLA_ZPmZZ_H, AArch64_FNMAD_ZPmZZ_H },
|
||
|
|
{ AArch64_FNMLA_ZPmZZ_S, AArch64_FNMAD_ZPmZZ_S },
|
||
|
|
{ AArch64_FNMLS_ZPmZZ_D, AArch64_FNMSB_ZPmZZ_D },
|
||
|
|
{ AArch64_FNMLS_ZPmZZ_H, AArch64_FNMSB_ZPmZZ_H },
|
||
|
|
{ AArch64_FNMLS_ZPmZZ_S, AArch64_FNMSB_ZPmZZ_S },
|
||
|
|
{ AArch64_FSUB_ZPmZ_D, AArch64_FSUBR_ZPmZ_D },
|
||
|
|
{ AArch64_FSUB_ZPmZ_H, AArch64_FSUBR_ZPmZ_H },
|
||
|
|
{ AArch64_FSUB_ZPmZ_S, AArch64_FSUBR_ZPmZ_S },
|
||
|
|
{ AArch64_LSL_ZPmZ_B, AArch64_LSLR_ZPmZ_B },
|
||
|
|
{ AArch64_LSL_ZPmZ_D, AArch64_LSLR_ZPmZ_D },
|
||
|
|
{ AArch64_LSL_ZPmZ_H, AArch64_LSLR_ZPmZ_H },
|
||
|
|
{ AArch64_LSL_ZPmZ_S, AArch64_LSLR_ZPmZ_S },
|
||
|
|
{ AArch64_LSR_ZPmZ_B, AArch64_LSRR_ZPmZ_B },
|
||
|
|
{ AArch64_LSR_ZPmZ_D, AArch64_LSRR_ZPmZ_D },
|
||
|
|
{ AArch64_LSR_ZPmZ_H, AArch64_LSRR_ZPmZ_H },
|
||
|
|
{ AArch64_LSR_ZPmZ_S, AArch64_LSRR_ZPmZ_S },
|
||
|
|
{ AArch64_MLA_ZPmZZ_B, AArch64_MAD_ZPmZZ_B },
|
||
|
|
{ AArch64_MLA_ZPmZZ_D, AArch64_MAD_ZPmZZ_D },
|
||
|
|
{ AArch64_MLA_ZPmZZ_H, AArch64_MAD_ZPmZZ_H },
|
||
|
|
{ AArch64_MLA_ZPmZZ_S, AArch64_MAD_ZPmZZ_S },
|
||
|
|
{ AArch64_MLS_ZPmZZ_B, AArch64_MSB_ZPmZZ_B },
|
||
|
|
{ AArch64_MLS_ZPmZZ_D, AArch64_MSB_ZPmZZ_D },
|
||
|
|
{ AArch64_MLS_ZPmZZ_H, AArch64_MSB_ZPmZZ_H },
|
||
|
|
{ AArch64_MLS_ZPmZZ_S, AArch64_MSB_ZPmZZ_S },
|
||
|
|
{ AArch64_SDIV_ZPmZ_D, AArch64_SDIVR_ZPmZ_D },
|
||
|
|
{ AArch64_SDIV_ZPmZ_S, AArch64_SDIVR_ZPmZ_S },
|
||
|
|
{ AArch64_SQRSHL_ZPmZ_B, AArch64_SQRSHLR_ZPmZ_B },
|
||
|
|
{ AArch64_SQRSHL_ZPmZ_D, AArch64_SQRSHLR_ZPmZ_D },
|
||
|
|
{ AArch64_SQRSHL_ZPmZ_H, AArch64_SQRSHLR_ZPmZ_H },
|
||
|
|
{ AArch64_SQRSHL_ZPmZ_S, AArch64_SQRSHLR_ZPmZ_S },
|
||
|
|
{ AArch64_SQSHL_ZPmZ_B, AArch64_SQSHLR_ZPmZ_B },
|
||
|
|
{ AArch64_SQSHL_ZPmZ_D, AArch64_SQSHLR_ZPmZ_D },
|
||
|
|
{ AArch64_SQSHL_ZPmZ_H, AArch64_SQSHLR_ZPmZ_H },
|
||
|
|
{ AArch64_SQSHL_ZPmZ_S, AArch64_SQSHLR_ZPmZ_S },
|
||
|
|
{ AArch64_SRSHL_ZPmZ_B, AArch64_SRSHLR_ZPmZ_B },
|
||
|
|
{ AArch64_SRSHL_ZPmZ_D, AArch64_SRSHLR_ZPmZ_D },
|
||
|
|
{ AArch64_SRSHL_ZPmZ_H, AArch64_SRSHLR_ZPmZ_H },
|
||
|
|
{ AArch64_SRSHL_ZPmZ_S, AArch64_SRSHLR_ZPmZ_S },
|
||
|
|
{ AArch64_SUB_ZPmZ_B, AArch64_SUBR_ZPmZ_B },
|
||
|
|
{ AArch64_SUB_ZPmZ_D, AArch64_SUBR_ZPmZ_D },
|
||
|
|
{ AArch64_SUB_ZPmZ_H, AArch64_SUBR_ZPmZ_H },
|
||
|
|
{ AArch64_SUB_ZPmZ_S, AArch64_SUBR_ZPmZ_S },
|
||
|
|
{ AArch64_UDIV_ZPmZ_D, AArch64_UDIVR_ZPmZ_D },
|
||
|
|
{ AArch64_UDIV_ZPmZ_S, AArch64_UDIVR_ZPmZ_S },
|
||
|
|
{ AArch64_UQRSHL_ZPmZ_B, AArch64_UQRSHLR_ZPmZ_B },
|
||
|
|
{ AArch64_UQRSHL_ZPmZ_D, AArch64_UQRSHLR_ZPmZ_D },
|
||
|
|
{ AArch64_UQRSHL_ZPmZ_H, AArch64_UQRSHLR_ZPmZ_H },
|
||
|
|
{ AArch64_UQRSHL_ZPmZ_S, AArch64_UQRSHLR_ZPmZ_S },
|
||
|
|
{ AArch64_UQSHL_ZPmZ_B, AArch64_UQSHLR_ZPmZ_B },
|
||
|
|
{ AArch64_UQSHL_ZPmZ_D, AArch64_UQSHLR_ZPmZ_D },
|
||
|
|
{ AArch64_UQSHL_ZPmZ_H, AArch64_UQSHLR_ZPmZ_H },
|
||
|
|
{ AArch64_UQSHL_ZPmZ_S, AArch64_UQSHLR_ZPmZ_S },
|
||
|
|
{ AArch64_URSHL_ZPmZ_B, AArch64_URSHLR_ZPmZ_B },
|
||
|
|
{ AArch64_URSHL_ZPmZ_D, AArch64_URSHLR_ZPmZ_D },
|
||
|
|
{ AArch64_URSHL_ZPmZ_H, AArch64_URSHLR_ZPmZ_H },
|
||
|
|
{ AArch64_URSHL_ZPmZ_S, AArch64_URSHLR_ZPmZ_S },
|
||
|
|
}; // End of getSVERevInstrTable
|
||
|
|
|
||
|
|
unsigned mid;
|
||
|
|
unsigned start = 0;
|
||
|
|
unsigned end = 70;
|
||
|
|
while (start < end) {
|
||
|
|
mid = start + (end - start) / 2;
|
||
|
|
if (Opcode == getSVERevInstrTable[mid][0]) {
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
if (Opcode < getSVERevInstrTable[mid][0])
|
||
|
|
end = mid;
|
||
|
|
else
|
||
|
|
start = mid + 1;
|
||
|
|
}
|
||
|
|
if (start == end)
|
||
|
|
return -1; // Instruction doesn't exist in this table.
|
||
|
|
|
||
|
|
return getSVERevInstrTable[mid][1];
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif // GET_INSTRMAP_INFO
|
||
|
|
|