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XenonRecomp/thirdparty/capstone/tests/MC/AArch64/FP8_SME2/mla.s.yaml

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Initial Commit
2024-09-07 18:00:09 +06:00
test_cases:
-
input:
bytes: [ 0x00, 0x0c, 0x30, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1], z0.b, z0.b"
-
input:
bytes: [ 0xe7, 0x6f, 0x3f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 14:15], z31.b, z15.b"
-
input:
bytes: [ 0x00, 0x00, 0xc0, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1], z0.b, z0.b[0]"
-
input:
bytes: [ 0xef, 0xef, 0xcf, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 14:15], z31.b, z15.b[15]"
-
input:
bytes: [ 0x04, 0x08, 0x20, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, z0.b"
-
input:
bytes: [ 0x04, 0x08, 0x20, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, z0.b"
-
input:
bytes: [ 0xe7, 0x6b, 0x2f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx2], { z31.b, z0.b }, z15.b"
-
input:
bytes: [ 0xe7, 0x6b, 0x2f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx2], { z31.b, z0.b }, z15.b"
-
input:
bytes: [ 0x20, 0x08, 0xa0, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
-
input:
bytes: [ 0x20, 0x08, 0xa0, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
-
input:
bytes: [ 0xe3, 0x6b, 0xbe, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
-
input:
bytes: [ 0xe3, 0x6b, 0xbe, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
-
input:
bytes: [ 0x30, 0x10, 0x90, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, z0.b[0]"
-
input:
bytes: [ 0x30, 0x10, 0x90, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, z0.b[0]"
-
input:
bytes: [ 0xff, 0x7f, 0x9f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx2], { z30.b, z31.b }, z15.b[15]"
-
input:
bytes: [ 0xff, 0x7f, 0x9f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx2], { z30.b, z31.b }, z15.b[15]"
-
input:
bytes: [ 0x04, 0x08, 0x30, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, z0.b"
-
input:
bytes: [ 0x04, 0x08, 0x30, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, z0.b"
-
input:
bytes: [ 0xe7, 0x6b, 0x3f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
-
input:
bytes: [ 0xe7, 0x6b, 0x3f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
-
input:
bytes: [ 0x20, 0x08, 0xa1, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
-
input:
bytes: [ 0x20, 0x08, 0xa1, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
-
input:
bytes: [ 0xa3, 0x6b, 0xbd, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
-
input:
bytes: [ 0xa3, 0x6b, 0xbd, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
-
input:
bytes: [ 0x20, 0x90, 0x90, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, z0.b[0]"
-
input:
bytes: [ 0x20, 0x90, 0x90, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, z0.b[0]"
-
input:
bytes: [ 0xaf, 0xff, 0x9f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx4], { z28.b - z31.b }, z15.b[15]"
-
input:
bytes: [ 0xaf, 0xff, 0x9f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlal za.h[w11, 6:7, vgx4], { z28.b - z31.b }, z15.b[15]"
-
input:
bytes: [ 0x00, 0x04, 0x30, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3], z0.b, z0.b"
-
input:
bytes: [ 0xe3, 0x67, 0x3f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 12:15], z31.b, z15.b"
-
input:
bytes: [ 0x00, 0x00, 0x40, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3], z0.b, z0.b[0]"
-
input:
bytes: [ 0xe3, 0xff, 0x4f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 12:15], z31.b, z15.b[15]"
-
input:
bytes: [ 0x02, 0x00, 0x20, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b"
-
input:
bytes: [ 0x02, 0x00, 0x20, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b"
-
input:
bytes: [ 0xe3, 0x63, 0x2f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b"
-
input:
bytes: [ 0xe3, 0x63, 0x2f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b"
-
input:
bytes: [ 0x20, 0x00, 0xa0, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
-
input:
bytes: [ 0x20, 0x00, 0xa0, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
-
input:
bytes: [ 0xe1, 0x63, 0xbe, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
-
input:
bytes: [ 0xe1, 0x63, 0xbe, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
-
input:
bytes: [ 0x20, 0x00, 0x90, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]"
-
input:
bytes: [ 0x20, 0x00, 0x90, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]"
-
input:
bytes: [ 0xe7, 0x6f, 0x9f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]"
-
input:
bytes: [ 0xe7, 0x6f, 0x9f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]"
-
input:
bytes: [ 0x02, 0x00, 0x30, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b"
-
input:
bytes: [ 0x02, 0x00, 0x30, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b"
-
input:
bytes: [ 0xe3, 0x63, 0x3f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
-
input:
bytes: [ 0xe3, 0x63, 0x3f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
-
input:
bytes: [ 0x20, 0x00, 0xa1, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
-
input:
bytes: [ 0x20, 0x00, 0xa1, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
-
input:
bytes: [ 0xa1, 0x63, 0xbd, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
-
input:
bytes: [ 0xa1, 0x63, 0xbd, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
-
input:
bytes: [ 0x40, 0x80, 0x10, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]"
-
input:
bytes: [ 0x40, 0x80, 0x10, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]"
-
input:
bytes: [ 0xc7, 0xef, 0x1f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx4], { z28.b - z31.b }, z15.b[15]"
-
input:
bytes: [ 0xc7, 0xef, 0x1f, 0xc1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
expected:
insns:
-
asm_text: "fmlall za.s[w11, 4:7, vgx4], { z28.b - z31.b }, z15.b[15]"
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