XenonRecomp/thirdparty/capstone/tests/MC/AArch64/SME2/bfmla.s.yaml

test_cases:
  -
    input:
      bytes: [ 0x00, 0x1c, 0x60, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h"

  -
    input:
      bytes: [ 0x00, 0x1c, 0x60, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h"

  -
    input:
      bytes: [ 0x45, 0x5d, 0x65, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h"

  -
    input:
      bytes: [ 0x45, 0x5d, 0x65, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h"

  -
    input:
      bytes: [ 0xa7, 0x7d, 0x68, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z13.h, z14.h }, z8.h"

  -
    input:
      bytes: [ 0xa7, 0x7d, 0x68, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z13.h, z14.h }, z8.h"

  -
    input:
      bytes: [ 0xe7, 0x7f, 0x6f, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z31.h, z0.h }, z15.h"

  -
    input:
      bytes: [ 0xe7, 0x7f, 0x6f, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z31.h, z0.h }, z15.h"

  -
    input:
      bytes: [ 0x25, 0x1e, 0x60, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z17.h, z18.h }, z0.h"

  -
    input:
      bytes: [ 0x25, 0x1e, 0x60, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z17.h, z18.h }, z0.h"

  -
    input:
      bytes: [ 0x21, 0x1c, 0x6e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx2], { z1.h, z2.h }, z14.h"

  -
    input:
      bytes: [ 0x21, 0x1c, 0x6e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx2], { z1.h, z2.h }, z14.h"

  -
    input:
      bytes: [ 0x60, 0x5e, 0x64, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx2], { z19.h, z20.h }, z4.h"

  -
    input:
      bytes: [ 0x60, 0x5e, 0x64, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx2], { z19.h, z20.h }, z4.h"

  -
    input:
      bytes: [ 0x80, 0x1d, 0x62, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h"

  -
    input:
      bytes: [ 0x80, 0x1d, 0x62, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h"

  -
    input:
      bytes: [ 0x21, 0x5c, 0x6a, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx2], { z1.h, z2.h }, z10.h"

  -
    input:
      bytes: [ 0x21, 0x5c, 0x6a, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx2], { z1.h, z2.h }, z10.h"

  -
    input:
      bytes: [ 0xc5, 0x1e, 0x6e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h"

  -
    input:
      bytes: [ 0xc5, 0x1e, 0x6e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h"

  -
    input:
      bytes: [ 0x22, 0x7d, 0x61, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx2], { z9.h, z10.h }, z1.h"

  -
    input:
      bytes: [ 0x22, 0x7d, 0x61, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx2], { z9.h, z10.h }, z1.h"

  -
    input:
      bytes: [ 0x87, 0x3d, 0x6b, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h"

  -
    input:
      bytes: [ 0x87, 0x3d, 0x6b, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h"

  -
    input:
      bytes: [ 0x20, 0x10, 0x10, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]"

  -
    input:
      bytes: [ 0x20, 0x10, 0x10, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]"

  -
    input:
      bytes: [ 0x65, 0x55, 0x15, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h[2]"

  -
    input:
      bytes: [ 0x65, 0x55, 0x15, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h[2]"

  -
    input:
      bytes: [ 0xa7, 0x7d, 0x18, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z12.h, z13.h }, z8.h[6]"

  -
    input:
      bytes: [ 0xa7, 0x7d, 0x18, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z12.h, z13.h }, z8.h[6]"

  -
    input:
      bytes: [ 0xef, 0x7f, 0x1f, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z30.h, z31.h }, z15.h[7]"

  -
    input:
      bytes: [ 0xef, 0x7f, 0x1f, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z30.h, z31.h }, z15.h[7]"

  -
    input:
      bytes: [ 0x25, 0x1e, 0x10, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z16.h, z17.h }, z0.h[6]"

  -
    input:
      bytes: [ 0x25, 0x1e, 0x10, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z16.h, z17.h }, z0.h[6]"

  -
    input:
      bytes: [ 0x21, 0x14, 0x1e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx2], { z0.h, z1.h }, z14.h[2]"

  -
    input:
      bytes: [ 0x21, 0x14, 0x1e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx2], { z0.h, z1.h }, z14.h[2]"

  -
    input:
      bytes: [ 0x68, 0x56, 0x14, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx2], { z18.h, z19.h }, z4.h[3]"

  -
    input:
      bytes: [ 0x68, 0x56, 0x14, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx2], { z18.h, z19.h }, z4.h[3]"

  -
    input:
      bytes: [ 0xa0, 0x19, 0x12, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h[4]"

  -
    input:
      bytes: [ 0xa0, 0x19, 0x12, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h[4]"

  -
    input:
      bytes: [ 0x21, 0x58, 0x1a, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx2], { z0.h, z1.h }, z10.h[4]"

  -
    input:
      bytes: [ 0x21, 0x58, 0x1a, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx2], { z0.h, z1.h }, z10.h[4]"

  -
    input:
      bytes: [ 0xed, 0x1a, 0x1e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h[5]"

  -
    input:
      bytes: [ 0xed, 0x1a, 0x1e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h[5]"

  -
    input:
      bytes: [ 0x22, 0x75, 0x11, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx2], { z8.h, z9.h }, z1.h[2]"

  -
    input:
      bytes: [ 0x22, 0x75, 0x11, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx2], { z8.h, z9.h }, z1.h[2]"

  -
    input:
      bytes: [ 0xa7, 0x39, 0x1b, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h[4]"

  -
    input:
      bytes: [ 0xa7, 0x39, 0x1b, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h[4]"

  -
    input:
      bytes: [ 0x08, 0x10, 0xe0, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h }"

  -
    input:
      bytes: [ 0x08, 0x10, 0xe0, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h }"

  -
    input:
      bytes: [ 0x4d, 0x51, 0xf4, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h }"

  -
    input:
      bytes: [ 0x4d, 0x51, 0xf4, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h }"

  -
    input:
      bytes: [ 0x8f, 0x71, 0xe8, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }"

  -
    input:
      bytes: [ 0x8f, 0x71, 0xe8, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }"

  -
    input:
      bytes: [ 0xcf, 0x73, 0xfe, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }"

  -
    input:
      bytes: [ 0xcf, 0x73, 0xfe, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }"

  -
    input:
      bytes: [ 0x0d, 0x12, 0xf0, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h }"

  -
    input:
      bytes: [ 0x0d, 0x12, 0xf0, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h }"

  -
    input:
      bytes: [ 0x09, 0x10, 0xfe, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h }"

  -
    input:
      bytes: [ 0x09, 0x10, 0xfe, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h }"

  -
    input:
      bytes: [ 0x48, 0x52, 0xf4, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h }"

  -
    input:
      bytes: [ 0x48, 0x52, 0xf4, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h }"

  -
    input:
      bytes: [ 0x88, 0x11, 0xe2, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h }"

  -
    input:
      bytes: [ 0x88, 0x11, 0xe2, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h }"

  -
    input:
      bytes: [ 0x09, 0x50, 0xfa, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h }"

  -
    input:
      bytes: [ 0x09, 0x50, 0xfa, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h }"

  -
    input:
      bytes: [ 0xcd, 0x12, 0xfe, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h }"

  -
    input:
      bytes: [ 0xcd, 0x12, 0xfe, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h }"

  -
    input:
      bytes: [ 0x0a, 0x71, 0xe0, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h }"

  -
    input:
      bytes: [ 0x0a, 0x71, 0xe0, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h }"

  -
    input:
      bytes: [ 0x8f, 0x31, 0xea, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }"

  -
    input:
      bytes: [ 0x8f, 0x31, 0xea, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }"

  -
    input:
      bytes: [ 0x00, 0x1c, 0x70, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h"

  -
    input:
      bytes: [ 0x00, 0x1c, 0x70, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h"

  -
    input:
      bytes: [ 0x45, 0x5d, 0x75, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx4], { z10.h - z13.h }, z5.h"

  -
    input:
      bytes: [ 0x45, 0x5d, 0x75, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx4], { z10.h - z13.h }, z5.h"

  -
    input:
      bytes: [ 0xa7, 0x7d, 0x78, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z13.h - z16.h }, z8.h"

  -
    input:
      bytes: [ 0xa7, 0x7d, 0x78, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z13.h - z16.h }, z8.h"

  -
    input:
      bytes: [ 0xe7, 0x7f, 0x7f, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h"

  -
    input:
      bytes: [ 0xe7, 0x7f, 0x7f, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h"

  -
    input:
      bytes: [ 0x25, 0x1e, 0x70, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z17.h - z20.h }, z0.h"

  -
    input:
      bytes: [ 0x25, 0x1e, 0x70, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z17.h - z20.h }, z0.h"

  -
    input:
      bytes: [ 0x21, 0x1c, 0x7e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx4], { z1.h - z4.h }, z14.h"

  -
    input:
      bytes: [ 0x21, 0x1c, 0x7e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx4], { z1.h - z4.h }, z14.h"

  -
    input:
      bytes: [ 0x60, 0x5e, 0x74, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx4], { z19.h - z22.h }, z4.h"

  -
    input:
      bytes: [ 0x60, 0x5e, 0x74, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx4], { z19.h - z22.h }, z4.h"

  -
    input:
      bytes: [ 0x80, 0x1d, 0x72, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h"

  -
    input:
      bytes: [ 0x80, 0x1d, 0x72, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h"

  -
    input:
      bytes: [ 0x21, 0x5c, 0x7a, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx4], { z1.h - z4.h }, z10.h"

  -
    input:
      bytes: [ 0x21, 0x5c, 0x7a, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx4], { z1.h - z4.h }, z10.h"

  -
    input:
      bytes: [ 0xc5, 0x1e, 0x7e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z22.h - z25.h }, z14.h"

  -
    input:
      bytes: [ 0xc5, 0x1e, 0x7e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z22.h - z25.h }, z14.h"

  -
    input:
      bytes: [ 0x22, 0x7d, 0x71, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx4], { z9.h - z12.h }, z1.h"

  -
    input:
      bytes: [ 0x22, 0x7d, 0x71, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx4], { z9.h - z12.h }, z1.h"

  -
    input:
      bytes: [ 0x87, 0x3d, 0x7b, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h"

  -
    input:
      bytes: [ 0x87, 0x3d, 0x7b, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h"

  -
    input:
      bytes: [ 0x20, 0x90, 0x10, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]"

  -
    input:
      bytes: [ 0x20, 0x90, 0x10, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]"

  -
    input:
      bytes: [ 0x25, 0xd5, 0x15, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx4], { z8.h - z11.h }, z5.h[2]"

  -
    input:
      bytes: [ 0x25, 0xd5, 0x15, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx4], { z8.h - z11.h }, z5.h[2]"

  -
    input:
      bytes: [ 0xa7, 0xfd, 0x18, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z12.h - z15.h }, z8.h[6]"

  -
    input:
      bytes: [ 0xa7, 0xfd, 0x18, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z12.h - z15.h }, z8.h[6]"

  -
    input:
      bytes: [ 0xaf, 0xff, 0x1f, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z28.h - z31.h }, z15.h[7]"

  -
    input:
      bytes: [ 0xaf, 0xff, 0x1f, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z28.h - z31.h }, z15.h[7]"

  -
    input:
      bytes: [ 0x25, 0x9e, 0x10, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z16.h - z19.h }, z0.h[6]"

  -
    input:
      bytes: [ 0x25, 0x9e, 0x10, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z16.h - z19.h }, z0.h[6]"

  -
    input:
      bytes: [ 0x21, 0x94, 0x1e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx4], { z0.h - z3.h }, z14.h[2]"

  -
    input:
      bytes: [ 0x21, 0x94, 0x1e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx4], { z0.h - z3.h }, z14.h[2]"

  -
    input:
      bytes: [ 0x28, 0xd6, 0x14, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx4], { z16.h - z19.h }, z4.h[3]"

  -
    input:
      bytes: [ 0x28, 0xd6, 0x14, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx4], { z16.h - z19.h }, z4.h[3]"

  -
    input:
      bytes: [ 0xa0, 0x99, 0x12, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h[4]"

  -
    input:
      bytes: [ 0xa0, 0x99, 0x12, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h[4]"

  -
    input:
      bytes: [ 0x21, 0xd8, 0x1a, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx4], { z0.h - z3.h }, z10.h[4]"

  -
    input:
      bytes: [ 0x21, 0xd8, 0x1a, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx4], { z0.h - z3.h }, z10.h[4]"

  -
    input:
      bytes: [ 0xad, 0x9a, 0x1e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z20.h - z23.h }, z14.h[5]"

  -
    input:
      bytes: [ 0xad, 0x9a, 0x1e, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z20.h - z23.h }, z14.h[5]"

  -
    input:
      bytes: [ 0x22, 0xf5, 0x11, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx4], { z8.h - z11.h }, z1.h[2]"

  -
    input:
      bytes: [ 0x22, 0xf5, 0x11, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx4], { z8.h - z11.h }, z1.h[2]"

  -
    input:
      bytes: [ 0xa7, 0xb9, 0x1b, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h[4]"

  -
    input:
      bytes: [ 0xa7, 0xb9, 0x1b, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h[4]"

  -
    input:
      bytes: [ 0x08, 0x10, 0xe1, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }"

  -
    input:
      bytes: [ 0x08, 0x10, 0xe1, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }"

  -
    input:
      bytes: [ 0x0d, 0x51, 0xf5, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h }"

  -
    input:
      bytes: [ 0x0d, 0x51, 0xf5, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h }"

  -
    input:
      bytes: [ 0x8f, 0x71, 0xe9, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"

  -
    input:
      bytes: [ 0x8f, 0x71, 0xe9, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"

  -
    input:
      bytes: [ 0x8f, 0x73, 0xfd, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }"

  -
    input:
      bytes: [ 0x8f, 0x73, 0xfd, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }"

  -
    input:
      bytes: [ 0x0d, 0x12, 0xf1, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h }"

  -
    input:
      bytes: [ 0x0d, 0x12, 0xf1, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h }"

  -
    input:
      bytes: [ 0x09, 0x10, 0xfd, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h }"

  -
    input:
      bytes: [ 0x09, 0x10, 0xfd, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h }"

  -
    input:
      bytes: [ 0x08, 0x52, 0xf5, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h }"

  -
    input:
      bytes: [ 0x08, 0x52, 0xf5, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h }"

  -
    input:
      bytes: [ 0x88, 0x11, 0xe1, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h }"

  -
    input:
      bytes: [ 0x88, 0x11, 0xe1, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h }"

  -
    input:
      bytes: [ 0x09, 0x50, 0xf9, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h }"

  -
    input:
      bytes: [ 0x09, 0x50, 0xf9, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h }"

  -
    input:
      bytes: [ 0x8d, 0x12, 0xfd, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h }"

  -
    input:
      bytes: [ 0x8d, 0x12, 0xfd, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h }"

  -
    input:
      bytes: [ 0x0a, 0x71, 0xe1, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h }"

  -
    input:
      bytes: [ 0x0a, 0x71, 0xe1, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h }"

  -
    input:
      bytes: [ 0x8f, 0x31, 0xe9, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"

  -
    input:
      bytes: [ 0x8f, 0x31, 0xe9, 0xc1 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ]
    expected:
      insns:
        -
          asm_text: "bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"