mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
241 lines
6.1 KiB
YAML
241 lines
6.1 KiB
YAML
![]() |
test_cases:
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-
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input:
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bytes: [ 0x08, 0x00, 0x50, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "fvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]"
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-
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input:
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bytes: [ 0x08, 0x00, 0x50, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "fvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]"
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-
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input:
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bytes: [ 0x4d, 0x45, 0x55, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "fvdot za.s[w10, 5, vgx2], { z10.h, z11.h }, z5.h[1]"
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input:
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bytes: [ 0x4d, 0x45, 0x55, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w10, 5, vgx2], { z10.h, z11.h }, z5.h[1]"
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-
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input:
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bytes: [ 0x8f, 0x6d, 0x58, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "fvdot za.s[w11, 7, vgx2], { z12.h, z13.h }, z8.h[3]"
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-
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input:
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bytes: [ 0x8f, 0x6d, 0x58, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w11, 7, vgx2], { z12.h, z13.h }, z8.h[3]"
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input:
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bytes: [ 0xcf, 0x6f, 0x5f, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "fvdot za.s[w11, 7, vgx2], { z30.h, z31.h }, z15.h[3]"
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input:
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bytes: [ 0xcf, 0x6f, 0x5f, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w11, 7, vgx2], { z30.h, z31.h }, z15.h[3]"
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-
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input:
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bytes: [ 0x0d, 0x0e, 0x50, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w8, 5, vgx2], { z16.h, z17.h }, z0.h[3]"
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input:
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bytes: [ 0x0d, 0x0e, 0x50, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w8, 5, vgx2], { z16.h, z17.h }, z0.h[3]"
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input:
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bytes: [ 0x09, 0x04, 0x5e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w8, 1, vgx2], { z0.h, z1.h }, z14.h[1]"
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input:
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bytes: [ 0x09, 0x04, 0x5e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w8, 1, vgx2], { z0.h, z1.h }, z14.h[1]"
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-
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input:
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bytes: [ 0x48, 0x46, 0x54, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "fvdot za.s[w10, 0, vgx2], { z18.h, z19.h }, z4.h[1]"
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input:
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bytes: [ 0x48, 0x46, 0x54, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w10, 0, vgx2], { z18.h, z19.h }, z4.h[1]"
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-
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input:
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bytes: [ 0x88, 0x09, 0x52, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w8, 0, vgx2], { z12.h, z13.h }, z2.h[2]"
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-
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input:
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bytes: [ 0x88, 0x09, 0x52, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w8, 0, vgx2], { z12.h, z13.h }, z2.h[2]"
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-
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input:
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bytes: [ 0x09, 0x48, 0x5a, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w10, 1, vgx2], { z0.h, z1.h }, z10.h[2]"
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input:
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bytes: [ 0x09, 0x48, 0x5a, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w10, 1, vgx2], { z0.h, z1.h }, z10.h[2]"
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input:
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bytes: [ 0xcd, 0x0a, 0x5e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w8, 5, vgx2], { z22.h, z23.h }, z14.h[2]"
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input:
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bytes: [ 0xcd, 0x0a, 0x5e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w8, 5, vgx2], { z22.h, z23.h }, z14.h[2]"
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input:
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bytes: [ 0x0a, 0x65, 0x51, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w11, 2, vgx2], { z8.h, z9.h }, z1.h[1]"
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input:
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bytes: [ 0x0a, 0x65, 0x51, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w11, 2, vgx2], { z8.h, z9.h }, z1.h[1]"
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-
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input:
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bytes: [ 0x8f, 0x29, 0x5b, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "fvdot za.s[w9, 7, vgx2], { z12.h, z13.h }, z11.h[2]"
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-
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input:
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bytes: [ 0x8f, 0x29, 0x5b, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "fvdot za.s[w9, 7, vgx2], { z12.h, z13.h }, z11.h[2]"
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