mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
4321 lines
117 KiB
YAML
4321 lines
117 KiB
YAML
![]() |
test_cases:
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-
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input:
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bytes: [ 0x08, 0x14, 0x60, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
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expected:
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insns:
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-
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asm_text: "sdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h"
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-
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input:
|
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|
bytes: [ 0x08, 0x14, 0x60, 0xc1 ]
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|
arch: "CS_ARCH_AARCH64"
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|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
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|
expected:
|
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|
insns:
|
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|
-
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|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h"
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|
-
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|
input:
|
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|
bytes: [ 0x4d, 0x55, 0x65, 0xc1 ]
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|
arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
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|
expected:
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insns:
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|
-
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|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.h, z11.h }, z5.h"
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-
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input:
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||
|
bytes: [ 0x4d, 0x55, 0x65, 0xc1 ]
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|
arch: "CS_ARCH_AARCH64"
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|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
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|
expected:
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insns:
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-
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asm_text: "sdot za.s[w10, 5, vgx2], { z10.h, z11.h }, z5.h"
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||
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|
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|
-
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|
input:
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||
|
bytes: [ 0xaf, 0x75, 0x68, 0xc1 ]
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|
arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
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|
expected:
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||
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insns:
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|
-
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|
asm_text: "sdot za.s[w11, 7, vgx2], { z13.h, z14.h }, z8.h"
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-
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|
input:
|
||
|
bytes: [ 0xaf, 0x75, 0x68, 0xc1 ]
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||
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arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
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|
expected:
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||
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insns:
|
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|
-
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|
asm_text: "sdot za.s[w11, 7, vgx2], { z13.h, z14.h }, z8.h"
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|
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-
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input:
|
||
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bytes: [ 0xef, 0x77, 0x6f, 0xc1 ]
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||
|
arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
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|
expected:
|
||
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insns:
|
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|
-
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|
asm_text: "sdot za.s[w11, 7, vgx2], { z31.h, z0.h }, z15.h"
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|
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-
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|
input:
|
||
|
bytes: [ 0xef, 0x77, 0x6f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
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expected:
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insns:
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-
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asm_text: "sdot za.s[w11, 7, vgx2], { z31.h, z0.h }, z15.h"
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-
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input:
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bytes: [ 0x2d, 0x16, 0x60, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
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expected:
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insns:
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-
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asm_text: "sdot za.s[w8, 5, vgx2], { z17.h, z18.h }, z0.h"
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-
|
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|
input:
|
||
|
bytes: [ 0x2d, 0x16, 0x60, 0xc1 ]
|
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|
arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
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expected:
|
||
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insns:
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-
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asm_text: "sdot za.s[w8, 5, vgx2], { z17.h, z18.h }, z0.h"
|
||
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|
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-
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input:
|
||
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bytes: [ 0x29, 0x14, 0x6e, 0xc1 ]
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||
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
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insns:
|
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|
-
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asm_text: "sdot za.s[w8, 1, vgx2], { z1.h, z2.h }, z14.h"
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-
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input:
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||
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bytes: [ 0x29, 0x14, 0x6e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
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expected:
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insns:
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|
-
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asm_text: "sdot za.s[w8, 1, vgx2], { z1.h, z2.h }, z14.h"
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|
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|
-
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|
input:
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||
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bytes: [ 0x68, 0x56, 0x64, 0xc1 ]
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|
arch: "CS_ARCH_AARCH64"
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|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
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expected:
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insns:
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|
-
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asm_text: "sdot za.s[w10, 0, vgx2], { z19.h, z20.h }, z4.h"
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-
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input:
|
||
|
bytes: [ 0x68, 0x56, 0x64, 0xc1 ]
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|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
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expected:
|
||
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insns:
|
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|
-
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asm_text: "sdot za.s[w10, 0, vgx2], { z19.h, z20.h }, z4.h"
|
||
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|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x15, 0x62, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.h, z13.h }, z2.h"
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||
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|
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|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x15, 0x62, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.h, z13.h }, z2.h"
|
||
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|
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|
-
|
||
|
input:
|
||
|
bytes: [ 0x29, 0x54, 0x6a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
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expected:
|
||
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insns:
|
||
|
-
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|
asm_text: "sdot za.s[w10, 1, vgx2], { z1.h, z2.h }, z10.h"
|
||
|
|
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|
-
|
||
|
input:
|
||
|
bytes: [ 0x29, 0x54, 0x6a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z1.h, z2.h }, z10.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcd, 0x16, 0x6e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.h, z23.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcd, 0x16, 0x6e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.h, z23.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x2a, 0x75, 0x61, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z9.h, z10.h }, z1.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x2a, 0x75, 0x61, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z9.h, z10.h }, z1.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x35, 0x6b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.h, z13.h }, z11.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x35, 0x6b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.h, z13.h }, z11.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x10, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x10, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.h, z11.h }, z5.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.h, z11.h }, z5.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x7d, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z12.h, z13.h }, z8.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x7d, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z12.h, z13.h }, z8.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc7, 0x7f, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z30.h, z31.h }, z15.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc7, 0x7f, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z30.h, z31.h }, z15.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x1e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z16.h, z17.h }, z0.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x1e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z16.h, z17.h }, z0.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x14, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx2], { z0.h, z1.h }, z14.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x14, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx2], { z0.h, z1.h }, z14.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x40, 0x56, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx2], { z18.h, z19.h }, z4.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x40, 0x56, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx2], { z18.h, z19.h }, z4.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x19, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.h, z13.h }, z2.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x19, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.h, z13.h }, z2.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x58, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z0.h, z1.h }, z10.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x58, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z0.h, z1.h }, z10.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x1a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.h, z23.h }, z14.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x1a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.h, z23.h }, z14.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0x75, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z8.h, z9.h }, z1.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0x75, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z8.h, z9.h }, z1.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x39, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.h, z13.h }, z11.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x39, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.h, z13.h }, z11.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x14, 0xe0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x14, 0xe0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x4d, 0x55, 0xf4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x4d, 0x55, 0xf4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x75, 0xe8, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x75, 0xe8, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcf, 0x77, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcf, 0x77, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0x16, 0xf0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0x16, 0xf0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x14, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x14, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x48, 0x56, 0xf4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x48, 0x56, 0xf4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x15, 0xe2, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x15, 0xe2, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x54, 0xfa, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x54, 0xfa, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcd, 0x16, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcd, 0x16, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0a, 0x75, 0xe0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0a, 0x75, 0xe0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x35, 0xea, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x35, 0xea, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0x20, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0x20, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0x25, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.b, z11.b }, z5.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0x25, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.b, z11.b }, z5.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x75, 0x28, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z13.b, z14.b }, z8.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x75, 0x28, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z13.b, z14.b }, z8.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe7, 0x77, 0x2f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z31.b, z0.b }, z15.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe7, 0x77, 0x2f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z31.b, z0.b }, z15.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x16, 0x20, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z17.b, z18.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x16, 0x20, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z17.b, z18.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x14, 0x2e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx2], { z1.b, z2.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x14, 0x2e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx2], { z1.b, z2.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x60, 0x56, 0x24, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx2], { z19.b, z20.b }, z4.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x60, 0x56, 0x24, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx2], { z19.b, z20.b }, z4.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0x22, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.b, z13.b }, z2.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0x22, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.b, z13.b }, z2.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x54, 0x2a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z1.b, z2.b }, z10.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x54, 0x2a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z1.b, z2.b }, z10.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0x2e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.b, z23.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0x2e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.b, z23.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0x75, 0x21, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z9.b, z10.b }, z1.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0x75, 0x21, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z9.b, z10.b }, z1.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0x2b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.b, z13.b }, z11.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0x2b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.b, z13.b }, z11.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x10, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x10, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x65, 0x55, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.b, z11.b }, z5.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x65, 0x55, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.b, z11.b }, z5.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x7d, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z12.b, z13.b }, z8.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x7d, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z12.b, z13.b }, z8.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe7, 0x7f, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z30.b, z31.b }, z15.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe7, 0x7f, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z30.b, z31.b }, z15.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x1e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z16.b, z17.b }, z0.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x1e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z16.b, z17.b }, z0.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x14, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx2], { z0.b, z1.b }, z14.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x14, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx2], { z0.b, z1.b }, z14.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x60, 0x56, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx2], { z18.b, z19.b }, z4.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x60, 0x56, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx2], { z18.b, z19.b }, z4.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa0, 0x19, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.b, z13.b }, z2.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa0, 0x19, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.b, z13.b }, z2.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x58, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z0.b, z1.b }, z10.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x58, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z0.b, z1.b }, z10.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe5, 0x1a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.b, z23.b }, z14.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe5, 0x1a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.b, z23.b }, z14.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0x75, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z8.b, z9.b }, z1.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0x75, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z8.b, z9.b }, z1.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x39, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.b, z13.b }, z11.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x39, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.b, z13.b }, z11.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0xa0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0xa0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0xb4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.b, z11.b }, { z20.b, z21.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0xb4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx2], { z10.b, z11.b }, { z20.b, z21.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x75, 0xa8, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x75, 0xa8, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc7, 0x77, 0xbe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc7, 0x77, 0xbe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x16, 0xb0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z16.b, z17.b }, { z16.b, z17.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x16, 0xb0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z16.b, z17.b }, { z16.b, z17.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x14, 0xbe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx2], { z0.b, z1.b }, { z30.b, z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x14, 0xbe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx2], { z0.b, z1.b }, { z30.b, z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x40, 0x56, 0xb4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx2], { z18.b, z19.b }, { z20.b, z21.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x40, 0x56, 0xb4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx2], { z18.b, z19.b }, { z20.b, z21.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0xa2, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.b, z13.b }, { z2.b, z3.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0xa2, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx2], { z12.b, z13.b }, { z2.b, z3.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x54, 0xba, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z0.b, z1.b }, { z26.b, z27.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x54, 0xba, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx2], { z0.b, z1.b }, { z26.b, z27.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0xbe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.b, z23.b }, { z30.b, z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0xbe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx2], { z22.b, z23.b }, { z30.b, z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0x75, 0xa0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z8.b, z9.b }, { z0.b, z1.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0x75, 0xa0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx2], { z8.b, z9.b }, { z0.b, z1.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0xaa, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0xaa, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0x60, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z0.h, z1.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0x60, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z0.h, z1.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0x65, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx2], { z10.h, z11.h }, z5.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0x65, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx2], { z10.h, z11.h }, z5.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x75, 0x68, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z13.h, z14.h }, z8.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x75, 0x68, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z13.h, z14.h }, z8.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe7, 0x77, 0x6f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z31.h, z0.h }, z15.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe7, 0x77, 0x6f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z31.h, z0.h }, z15.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x16, 0x60, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z17.h, z18.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x16, 0x60, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z17.h, z18.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x14, 0x6e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx2], { z1.h, z2.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x14, 0x6e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx2], { z1.h, z2.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x60, 0x56, 0x64, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx2], { z19.h, z20.h }, z4.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x60, 0x56, 0x64, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx2], { z19.h, z20.h }, z4.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0x62, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z12.h, z13.h }, z2.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0x62, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z12.h, z13.h }, z2.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x54, 0x6a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx2], { z1.h, z2.h }, z10.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x54, 0x6a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx2], { z1.h, z2.h }, z10.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0x6e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z22.h, z23.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0x6e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z22.h, z23.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0x75, 0x61, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx2], { z9.h, z10.h }, z1.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0x75, 0x61, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx2], { z9.h, z10.h }, z1.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0x6b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx2], { z12.h, z13.h }, z11.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0x6b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx2], { z12.h, z13.h }, z11.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x00, 0xd0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x00, 0xd0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x4d, 0x45, 0xd5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx2], { z10.h, z11.h }, z5.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x4d, 0x45, 0xd5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx2], { z10.h, z11.h }, z5.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x65, 0xd8, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z12.h, z13.h }, z8.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x65, 0xd8, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z12.h, z13.h }, z8.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcf, 0x67, 0xdf, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z30.h, z31.h }, z15.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcf, 0x67, 0xdf, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z30.h, z31.h }, z15.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0x06, 0xd0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z16.h, z17.h }, z0.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0x06, 0xd0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z16.h, z17.h }, z0.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x04, 0xde, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx2], { z0.h, z1.h }, z14.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x04, 0xde, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx2], { z0.h, z1.h }, z14.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x48, 0x46, 0xd4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx2], { z18.h, z19.h }, z4.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x48, 0x46, 0xd4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx2], { z18.h, z19.h }, z4.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x01, 0xd2, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z12.h, z13.h }, z2.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x01, 0xd2, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z12.h, z13.h }, z2.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x40, 0xda, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx2], { z0.h, z1.h }, z10.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x40, 0xda, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx2], { z0.h, z1.h }, z10.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcd, 0x02, 0xde, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z22.h, z23.h }, z14.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcd, 0x02, 0xde, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z22.h, z23.h }, z14.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0a, 0x65, 0xd1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx2], { z8.h, z9.h }, z1.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0a, 0x65, 0xd1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx2], { z8.h, z9.h }, z1.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x21, 0xdb, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx2], { z12.h, z13.h }, z11.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x21, 0xdb, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx2], { z12.h, z13.h }, z11.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0xe0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0xe0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0xf4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0xf4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x75, 0xe8, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x75, 0xe8, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc7, 0x77, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc7, 0x77, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x16, 0xf0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x16, 0xf0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x14, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x14, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x40, 0x56, 0xf4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x40, 0x56, 0xf4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0xe2, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0xe2, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x54, 0xfa, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x54, 0xfa, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0xfe, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0x75, 0xe0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0x75, 0xe0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0xea, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0xea, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x14, 0x70, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x14, 0x70, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x4d, 0x55, 0x75, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z10.h - z13.h }, z5.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x4d, 0x55, 0x75, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z10.h - z13.h }, z5.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xaf, 0x75, 0x78, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z13.h - z16.h }, z8.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xaf, 0x75, 0x78, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z13.h - z16.h }, z8.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xef, 0x77, 0x7f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xef, 0x77, 0x7f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x2d, 0x16, 0x70, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z17.h - z20.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x2d, 0x16, 0x70, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z17.h - z20.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x29, 0x14, 0x7e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z1.h - z4.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x29, 0x14, 0x7e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z1.h - z4.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x68, 0x56, 0x74, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z19.h - z22.h }, z4.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x68, 0x56, 0x74, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z19.h - z22.h }, z4.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x15, 0x72, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.h - z15.h }, z2.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x15, 0x72, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.h - z15.h }, z2.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x29, 0x54, 0x7a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z1.h - z4.h }, z10.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x29, 0x54, 0x7a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z1.h - z4.h }, z10.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcd, 0x16, 0x7e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z22.h - z25.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xcd, 0x16, 0x7e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z22.h - z25.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x2a, 0x75, 0x71, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z9.h - z12.h }, z1.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x2a, 0x75, 0x71, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z9.h - z12.h }, z1.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x35, 0x7b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.h - z15.h }, z11.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x35, 0x7b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.h - z15.h }, z11.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x90, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x90, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0xd5, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z8.h - z11.h }, z5.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0xd5, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z8.h - z11.h }, z5.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0xfd, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z12.h - z15.h }, z8.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0xfd, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z12.h - z15.h }, z8.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0xff, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z28.h - z31.h }, z15.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0xff, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z28.h - z31.h }, z15.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x9e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z16.h - z19.h }, z0.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x9e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z16.h - z19.h }, z0.h[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x94, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z0.h - z3.h }, z14.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x94, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z0.h - z3.h }, z14.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0xd6, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z16.h - z19.h }, z4.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0xd6, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z16.h - z19.h }, z4.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x99, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.h - z15.h }, z2.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x99, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.h - z15.h }, z2.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0xd8, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z0.h - z3.h }, z10.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0xd8, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z0.h - z3.h }, z10.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x85, 0x9a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z20.h - z23.h }, z14.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x85, 0x9a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z20.h - z23.h }, z14.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0xf5, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z8.h - z11.h }, z1.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0xf5, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z8.h - z11.h }, z1.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0xb9, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.h - z15.h }, z11.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0xb9, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.h - z15.h }, z11.h[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x14, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x14, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0x55, 0xf5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0x55, 0xf5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x75, 0xe9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x75, 0xe9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x77, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x77, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0x16, 0xf1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0x16, 0xf1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x14, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x14, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x56, 0xf5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x56, 0xf5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x15, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x15, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x54, 0xf9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x54, 0xf9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8d, 0x16, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8d, 0x16, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0a, 0x75, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0a, 0x75, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x35, 0xe9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0x35, 0xe9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0x30, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0x30, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0x35, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z10.b - z13.b }, z5.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0x35, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z10.b - z13.b }, z5.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x75, 0x38, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z13.b - z16.b }, z8.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x75, 0x38, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z13.b - z16.b }, z8.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe7, 0x77, 0x3f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe7, 0x77, 0x3f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x16, 0x30, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z17.b - z20.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x16, 0x30, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z17.b - z20.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x14, 0x3e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z1.b - z4.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x14, 0x3e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z1.b - z4.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x60, 0x56, 0x34, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z19.b - z22.b }, z4.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x60, 0x56, 0x34, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z19.b - z22.b }, z4.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0x32, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.b - z15.b }, z2.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0x32, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.b - z15.b }, z2.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x54, 0x3a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z1.b - z4.b }, z10.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x54, 0x3a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z1.b - z4.b }, z10.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0x3e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z22.b - z25.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0x3e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z22.b - z25.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0x75, 0x31, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z9.b - z12.b }, z1.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0x75, 0x31, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z9.b - z12.b }, z1.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0x3b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.b - z15.b }, z11.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0x3b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.b - z15.b }, z11.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x90, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x90, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0xd5, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z8.b - z11.b }, z5.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0xd5, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z8.b - z11.b }, z5.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0xfd, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z12.b - z15.b }, z8.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0xfd, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z12.b - z15.b }, z8.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0xff, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z28.b - z31.b }, z15.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0xff, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z28.b - z31.b }, z15.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x9e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z16.b - z19.b }, z0.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x9e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z16.b - z19.b }, z0.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x94, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z0.b - z3.b }, z14.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x94, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z0.b - z3.b }, z14.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xd6, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z16.b - z19.b }, z4.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xd6, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z16.b - z19.b }, z4.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa0, 0x99, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.b - z15.b }, z2.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa0, 0x99, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.b - z15.b }, z2.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0xd8, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z0.b - z3.b }, z10.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0xd8, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z0.b - z3.b }, z10.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa5, 0x9a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z20.b - z23.b }, z14.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa5, 0x9a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z20.b - z23.b }, z14.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0xf5, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z8.b - z11.b }, z1.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0xf5, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z8.b - z11.b }, z1.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0xb9, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.b - z15.b }, z11.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0xb9, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.b - z15.b }, z11.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0xa1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0xa1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x55, 0xb5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z8.b - z11.b }, { z20.b - z23.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x55, 0xb5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 5, vgx4], { z8.b - z11.b }, { z20.b - z23.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x75, 0xa9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z12.b - z15.b }, { z8.b - z11.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x75, 0xa9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z12.b - z15.b }, { z8.b - z11.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x77, 0xbd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x77, 0xbd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x16, 0xb1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z16.b - z19.b }, { z16.b - z19.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x16, 0xb1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z16.b - z19.b }, { z16.b - z19.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x14, 0xbd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z0.b - z3.b }, { z28.b - z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x14, 0xbd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 1, vgx4], { z0.b - z3.b }, { z28.b - z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x56, 0xb5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z16.b - z19.b }, { z20.b - z23.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x56, 0xb5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 0, vgx4], { z16.b - z19.b }, { z20.b - z23.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0xa1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.b - z15.b }, { z0.b - z3.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0xa1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 0, vgx4], { z12.b - z15.b }, { z0.b - z3.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x54, 0xb9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z0.b - z3.b }, { z24.b - z27.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x54, 0xb9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w10, 1, vgx4], { z0.b - z3.b }, { z24.b - z27.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x85, 0x16, 0xbd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z20.b - z23.b }, { z28.b - z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x85, 0x16, 0xbd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w8, 5, vgx4], { z20.b - z23.b }, { z28.b - z31.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0x75, 0xa1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z8.b - z11.b }, { z0.b - z3.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0x75, 0xa1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w11, 2, vgx4], { z8.b - z11.b }, { z0.b - z3.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0xa9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.b - z15.b }, { z8.b - z11.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0xa9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.s[w9, 7, vgx4], { z12.b - z15.b }, { z8.b - z11.b }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0x70, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0x70, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0x75, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx4], { z10.h - z13.h }, z5.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x45, 0x55, 0x75, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx4], { z10.h - z13.h }, z5.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x75, 0x78, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z13.h - z16.h }, z8.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xa7, 0x75, 0x78, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z13.h - z16.h }, z8.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe7, 0x77, 0x7f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe7, 0x77, 0x7f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x16, 0x70, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z17.h - z20.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x16, 0x70, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z17.h - z20.h }, z0.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x14, 0x7e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx4], { z1.h - z4.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x14, 0x7e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx4], { z1.h - z4.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x60, 0x56, 0x74, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx4], { z19.h - z22.h }, z4.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x60, 0x56, 0x74, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx4], { z19.h - z22.h }, z4.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0x72, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z12.h - z15.h }, z2.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0x72, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z12.h - z15.h }, z2.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x54, 0x7a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx4], { z1.h - z4.h }, z10.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x21, 0x54, 0x7a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx4], { z1.h - z4.h }, z10.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0x7e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z22.h - z25.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xc5, 0x16, 0x7e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z22.h - z25.h }, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0x75, 0x71, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx4], { z9.h - z12.h }, z1.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x22, 0x75, 0x71, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx4], { z9.h - z12.h }, z1.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0x7b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx4], { z12.h - z15.h }, z11.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0x7b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx4], { z12.h - z15.h }, z11.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x80, 0xd0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0x80, 0xd0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0xc5, 0xd5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx4], { z8.h - z11.h }, z5.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0xc5, 0xd5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx4], { z8.h - z11.h }, z5.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0xe5, 0xd8, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z12.h - z15.h }, z8.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0xe5, 0xd8, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z12.h - z15.h }, z8.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0xe7, 0xdf, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z28.h - z31.h }, z15.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0xe7, 0xdf, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z28.h - z31.h }, z15.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0x86, 0xd0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z16.h - z19.h }, z0.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0d, 0x86, 0xd0, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z16.h - z19.h }, z0.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x84, 0xde, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx4], { z0.h - z3.h }, z14.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0x84, 0xde, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx4], { z0.h - z3.h }, z14.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0xc6, 0xd4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx4], { z16.h - z19.h }, z4.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x08, 0xc6, 0xd4, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx4], { z16.h - z19.h }, z4.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x81, 0xd2, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z12.h - z15.h }, z2.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x88, 0x81, 0xd2, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z12.h - z15.h }, z2.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0xc0, 0xda, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx4], { z0.h - z3.h }, z10.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x09, 0xc0, 0xda, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx4], { z0.h - z3.h }, z10.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8d, 0x82, 0xde, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z20.h - z23.h }, z14.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8d, 0x82, 0xde, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z20.h - z23.h }, z14.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0a, 0xe5, 0xd1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx4], { z8.h - z11.h }, z1.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x0a, 0xe5, 0xd1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx4], { z8.h - z11.h }, z1.h[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0xa1, 0xdb, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx4], { z12.h - z15.h }, z11.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x8f, 0xa1, 0xdb, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx4], { z12.h - z15.h }, z11.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x14, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x55, 0xf5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x55, 0xf5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x75, 0xe9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x75, 0xe9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x77, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x77, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x16, 0xf1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x05, 0x16, 0xf1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x14, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x14, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x56, 0xf5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x56, 0xf5, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x80, 0x15, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x54, 0xf9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x01, 0x54, 0xf9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x85, 0x16, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x85, 0x16, 0xfd, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0x75, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x02, 0x75, 0xe1, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0xe9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x87, 0x35, 0xe9, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-i16i64" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot za.d[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|