mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
961 lines
24 KiB
YAML
961 lines
24 KiB
YAML
![]() |
test_cases:
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-
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input:
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bytes: [ 0x18, 0x14, 0x20, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
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|
expected:
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||
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insns:
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-
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asm_text: "sudot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b"
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-
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input:
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|
bytes: [ 0x18, 0x14, 0x20, 0xc1 ]
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||
|
arch: "CS_ARCH_AARCH64"
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|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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|
expected:
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insns:
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|
-
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|
asm_text: "sudot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b"
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|
-
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|
input:
|
||
|
bytes: [ 0x5d, 0x55, 0x25, 0xc1 ]
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||
|
arch: "CS_ARCH_AARCH64"
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|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
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|
expected:
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insns:
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|
-
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asm_text: "sudot za.s[w10, 5, vgx2], { z10.b, z11.b }, z5.b"
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-
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input:
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||
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bytes: [ 0x5d, 0x55, 0x25, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
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|
expected:
|
||
|
insns:
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|
-
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asm_text: "sudot za.s[w10, 5, vgx2], { z10.b, z11.b }, z5.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0x75, 0x28, 0xc1 ]
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||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
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|
-
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|
asm_text: "sudot za.s[w11, 7, vgx2], { z13.b, z14.b }, z8.b"
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||
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|
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|
-
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|
input:
|
||
|
bytes: [ 0xbf, 0x75, 0x28, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
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expected:
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||
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insns:
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|
-
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|
asm_text: "sudot za.s[w11, 7, vgx2], { z13.b, z14.b }, z8.b"
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||
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|
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-
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|
input:
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||
|
bytes: [ 0xff, 0x77, 0x2f, 0xc1 ]
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||
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
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|
expected:
|
||
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insns:
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-
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asm_text: "sudot za.s[w11, 7, vgx2], { z31.b, z0.b }, z15.b"
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||
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|
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-
|
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|
input:
|
||
|
bytes: [ 0xff, 0x77, 0x2f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
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|
asm_text: "sudot za.s[w11, 7, vgx2], { z31.b, z0.b }, z15.b"
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|
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-
|
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|
input:
|
||
|
bytes: [ 0x3d, 0x16, 0x20, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
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|
-
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asm_text: "sudot za.s[w8, 5, vgx2], { z17.b, z18.b }, z0.b"
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|
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-
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input:
|
||
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bytes: [ 0x3d, 0x16, 0x20, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
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|
-
|
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|
asm_text: "sudot za.s[w8, 5, vgx2], { z17.b, z18.b }, z0.b"
|
||
|
|
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|
-
|
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|
input:
|
||
|
bytes: [ 0x39, 0x14, 0x2e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
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expected:
|
||
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insns:
|
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|
-
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asm_text: "sudot za.s[w8, 1, vgx2], { z1.b, z2.b }, z14.b"
|
||
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|
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|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x14, 0x2e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
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expected:
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insns:
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|
-
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asm_text: "sudot za.s[w8, 1, vgx2], { z1.b, z2.b }, z14.b"
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|
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|
-
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|
input:
|
||
|
bytes: [ 0x78, 0x56, 0x24, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
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|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
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|
expected:
|
||
|
insns:
|
||
|
-
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asm_text: "sudot za.s[w10, 0, vgx2], { z19.b, z20.b }, z4.b"
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|
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-
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|
input:
|
||
|
bytes: [ 0x78, 0x56, 0x24, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
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||
|
asm_text: "sudot za.s[w10, 0, vgx2], { z19.b, z20.b }, z4.b"
|
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|
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|
-
|
||
|
input:
|
||
|
bytes: [ 0x98, 0x15, 0x22, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx2], { z12.b, z13.b }, z2.b"
|
||
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|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x98, 0x15, 0x22, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx2], { z12.b, z13.b }, z2.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x54, 0x2a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 1, vgx2], { z1.b, z2.b }, z10.b"
|
||
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|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x54, 0x2a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 1, vgx2], { z1.b, z2.b }, z10.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xdd, 0x16, 0x2e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx2], { z22.b, z23.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xdd, 0x16, 0x2e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx2], { z22.b, z23.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3a, 0x75, 0x21, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 2, vgx2], { z9.b, z10.b }, z1.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3a, 0x75, 0x21, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 2, vgx2], { z9.b, z10.b }, z1.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x9f, 0x35, 0x2b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w9, 7, vgx2], { z12.b, z13.b }, z11.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x9f, 0x35, 0x2b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w9, 7, vgx2], { z12.b, z13.b }, z11.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x38, 0x10, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x38, 0x10, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x7d, 0x55, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 5, vgx2], { z10.b, z11.b }, z5.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x7d, 0x55, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 5, vgx2], { z10.b, z11.b }, z5.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0x7d, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx2], { z12.b, z13.b }, z8.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0x7d, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx2], { z12.b, z13.b }, z8.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xff, 0x7f, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx2], { z30.b, z31.b }, z15.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xff, 0x7f, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx2], { z30.b, z31.b }, z15.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3d, 0x1e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx2], { z16.b, z17.b }, z0.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3d, 0x1e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx2], { z16.b, z17.b }, z0.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x14, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 1, vgx2], { z0.b, z1.b }, z14.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x14, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 1, vgx2], { z0.b, z1.b }, z14.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x78, 0x56, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 0, vgx2], { z18.b, z19.b }, z4.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x78, 0x56, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 0, vgx2], { z18.b, z19.b }, z4.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xb8, 0x19, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx2], { z12.b, z13.b }, z2.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xb8, 0x19, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx2], { z12.b, z13.b }, z2.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x58, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 1, vgx2], { z0.b, z1.b }, z10.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x58, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 1, vgx2], { z0.b, z1.b }, z10.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xfd, 0x1a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx2], { z22.b, z23.b }, z14.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xfd, 0x1a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx2], { z22.b, z23.b }, z14.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3a, 0x75, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 2, vgx2], { z8.b, z9.b }, z1.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3a, 0x75, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 2, vgx2], { z8.b, z9.b }, z1.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0x39, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w9, 7, vgx2], { z12.b, z13.b }, z11.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0x39, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w9, 7, vgx2], { z12.b, z13.b }, z11.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x18, 0x14, 0x30, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x18, 0x14, 0x30, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x5d, 0x55, 0x35, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 5, vgx4], { z10.b - z13.b }, z5.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x5d, 0x55, 0x35, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 5, vgx4], { z10.b - z13.b }, z5.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0x75, 0x38, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx4], { z13.b - z16.b }, z8.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0x75, 0x38, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx4], { z13.b - z16.b }, z8.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xff, 0x77, 0x3f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xff, 0x77, 0x3f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3d, 0x16, 0x30, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx4], { z17.b - z20.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3d, 0x16, 0x30, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx4], { z17.b - z20.b }, z0.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x14, 0x3e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 1, vgx4], { z1.b - z4.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x14, 0x3e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 1, vgx4], { z1.b - z4.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x78, 0x56, 0x34, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 0, vgx4], { z19.b - z22.b }, z4.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x78, 0x56, 0x34, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 0, vgx4], { z19.b - z22.b }, z4.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x98, 0x15, 0x32, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx4], { z12.b - z15.b }, z2.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x98, 0x15, 0x32, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx4], { z12.b - z15.b }, z2.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x54, 0x3a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 1, vgx4], { z1.b - z4.b }, z10.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x54, 0x3a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 1, vgx4], { z1.b - z4.b }, z10.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xdd, 0x16, 0x3e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx4], { z22.b - z25.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xdd, 0x16, 0x3e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx4], { z22.b - z25.b }, z14.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3a, 0x75, 0x31, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 2, vgx4], { z9.b - z12.b }, z1.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3a, 0x75, 0x31, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 2, vgx4], { z9.b - z12.b }, z1.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x9f, 0x35, 0x3b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w9, 7, vgx4], { z12.b - z15.b }, z11.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x9f, 0x35, 0x3b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w9, 7, vgx4], { z12.b - z15.b }, z11.b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x38, 0x90, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x38, 0x90, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3d, 0xd5, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 5, vgx4], { z8.b - z11.b }, z5.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3d, 0xd5, 0x55, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 5, vgx4], { z8.b - z11.b }, z5.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0xfd, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx4], { z12.b - z15.b }, z8.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0xfd, 0x58, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx4], { z12.b - z15.b }, z8.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0xff, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx4], { z28.b - z31.b }, z15.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0xff, 0x5f, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 7, vgx4], { z28.b - z31.b }, z15.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3d, 0x9e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx4], { z16.b - z19.b }, z0.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3d, 0x9e, 0x50, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx4], { z16.b - z19.b }, z0.b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x94, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 1, vgx4], { z0.b - z3.b }, z14.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0x94, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 1, vgx4], { z0.b - z3.b }, z14.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x38, 0xd6, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 0, vgx4], { z16.b - z19.b }, z4.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x38, 0xd6, 0x54, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 0, vgx4], { z16.b - z19.b }, z4.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xb8, 0x99, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx4], { z12.b - z15.b }, z2.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xb8, 0x99, 0x52, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 0, vgx4], { z12.b - z15.b }, z2.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0xd8, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 1, vgx4], { z0.b - z3.b }, z10.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x39, 0xd8, 0x5a, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w10, 1, vgx4], { z0.b - z3.b }, z10.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbd, 0x9a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx4], { z20.b - z23.b }, z14.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbd, 0x9a, 0x5e, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w8, 5, vgx4], { z20.b - z23.b }, z14.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3a, 0xf5, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 2, vgx4], { z8.b - z11.b }, z1.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x3a, 0xf5, 0x51, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w11, 2, vgx4], { z8.b - z11.b }, z1.b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0xb9, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w9, 7, vgx4], { z12.b - z15.b }, z11.b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xbf, 0xb9, 0x5b, 0xc1 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sudot za.s[w9, 7, vgx4], { z12.b - z15.b }, z11.b[2]"
|