mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
181 lines
4.2 KiB
YAML
181 lines
4.2 KiB
YAML
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test_cases:
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-
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input:
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bytes: [ 0x20, 0x80, 0x62, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h"
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-
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input:
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bytes: [ 0x20, 0x40, 0x62, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h[0]"
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-
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input:
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bytes: [ 0x20, 0x40, 0x7a, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h[3]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x80, 0x62, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x40, 0x62, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h[0]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x40, 0x7a, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h[3]"
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-
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input:
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bytes: [ 0x20, 0x80, 0x62, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h"
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-
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input:
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bytes: [ 0x20, 0x40, 0x62, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h[0]"
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-
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input:
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bytes: [ 0x20, 0x40, 0x7a, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h[3]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x80, 0x62, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x40, 0x62, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h[0]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x40, 0x7a, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfdot z0.s, z1.h, z2.h[3]"
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