mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
601 lines
14 KiB
YAML
601 lines
14 KiB
YAML
![]() |
test_cases:
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-
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input:
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bytes: [ 0x20, 0x80, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z0.s, z1.h, z2.h"
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-
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input:
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bytes: [ 0x20, 0x84, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z2.h"
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-
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input:
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bytes: [ 0x20, 0x40, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z0.s, z1.h, z2.h[0]"
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-
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input:
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bytes: [ 0x20, 0x44, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z2.h[0]"
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-
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input:
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bytes: [ 0x20, 0x48, 0xfa, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z0.s, z1.h, z2.h[7]"
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-
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input:
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bytes: [ 0x20, 0x4c, 0xfa, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z2.h[7]"
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-
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input:
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bytes: [ 0x20, 0x4c, 0xff, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z7.h[7]"
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-
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input:
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bytes: [ 0xaa, 0x82, 0xee, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z10.s, z21.h, z14.h"
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-
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input:
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bytes: [ 0x4e, 0x85, 0xf5, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z14.s, z10.h, z21.h"
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-
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input:
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bytes: [ 0xd5, 0x41, 0xeb, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z21.s, z14.h, z3.h[2]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x80, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z0.s, z1.h, z2.h"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x84, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z2.h"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x40, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z0.s, z1.h, z2.h[0]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x44, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z2.h[0]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x48, 0xfa, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z0.s, z1.h, z2.h[7]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x4c, 0xfa, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z2.h[7]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x4c, 0xff, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z7.h[7]"
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-
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input:
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bytes: [ 0xea, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z10, z7"
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|
-
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input:
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bytes: [ 0xaa, 0x82, 0xee, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z10.s, z21.h, z14.h"
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-
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input:
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bytes: [ 0xee, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z14, z7"
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-
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input:
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bytes: [ 0x4e, 0x85, 0xf5, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z14.s, z10.h, z21.h"
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-
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input:
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bytes: [ 0xf5, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "movprfx z21, z7"
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-
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input:
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bytes: [ 0xd5, 0x41, 0xeb, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z21.s, z14.h, z3.h[2]"
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-
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input:
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bytes: [ 0x20, 0x80, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z0.s, z1.h, z2.h"
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-
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input:
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bytes: [ 0x20, 0x84, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z2.h"
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-
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input:
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bytes: [ 0x20, 0x40, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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|
-
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asm_text: "bfmlalb z0.s, z1.h, z2.h[0]"
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-
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input:
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bytes: [ 0x20, 0x44, 0xe2, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z2.h[0]"
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-
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input:
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bytes: [ 0x20, 0x48, 0xfa, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z0.s, z1.h, z2.h[7]"
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-
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input:
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bytes: [ 0x20, 0x4c, 0xfa, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z2.h[7]"
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-
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input:
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bytes: [ 0x20, 0x4c, 0xff, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z0.s, z1.h, z7.h[7]"
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-
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input:
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bytes: [ 0xaa, 0x82, 0xee, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z10.s, z21.h, z14.h"
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-
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input:
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bytes: [ 0x4e, 0x85, 0xf5, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalt z14.s, z10.h, z21.h"
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-
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input:
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bytes: [ 0xd5, 0x41, 0xeb, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
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insns:
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-
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asm_text: "bfmlalb z21.s, z14.h, z3.h[2]"
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-
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input:
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|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
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expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "movprfx z0, z7"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x80, 0xe2, 0x64 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "bfmlalb z0.s, z1.h, z2.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "movprfx z0, z7"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x84, 0xe2, 0x64 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "bfmlalt z0.s, z1.h, z2.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "movprfx z0, z7"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x40, 0xe2, 0x64 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "bfmlalb z0.s, z1.h, z2.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "movprfx z0, z7"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x44, 0xe2, 0x64 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "bfmlalt z0.s, z1.h, z2.h[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "movprfx z0, z7"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x48, 0xfa, 0x64 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "bfmlalb z0.s, z1.h, z2.h[7]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "movprfx z0, z7"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x4c, 0xfa, 0x64 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "bfmlalt z0.s, z1.h, z2.h[7]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "movprfx z0, z7"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x4c, 0xff, 0x64 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "bfmlalt z0.s, z1.h, z7.h[7]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xea, 0xbc, 0x20, 0x04 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "movprfx z10, z7"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xaa, 0x82, 0xee, 0x64 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "bfmlalb z10.s, z21.h, z14.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xee, 0xbc, 0x20, 0x04 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "movprfx z14, z7"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x4e, 0x85, 0xf5, 0x64 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "bfmlalt z14.s, z10.h, z21.h"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xf5, 0xbc, 0x20, 0x04 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "movprfx z21, z7"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xd5, 0x41, 0xeb, 0x64 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+bf16" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "bfmlalb z21.s, z14.h, z3.h[2]"
|