mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
101 lines
2.5 KiB
YAML
101 lines
2.5 KiB
YAML
![]() |
test_cases:
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x60, 0x20, 0xe5 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "st2w { z0.s, z1.s }, p0, [x0, x0, lsl #2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x6e, 0x30, 0xe5 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "st2w { z5.s, z6.s }, p3, [x17, x16, lsl #2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0xe0, 0x30, 0xe5 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "st2w { z0.s, z1.s }, p0, [x0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xb7, 0xed, 0x38, 0xe5 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "st2w { z23.s, z24.s }, p3, [x13, #-16, mul vl]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x55, 0xf5, 0x35, 0xe5 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0x60, 0x20, 0xe5 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "st2w { z0.s, z1.s }, p0, [x0, x0, lsl #2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x25, 0x6e, 0x30, 0xe5 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "st2w { z5.s, z6.s }, p3, [x17, x16, lsl #2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x00, 0xe0, 0x30, 0xe5 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "st2w { z0.s, z1.s }, p0, [x0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0xb7, 0xed, 0x38, 0xe5 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "st2w { z23.s, z24.s }, p3, [x13, #-16, mul vl]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x55, 0xf5, 0x35, 0xe5 ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]"
|