mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
91 lines
2.0 KiB
YAML
91 lines
2.0 KiB
YAML
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test_cases:
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-
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input:
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bytes: [ 0x83, 0x04, 0x38, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mrs x3, ID_AA64ZFR0_EL1"
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-
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input:
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bytes: [ 0x03, 0x12, 0x38, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mrs x3, ZCR_EL1"
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-
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input:
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bytes: [ 0x03, 0x12, 0x3c, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mrs x3, ZCR_EL2"
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-
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input:
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bytes: [ 0x03, 0x12, 0x3e, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mrs x3, ZCR_EL3"
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-
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input:
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bytes: [ 0x03, 0x12, 0x3d, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mrs x3, ZCR_EL12"
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-
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input:
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bytes: [ 0x03, 0x12, 0x18, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "msr ZCR_EL1, x3"
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-
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input:
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bytes: [ 0x03, 0x12, 0x1c, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "msr ZCR_EL2, x3"
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-
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input:
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bytes: [ 0x03, 0x12, 0x1e, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "msr ZCR_EL3, x3"
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-
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input:
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bytes: [ 0x03, 0x12, 0x1d, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "msr ZCR_EL12, x3"
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