mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
121 lines
2.7 KiB
YAML
121 lines
2.7 KiB
YAML
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test_cases:
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-
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input:
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bytes: [ 0x00, 0xa8, 0x08, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
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expected:
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insns:
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-
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asm_text: "ushllb z0.h, z0.b, #0"
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-
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input:
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bytes: [ 0xff, 0xab, 0x0f, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
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expected:
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insns:
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-
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asm_text: "ushllb z31.h, z31.b, #7"
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-
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input:
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bytes: [ 0x00, 0xa8, 0x10, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
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expected:
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insns:
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-
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asm_text: "ushllb z0.s, z0.h, #0"
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-
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input:
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bytes: [ 0xff, 0xab, 0x1f, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
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expected:
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insns:
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-
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asm_text: "ushllb z31.s, z31.h, #15"
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-
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input:
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bytes: [ 0x00, 0xa8, 0x40, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
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expected:
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insns:
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-
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asm_text: "ushllb z0.d, z0.s, #0"
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-
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input:
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bytes: [ 0xff, 0xab, 0x5f, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
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expected:
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insns:
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-
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asm_text: "ushllb z31.d, z31.s, #31"
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-
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input:
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bytes: [ 0x00, 0xa8, 0x08, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ushllb z0.h, z0.b, #0"
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-
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input:
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bytes: [ 0xff, 0xab, 0x0f, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ushllb z31.h, z31.b, #7"
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-
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input:
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bytes: [ 0x00, 0xa8, 0x10, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ushllb z0.s, z0.h, #0"
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-
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input:
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bytes: [ 0xff, 0xab, 0x1f, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ushllb z31.s, z31.h, #15"
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-
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input:
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bytes: [ 0x00, 0xa8, 0x40, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ushllb z0.d, z0.s, #0"
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-
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input:
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bytes: [ 0xff, 0xab, 0x5f, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ushllb z31.d, z31.s, #31"
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