mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
1801 lines
42 KiB
YAML
1801 lines
42 KiB
YAML
![]() |
test_cases:
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-
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input:
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bytes: [ 0x20, 0x94, 0x82, 0x2e ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "dotprod" ]
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expected:
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insns:
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-
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asm_text: "udot v0.2s, v1.8b, v2.8b"
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-
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input:
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bytes: [ 0x20, 0x94, 0x82, 0x0e ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "dotprod" ]
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expected:
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insns:
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-
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asm_text: "sdot v0.2s, v1.8b, v2.8b"
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-
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input:
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bytes: [ 0x20, 0x94, 0x82, 0x6e ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "dotprod" ]
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expected:
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insns:
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-
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asm_text: "udot v0.4s, v1.16b, v2.16b"
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-
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input:
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bytes: [ 0x20, 0x94, 0x82, 0x4e ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "dotprod" ]
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expected:
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insns:
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-
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asm_text: "sdot v0.4s, v1.16b, v2.16b"
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-
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input:
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bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
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arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "dotprod" ]
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expected:
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insns:
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-
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asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
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-
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input:
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||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
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||
|
arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "dotprod" ]
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expected:
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insns:
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-
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asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
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-
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input:
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||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
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||
|
arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "dotprod" ]
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expected:
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insns:
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-
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asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
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-
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input:
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||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
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||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "dotprod" ]
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expected:
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insns:
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-
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asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
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-
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input:
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||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "dotprod" ]
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expected:
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insns:
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-
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asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
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-
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input:
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||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "dotprod" ]
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expected:
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insns:
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-
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asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
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-
|
||
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input:
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||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
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arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a55" ]
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|
expected:
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||
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insns:
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-
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|
asm_text: "udot v0.2s, v1.8b, v2.8b"
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-
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input:
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|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a55" ]
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expected:
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||
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insns:
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-
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asm_text: "sdot v0.2s, v1.8b, v2.8b"
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-
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input:
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|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a55" ]
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expected:
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||
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insns:
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-
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asm_text: "udot v0.4s, v1.16b, v2.16b"
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-
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input:
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|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
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arch: "CS_ARCH_AARCH64"
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|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a55" ]
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expected:
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insns:
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-
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asm_text: "sdot v0.4s, v1.16b, v2.16b"
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-
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input:
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||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
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arch: "CS_ARCH_AARCH64"
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|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a55" ]
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expected:
|
||
|
insns:
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|
-
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asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
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|
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|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
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arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a55" ]
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||
|
expected:
|
||
|
insns:
|
||
|
-
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||
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asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
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||
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|
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|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
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||
|
arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a55" ]
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expected:
|
||
|
insns:
|
||
|
-
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||
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asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
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|
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|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
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||
|
arch: "CS_ARCH_AARCH64"
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||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a55" ]
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||
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expected:
|
||
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insns:
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|
-
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asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
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||
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|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
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|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a55" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
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||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a55" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
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||
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|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
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|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
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||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
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||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a75" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a75" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a75" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a75" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a75" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a75" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a75" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a75" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a75" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a75" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a77" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a77" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a77" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a77" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a77" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a77" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a77" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a77" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a77" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a77" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a78" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a78" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a78" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a78" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a78" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a78" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a78" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a78" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a78" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a78" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-x1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-x1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-x1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-x1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-x1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-x1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-x1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-x1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-x1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-x1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "tsv110" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "tsv110" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "tsv110" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "tsv110" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "tsv110" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "tsv110" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "tsv110" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "tsv110" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "tsv110" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "tsv110" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-r82" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-r82" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-r82" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-r82" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-r82" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-r82" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-r82" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-r82" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-r82" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-r82" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8r" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8r" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8r" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8r" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8r" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8r" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8r" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8r" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8r" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8r" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1a" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1a" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1a" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1a" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1a" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1a" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1a" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1a" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1a" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1a" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x2e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1b" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x0e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1b" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.8b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x6e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1b" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0x94, 0x82, 0x4e ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1b" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.16b"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1b" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0xa2, 0x0f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1b" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.2s, v1.8b, v2.4b[1]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1b" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0xa2, 0x4f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1b" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "sdot v0.4s, v1.16b, v2.4b[3]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe0, 0x82, 0x2f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1b" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.2s, v1.8b, v2.4b[0]"
|
||
|
|
||
|
-
|
||
|
input:
|
||
|
bytes: [ 0x20, 0xe8, 0x82, 0x6f ]
|
||
|
arch: "CS_ARCH_AARCH64"
|
||
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ampere1b" ]
|
||
|
expected:
|
||
|
insns:
|
||
|
-
|
||
|
asm_text: "udot v0.4s, v1.16b, v2.4b[2]"
|