mirror of
https://github.com/hedge-dev/XenonRecomp.git
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179 lines
6.0 KiB
C
179 lines
6.0 KiB
C
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// Copyright © 2024 Rot127 <unisono@quyllur.org>
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// SPDX-License-Identifier: BSD-3
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#ifndef TEST_DETAIL_X86_H
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#define TEST_DETAIL_X86_H
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#include "test_compare.h"
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#include <cyaml/cyaml.h>
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#include <capstone/capstone.h>
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#include <stdint.h>
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typedef struct {
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char *type;
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char *access;
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uint8_t size;
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char *reg;
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int64_t imm;
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char *mem_segment;
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char *mem_base;
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char *mem_index;
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int mem_scale;
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int64_t mem_disp;
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char *avx_bcast;
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tbool avx_zero_opmask;
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} TestDetailX86Op;
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static const cyaml_schema_value_t test_detail_x86_op_sys_psr_schema = {
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CYAML_VALUE_STRING(CYAML_FLAG_POINTER, char, 0, CYAML_UNLIMITED),
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};
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static const cyaml_schema_field_t test_detail_x86_op_mapping_schema[] = {
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CYAML_FIELD_STRING_PTR("type", CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86Op, type, 0, CYAML_UNLIMITED),
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CYAML_FIELD_STRING_PTR("access",
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CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86Op, access, 0, CYAML_UNLIMITED),
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CYAML_FIELD_UINT("size", CYAML_FLAG_OPTIONAL, TestDetailX86Op, size),
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CYAML_FIELD_STRING_PTR("reg", CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86Op, reg, 0, CYAML_UNLIMITED),
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CYAML_FIELD_INT("imm", CYAML_FLAG_OPTIONAL, TestDetailX86Op, imm),
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CYAML_FIELD_STRING_PTR(
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"mem_segment", CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86Op, mem_segment, 0, CYAML_UNLIMITED),
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CYAML_FIELD_STRING_PTR("mem_base",
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CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86Op, mem_base, 0, CYAML_UNLIMITED),
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CYAML_FIELD_STRING_PTR("mem_index",
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CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86Op, mem_index, 0, CYAML_UNLIMITED),
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CYAML_FIELD_INT("mem_disp", CYAML_FLAG_OPTIONAL, TestDetailX86Op,
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mem_disp),
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CYAML_FIELD_INT("mem_scale", CYAML_FLAG_OPTIONAL, TestDetailX86Op,
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mem_scale),
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CYAML_FIELD_INT("avx_zero_opmask", CYAML_FLAG_OPTIONAL, TestDetailX86Op,
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avx_zero_opmask),
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CYAML_FIELD_STRING_PTR("avx_bcast",
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CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86Op, avx_bcast, 0, CYAML_UNLIMITED),
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CYAML_FIELD_END
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};
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static const cyaml_schema_value_t test_detail_x86_op_schema = {
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CYAML_VALUE_MAPPING(CYAML_FLAG_POINTER, TestDetailX86Op,
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test_detail_x86_op_mapping_schema),
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};
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static const cyaml_schema_value_t test_detail_x86_opcode_schema = {
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CYAML_VALUE_UINT(CYAML_FLAG_DEFAULT, uint8_t),
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};
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static const cyaml_schema_value_t test_detail_x86_string_schema = {
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CYAML_VALUE_STRING(CYAML_FLAG_POINTER, char, 0, CYAML_UNLIMITED),
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};
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typedef struct {
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char *sib_index;
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char *sib_base;
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char *xop_cc;
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char *sse_cc;
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char *avx_cc;
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char *avx_rm;
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char *prefix[4];
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uint8_t opcode[4];
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uint8_t rex;
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uint8_t addr_size;
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uint8_t modrm;
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uint8_t sib;
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int64_t disp;
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int8_t sib_scale;
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tbool avx_sae;
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char **eflags;
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size_t eflags_count;
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char **fpu_flags;
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size_t fpu_flags_count;
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uint8_t enc_modrm_offset;
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uint8_t enc_disp_offset;
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uint8_t enc_disp_size;
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uint8_t enc_imm_offset;
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uint8_t enc_imm_size;
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TestDetailX86Op **operands;
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uint32_t operands_count;
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} TestDetailX86;
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static const cyaml_schema_field_t test_detail_x86_mapping_schema[] = {
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CYAML_FIELD_STRING_PTR("sib_index",
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CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86, sib_index, 0, CYAML_UNLIMITED),
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CYAML_FIELD_STRING_PTR("sib_base",
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CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86, sib_base, 0, CYAML_UNLIMITED),
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CYAML_FIELD_STRING_PTR("xop_cc",
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CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86, xop_cc, 0, CYAML_UNLIMITED),
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CYAML_FIELD_STRING_PTR("sse_cc",
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CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86, sse_cc, 0, CYAML_UNLIMITED),
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CYAML_FIELD_STRING_PTR("avx_cc",
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CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86, avx_cc, 0, CYAML_UNLIMITED),
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CYAML_FIELD_STRING_PTR("avx_rm",
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CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86, avx_rm, 0, CYAML_UNLIMITED),
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CYAML_FIELD_SEQUENCE_FIXED("prefix", CYAML_FLAG_OPTIONAL, TestDetailX86,
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prefix, &test_detail_x86_string_schema, 4),
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CYAML_FIELD_SEQUENCE_FIXED("opcode", CYAML_FLAG_OPTIONAL, TestDetailX86,
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opcode, &test_detail_x86_opcode_schema, 4),
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CYAML_FIELD_UINT("rex", CYAML_FLAG_OPTIONAL, TestDetailX86, rex),
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CYAML_FIELD_UINT("addr_size", CYAML_FLAG_OPTIONAL, TestDetailX86,
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addr_size),
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CYAML_FIELD_UINT("modrm", CYAML_FLAG_OPTIONAL, TestDetailX86, modrm),
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CYAML_FIELD_UINT("sib", CYAML_FLAG_OPTIONAL, TestDetailX86, sib),
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CYAML_FIELD_INT("disp", CYAML_FLAG_OPTIONAL, TestDetailX86, disp),
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CYAML_FIELD_INT("sib_scale", CYAML_FLAG_OPTIONAL, TestDetailX86,
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sib_scale),
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CYAML_FIELD_INT("avx_sae", CYAML_FLAG_OPTIONAL, TestDetailX86, avx_sae),
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CYAML_FIELD_SEQUENCE("eflags", CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86, eflags,
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&test_detail_x86_string_schema, 0,
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CYAML_UNLIMITED),
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CYAML_FIELD_SEQUENCE(
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"fpu_flags", CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86, fpu_flags, &test_detail_x86_string_schema, 0,
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CYAML_UNLIMITED),
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CYAML_FIELD_UINT("enc_modrm_offset", CYAML_FLAG_OPTIONAL, TestDetailX86,
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enc_modrm_offset),
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CYAML_FIELD_UINT("enc_disp_offset", CYAML_FLAG_OPTIONAL, TestDetailX86,
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enc_disp_offset),
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CYAML_FIELD_UINT("enc_disp_size", CYAML_FLAG_OPTIONAL, TestDetailX86,
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enc_disp_size),
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CYAML_FIELD_UINT("enc_imm_offset", CYAML_FLAG_OPTIONAL, TestDetailX86,
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enc_imm_offset),
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CYAML_FIELD_UINT("enc_imm_size", CYAML_FLAG_OPTIONAL, TestDetailX86,
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enc_imm_size),
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CYAML_FIELD_SEQUENCE(
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"operands", CYAML_FLAG_POINTER | CYAML_FLAG_OPTIONAL,
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TestDetailX86, operands, &test_detail_x86_op_schema, 0,
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CYAML_UNLIMITED), // 0-MAX options
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CYAML_FIELD_END
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};
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TestDetailX86 *test_detail_x86_new();
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TestDetailX86 *test_detail_x86_clone(TestDetailX86 *detail);
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void test_detail_x86_free(TestDetailX86 *detail);
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TestDetailX86Op *test_detail_x86_op_new();
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TestDetailX86Op *test_detail_x86_op_clone(TestDetailX86Op *detail);
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void test_detail_x86_op_free(TestDetailX86Op *detail);
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bool test_expected_x86(csh *handle, cs_x86 *actual, TestDetailX86 *expected);
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#endif // TEST_DETAIL_X86_H
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