mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
37 lines
1.1 KiB
YAML
37 lines
1.1 KiB
YAML
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test_cases:
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input:
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bytes: [ 0xf0, 0xff, 0x20, 0x05, 0xf0, 0xff, 0x60, 0x05, 0xf0, 0xff, 0xa0, 0x04, 0xf4, 0xff, 0xa0, 0x04, 0xf8, 0xff, 0xa0, 0x04, 0xf0, 0xff, 0xe0, 0x04, 0xf4, 0xff, 0xe0, 0x04, 0xf8, 0xff, 0xe0, 0x04, 0xf0, 0xff, 0x20, 0x04, 0xf4, 0xff, 0x20, 0x04, 0xf8, 0xff, 0x20, 0x04, 0xf0, 0xff, 0x60, 0x04, 0xf4, 0xff, 0x60, 0x04, 0xf8, 0xff, 0x60, 0x04 ]
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arch: "CS_ARCH_ARM"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_THUMB" ]
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expected:
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insns:
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asm_text: "vcnt.8 d16, d16"
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asm_text: "vcnt.8 q8, q8"
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asm_text: "vclz.i8 d16, d16"
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asm_text: "vclz.i16 d16, d16"
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asm_text: "vclz.i32 d16, d16"
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asm_text: "vclz.i8 q8, q8"
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asm_text: "vclz.i16 q8, q8"
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asm_text: "vclz.i32 q8, q8"
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asm_text: "vcls.s8 d16, d16"
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asm_text: "vcls.s16 d16, d16"
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asm_text: "vcls.s32 d16, d16"
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asm_text: "vcls.s8 q8, q8"
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asm_text: "vcls.s16 q8, q8"
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asm_text: "vcls.s32 q8, q8"
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