mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
45 lines
1.6 KiB
YAML
45 lines
1.6 KiB
YAML
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test_cases:
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-
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input:
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bytes: [ 0x6e, 0xeb, 0x00, 0x0c, 0x68, 0xeb, 0x19, 0x01, 0x67, 0xeb, 0x1a, 0x42, 0x66, 0xeb, 0x0a, 0x03, 0x65, 0xeb, 0x0e, 0x44, 0x64, 0xeb, 0x2b, 0x05, 0x63, 0xeb, 0x2c, 0x46, 0x62, 0xeb, 0x3c, 0x07, 0x61, 0xeb, 0x30, 0x48, 0x0e, 0xea, 0x00, 0x0c, 0x08, 0xea, 0x19, 0x01, 0x07, 0xea, 0x1a, 0x42, 0x06, 0xea, 0x0a, 0x03, 0x05, 0xea, 0x0e, 0x44, 0x04, 0xea, 0x2b, 0x05, 0x03, 0xea, 0x2c, 0x46, 0x02, 0xea, 0x3c, 0x07, 0x01, 0xea, 0x30, 0x48 ]
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arch: "CS_ARCH_ARM"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_THUMB" ]
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expected:
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insns:
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asm_text: "sbc.w r12, lr, r0"
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asm_text: "sbc.w r1, r8, r9, lsr #0x20"
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asm_text: "sbc.w r2, r7, r10, lsr #0x10"
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asm_text: "sbc.w r3, r6, r10"
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asm_text: "sbc.w r4, r5, lr, lsl #0x10"
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asm_text: "sbc.w r5, r4, r11, asr #0x20"
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asm_text: "sbc.w r6, r3, r12, asr #0x10"
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asm_text: "sbc.w r7, r2, r12, rrx"
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asm_text: "sbc.w r8, r1, r0, ror #0x10"
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asm_text: "and.w r12, lr, r0"
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asm_text: "and.w r1, r8, r9, lsr #0x20"
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asm_text: "and.w r2, r7, r10, lsr #0x10"
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asm_text: "and.w r3, r6, r10"
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asm_text: "and.w r4, r5, lr, lsl #0x10"
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asm_text: "and.w r5, r4, r11, asr #0x20"
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asm_text: "and.w r6, r3, r12, asr #0x10"
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asm_text: "and.w r7, r2, r12, rrx"
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asm_text: "and.w r8, r1, r0, ror #0x10"
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