mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-05 16:52:07 +00:00
Implement some instructions.
This commit is contained in:
Skyth
parent
57ebe48cf7
commit
28e6ba92f8
@ -6,7 +6,7 @@
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#include <disasm.h>
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#include <filesystem>
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#define TEST_FILE "add.elf"
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#define TEST_FILE "cond.elf"
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int main()
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{
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@ -69,6 +69,10 @@ int main()
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ppc_insn insn;
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while (base < end)
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{
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auto block = fn.SearchBlock(base);
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if (block != -1 && (fn.base + fn.blocks[block].base) == base)
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std::println(f, "loc_{:X}:", base);
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ppc::Disassemble(data, 4, base, insn);
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base += 4;
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@ -79,6 +83,8 @@ int main()
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}
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else
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{
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// TODO: need to handle instructions that treat r0 as 0
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std::println(f, "\t// {:x} {} {}", base - 4, insn.opcode->name, insn.op_str);
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switch (insn.opcode->id)
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{
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@ -88,17 +94,44 @@ int main()
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break;
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case PPC_INST_ADDI:
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 + {};", insn.operands[0], insn.operands[1], insn.operands[2]);
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std::println(f, "\tctx.r{}.s64 = ctx.r{}.s64 + {};", insn.operands[0], insn.operands[1], static_cast<int32_t>(insn.operands[2]));
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break;
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case PPC_INST_ADDIC:
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break;
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case PPC_INST_ADDIS:
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// TODO: validate the sign extend
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std::println(f, "\tctx.r{}.s64 = ctx.r{}.s64 + {};", insn.operands[0], insn.operands[1], static_cast<int32_t>(insn.operands[2] << 16));
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break;
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case PPC_INST_ADDZE:
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break;
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case PPC_INST_AND:
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// TODO: . variant
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 & ctx.r{}.u64;", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_ANDC:
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// TODO: . variant
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 & ~ctx.r{}.u64;", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_ANDI:
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// TODO: . variant
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 & {};", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_ANDIS:
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// TODO: . variant
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 & {};", insn.operands[0], insn.operands[1], insn.operands[2] << 16);
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break;
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case PPC_INST_ATTN:
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// undefined instruction
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break;
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case PPC_INST_B:
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case PPC_INST_BCTR:
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case PPC_INST_BCTRL:
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@ -159,8 +192,15 @@ int main()
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case PPC_INST_CNTLZD:
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case PPC_INST_CNTLZW:
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case PPC_INST_DB16CYC:
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case PPC_INST_DCBF:
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// no op
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break;
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case PPC_INST_DCBT:
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// no op
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break;
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case PPC_INST_DCBTST:
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case PPC_INST_DCBZ:
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case PPC_INST_DCBZL:
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@ -168,7 +208,12 @@ int main()
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case PPC_INST_DIVDU:
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case PPC_INST_DIVW:
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case PPC_INST_DIVWU:
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break;
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case PPC_INST_EIEIO:
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// no op
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break;
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case PPC_INST_EXTSB:
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case PPC_INST_EXTSH:
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case PPC_INST_EXTSW:
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@ -201,10 +246,26 @@ int main()
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case PPC_INST_FSQRTS:
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case PPC_INST_FSUB:
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case PPC_INST_FSUBS:
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break;
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case PPC_INST_LBZ:
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std::println(f, "\tctx.r{}.u64 = PPC_LOAD_U8({} + ctx.r{}.u32);", insn.operands[0], int32_t(insn.operands[1]), insn.operands[2]);
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break;
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case PPC_INST_LBZU:
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std::println(f, "\tea = {} + ctx.r{}.u32;", int32_t(insn.operands[1]), insn.operands[2]);
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std::println(f, "\tctx.r{}.u64 = PPC_LOAD_U8(ea);", insn.operands[0]);
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std::println(f, "\tctx.r{}.u64 = ea;", insn.operands[2]);
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break;
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case PPC_INST_LBZX:
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std::println(f, "\tctx.r{}.u64 = PPC_LOAD_U8(ctx.r{}.u32 + ctx.r{}.u32);", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_LD:
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std::println(f, "\tctx.r{}.u64 = PPC_LOAD_U64({} + ctx.r{}.u32);", insn.operands[0], int32_t(insn.operands[1]), insn.operands[2]);
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break;
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case PPC_INST_LDARX:
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case PPC_INST_LDU:
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case PPC_INST_LDX:
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@ -219,10 +280,15 @@ int main()
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break;
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case PPC_INST_LI:
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std::println(f, "\tctx.r{}.u64 = {};", insn.operands[0], insn.operands[1]);
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// TODO: validate the sign extend
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std::println(f, "\tctx.r{}.s64 = {};", insn.operands[0], int32_t(insn.operands[1]));
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break;
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case PPC_INST_LIS:
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// TODO: validate the sign extend
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std::println(f, "\tctx.r{}.s64 = {};", insn.operands[0], int32_t(insn.operands[1] << 16));
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break;
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case PPC_INST_LVEWX:
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case PPC_INST_LVEWX128:
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case PPC_INST_LVLX:
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@ -237,7 +303,10 @@ int main()
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case PPC_INST_LWARX:
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case PPC_INST_LWAX:
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case PPC_INST_LWBRX:
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break;
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case PPC_INST_LWSYNC:
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// no op
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break;
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case PPC_INST_LWZ:
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@ -280,17 +349,54 @@ int main()
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case PPC_INST_MULHW:
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case PPC_INST_MULHWU:
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case PPC_INST_MULLD:
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break;
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case PPC_INST_MULLI:
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std::println(f, "\tctx.r{}.s64 = ctx.r{}.s64 * {};", insn.operands[0], insn.operands[1], static_cast<int32_t>(insn.operands[2]));
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break;
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case PPC_INST_MULLW:
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break;
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case PPC_INST_NAND:
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std::println(f, "\tctx.r{}.u64 = ~(ctx.r{}.u64 & ctx.r{}.u64);", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_NEG:
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// TODO: . variant
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std::println(f, "\tctx.r{}.s64 = -ctx.r{}.s64;", insn.operands[0], insn.operands[1]);
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break;
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case PPC_INST_NOP:
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// no op
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break;
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case PPC_INST_NOR:
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std::println(f, "\tctx.r{}.u64 = ~(ctx.r{}.u64 | ctx.r{}.u64);", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_NOT:
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// TODO: . variant
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std::println(f, "\tctx.r{}.u64 = ~ctx.r{}.u64;", insn.operands[0], insn.operands[1]);
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break;
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case PPC_INST_OR:
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// TODO: . variant
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 | ctx.r{}.u64;", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_ORC:
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 | ~ctx.r{}.u64;", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_ORI:
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 | {}", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_ORIS:
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 | {}", insn.operands[0], insn.operands[1], insn.operands[2] << 16);
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break;
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case PPC_INST_RLDICL:
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case PPC_INST_RLDICR:
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case PPC_INST_RLDIMI:
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@ -457,9 +563,19 @@ int main()
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case PPC_INST_VUPKLSH:
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case PPC_INST_VXOR:
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case PPC_INST_VXOR128:
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break;
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case PPC_INST_XOR:
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// TODO: . variant
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 ^ ctx.r{}.u64;", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_XORI:
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 ^ {};", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_XORIS:
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std::println(f, "\tctx.r{}.u64 = ctx.r{}.u64 ^ {};", insn.operands[0], insn.operands[1], insn.operands[2] << 16);
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break;
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}
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}
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@ -9,10 +9,12 @@
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#define _byteswap_uint64 __builtin_bswap64
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#endif
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#define PPC_LOAD_U8(x) *(uint8_t*)(base + (x))
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#define PPC_LOAD_U16(x) _byteswap_ushort(*(uint16_t*)(base + (x)))
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#define PPC_LOAD_U32(x) _byteswap_ulong(*(uint32_t*)(base + (x)))
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#define PPC_LOAD_U64(x) _byteswap_uint64(*(uint64_t*)(base + (x)))
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#define PPC_STORE_U8(x, y) *(uint8_t*)(base + (x)) = (y)
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#define PPC_STORE_U16(x, y) *(uint16_t*)(base + (x)) = _byteswap_ushort(y)
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#define PPC_STORE_U32(x, y) *(uint32_t*)(base + (x)) = _byteswap_ulong(y)
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#define PPC_STORE_U64(x, y) *(uint64_t*)(base + (x)) = _byteswap_uint64(y)
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@ -34,6 +36,14 @@ struct PPCRegister
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};
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};
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struct PPCCRRegister
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{
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uint8_t lt;
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uint8_t gt;
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uint8_t eq;
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uint8_t so;
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};
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typedef float float128[4];
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struct PPCContext
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@ -45,16 +55,16 @@ struct PPCContext
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{
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struct
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{
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uint32_t cr0;
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uint32_t cr1;
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uint32_t cr2;
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uint32_t cr3;
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uint32_t cr4;
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uint32_t cr5;
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uint32_t cr6;
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uint32_t cr7;
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PPCCRRegister cr0;
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PPCCRRegister cr1;
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PPCCRRegister cr2;
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PPCCRRegister cr3;
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PPCCRRegister cr4;
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PPCCRRegister cr5;
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PPCCRRegister cr6;
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PPCCRRegister cr7;
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};
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uint32_t cr[8];
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PPCCRRegister cr[8];
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};
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union
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