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https://github.com/hedge-dev/XenonRecomp.git
synced 2025-04-19 19:01:17 +00:00
Enable strict math, adjust vector conversions.
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1914b941a2
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@ -1283,11 +1283,11 @@ bool Recompiler::Recompile(const Function& fn, uint32_t base, const ppc_insn& in
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case PPC_INST_VAND:
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case PPC_INST_VAND128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_and_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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println("\t_mm_store_si128((__m128i*)ctx.v{}.u8, _mm_and_si128(_mm_load_si128((__m128i*)ctx.v{}.u8), _mm_load_si128((__m128i*)ctx.v{}.u8)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VANDC128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_andnot_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[2], insn.operands[1]);
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println("\t_mm_store_si128((__m128i*)ctx.v{}.u8, _mm_andnot_si128(_mm_load_si128((__m128i*)ctx.v{}.u8), _mm_load_si128((__m128i*)ctx.v{}.u8)));", insn.operands[0], insn.operands[2], insn.operands[1]);
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break;
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case PPC_INST_VAVGSB:
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@ -1462,12 +1462,12 @@ bool Recompiler::Recompile(const Function& fn, uint32_t base, const ppc_insn& in
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case PPC_INST_VNMSUBFP:
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case PPC_INST_VNMSUBFP128:
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println("\tctx.fpscr.setFlushMode(true);");
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_fnmadd_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2], insn.operands[3]);
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_xor_ps(_mm_sub_ps(_mm_mul_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)), _mm_load_ps(ctx.v{}.f32)), _mm_castsi128_ps(_mm_set1_epi32(int(0x80000000)))));", insn.operands[0], insn.operands[1], insn.operands[2], insn.operands[3]);
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break;
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case PPC_INST_VOR:
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case PPC_INST_VOR128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_or_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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println("\t_mm_store_si128((__m128i*)ctx.v{}.u8, _mm_or_si128(_mm_load_si128((__m128i*)ctx.v{}.u8), _mm_load_si128((__m128i*)ctx.v{}.u8)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VPERM:
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@ -1554,7 +1554,7 @@ bool Recompiler::Recompile(const Function& fn, uint32_t base, const ppc_insn& in
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break;
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case PPC_INST_VSEL:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_or_ps(_mm_andnot_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)), _mm_and_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32))));", insn.operands[0], insn.operands[3], insn.operands[1], insn.operands[3], insn.operands[2]);
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println("\t_mm_store_si128((__m128i*)ctx.v{}.u8, _mm_or_si128(_mm_andnot_si128(_mm_load_si128((__m128i*)ctx.v{}.u8), _mm_load_si128((__m128i*)ctx.v{}.u8)), _mm_and_si128(_mm_load_si128((__m128i*)ctx.v{}.u8), _mm_load_si128((__m128i*)ctx.v{}.u8))));", insn.operands[0], insn.operands[3], insn.operands[1], insn.operands[3], insn.operands[2]);
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break;
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case PPC_INST_VSLB:
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@ -1706,7 +1706,7 @@ bool Recompiler::Recompile(const Function& fn, uint32_t base, const ppc_insn& in
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case PPC_INST_VXOR:
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case PPC_INST_VXOR128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_xor_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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println("\t_mm_store_si128((__m128i*)ctx.v{}.u8, _mm_xor_si128(_mm_load_si128((__m128i*)ctx.v{}.u8), _mm_load_si128((__m128i*)ctx.v{}.u8)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_XOR:
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@ -1,7 +1,8 @@
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project("PowerSample")
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add_compile_options(
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"-march=x86-64-v3"
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"/arch:AVX"
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"/fp:strict"
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"-Wno-unused-label"
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"-Wno-unused-variable")
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@ -461,7 +461,7 @@ inline uint8_t VectorShiftTableR[] =
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inline __m128i _mm_adds_epu32(__m128i a, __m128i b)
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{
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return _mm_add_epi32(_mm_min_epu32(a, _mm_xor_si128(b, _mm_cmpeq_epi32(b, b))), b);
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return _mm_add_epi32(a, _mm_min_epu32(_mm_xor_si128(a, _mm_cmpeq_epi32(a, a)), b));
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}
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inline __m128i _mm_avg_epi8(__m128i a, __m128i b)
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@ -476,13 +476,16 @@ inline __m128i _mm_avg_epi16(__m128i a, __m128i b)
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return _mm_xor_si128(c, _mm_avg_epu16(_mm_xor_si128(c, a), _mm_xor_si128(c, b)));
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}
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inline __m128 _mm_cvtepu32_ps_(__m128i v)
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inline __m128 _mm_cvtepu32_ps_(__m128i src1)
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{
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__m128i v2 = _mm_srli_epi32(v, 1);
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__m128i v1 = _mm_sub_epi32(v, v2);
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__m128 v2f = _mm_cvtepi32_ps(v2);
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__m128 v1f = _mm_cvtepi32_ps(v1);
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return _mm_add_ps(v2f, v1f);
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__m128i xmm1 = _mm_add_epi32(src1, _mm_set1_epi32(127));
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__m128i xmm0 = _mm_slli_epi32(src1, 31 - 8);
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xmm0 = _mm_srli_epi32(xmm0, 31);
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xmm0 = _mm_add_epi32(xmm0, xmm1);
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xmm0 = _mm_srai_epi32(xmm0, 8);
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xmm0 = _mm_add_epi32(xmm0, _mm_set1_epi32(0x4F800000));
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__m128 xmm2 = _mm_cvtepi32_ps(src1);
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return _mm_blendv_ps(xmm2, _mm_castsi128_ps(xmm0), _mm_castsi128_ps(src1));
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}
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inline __m128i _mm_perm_epi8_(__m128i a, __m128i b, __m128i c)
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@ -504,19 +507,14 @@ inline __m128i _mm_cmpgt_epu16(__m128i a, __m128i b)
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return _mm_cmpgt_epi16(_mm_xor_si128(a, c), _mm_xor_si128(b, c));
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}
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inline __m128i _mm_vctsxs(__m128 a)
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inline __m128i _mm_vctsxs(__m128 src1)
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{
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__m128i result = _mm_cvttps_epi32(a);
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__m128 max_val = _mm_set1_ps(2147483648.0f);
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__m128 cmp_mask = _mm_cmpgt_ps(a, max_val);
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result = _mm_xor_si128(result, _mm_castps_si128(cmp_mask));
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__m128 ord_mask = _mm_cmpord_ps(a, a);
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result = _mm_and_si128(result, _mm_castps_si128(ord_mask));
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return result;
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__m128 xmm2 = _mm_cmpunord_ps(src1, src1);
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__m128i xmm0 = _mm_cvttps_epi32(src1);
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__m128i xmm1 = _mm_cmpeq_epi32(xmm0, _mm_set1_epi32(INT_MIN));
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xmm1 = _mm_andnot_si128(_mm_castps_si128(src1), xmm1);
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__m128 dest = _mm_blendv_ps(_mm_castsi128_ps(xmm0), _mm_castsi128_ps(_mm_set1_epi32(INT_MAX)), _mm_castsi128_ps(xmm1));
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return _mm_andnot_si128(_mm_castps_si128(xmm2), _mm_castps_si128(dest));
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}
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inline __m128i _mm_vsr(__m128i a, __m128i b)
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