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https://github.com/hedge-dev/XenonRecomp.git
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Handle float to integer conversion overflow.
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@ -433,17 +433,17 @@ bool Recompiler::Recompile(const Function& fn, uint32_t base, const ppc_insn& in
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case PPC_INST_FCTID:
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println("\tctx.fpscr.setFlushMode(false);");
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println("\tctx.f{}.s64 = _mm_cvtsd_si64(_mm_load1_pd(&ctx.f{}.f64));", insn.operands[0], insn.operands[1]);
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println("\tctx.f{}.s64 = (ctx.f{}.f64 > double(LLONG_MAX)) ? LLONG_MAX : _mm_cvtsd_si64(_mm_load1_pd(&ctx.f{}.f64));", insn.operands[0], insn.operands[1], insn.operands[1]);
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break;
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case PPC_INST_FCTIDZ:
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println("\tctx.fpscr.setFlushMode(false);");
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println("\tctx.f{}.s64 = _mm_cvttsd_si64(_mm_load1_pd(&ctx.f{}.f64));", insn.operands[0], insn.operands[1]);
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println("\tctx.f{}.s64 = (ctx.f{}.f64 > double(LLONG_MAX)) ? LLONG_MAX : _mm_cvttsd_si64(_mm_load1_pd(&ctx.f{}.f64));", insn.operands[0], insn.operands[1], insn.operands[1]);
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break;
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case PPC_INST_FCTIWZ:
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println("\tctx.fpscr.setFlushMode(false);");
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println("\tctx.f{}.s64 = _mm_cvttsd_si32(_mm_load1_pd(&ctx.f{}.f64));", insn.operands[0], insn.operands[1]);
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println("\tctx.f{}.s64 = (ctx.f{}.f64 > double(INT_MAX)) ? INT_MAX : _mm_cvttsd_si32(_mm_load1_pd(&ctx.f{}.f64));", insn.operands[0], insn.operands[1], insn.operands[1]);
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break;
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case PPC_INST_FDIV:
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@ -518,7 +518,7 @@ bool Recompiler::Recompile(const Function& fn, uint32_t base, const ppc_insn& in
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case PPC_INST_FRES:
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println("\tctx.fpscr.setFlushMode(false);");
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println("\tctx.f{}.f64 = 1.0f / float(ctx.f{}.f64);", insn.operands[0], insn.operands[1]);
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println("\tctx.f{}.f64 = float(1.0 / ctx.f{}.f64);", insn.operands[0], insn.operands[1]);
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break;
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case PPC_INST_FRSP:
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