mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
Implement some vector instructions.
This commit is contained in:
Skyth
parent
d2c5000af1
commit
d4c267c123
@ -43,7 +43,6 @@ int main()
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image.symbols.emplace(std::format("sub_{:X}", f.base), f.base, f.size, Symbol_Function);
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}
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std::vector<Function> missingFunctions;
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for (const auto& section : image.sections)
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{
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if (!(section.flags & SectionFlags_Code))
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@ -81,7 +80,7 @@ int main()
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}
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else
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{
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auto& missingFn = missingFunctions.emplace_back(Function::Analyze(data, dataEnd - data, base));
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auto& missingFn = functions.emplace_back(Function::Analyze(data, dataEnd - data, base));
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image.symbols.emplace(std::format("sub_{:X}", missingFn.base), missingFn.base, missingFn.size, Symbol_Function);
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base += missingFn.size;
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@ -705,14 +704,21 @@ int main()
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case PPC_INST_LVEWX:
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case PPC_INST_LVEWX128:
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case PPC_INST_LVX:
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case PPC_INST_LVX128:
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// TODO: endian swap
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print("\t_mm_store_ps(ctx.v{}.f32, _mm_load_ps(reinterpret_cast<float*>(base + ", insn.operands[0]);
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if (insn.operands[1] != 0)
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print("ctx.r{}.u32 + ", insn.operands[1]);
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println("ctx.r{}.u32)));", insn.operands[2]);
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break;
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case PPC_INST_LVLX:
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case PPC_INST_LVLX128:
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case PPC_INST_LVRX:
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case PPC_INST_LVRX128:
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case PPC_INST_LVSL:
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case PPC_INST_LVSR:
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case PPC_INST_LVX:
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case PPC_INST_LVX128:
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break;
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case PPC_INST_LWA:
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@ -1117,15 +1123,26 @@ int main()
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case PPC_INST_VADDFP:
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case PPC_INST_VADDFP128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_add_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VADDSHS:
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case PPC_INST_VADDUBM:
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case PPC_INST_VADDUBS:
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case PPC_INST_VADDUHM:
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case PPC_INST_VADDUWM:
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case PPC_INST_VADDUWS:
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break;
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case PPC_INST_VAND:
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case PPC_INST_VAND128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_and_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VANDC128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_andnot_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VAVGSB:
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case PPC_INST_VAVGSH:
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case PPC_INST_VAVGUB:
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@ -1147,16 +1164,42 @@ int main()
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case PPC_INST_VCSXWFP128:
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case PPC_INST_VCTSXS:
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case PPC_INST_VCUXWFP128:
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break;
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case PPC_INST_VEXPTEFP128:
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// TODO: this doesn't exist despite being documented?
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//println("\t_mm_store_ps(ctx.v{}.f32, _mm_exp2_ps(_mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1]);
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break;
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case PPC_INST_VLOGEFP128:
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// TODO: this doesn't exist despite being documented?
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//println("\t_mm_store_ps(ctx.v{}.f32, _mm_log2_ps(_mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1]);
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break;
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case PPC_INST_VMADDCFP128:
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// TODO: wrong argument order
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_fmadd_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2], insn.operands[3]);
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break;
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case PPC_INST_VMADDFP:
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case PPC_INST_VMADDFP128:
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// TODO: wrong argument order
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_fmadd_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2], insn.operands[3]);
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break;
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case PPC_INST_VMAXFP:
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case PPC_INST_VMAXFP128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_max_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VMAXSW:
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break;
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case PPC_INST_VMINFP:
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case PPC_INST_VMINFP128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_min_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VMRGHB:
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case PPC_INST_VMRGHH:
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case PPC_INST_VMRGHW:
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@ -1165,27 +1208,55 @@ int main()
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case PPC_INST_VMRGLH:
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case PPC_INST_VMRGLW:
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case PPC_INST_VMRGLW128:
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break;
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case PPC_INST_VMSUM3FP128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_dp_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32), 0xEF));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VMSUM4FP128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_dp_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32), 0xFF));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VMULFP128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_mul_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VNMSUBFP:
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case PPC_INST_VNMSUBFP128:
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// TODO: wrong argument order
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_fnmadd_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2], insn.operands[3]);
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break;
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case PPC_INST_VOR:
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case PPC_INST_VOR128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_or_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VPERM:
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case PPC_INST_VPERM128:
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case PPC_INST_VPERMWI128:
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case PPC_INST_VPKD3D128:
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case PPC_INST_VPKSHUS:
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break;
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case PPC_INST_VREFP:
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case PPC_INST_VREFP128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_rcp_ps(_mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1]);
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break;
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case PPC_INST_VRFIM128:
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case PPC_INST_VRFIN:
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case PPC_INST_VRFIN128:
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case PPC_INST_VRFIZ128:
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case PPC_INST_VRLIMI128:
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break;
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case PPC_INST_VRSQRTEFP:
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case PPC_INST_VRSQRTEFP128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_rsqrt_ps(_mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1]);
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break;
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case PPC_INST_VSEL:
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case PPC_INST_VSLB:
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case PPC_INST_VSLDOI:
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@ -1201,8 +1272,13 @@ int main()
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case PPC_INST_VSRAW128:
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case PPC_INST_VSRW:
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case PPC_INST_VSRW128:
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break;
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case PPC_INST_VSUBFP:
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case PPC_INST_VSUBFP128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_sub_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_VSUBSWS:
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case PPC_INST_VSUBUBS:
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case PPC_INST_VSUBUHM:
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@ -1211,8 +1287,11 @@ int main()
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case PPC_INST_VUPKHSH:
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case PPC_INST_VUPKLSB128:
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case PPC_INST_VUPKLSH:
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break;
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case PPC_INST_VXOR:
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case PPC_INST_VXOR128:
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println("\t_mm_store_ps(ctx.v{}.f32, _mm_xor_ps(_mm_load_ps(ctx.v{}.f32), _mm_load_ps(ctx.v{}.f32)));", insn.operands[0], insn.operands[1], insn.operands[2]);
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break;
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case PPC_INST_XOR:
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