test_cases: - input: bytes: [ 0x08, 0x1c, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 0, vgx2], { z0.h, z1.h }" - input: bytes: [ 0x08, 0x1c, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 0, vgx2], { z0.h, z1.h }" - input: bytes: [ 0x4d, 0x5d, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 5, vgx2], { z10.h, z11.h }" - input: bytes: [ 0x4d, 0x5d, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 5, vgx2], { z10.h, z11.h }" - input: bytes: [ 0x8f, 0x7d, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 7, vgx2], { z12.h, z13.h }" - input: bytes: [ 0x8f, 0x7d, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 7, vgx2], { z12.h, z13.h }" - input: bytes: [ 0xcf, 0x7f, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 7, vgx2], { z30.h, z31.h }" - input: bytes: [ 0xcf, 0x7f, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 7, vgx2], { z30.h, z31.h }" - input: bytes: [ 0x0d, 0x1e, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 5, vgx2], { z16.h, z17.h }" - input: bytes: [ 0x0d, 0x1e, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 5, vgx2], { z16.h, z17.h }" - input: bytes: [ 0x09, 0x1c, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 1, vgx2], { z0.h, z1.h }" - input: bytes: [ 0x09, 0x1c, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 1, vgx2], { z0.h, z1.h }" - input: bytes: [ 0x48, 0x5e, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 0, vgx2], { z18.h, z19.h }" - input: bytes: [ 0x48, 0x5e, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 0, vgx2], { z18.h, z19.h }" - input: bytes: [ 0x88, 0x1d, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 0, vgx2], { z12.h, z13.h }" - input: bytes: [ 0x88, 0x1d, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 0, vgx2], { z12.h, z13.h }" - input: bytes: [ 0x09, 0x5c, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 1, vgx2], { z0.h, z1.h }" - input: bytes: [ 0x09, 0x5c, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 1, vgx2], { z0.h, z1.h }" - input: bytes: [ 0xcd, 0x1e, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 5, vgx2], { z22.h, z23.h }" - input: bytes: [ 0xcd, 0x1e, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 5, vgx2], { z22.h, z23.h }" - input: bytes: [ 0x0a, 0x7d, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 2, vgx2], { z8.h, z9.h }" - input: bytes: [ 0x0a, 0x7d, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 2, vgx2], { z8.h, z9.h }" - input: bytes: [ 0x8f, 0x3d, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w9, 7, vgx2], { z12.h, z13.h }" - input: bytes: [ 0x8f, 0x3d, 0xe4, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w9, 7, vgx2], { z12.h, z13.h }" - input: bytes: [ 0x08, 0x1c, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 0, vgx4], { z0.h - z3.h }" - input: bytes: [ 0x08, 0x1c, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 0, vgx4], { z0.h - z3.h }" - input: bytes: [ 0x0d, 0x5d, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 5, vgx4], { z8.h - z11.h }" - input: bytes: [ 0x0d, 0x5d, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 5, vgx4], { z8.h - z11.h }" - input: bytes: [ 0x8f, 0x7d, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 7, vgx4], { z12.h - z15.h }" - input: bytes: [ 0x8f, 0x7d, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 7, vgx4], { z12.h - z15.h }" - input: bytes: [ 0x8f, 0x7f, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 7, vgx4], { z28.h - z31.h }" - input: bytes: [ 0x8f, 0x7f, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 7, vgx4], { z28.h - z31.h }" - input: bytes: [ 0x0d, 0x1e, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 5, vgx4], { z16.h - z19.h }" - input: bytes: [ 0x0d, 0x1e, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 5, vgx4], { z16.h - z19.h }" - input: bytes: [ 0x09, 0x1c, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 1, vgx4], { z0.h - z3.h }" - input: bytes: [ 0x09, 0x1c, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 1, vgx4], { z0.h - z3.h }" - input: bytes: [ 0x08, 0x5e, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 0, vgx4], { z16.h - z19.h }" - input: bytes: [ 0x08, 0x5e, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 0, vgx4], { z16.h - z19.h }" - input: bytes: [ 0x88, 0x1d, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 0, vgx4], { z12.h - z15.h }" - input: bytes: [ 0x88, 0x1d, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 0, vgx4], { z12.h - z15.h }" - input: bytes: [ 0x09, 0x5c, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 1, vgx4], { z0.h - z3.h }" - input: bytes: [ 0x09, 0x5c, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w10, 1, vgx4], { z0.h - z3.h }" - input: bytes: [ 0x8d, 0x1e, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 5, vgx4], { z20.h - z23.h }" - input: bytes: [ 0x8d, 0x1e, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w8, 5, vgx4], { z20.h - z23.h }" - input: bytes: [ 0x0a, 0x7d, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 2, vgx4], { z8.h - z11.h }" - input: bytes: [ 0x0a, 0x7d, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w11, 2, vgx4], { z8.h - z11.h }" - input: bytes: [ 0x8f, 0x3d, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w9, 7, vgx4], { z12.h - z15.h }" - input: bytes: [ 0x8f, 0x3d, 0xe5, 0xc1 ] arch: "CS_ARCH_AARCH64" options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+b16b16" ] expected: insns: - asm_text: "bfsub za.h[w9, 7, vgx4], { z12.h - z15.h }"