test_cases:
  -
    input:
      bytes: [ 0x20, 0x98, 0xc2, 0x45 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "ummla z0.s, z1.b, z2.b"

  -
    input:
      bytes: [ 0x20, 0x98, 0x02, 0x45 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "smmla z0.s, z1.b, z2.b"

  -
    input:
      bytes: [ 0x20, 0x98, 0x82, 0x45 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "usmmla z0.s, z1.b, z2.b"

  -
    input:
      bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "movprfx z0, z7"

  -
    input:
      bytes: [ 0x20, 0x98, 0xc2, 0x45 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "ummla z0.s, z1.b, z2.b"

  -
    input:
      bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "movprfx z0, z7"

  -
    input:
      bytes: [ 0x20, 0x98, 0x02, 0x45 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "smmla z0.s, z1.b, z2.b"

  -
    input:
      bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "movprfx z0, z7"

  -
    input:
      bytes: [ 0x20, 0x98, 0x82, 0x45 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "usmmla z0.s, z1.b, z2.b"

  -
    input:
      bytes: [ 0x20, 0x78, 0x82, 0x44 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "usdot z0.s, z1.b, z2.b"

  -
    input:
      bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "movprfx z0, z7"

  -
    input:
      bytes: [ 0x20, 0x78, 0x82, 0x44 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "usdot z0.s, z1.b, z2.b"

  -
    input:
      bytes: [ 0x20, 0x18, 0xa2, 0x44 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "usdot z0.s, z1.b, z2.b[0]"

  -
    input:
      bytes: [ 0x20, 0x1c, 0xba, 0x44 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "sudot z0.s, z1.b, z2.b[3]"

  -
    input:
      bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "movprfx z0, z7"

  -
    input:
      bytes: [ 0x20, 0x18, 0xa2, 0x44 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "usdot z0.s, z1.b, z2.b[0]"

  -
    input:
      bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "movprfx z0, z7"

  -
    input:
      bytes: [ 0x20, 0x1c, 0xa2, 0x44 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
    expected:
      insns:
        -
          asm_text: "sudot z0.s, z1.b, z2.b[0]"