test_cases:
  -
    input:
      bytes: [ 0x00, 0xe0, 0x10, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "stnt1w { z0.s }, p0, [x0]"

  -
    input:
      bytes: [ 0x00, 0xe0, 0x10, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "stnt1w { z0.s }, p0, [x0]"

  -
    input:
      bytes: [ 0xb7, 0xed, 0x18, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "stnt1w { z23.s }, p3, [x13, #-8, mul vl]"

  -
    input:
      bytes: [ 0x55, 0xf5, 0x17, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "stnt1w { z21.s }, p5, [x10, #7, mul vl]"

  -
    input:
      bytes: [ 0x00, 0x60, 0x00, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "stnt1w { z0.s }, p0, [x0, x0, lsl #2]"

  -
    input:
      bytes: [ 0x00, 0xe0, 0x10, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "stnt1w { z0.s }, p0, [x0]"

  -
    input:
      bytes: [ 0x00, 0xe0, 0x10, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "stnt1w { z0.s }, p0, [x0]"

  -
    input:
      bytes: [ 0xb7, 0xed, 0x18, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "stnt1w { z23.s }, p3, [x13, #-8, mul vl]"

  -
    input:
      bytes: [ 0x55, 0xf5, 0x17, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "stnt1w { z21.s }, p5, [x10, #7, mul vl]"

  -
    input:
      bytes: [ 0x00, 0x60, 0x00, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "stnt1w { z0.s }, p0, [x0, x0, lsl #2]"