test_cases:
  -
    input:
      bytes: [ 0x03, 0x20, 0x1c, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8a" ]
    expected:
      insns:
        -
          asm_text: "msr TTBR0_EL2, x3"

  -
    input:
      bytes: [ 0x03, 0x20, 0x3c, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8a" ]
    expected:
      insns:
        -
          asm_text: "mrs x3, TTBR0_EL2"

  -
    input:
      bytes: [ 0x03, 0x21, 0x1c, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8a" ]
    expected:
      insns:
        -
          asm_text: "msr VTTBR_EL2, x3"

  -
    input:
      bytes: [ 0x03, 0x21, 0x3c, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8a" ]
    expected:
      insns:
        -
          asm_text: "mrs x3, VTTBR_EL2"

  -
    input:
      bytes: [ 0x03, 0x26, 0x1c, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8a" ]
    expected:
      insns:
        -
          asm_text: "msr VSTTBR_EL2, x3"

  -
    input:
      bytes: [ 0x03, 0x26, 0x3c, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8a" ]
    expected:
      insns:
        -
          asm_text: "mrs x3, VSTTBR_EL2"