test_cases: - input: bytes: [ 0x80, 0xa0, 0x40, 0x02, 0x85, 0xc2, 0x60, 0x08, 0x85, 0xe8, 0x20, 0x01, 0x81, 0xe8, 0x00, 0x00, 0x90, 0x10, 0x20, 0x01, 0xd5, 0xf6, 0x10, 0x16, 0x21, 0x00, 0x00, 0x0a, 0x86, 0x00, 0x40, 0x02, 0x01, 0x00, 0x00, 0x00, 0x12, 0xbf, 0xff, 0xff, 0x10, 0xbf, 0xff, 0xff, 0xa0, 0x02, 0x00, 0x09, 0x0d, 0xbf, 0xff, 0xff, 0xd4, 0x20, 0x60, 0x00, 0xd4, 0x4e, 0x00, 0x16, 0x2a, 0xc2, 0x80, 0x03 ] arch: "sparc" options: [ CS_OPT_DETAIL ] address: 0x1000 expected: insns: - asm_text: "cmp %g1, %g2" details: sparc: operands: - type: SPARC_OP_REG reg: g1 - type: SPARC_OP_REG reg: g2 - asm_text: "jmpl %o1+8, %g2" details: sparc: operands: - type: SPARC_OP_MEM mem_base: o1 mem_disp: 0x8 - type: SPARC_OP_REG reg: g2 - asm_text: "restore %g0, 1, %g2" details: sparc: operands: - type: SPARC_OP_REG reg: g0 - type: SPARC_OP_IMM imm: 0x1 - type: SPARC_OP_REG reg: g2 - asm_text: "restore" - asm_text: "mov 1, %o0" details: sparc: operands: - type: SPARC_OP_IMM imm: 0x1 - type: SPARC_OP_REG reg: o0 - asm_text: "casx [%i0], %l6, %o2" details: sparc: operands: - type: SPARC_OP_MEM mem_base: i0 - type: SPARC_OP_REG reg: l6 - type: SPARC_OP_REG reg: o2 - asm_text: "sethi 0xa, %l0" details: sparc: operands: - type: SPARC_OP_IMM imm: 0xa - type: SPARC_OP_REG reg: l0 - asm_text: "add %g1, %g2, %g3" details: sparc: operands: - type: SPARC_OP_REG reg: g1 - type: SPARC_OP_REG reg: g2 - type: SPARC_OP_REG reg: g3 - asm_text: "nop" - asm_text: "bne 0x1020" details: sparc: operands: - type: SPARC_OP_IMM imm: 0x1020 cc: SPARC_CC_ICC_NE - asm_text: "ba 0x1024" details: sparc: operands: - type: SPARC_OP_IMM imm: 0x1024 - asm_text: "add %o0, %o1, %l0" details: sparc: operands: - type: SPARC_OP_REG reg: o0 - type: SPARC_OP_REG reg: o1 - type: SPARC_OP_REG reg: l0 - asm_text: "fbg 0x102c" details: sparc: operands: - type: SPARC_OP_IMM imm: 0x102c cc: SPARC_CC_FCC_G - asm_text: "st %o2, [%g1]" details: sparc: operands: - type: SPARC_OP_REG reg: o2 - type: SPARC_OP_MEM mem_base: g1 - asm_text: "ldsb [%i0+%l6], %o2" details: sparc: operands: - type: SPARC_OP_MEM mem_base: i0 mem_index: l6 - type: SPARC_OP_REG reg: o2 - asm_text: "brnz,a,pn %o2, 0x1048" details: sparc: operands: - type: SPARC_OP_REG reg: o2 - type: SPARC_OP_IMM imm: 0x1048 hint: SPARC_HINT_A_PN - input: bytes: [ 0x81, 0xa8, 0x0a, 0x24, 0x89, 0xa0, 0x10, 0x20, 0x89, 0xa0, 0x1a, 0x60, 0x89, 0xa0, 0x00, 0xe0 ] arch: "sparc" options: [ CS_OPT_DETAIL ] address: 0x1000 expected: insns: - asm_text: "fcmps %f0, %f4" details: sparc: operands: - type: SPARC_OP_REG reg: f0 - type: SPARC_OP_REG reg: f4 - asm_text: "fstox %f0, %f4" details: sparc: operands: - type: SPARC_OP_REG reg: f0 - type: SPARC_OP_REG reg: f4 - asm_text: "fqtoi %f0, %f4" details: sparc: operands: - type: SPARC_OP_REG reg: f0 - type: SPARC_OP_REG reg: f4 - asm_text: "fnegq %f0, %f4" details: sparc: operands: - type: SPARC_OP_REG reg: f0 - type: SPARC_OP_REG reg: f4