/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ /* LLVM-commit: 464bda7750a3ba9e23823fc707d7e7b6fc38438d */ /* LLVM-tag: llvmorg-16.0.2-5-g464bda7750a3 */ /* Do not edit. */ /* Capstone's LLVM TableGen Backends: */ /* https://github.com/capstone-engine/llvm-capstone */ #include #include /// getMnemonic - This method is automatically generated by tablegen /// from the instruction set description. static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { #ifndef CAPSTONE_DIET static const char AsmStrs[] = { /* 0 */ "#EH_SjLj_Setup\t\0" /* 16 */ "bcl 20, 31, \0" /* 29 */ "bctrl\n\tld 2, \0" /* 43 */ "bctrl\n\tlwz 2, \0" /* 58 */ "bc 12, \0" /* 66 */ "bcl 12, \0" /* 75 */ "bclrl 12, \0" /* 86 */ "bcctrl 12, \0" /* 98 */ "bclr 12, \0" /* 108 */ "bcctr 12, \0" /* 119 */ "mtspr 3, \0" /* 129 */ "bc 4, \0" /* 136 */ "bcl 4, \0" /* 144 */ "bclrl 4, \0" /* 154 */ "bcctrl 4, \0" /* 165 */ "bclr 4, \0" /* 174 */ "bcctr 4, \0" /* 184 */ "mtspr 256, \0" /* 196 */ "ps_merge00. \0" /* 209 */ "ps_merge10. \0" /* 222 */ "ps_sum0. \0" /* 232 */ "ps_madds0. \0" /* 244 */ "ps_muls0. \0" /* 255 */ "ps_merge01. \0" /* 268 */ "ps_merge11. \0" /* 281 */ "ps_sum1. \0" /* 291 */ "ps_madds1. \0" /* 303 */ "ps_muls1. \0" /* 314 */ "vcmpneb. \0" /* 324 */ "vcmpgtsb. \0" /* 335 */ "extsb. \0" /* 343 */ "vcmpequb. \0" /* 354 */ "ps_sub. \0" /* 363 */ "bcdsub. \0" /* 372 */ "fsub. \0" /* 379 */ "ps_msub. \0" /* 389 */ "fmsub. \0" /* 397 */ "ps_nmsub. \0" /* 408 */ "fnmsub. \0" /* 417 */ "vcmpgtub. \0" /* 428 */ "vcmpnezb. \0" /* 439 */ "addc. \0" /* 446 */ "andc. \0" /* 453 */ "tabortdc. \0" /* 464 */ "subfc. \0" /* 472 */ "subic. \0" /* 480 */ "addic. \0" /* 488 */ "rldic. \0" /* 496 */ "bcdtrunc. \0" /* 507 */ "bcdutrunc. \0" /* 519 */ "orc. \0" /* 525 */ "tabortwc. \0" /* 536 */ "srad. \0" /* 543 */ "ps_add. \0" /* 552 */ "bcdadd. \0" /* 561 */ "fadd. \0" /* 568 */ "ps_madd. \0" /* 578 */ "fmadd. \0" /* 586 */ "ps_nmadd. \0" /* 597 */ "fnmadd. \0" /* 606 */ "mulhd. \0" /* 614 */ "fcfid. \0" /* 622 */ "fctid. \0" /* 630 */ "mulld. \0" /* 638 */ "sld. \0" /* 644 */ "nand. \0" /* 651 */ "tend. \0" /* 658 */ "srd. \0" /* 664 */ "vcmpgtsd. \0" /* 675 */ "vcmpequd. \0" /* 686 */ "vcmpgtud. \0" /* 697 */ "divd. \0" /* 704 */ "cntlzd. \0" /* 713 */ "cnttzd. \0" /* 722 */ "adde. \0" /* 729 */ "divde. \0" /* 737 */ "slbfee. \0" /* 746 */ "subfe. \0" /* 754 */ "addme. \0" /* 762 */ "subfme. \0" /* 771 */ "fre. \0" /* 777 */ "ps_rsqrte. \0" /* 789 */ "frsqrte. \0" /* 799 */ "paste. \0" /* 807 */ "divwe. \0" /* 815 */ "addze. \0" /* 823 */ "subfze. \0" /* 832 */ "subf. \0" /* 839 */ "mtfsf. \0" /* 847 */ "ps_neg. \0" /* 856 */ "fneg. \0" /* 863 */ "vcmpneh. \0" /* 873 */ "vcmpgtsh. \0" /* 884 */ "extsh. \0" /* 892 */ "vcmpequh. \0" /* 903 */ "vcmpgtuh. \0" /* 914 */ "vcmpnezh. \0" /* 925 */ "tabortdci. \0" /* 937 */ "tabortwci. \0" /* 949 */ "sradi. \0" /* 957 */ "clrlsldi. \0" /* 968 */ "extldi. \0" /* 977 */ "andi. \0" /* 984 */ "clrrdi. \0" /* 993 */ "insrdi. \0" /* 1002 */ "rotrdi. \0" /* 1011 */ "extrdi. \0" /* 1020 */ "mtfsfi. \0" /* 1029 */ "extswsli. \0" /* 1040 */ "rldimi. \0" /* 1049 */ "rlwimi. \0" /* 1058 */ "srawi. \0" /* 1066 */ "clrlslwi. \0" /* 1077 */ "inslwi. \0" /* 1086 */ "extlwi. \0" /* 1095 */ "clrrwi. \0" /* 1104 */ "insrwi. \0" /* 1113 */ "rotrwi. \0" /* 1122 */ "extrwi. \0" /* 1131 */ "vstribl. \0" /* 1141 */ "rldcl. \0" /* 1149 */ "rldicl. \0" /* 1158 */ "ps_sel. \0" /* 1167 */ "fsel. \0" /* 1174 */ "vstrihl. \0" /* 1184 */ "ps_mul. \0" /* 1193 */ "fmul. \0" /* 1200 */ "treclaim. \0" /* 1211 */ "frim. \0" /* 1218 */ "rlwinm. \0" /* 1227 */ "rlwnm. \0" /* 1235 */ "bcdcfn. \0" /* 1244 */ "bcdcpsgn. \0" /* 1255 */ "fcpsgn. \0" /* 1264 */ "bcdsetsgn. \0" /* 1276 */ "tbegin. \0" /* 1285 */ "frin. \0" /* 1292 */ "bcdctn. \0" /* 1301 */ "addco. \0" /* 1309 */ "subfco. \0" /* 1318 */ "addo. \0" /* 1325 */ "mulldo. \0" /* 1334 */ "divdo. \0" /* 1342 */ "addeo. \0" /* 1350 */ "divdeo. \0" /* 1359 */ "subfeo. \0" /* 1368 */ "addmeo. \0" /* 1377 */ "subfmeo. \0" /* 1387 */ "divweo. \0" /* 1396 */ "addzeo. \0" /* 1405 */ "subfzeo. \0" /* 1415 */ "subfo. \0" /* 1423 */ "nego. \0" /* 1430 */ "divduo. \0" /* 1439 */ "divdeuo. \0" /* 1449 */ "divweuo. \0" /* 1459 */ "divwuo. \0" /* 1468 */ "mullwo. \0" /* 1477 */ "divwo. \0" /* 1485 */ "xvcmpgedp. \0" /* 1497 */ "xvcmpeqdp. \0" /* 1509 */ "xvcmpgtdp. \0" /* 1521 */ "vcmpbfp. \0" /* 1531 */ "vcmpgefp. \0" /* 1542 */ "vcmpeqfp. \0" /* 1553 */ "vcmpgtfp. \0" /* 1564 */ "frip. \0" /* 1571 */ "xvcmpgesp. \0" /* 1583 */ "xvcmpeqsp. \0" /* 1595 */ "frsp. \0" /* 1602 */ "xvcmpgtsp. \0" /* 1614 */ "icblq. \0" /* 1622 */ "bcdcfsq. \0" /* 1632 */ "bcdctsq. \0" /* 1642 */ "vcmpgtsq. \0" /* 1653 */ "vcmpequq. \0" /* 1664 */ "vcmpgtuq. \0" /* 1675 */ "vstribr. \0" /* 1685 */ "rldcr. \0" /* 1693 */ "rldicr. \0" /* 1702 */ "vstrihr. \0" /* 1712 */ "ps_mr. \0" /* 1720 */ "fmr. \0" /* 1726 */ "nor. \0" /* 1732 */ "xor. \0" /* 1738 */ "bcdsr. \0" /* 1746 */ "tsr. \0" /* 1752 */ "ps_abs. \0" /* 1761 */ "fabs. \0" /* 1768 */ "ps_nabs. \0" /* 1778 */ "fnabs. \0" /* 1786 */ "fsubs. \0" /* 1794 */ "fmsubs. \0" /* 1803 */ "fnmsubs. \0" /* 1813 */ "bcds. \0" /* 1820 */ "fadds. \0" /* 1828 */ "fmadds. \0" /* 1837 */ "fnmadds. \0" /* 1847 */ "fcfids. \0" /* 1856 */ "ps_res. \0" /* 1865 */ "fres. \0" /* 1872 */ "frsqrtes. \0" /* 1883 */ "mffs. \0" /* 1890 */ "andis. \0" /* 1898 */ "fmuls. \0" /* 1906 */ "fsqrts. \0" /* 1915 */ "bcdus. \0" /* 1923 */ "fcfidus. \0" /* 1933 */ "subfus. \0" /* 1942 */ "fdivs. \0" /* 1950 */ "tabort. \0" /* 1959 */ "fsqrt. \0" /* 1967 */ "mulhdu. \0" /* 1976 */ "fcfidu. \0" /* 1985 */ "fctidu. \0" /* 1994 */ "divdu. \0" /* 2002 */ "divdeu. \0" /* 2011 */ "divweu. \0" /* 2020 */ "mulhwu. \0" /* 2029 */ "fctiwu. \0" /* 2038 */ "divwu. \0" /* 2046 */ "ps_div. \0" /* 2055 */ "fdiv. \0" /* 2062 */ "eqv. \0" /* 2068 */ "sraw. \0" /* 2075 */ "vcmpnew. \0" /* 2085 */ "mulhw. \0" /* 2093 */ "fctiw. \0" /* 2101 */ "mullw. \0" /* 2109 */ "slw. \0" /* 2115 */ "srw. \0" /* 2121 */ "vcmpgtsw. \0" /* 2132 */ "extsw. \0" /* 2140 */ "vcmpequw. \0" /* 2151 */ "vcmpgtuw. \0" /* 2162 */ "divw. \0" /* 2169 */ "vcmpnezw. \0" /* 2180 */ "cntlzw. \0" /* 2189 */ "cnttzw. \0" /* 2198 */ "stbcx. \0" /* 2206 */ "stdcx. \0" /* 2214 */ "sthcx. \0" /* 2222 */ "stqcx. \0" /* 2230 */ "stwcx. \0" /* 2238 */ "tlbsx. \0" /* 2246 */ "fctidz. \0" /* 2255 */ "bcdcfz. \0" /* 2264 */ "friz. \0" /* 2271 */ "bcdctz. \0" /* 2280 */ "fctiduz. \0" /* 2290 */ "fctiwuz. \0" /* 2300 */ "fctiwz. \0" /* 2309 */ "ps_merge00 \0" /* 2321 */ "ps_merge10 \0" /* 2333 */ "mtfsb0 \0" /* 2341 */ "ps_sum0 \0" /* 2350 */ "ps_cmpo0 \0" /* 2360 */ "ps_madds0 \0" /* 2371 */ "ps_muls0 \0" /* 2381 */ "ps_cmpu0 \0" /* 2391 */ "ps_merge01 \0" /* 2403 */ "ps_merge11 \0" /* 2415 */ "mtfsb1 \0" /* 2423 */ "ps_sum1 \0" /* 2432 */ "ps_cmpo1 \0" /* 2442 */ "ps_madds1 \0" /* 2453 */ "ps_muls1 \0" /* 2463 */ "ps_cmpu1 \0" /* 2473 */ "dmxxinstfdmr512 \0" /* 2490 */ "dmxxextfdmr512 \0" /* 2506 */ "#ATOMIC_CMP_SWAP_I32 \0" /* 2528 */ "pmxvbf16ger2 \0" /* 2542 */ "pmxvf16ger2 \0" /* 2555 */ "pmxvi16ger2 \0" /* 2568 */ "pmxvi8ger4 \0" /* 2580 */ "#ATOMIC_CMP_SWAP_I16 \0" /* 2602 */ "xvcvspbf16 \0" /* 2614 */ "dmxxinstfdmr256 \0" /* 2631 */ "dmxxextfdmr256 \0" /* 2647 */ "#TC_RETURNa8 \0" /* 2661 */ "#TC_RETURNd8 \0" /* 2675 */ "#TC_RETURNr8 \0" /* 2689 */ "pmxvi4ger8 \0" /* 2701 */ "#BUILD_UACC \0" /* 2714 */ "#ADJCALLSTACKDOWN \0" /* 2733 */ "#ADJCALLSTACKUP \0" /* 2750 */ "#TC_RETURNa \0" /* 2763 */ "evmhegsmfaa \0" /* 2776 */ "evmhogsmfaa \0" /* 2789 */ "evmwsmfaa \0" /* 2800 */ "evmwssfaa \0" /* 2811 */ "evmhegsmiaa \0" /* 2824 */ "evmhogsmiaa \0" /* 2837 */ "evmwsmiaa \0" /* 2848 */ "evmhegumiaa \0" /* 2861 */ "evmhogumiaa \0" /* 2874 */ "evmwumiaa \0" /* 2885 */ "dcba \0" /* 2891 */ "bca \0" /* 2896 */ "evmhesmfa \0" /* 2907 */ "evmwhsmfa \0" /* 2918 */ "evmhosmfa \0" /* 2929 */ "evmwsmfa \0" /* 2939 */ "evmhessfa \0" /* 2950 */ "evmwhssfa \0" /* 2961 */ "evmhossfa \0" /* 2972 */ "evmwssfa \0" /* 2982 */ "plha \0" /* 2988 */ "evmhesmia \0" /* 2999 */ "evmwhsmia \0" /* 3010 */ "evmhosmia \0" /* 3021 */ "evmwsmia \0" /* 3031 */ "evmheumia \0" /* 3042 */ "evmwhumia \0" /* 3053 */ "evmwlumia \0" /* 3064 */ "evmhoumia \0" /* 3075 */ "evmwumia \0" /* 3085 */ "qvstfcdxia \0" /* 3097 */ "qvstfdxia \0" /* 3108 */ "qvstfcsxia \0" /* 3120 */ "qvstfsxia \0" /* 3131 */ "qvstfcduxia \0" /* 3144 */ "qvstfduxia \0" /* 3156 */ "qvstfcsuxia \0" /* 3169 */ "qvstfsuxia \0" /* 3181 */ "bla \0" /* 3186 */ "bcla \0" /* 3192 */ "evmra \0" /* 3199 */ "plwa \0" /* 3205 */ "mtvsrwa \0" /* 3214 */ "qvlfiwaxa \0" /* 3225 */ "qvlfcdxa \0" /* 3235 */ "qvstfcdxa \0" /* 3246 */ "qvlfdxa \0" /* 3255 */ "qvstfdxa \0" /* 3265 */ "qvlfcsxa \0" /* 3275 */ "qvstfcsxa \0" /* 3286 */ "qvlfsxa \0" /* 3295 */ "qvstfsxa \0" /* 3305 */ "qvlfcduxa \0" /* 3316 */ "qvstfcduxa \0" /* 3328 */ "qvlfduxa \0" /* 3338 */ "qvstfduxa \0" /* 3349 */ "qvlfcsuxa \0" /* 3360 */ "qvstfcsuxa \0" /* 3372 */ "qvlfsuxa \0" /* 3382 */ "qvstfsuxa \0" /* 3393 */ "qvstfiwxa \0" /* 3404 */ "qvlfiwzxa \0" /* 3415 */ "vsrab \0" /* 3422 */ "rfebb \0" /* 3429 */ "vcntmbb \0" /* 3438 */ "xvtlsbb \0" /* 3447 */ "vclzlsbb \0" /* 3457 */ "vctzlsbb \0" /* 3467 */ "vcmpneb \0" /* 3476 */ "vmrghb \0" /* 3484 */ "xxspltib \0" /* 3494 */ "vmrglb \0" /* 3502 */ "vclrlb \0" /* 3510 */ "vrlb \0" /* 3516 */ "vslb \0" /* 3522 */ "vpmsumb \0" /* 3531 */ "vgnb \0" /* 3537 */ "cmpb \0" /* 3543 */ "cmpeqb \0" /* 3551 */ "cmprb \0" /* 3558 */ "vclrrb \0" /* 3566 */ "vsrb \0" /* 3572 */ "vmulesb \0" /* 3581 */ "vavgsb \0" /* 3589 */ "vupkhsb \0" /* 3598 */ "vspltisb \0" /* 3608 */ "vupklsb \0" /* 3617 */ "vminsb \0" /* 3625 */ "vmulosb \0" /* 3634 */ "vcmpgtsb \0" /* 3644 */ "evextsb \0" /* 3653 */ "vmaxsb \0" /* 3661 */ "setb \0" /* 3667 */ "mftb \0" /* 3673 */ "vspltb \0" /* 3681 */ "vpopcntb \0" /* 3691 */ "vinsertb \0" /* 3701 */ "pstb \0" /* 3707 */ "vabsdub \0" /* 3716 */ "vmuleub \0" /* 3725 */ "vavgub \0" /* 3733 */ "vminub \0" /* 3741 */ "vmuloub \0" /* 3750 */ "vcmpequb \0" /* 3760 */ "ps_sub \0" /* 3768 */ "efdsub \0" /* 3776 */ "qvfsub \0" /* 3784 */ "ps_msub \0" /* 3793 */ "qvfmsub \0" /* 3802 */ "ps_nmsub \0" /* 3812 */ "qvfnmsub \0" /* 3822 */ "efssub \0" /* 3830 */ "evfssub \0" /* 3839 */ "vextractub \0" /* 3851 */ "vcmpgtub \0" /* 3861 */ "vmaxub \0" /* 3869 */ "xxblendvb \0" /* 3880 */ "vcmpnezb \0" /* 3890 */ "vclzb \0" /* 3897 */ "vctzb \0" /* 3904 */ "setnbc \0" /* 3912 */ "setbc \0" /* 3919 */ "xxmfacc \0" /* 3928 */ "xxmtacc \0" /* 3937 */ "addc \0" /* 3943 */ "xxlandc \0" /* 3952 */ "crandc \0" /* 3960 */ "evandc \0" /* 3968 */ "subfc \0" /* 3975 */ "subic \0" /* 3982 */ "addic \0" /* 3989 */ "rldic \0" /* 3996 */ "subfic \0" /* 4004 */ "xsrdpic \0" /* 4013 */ "xvrdpic \0" /* 4022 */ "xvrspic \0" /* 4031 */ "icblc \0" /* 4038 */ "brinc \0" /* 4045 */ "sync \0" /* 4051 */ "xxlorc \0" /* 4059 */ "crorc \0" /* 4066 */ "evorc \0" /* 4073 */ "sc \0" /* 4077 */ "vextsb2d \0" /* 4087 */ "vextsh2d \0" /* 4097 */ "vextsw2d \0" /* 4107 */ "#TC_RETURNd \0" /* 4120 */ "vshasigmad \0" /* 4132 */ "vsrad \0" /* 4139 */ "vgbbd \0" /* 4146 */ "vcntmbd \0" /* 4155 */ "vprtybd \0" /* 4164 */ "ps_add \0" /* 4172 */ "efdadd \0" /* 4180 */ "qvfadd \0" /* 4188 */ "ps_madd \0" /* 4197 */ "qvfmadd \0" /* 4206 */ "ps_nmadd \0" /* 4216 */ "qvfnmadd \0" /* 4226 */ "qvfxxcpnmadd \0" /* 4240 */ "qvfxxnpmadd \0" /* 4253 */ "qvfxmadd \0" /* 4263 */ "qvfxxmadd \0" /* 4274 */ "efsadd \0" /* 4282 */ "evfsadd \0" /* 4291 */ "evldd \0" /* 4298 */ "mtvsrdd \0" /* 4307 */ "evstdd \0" /* 4315 */ "vcfuged \0" /* 4324 */ "efscfd \0" /* 4332 */ "plfd \0" /* 4338 */ "pstfd \0" /* 4345 */ "vnegd \0" /* 4352 */ "maddhd \0" /* 4360 */ "mulhd \0" /* 4367 */ "qvfcfid \0" /* 4376 */ "efdcfsid \0" /* 4386 */ "qvfctid \0" /* 4395 */ "efdcfuid \0" /* 4405 */ "tlbld \0" /* 4412 */ "maddld \0" /* 4420 */ "vmulld \0" /* 4428 */ "cmpld \0" /* 4435 */ "mfvsrld \0" /* 4444 */ "vrld \0" /* 4450 */ "vsld \0" /* 4456 */ "vbpermd \0" /* 4465 */ "vpmsumd \0" /* 4474 */ "xxland \0" /* 4482 */ "xxlnand \0" /* 4491 */ "crnand \0" /* 4499 */ "evnand \0" /* 4507 */ "crand \0" /* 4514 */ "evand \0" /* 4521 */ "vpdepd \0" /* 4529 */ "cmpd \0" /* 4535 */ "xxbrd \0" /* 4542 */ "mtmsrd \0" /* 4550 */ "mfvsrd \0" /* 4558 */ "mtvsrd \0" /* 4566 */ "vmodsd \0" /* 4574 */ "vmulesd \0" /* 4583 */ "vdivesd \0" /* 4592 */ "vmulhsd \0" /* 4601 */ "vminsd \0" /* 4609 */ "vinsd \0" /* 4616 */ "vmulosd \0" /* 4625 */ "vcmpgtsd \0" /* 4635 */ "vdivsd \0" /* 4643 */ "vmaxsd \0" /* 4651 */ "plxsd \0" /* 4658 */ "pstxsd \0" /* 4666 */ "vextractd \0" /* 4677 */ "vpopcntd \0" /* 4687 */ "vinsertd \0" /* 4697 */ "pstd \0" /* 4703 */ "vpextd \0" /* 4711 */ "vmsumcud \0" /* 4721 */ "vmodud \0" /* 4729 */ "vmuleud \0" /* 4738 */ "vdiveud \0" /* 4747 */ "vmulhud \0" /* 4756 */ "vminud \0" /* 4764 */ "vmuloud \0" /* 4773 */ "vcmpequd \0" /* 4783 */ "vcmpgtud \0" /* 4793 */ "vdivud \0" /* 4801 */ "vmaxud \0" /* 4809 */ "xxblendvd \0" /* 4820 */ "divd \0" /* 4826 */ "vclzd \0" /* 4833 */ "cntlzd \0" /* 4841 */ "vctzd \0" /* 4848 */ "cnttzd \0" /* 4856 */ "mfbhrbe \0" /* 4865 */ "mffsce \0" /* 4873 */ "adde \0" /* 4879 */ "divde \0" /* 4886 */ "slbmfee \0" /* 4895 */ "wrtee \0" /* 4902 */ "subfe \0" /* 4909 */ "evlwhe \0" /* 4917 */ "evstwhe \0" /* 4926 */ "slbie \0" /* 4933 */ "tlbie \0" /* 4940 */ "addme \0" /* 4947 */ "subfme \0" /* 4955 */ "tlbre \0" /* 4962 */ "qvfre \0" /* 4969 */ "slbmte \0" /* 4977 */ "ps_rsqrte \0" /* 4988 */ "qvfrsqrte \0" /* 4999 */ "tlbwe \0" /* 5006 */ "divwe \0" /* 5013 */ "evstwwe \0" /* 5022 */ "addze \0" /* 5029 */ "subfze \0" /* 5037 */ "dcbf \0" /* 5043 */ "subf \0" /* 5049 */ "evmhesmf \0" /* 5059 */ "evmwhsmf \0" /* 5069 */ "evmhosmf \0" /* 5079 */ "evmwsmf \0" /* 5088 */ "mcrf \0" /* 5094 */ "mfocrf \0" /* 5102 */ "mtocrf \0" /* 5110 */ "mtcrf \0" /* 5117 */ "efdcfsf \0" /* 5126 */ "efscfsf \0" /* 5135 */ "evfscfsf \0" /* 5145 */ "mtfsf \0" /* 5152 */ "evmhessf \0" /* 5162 */ "evmwhssf \0" /* 5172 */ "evmhossf \0" /* 5182 */ "evmwssf \0" /* 5191 */ "efdctsf \0" /* 5200 */ "efsctsf \0" /* 5209 */ "evfsctsf \0" /* 5219 */ "efdcfuf \0" /* 5228 */ "efscfuf \0" /* 5237 */ "evfscfuf \0" /* 5247 */ "efdctuf \0" /* 5256 */ "efsctuf \0" /* 5265 */ "slbieg \0" /* 5273 */ "ps_neg \0" /* 5281 */ "efdneg \0" /* 5289 */ "qvfneg \0" /* 5297 */ "efsneg \0" /* 5305 */ "evfsneg \0" /* 5314 */ "evneg \0" /* 5321 */ "vsrah \0" /* 5328 */ "vcntmbh \0" /* 5337 */ "evldh \0" /* 5344 */ "evstdh \0" /* 5352 */ "vcmpneh \0" /* 5361 */ "vmrghh \0" /* 5369 */ "vmrglh \0" /* 5377 */ "vrlh \0" /* 5383 */ "vslh \0" /* 5389 */ "vpmsumh \0" /* 5398 */ "xxbrh \0" /* 5405 */ "vsrh \0" /* 5411 */ "vmulesh \0" /* 5420 */ "vavgsh \0" /* 5428 */ "vupkhsh \0" /* 5437 */ "vspltish \0" /* 5447 */ "vupklsh \0" /* 5456 */ "vminsh \0" /* 5464 */ "vmulosh \0" /* 5473 */ "vcmpgtsh \0" /* 5483 */ "evextsh \0" /* 5492 */ "vmaxsh \0" /* 5500 */ "vsplth \0" /* 5508 */ "vpopcnth \0" /* 5518 */ "vinserth \0" /* 5528 */ "psth \0" /* 5534 */ "vabsduh \0" /* 5543 */ "vmuleuh \0" /* 5552 */ "vavguh \0" /* 5560 */ "vminuh \0" /* 5568 */ "vmulouh \0" /* 5577 */ "vcmpequh \0" /* 5587 */ "vextractuh \0" /* 5599 */ "vcmpgtuh \0" /* 5609 */ "vmaxuh \0" /* 5617 */ "xxblendvh \0" /* 5628 */ "vcmpnezh \0" /* 5638 */ "vclzh \0" /* 5645 */ "vctzh \0" /* 5652 */ "dcbi \0" /* 5658 */ "icbi \0" /* 5664 */ "vsldbi \0" /* 5672 */ "vsrdbi \0" /* 5680 */ "subi \0" /* 5686 */ "dccci \0" /* 5693 */ "iccci \0" /* 5700 */ "qvgpci \0" /* 5708 */ "sradi \0" /* 5715 */ "paddi \0" /* 5722 */ "cmpldi \0" /* 5730 */ "clrlsldi \0" /* 5740 */ "extldi \0" /* 5748 */ "xxpermdi \0" /* 5758 */ "cmpdi \0" /* 5765 */ "clrrdi \0" /* 5773 */ "insrdi \0" /* 5781 */ "rotrdi \0" /* 5789 */ "extrdi \0" /* 5797 */ "tdi \0" /* 5802 */ "wrteei \0" /* 5810 */ "mtfsfi \0" /* 5818 */ "evsplatfi \0" /* 5829 */ "evmergehi \0" /* 5840 */ "evmergelohi \0" /* 5853 */ "tlbli \0" /* 5860 */ "mulli \0" /* 5867 */ "pli \0" /* 5872 */ "extswsli \0" /* 5882 */ "mtvsrbmi \0" /* 5892 */ "vrldmi \0" /* 5900 */ "rldimi \0" /* 5908 */ "rlwimi \0" /* 5916 */ "vrlqmi \0" /* 5924 */ "evmhesmi \0" /* 5934 */ "evmwhsmi \0" /* 5944 */ "evmhosmi \0" /* 5954 */ "evmwsmi \0" /* 5963 */ "evmheumi \0" /* 5973 */ "evmwhumi \0" /* 5983 */ "evmwlumi \0" /* 5993 */ "evmhoumi \0" /* 6003 */ "evmwumi \0" /* 6012 */ "vrlwmi \0" /* 6020 */ "qvaligni \0" /* 6030 */ "mffscrni \0" /* 6040 */ "mffscdrni \0" /* 6051 */ "vsldoi \0" /* 6059 */ "xsrdpi \0" /* 6067 */ "xvrdpi \0" /* 6075 */ "xsrqpi \0" /* 6083 */ "xvrspi \0" /* 6091 */ "xori \0" /* 6097 */ "efdcfsi \0" /* 6106 */ "efscfsi \0" /* 6115 */ "evfscfsi \0" /* 6125 */ "efdctsi \0" /* 6134 */ "efsctsi \0" /* 6143 */ "evfsctsi \0" /* 6153 */ "qvesplati \0" /* 6164 */ "evsplati \0" /* 6174 */ "efdcfui \0" /* 6183 */ "efscfui \0" /* 6192 */ "evfscfui \0" /* 6202 */ "efdctui \0" /* 6211 */ "efsctui \0" /* 6220 */ "evfsctui \0" /* 6230 */ "srawi \0" /* 6237 */ "xxsldwi \0" /* 6246 */ "cmplwi \0" /* 6254 */ "evrlwi \0" /* 6262 */ "clrlslwi \0" /* 6272 */ "inslwi \0" /* 6280 */ "evslwi \0" /* 6288 */ "extlwi \0" /* 6296 */ "cmpwi \0" /* 6303 */ "clrrwi \0" /* 6311 */ "insrwi \0" /* 6319 */ "rotrwi \0" /* 6327 */ "extrwi \0" /* 6335 */ "lswi \0" /* 6341 */ "stswi \0" /* 6348 */ "twi \0" /* 6353 */ "qvstfcdxi \0" /* 6364 */ "qvstfdxi \0" /* 6374 */ "qvstfcsxi \0" /* 6385 */ "qvstfsxi \0" /* 6395 */ "qvstfcduxi \0" /* 6407 */ "qvstfduxi \0" /* 6418 */ "qvstfcsuxi \0" /* 6430 */ "qvstfsuxi \0" /* 6441 */ "tcheck \0" /* 6449 */ "hashchk \0" /* 6458 */ "psq_l \0" /* 6465 */ "dcbz_l \0" /* 6473 */ "qvflogical \0" /* 6485 */ "xxeval \0" /* 6493 */ "vstribl \0" /* 6502 */ "bcl \0" /* 6507 */ "rldcl \0" /* 6514 */ "rldicl \0" /* 6522 */ "tlbiel \0" /* 6530 */ "ps_sel \0" /* 6538 */ "qvfsel \0" /* 6546 */ "isel \0" /* 6552 */ "vsel \0" /* 6558 */ "xxsel \0" /* 6565 */ "dcbfl \0" /* 6572 */ "vstrihl \0" /* 6581 */ "lxvprll \0" /* 6590 */ "stxvprll \0" /* 6600 */ "lxvrll \0" /* 6608 */ "stxvrll \0" /* 6617 */ "lxvll \0" /* 6624 */ "stxvll \0" /* 6632 */ "bclrl \0" /* 6639 */ "lxvprl \0" /* 6647 */ "stxvprl \0" /* 6656 */ "bcctrl \0" /* 6664 */ "lxvrl \0" /* 6671 */ "stxvrl \0" /* 6679 */ "mffsl \0" /* 6686 */ "lvsl \0" /* 6692 */ "ps_mul \0" /* 6700 */ "efdmul \0" /* 6708 */ "qvfmul \0" /* 6716 */ "efsmul \0" /* 6724 */ "evfsmul \0" /* 6733 */ "qvfxmul \0" /* 6742 */ "lxvl \0" /* 6748 */ "stxvl \0" /* 6755 */ "lvxl \0" /* 6761 */ "stvxl \0" /* 6768 */ "dcbzl \0" /* 6775 */ "vexpandbm \0" /* 6786 */ "vmsummbm \0" /* 6796 */ "mtvsrbm \0" /* 6805 */ "vextractbm \0" /* 6817 */ "vsububm \0" /* 6826 */ "vaddubm \0" /* 6835 */ "vmsumubm \0" /* 6845 */ "xxgenpcvbm \0" /* 6857 */ "vexpanddm \0" /* 6868 */ "mtvsrdm \0" /* 6877 */ "vextractdm \0" /* 6889 */ "vsubudm \0" /* 6898 */ "vaddudm \0" /* 6907 */ "vmsumudm \0" /* 6917 */ "xxgenpcvdm \0" /* 6929 */ "vclzdm \0" /* 6937 */ "cntlzdm \0" /* 6946 */ "vctzdm \0" /* 6954 */ "cnttzdm \0" /* 6963 */ "vexpandhm \0" /* 6974 */ "mtvsrhm \0" /* 6983 */ "vmsumshm \0" /* 6993 */ "vextracthm \0" /* 7005 */ "vsubuhm \0" /* 7014 */ "vmladduhm \0" /* 7025 */ "vadduhm \0" /* 7034 */ "vmsumuhm \0" /* 7044 */ "xxgenpcvhm \0" /* 7056 */ "vrfim \0" /* 7063 */ "xsrdpim \0" /* 7072 */ "xvrdpim \0" /* 7081 */ "xvrspim \0" /* 7090 */ "qvfrim \0" /* 7098 */ "vrldnm \0" /* 7106 */ "rlwinm \0" /* 7114 */ "vrlqnm \0" /* 7122 */ "vrlwnm \0" /* 7130 */ "vexpandqm \0" /* 7141 */ "mtvsrqm \0" /* 7150 */ "vextractqm \0" /* 7162 */ "vsubuqm \0" /* 7171 */ "vadduqm \0" /* 7180 */ "vsubeuqm \0" /* 7190 */ "vaddeuqm \0" /* 7200 */ "qvfperm \0" /* 7209 */ "vperm \0" /* 7216 */ "xxperm \0" /* 7224 */ "vpkudum \0" /* 7233 */ "vpkuhum \0" /* 7242 */ "vpkuwum \0" /* 7251 */ "vexpandwm \0" /* 7262 */ "mtvsrwm \0" /* 7271 */ "vextractwm \0" /* 7283 */ "vsubuwm \0" /* 7292 */ "vadduwm \0" /* 7301 */ "vmuluwm \0" /* 7310 */ "xxgenpcvwm \0" /* 7322 */ "evmhegsmfan \0" /* 7335 */ "evmhogsmfan \0" /* 7348 */ "evmwsmfan \0" /* 7359 */ "evmwssfan \0" /* 7370 */ "evmhegsmian \0" /* 7383 */ "evmhogsmian \0" /* 7396 */ "evmwsmian \0" /* 7407 */ "evmhegumian \0" /* 7420 */ "evmhogumian \0" /* 7433 */ "evmwumian \0" /* 7444 */ "qvftstnan \0" /* 7455 */ "qvfcpsgn \0" /* 7465 */ "vrfin \0" /* 7472 */ "qvfrin \0" /* 7480 */ "mfsrin \0" /* 7488 */ "mtsrin \0" /* 7496 */ "pmxvbf16ger2nn \0" /* 7512 */ "pmxvf16ger2nn \0" /* 7527 */ "pmxvf32gernn \0" /* 7541 */ "pmxvf64gernn \0" /* 7555 */ "pmxvbf16ger2pn \0" /* 7571 */ "pmxvf16ger2pn \0" /* 7586 */ "xscvspdpn \0" /* 7597 */ "pmxvf32gerpn \0" /* 7611 */ "pmxvf64gerpn \0" /* 7625 */ "xvcvbf16spn \0" /* 7638 */ "xscvdpspn \0" /* 7649 */ "darn \0" /* 7655 */ "mffscrn \0" /* 7664 */ "mffscdrn \0" /* 7674 */ "addco \0" /* 7681 */ "subfco \0" /* 7689 */ "addo \0" /* 7695 */ "mulldo \0" /* 7703 */ "divdo \0" /* 7710 */ "addeo \0" /* 7717 */ "divdeo \0" /* 7725 */ "subfeo \0" /* 7733 */ "addmeo \0" /* 7741 */ "subfmeo \0" /* 7750 */ "divweo \0" /* 7758 */ "addzeo \0" /* 7766 */ "subfzeo \0" /* 7775 */ "subfo \0" /* 7782 */ "nego \0" /* 7788 */ "evstwho \0" /* 7797 */ "evmergelo \0" /* 7808 */ "evmergehilo \0" /* 7821 */ "vslo \0" /* 7827 */ "xscvqpdpo \0" /* 7838 */ "fcmpo \0" /* 7845 */ "xsnmsubqpo \0" /* 7857 */ "xsmsubqpo \0" /* 7868 */ "xssubqpo \0" /* 7878 */ "xsnmaddqpo \0" /* 7890 */ "xsmaddqpo \0" /* 7901 */ "xsaddqpo \0" /* 7911 */ "xsmulqpo \0" /* 7921 */ "xssqrtqpo \0" /* 7932 */ "xsdivqpo \0" /* 7942 */ "vsro \0" /* 7948 */ "divduo \0" /* 7956 */ "divdeuo \0" /* 7965 */ "divweuo \0" /* 7974 */ "divwuo \0" /* 7982 */ "mullwo \0" /* 7990 */ "divwo \0" /* 7997 */ "evstwwo \0" /* 8006 */ "xsnmsubadp \0" /* 8018 */ "xvnmsubadp \0" /* 8030 */ "xsmsubadp \0" /* 8041 */ "xvmsubadp \0" /* 8052 */ "xsnmaddadp \0" /* 8064 */ "xvnmaddadp \0" /* 8076 */ "xsmaddadp \0" /* 8087 */ "xvmaddadp \0" /* 8098 */ "xssubdp \0" /* 8107 */ "xvsubdp \0" /* 8116 */ "xststdcdp \0" /* 8127 */ "xvtstdcdp \0" /* 8138 */ "xsmincdp \0" /* 8148 */ "xsmaxcdp \0" /* 8158 */ "xsadddp \0" /* 8167 */ "xvadddp \0" /* 8176 */ "xscvsxddp \0" /* 8187 */ "xvcvsxddp \0" /* 8198 */ "xscvuxddp \0" /* 8209 */ "xvcvuxddp \0" /* 8220 */ "xscmpgedp \0" /* 8231 */ "xvcmpgedp \0" /* 8242 */ "xsredp \0" /* 8250 */ "xvredp \0" /* 8258 */ "xsrsqrtedp \0" /* 8270 */ "xvrsqrtedp \0" /* 8282 */ "xsnegdp \0" /* 8291 */ "xvnegdp \0" /* 8300 */ "xsxsigdp \0" /* 8310 */ "xvxsigdp \0" /* 8320 */ "xxspltidp \0" /* 8331 */ "xsminjdp \0" /* 8341 */ "xsmaxjdp \0" /* 8351 */ "xsmuldp \0" /* 8360 */ "xvmuldp \0" /* 8369 */ "xsnmsubmdp \0" /* 8381 */ "xvnmsubmdp \0" /* 8393 */ "xsmsubmdp \0" /* 8404 */ "xvmsubmdp \0" /* 8415 */ "xsnmaddmdp \0" /* 8427 */ "xvnmaddmdp \0" /* 8439 */ "xsmaddmdp \0" /* 8450 */ "xvmaddmdp \0" /* 8461 */ "xscpsgndp \0" /* 8472 */ "xvcpsgndp \0" /* 8483 */ "xsmindp \0" /* 8492 */ "xvmindp \0" /* 8501 */ "xscmpodp \0" /* 8511 */ "xscvhpdp \0" /* 8521 */ "xscvqpdp \0" /* 8531 */ "xscvspdp \0" /* 8541 */ "xvcvspdp \0" /* 8551 */ "xsiexpdp \0" /* 8561 */ "xviexpdp \0" /* 8571 */ "xscmpexpdp \0" /* 8583 */ "xsxexpdp \0" /* 8593 */ "xvxexpdp \0" /* 8603 */ "xscmpeqdp \0" /* 8614 */ "xvcmpeqdp \0" /* 8625 */ "xsnabsdp \0" /* 8635 */ "xvnabsdp \0" /* 8645 */ "xsabsdp \0" /* 8654 */ "xvabsdp \0" /* 8663 */ "xscmpgtdp \0" /* 8674 */ "xvcmpgtdp \0" /* 8685 */ "xssqrtdp \0" /* 8695 */ "xstsqrtdp \0" /* 8706 */ "xvtsqrtdp \0" /* 8717 */ "xvsqrtdp \0" /* 8727 */ "xscmpudp \0" /* 8737 */ "xsdivdp \0" /* 8746 */ "xstdivdp \0" /* 8756 */ "xvtdivdp \0" /* 8766 */ "xvdivdp \0" /* 8775 */ "xvcvsxwdp \0" /* 8786 */ "xvcvuxwdp \0" /* 8797 */ "xsmaxdp \0" /* 8806 */ "xvmaxdp \0" /* 8815 */ "dcbfep \0" /* 8823 */ "icbiep \0" /* 8831 */ "dcbzlep \0" /* 8840 */ "dcbtep \0" /* 8848 */ "dcbstep \0" /* 8857 */ "dcbtstep \0" /* 8867 */ "dcbzep \0" /* 8875 */ "vcmpbfp \0" /* 8884 */ "vnmsubfp \0" /* 8894 */ "vsubfp \0" /* 8902 */ "vmaddfp \0" /* 8911 */ "vaddfp \0" /* 8919 */ "vlogefp \0" /* 8928 */ "vcmpgefp \0" /* 8938 */ "vrefp \0" /* 8945 */ "vexptefp \0" /* 8955 */ "vrsqrtefp \0" /* 8966 */ "vminfp \0" /* 8974 */ "vcmpeqfp \0" /* 8984 */ "vcmpgtfp \0" /* 8994 */ "vmaxfp \0" /* 9002 */ "xscvdphp \0" /* 9012 */ "xvcvsphp \0" /* 9022 */ "vrfip \0" /* 9029 */ "xsrdpip \0" /* 9038 */ "xvrdpip \0" /* 9047 */ "xvrspip \0" /* 9056 */ "qvfrip \0" /* 9064 */ "hashchkp \0" /* 9074 */ "dcbflp \0" /* 9082 */ "pmxvbf16ger2np \0" /* 9098 */ "pmxvf16ger2np \0" /* 9113 */ "pmxvf32gernp \0" /* 9127 */ "pmxvf64gernp \0" /* 9141 */ "pmxvbf16ger2pp \0" /* 9157 */ "pmxvf16ger2pp \0" /* 9172 */ "pmxvi16ger2pp \0" /* 9187 */ "pmxvi8ger4pp \0" /* 9201 */ "pmxvi4ger8pp \0" /* 9215 */ "pmxvf32gerpp \0" /* 9229 */ "pmxvf64gerpp \0" /* 9243 */ "pmxvi16ger2spp \0" /* 9259 */ "pmxvi8ger4spp \0" /* 9274 */ "xsnmsubqp \0" /* 9285 */ "xsmsubqp \0" /* 9295 */ "xssubqp \0" /* 9304 */ "xststdcqp \0" /* 9315 */ "xsmincqp \0" /* 9325 */ "xsmaxcqp \0" /* 9335 */ "xsnmaddqp \0" /* 9346 */ "xsmaddqp \0" /* 9356 */ "xsaddqp \0" /* 9365 */ "xscvsdqp \0" /* 9375 */ "xscvudqp \0" /* 9385 */ "xscmpgeqp \0" /* 9396 */ "xsnegqp \0" /* 9405 */ "xsxsigqp \0" /* 9415 */ "xsmulqp \0" /* 9424 */ "xscpsgnqp \0" /* 9435 */ "xscmpoqp \0" /* 9445 */ "xscvdpqp \0" /* 9455 */ "xsiexpqp \0" /* 9465 */ "xscmpexpqp \0" /* 9477 */ "xsxexpqp \0" /* 9487 */ "xscmpeqqp \0" /* 9498 */ "xscvsqqp \0" /* 9508 */ "xscvuqqp \0" /* 9518 */ "xsnabsqp \0" /* 9528 */ "xsabsqp \0" /* 9537 */ "xscmpgtqp \0" /* 9548 */ "xssqrtqp \0" /* 9558 */ "xscmpuqp \0" /* 9568 */ "xsdivqp \0" /* 9577 */ "xsnmsubasp \0" /* 9589 */ "xvnmsubasp \0" /* 9601 */ "xsmsubasp \0" /* 9612 */ "xvmsubasp \0" /* 9623 */ "xsnmaddasp \0" /* 9635 */ "xvnmaddasp \0" /* 9647 */ "xsmaddasp \0" /* 9658 */ "xvmaddasp \0" /* 9669 */ "xssubsp \0" /* 9678 */ "xvsubsp \0" /* 9687 */ "xststdcsp \0" /* 9698 */ "xvtstdcsp \0" /* 9709 */ "xsaddsp \0" /* 9718 */ "xvaddsp \0" /* 9727 */ "xscvsxdsp \0" /* 9738 */ "xvcvsxdsp \0" /* 9749 */ "xscvuxdsp \0" /* 9760 */ "xvcvuxdsp \0" /* 9771 */ "xvcmpgesp \0" /* 9782 */ "xsresp \0" /* 9790 */ "xvresp \0" /* 9798 */ "xsrsqrtesp \0" /* 9810 */ "xvrsqrtesp \0" /* 9822 */ "xvnegsp \0" /* 9831 */ "xvxsigsp \0" /* 9841 */ "xsmulsp \0" /* 9850 */ "xvmulsp \0" /* 9859 */ "xsnmsubmsp \0" /* 9871 */ "xvnmsubmsp \0" /* 9883 */ "xsmsubmsp \0" /* 9894 */ "xvmsubmsp \0" /* 9905 */ "xsnmaddmsp \0" /* 9917 */ "xvnmaddmsp \0" /* 9929 */ "xsmaddmsp \0" /* 9940 */ "xvmaddmsp \0" /* 9951 */ "xvcpsgnsp \0" /* 9962 */ "xvminsp \0" /* 9971 */ "xscvdpsp \0" /* 9981 */ "xvcvdpsp \0" /* 9991 */ "xvcvhpsp \0" /* 10001 */ "xviexpsp \0" /* 10011 */ "xvxexpsp \0" /* 10021 */ "xvcmpeqsp \0" /* 10032 */ "qvfrsp \0" /* 10040 */ "xsrsp \0" /* 10047 */ "xvnabssp \0" /* 10057 */ "xvabssp \0" /* 10066 */ "plxssp \0" /* 10074 */ "pstxssp \0" /* 10083 */ "xvcmpgtsp \0" /* 10094 */ "xssqrtsp \0" /* 10104 */ "xvtsqrtsp \0" /* 10115 */ "xvsqrtsp \0" /* 10125 */ "xsdivsp \0" /* 10134 */ "xvtdivsp \0" /* 10144 */ "xvdivsp \0" /* 10153 */ "xvcvsxwsp \0" /* 10164 */ "xvcvuxwsp \0" /* 10175 */ "xvmaxsp \0" /* 10184 */ "hashstp \0" /* 10193 */ "plxvp \0" /* 10200 */ "pstxvp \0" /* 10208 */ "xsrqpxp \0" /* 10217 */ "vextsd2q \0" /* 10227 */ "vsraq \0" /* 10234 */ "vprtybq \0" /* 10243 */ "efdcmpeq \0" /* 10253 */ "qvfcmpeq \0" /* 10263 */ "efscmpeq \0" /* 10273 */ "evfscmpeq \0" /* 10284 */ "evcmpeq \0" /* 10293 */ "efdtsteq \0" /* 10303 */ "efststeq \0" /* 10313 */ "evfststeq \0" /* 10324 */ "lxvkq \0" /* 10331 */ "vrlq \0" /* 10337 */ "vslq \0" /* 10343 */ "vbpermq \0" /* 10352 */ "xxbrq \0" /* 10359 */ "vsrq \0" /* 10365 */ "vmodsq \0" /* 10373 */ "vdivesq \0" /* 10382 */ "vcmpsq \0" /* 10390 */ "vcmpgtsq \0" /* 10400 */ "vdivsq \0" /* 10408 */ "stq \0" /* 10413 */ "vmul10uq \0" /* 10423 */ "vmul10cuq \0" /* 10434 */ "vsubcuq \0" /* 10443 */ "vaddcuq \0" /* 10452 */ "vmul10ecuq \0" /* 10464 */ "vsubecuq \0" /* 10474 */ "vaddecuq \0" /* 10484 */ "vmoduq \0" /* 10492 */ "vmul10euq \0" /* 10503 */ "vdiveuq \0" /* 10512 */ "vcmpuq \0" /* 10520 */ "vcmpequq \0" /* 10530 */ "vcmpgtuq \0" /* 10540 */ "vdivuq \0" /* 10548 */ "#TC_RETURNr \0" /* 10561 */ "mbar \0" /* 10567 */ "vstribr \0" /* 10576 */ "setnbcr \0" /* 10585 */ "setbcr \0" /* 10593 */ "mfdcr \0" /* 10600 */ "rldcr \0" /* 10607 */ "mtdcr \0" /* 10614 */ "mfcr \0" /* 10620 */ "rldicr \0" /* 10628 */ "mfvscr \0" /* 10636 */ "mtvscr \0" /* 10644 */ "pmxvf32ger \0" /* 10656 */ "pmxvf64ger \0" /* 10668 */ "vncipher \0" /* 10678 */ "vcipher \0" /* 10687 */ "vstrihr \0" /* 10696 */ "bclr \0" /* 10702 */ "mflr \0" /* 10708 */ "mtlr \0" /* 10714 */ "ps_mr \0" /* 10721 */ "qvfmr \0" /* 10728 */ "dmmr \0" /* 10734 */ "mfpmr \0" /* 10741 */ "mtpmr \0" /* 10748 */ "vpermr \0" /* 10756 */ "xxpermr \0" /* 10765 */ "xxlor \0" /* 10772 */ "xxlnor \0" /* 10780 */ "crnor \0" /* 10787 */ "evnor \0" /* 10794 */ "cror \0" /* 10800 */ "evor \0" /* 10806 */ "xxlxor \0" /* 10814 */ "dmxor \0" /* 10821 */ "vpermxor \0" /* 10831 */ "crxor \0" /* 10838 */ "evxor \0" /* 10845 */ "mfspr \0" /* 10852 */ "mtspr \0" /* 10859 */ "mfsr \0" /* 10865 */ "mfmsr \0" /* 10872 */ "mtmsr \0" /* 10879 */ "mtsr \0" /* 10885 */ "lvsr \0" /* 10891 */ "bcctr \0" /* 10898 */ "mfctr \0" /* 10905 */ "mtctr \0" /* 10912 */ "pmxvi16ger2s \0" /* 10926 */ "ps_abs \0" /* 10934 */ "efdabs \0" /* 10942 */ "qvfabs \0" /* 10950 */ "ps_nabs \0" /* 10959 */ "efdnabs \0" /* 10968 */ "qvfnabs \0" /* 10977 */ "efsnabs \0" /* 10986 */ "evfsnabs \0" /* 10996 */ "efsabs \0" /* 11004 */ "evfsabs \0" /* 11013 */ "evabs \0" /* 11020 */ "vsum4sbs \0" /* 11030 */ "vsubsbs \0" /* 11039 */ "vaddsbs \0" /* 11048 */ "vsum4ubs \0" /* 11058 */ "vsububs \0" /* 11067 */ "vaddubs \0" /* 11076 */ "qvfsubs \0" /* 11085 */ "qvfmsubs \0" /* 11095 */ "qvfnmsubs \0" /* 11106 */ "qvfadds \0" /* 11115 */ "qvfmadds \0" /* 11125 */ "qvfnmadds \0" /* 11136 */ "qvfxxcpnmadds \0" /* 11151 */ "qvfxxnpmadds \0" /* 11165 */ "qvfxmadds \0" /* 11176 */ "qvfxxmadds \0" /* 11188 */ "qvfcfids \0" /* 11198 */ "dcbtds \0" /* 11206 */ "dcbtstds \0" /* 11216 */ "xscvdpsxds \0" /* 11228 */ "xvcvdpsxds \0" /* 11240 */ "xvcvspsxds \0" /* 11252 */ "xscvdpuxds \0" /* 11264 */ "xvcvdpuxds \0" /* 11276 */ "xvcvspuxds \0" /* 11288 */ "ps_res \0" /* 11296 */ "qvfres \0" /* 11304 */ "qvfrsqrtes \0" /* 11316 */ "efdcfs \0" /* 11324 */ "mffs \0" /* 11330 */ "plfs \0" /* 11336 */ "mcrfs \0" /* 11343 */ "pstfs \0" /* 11350 */ "vsum4shs \0" /* 11360 */ "vsubshs \0" /* 11369 */ "vmhaddshs \0" /* 11380 */ "vmhraddshs \0" /* 11392 */ "vaddshs \0" /* 11401 */ "vmsumshs \0" /* 11411 */ "vsubuhs \0" /* 11420 */ "vadduhs \0" /* 11429 */ "vmsumuhs \0" /* 11439 */ "subis \0" /* 11446 */ "subpcis \0" /* 11455 */ "addpcis \0" /* 11464 */ "addis \0" /* 11471 */ "lis \0" /* 11476 */ "xoris \0" /* 11483 */ "evsrwis \0" /* 11492 */ "icbtls \0" /* 11500 */ "qvfmuls \0" /* 11509 */ "qvfxmuls \0" /* 11519 */ "evlwhos \0" /* 11528 */ "dcbfps \0" /* 11536 */ "dcbstps \0" /* 11545 */ "vpksdss \0" /* 11554 */ "vpkshss \0" /* 11563 */ "vpkswss \0" /* 11572 */ "evcmpgts \0" /* 11582 */ "evcmplts \0" /* 11592 */ "fsqrts \0" /* 11600 */ "qvfcfidus \0" /* 11611 */ "vpksdus \0" /* 11620 */ "vpkudus \0" /* 11629 */ "subfus \0" /* 11637 */ "vpkshus \0" /* 11646 */ "vpkuhus \0" /* 11655 */ "vpkswus \0" /* 11664 */ "vpkuwus \0" /* 11673 */ "fdivs \0" /* 11680 */ "evsrws \0" /* 11688 */ "mtvsrws \0" /* 11697 */ "vsum2sws \0" /* 11707 */ "vsubsws \0" /* 11716 */ "vaddsws \0" /* 11725 */ "vsumsws \0" /* 11734 */ "vsubuws \0" /* 11743 */ "vadduws \0" /* 11752 */ "evdivws \0" /* 11761 */ "xscvdpsxws \0" /* 11773 */ "xvcvdpsxws \0" /* 11785 */ "xvcvspsxws \0" /* 11797 */ "xscvdpuxws \0" /* 11809 */ "xvcvdpuxws \0" /* 11821 */ "xvcvspuxws \0" /* 11833 */ "vctsxs \0" /* 11841 */ "vctuxs \0" /* 11849 */ "ldat \0" /* 11855 */ "stdat \0" /* 11862 */ "evlhhesplat \0" /* 11875 */ "evlwhsplat \0" /* 11887 */ "evlhhossplat \0" /* 11901 */ "evlhhousplat \0" /* 11915 */ "evlwwsplat \0" /* 11927 */ "lwat \0" /* 11933 */ "stwat \0" /* 11940 */ "dcbt \0" /* 11946 */ "icbt \0" /* 11952 */ "dcbtct \0" /* 11960 */ "dcbtstct \0" /* 11970 */ "efdcmpgt \0" /* 11980 */ "qvfcmpgt \0" /* 11990 */ "efscmpgt \0" /* 12000 */ "evfscmpgt \0" /* 12011 */ "efdtstgt \0" /* 12021 */ "efststgt \0" /* 12031 */ "evfststgt \0" /* 12042 */ "wait \0" /* 12048 */ "efdcmplt \0" /* 12058 */ "qvfcmplt \0" /* 12068 */ "efscmplt \0" /* 12078 */ "evfscmplt \0" /* 12089 */ "efdtstlt \0" /* 12099 */ "efststlt \0" /* 12109 */ "evfststlt \0" /* 12120 */ "crnot \0" /* 12127 */ "fsqrt \0" /* 12134 */ "ftsqrt \0" /* 12142 */ "psq_st \0" /* 12150 */ "vncipherlast \0" /* 12164 */ "vcipherlast \0" /* 12177 */ "dcbst \0" /* 12184 */ "dst \0" /* 12189 */ "hashst \0" /* 12197 */ "dcbtst \0" /* 12205 */ "dstst \0" /* 12212 */ "dcbtt \0" /* 12219 */ "dstt \0" /* 12225 */ "dcbtstt \0" /* 12234 */ "dststt \0" /* 12242 */ "lhau \0" /* 12248 */ "stbu \0" /* 12254 */ "lfdu \0" /* 12260 */ "stfdu \0" /* 12267 */ "maddhdu \0" /* 12276 */ "mulhdu \0" /* 12284 */ "qvfcfidu \0" /* 12294 */ "qvfctidu \0" /* 12304 */ "ldu \0" /* 12309 */ "stdu \0" /* 12315 */ "divdu \0" /* 12322 */ "divdeu \0" /* 12330 */ "divweu \0" /* 12338 */ "sthu \0" /* 12344 */ "evsrwiu \0" /* 12353 */ "psq_lu \0" /* 12361 */ "evlwhou \0" /* 12370 */ "fcmpu \0" /* 12377 */ "lfsu \0" /* 12383 */ "stfsu \0" /* 12390 */ "evcmpgtu \0" /* 12400 */ "evcmpltu \0" /* 12410 */ "psq_stu \0" /* 12419 */ "mulhwu \0" /* 12427 */ "qvfctiwu \0" /* 12437 */ "evsrwu \0" /* 12445 */ "stwu \0" /* 12451 */ "evdivwu \0" /* 12460 */ "lbzu \0" /* 12466 */ "lhzu \0" /* 12472 */ "lwzu \0" /* 12478 */ "slbmfev \0" /* 12487 */ "ps_div \0" /* 12495 */ "efddiv \0" /* 12503 */ "fdiv \0" /* 12509 */ "efsdiv \0" /* 12517 */ "evfsdiv \0" /* 12526 */ "ftdiv \0" /* 12533 */ "vslv \0" /* 12539 */ "xxleqv \0" /* 12547 */ "creqv \0" /* 12554 */ "eveqv \0" /* 12561 */ "vsrv \0" /* 12567 */ "plxv \0" /* 12573 */ "pstxv \0" /* 12580 */ "vextsb2w \0" /* 12590 */ "vextsh2w \0" /* 12600 */ "evmhesmfaaw \0" /* 12613 */ "evmhosmfaaw \0" /* 12626 */ "evmhessfaaw \0" /* 12639 */ "evmhossfaaw \0" /* 12652 */ "evaddsmiaaw \0" /* 12665 */ "evmhesmiaaw \0" /* 12678 */ "evsubfsmiaaw \0" /* 12692 */ "evmwlsmiaaw \0" /* 12705 */ "evmhosmiaaw \0" /* 12718 */ "evaddumiaaw \0" /* 12731 */ "evmheumiaaw \0" /* 12744 */ "evsubfumiaaw \0" /* 12758 */ "evmwlumiaaw \0" /* 12771 */ "evmhoumiaaw \0" /* 12784 */ "evaddssiaaw \0" /* 12797 */ "evmhessiaaw \0" /* 12810 */ "evsubfssiaaw \0" /* 12824 */ "evmwlssiaaw \0" /* 12837 */ "evmhossiaaw \0" /* 12850 */ "evaddusiaaw \0" /* 12863 */ "evmheusiaaw \0" /* 12876 */ "evsubfusiaaw \0" /* 12890 */ "evmwlusiaaw \0" /* 12903 */ "evmhousiaaw \0" /* 12916 */ "vshasigmaw \0" /* 12928 */ "vsraw \0" /* 12935 */ "vcntmbw \0" /* 12944 */ "vprtybw \0" /* 12953 */ "evaddw \0" /* 12961 */ "evldw \0" /* 12968 */ "evrndw \0" /* 12976 */ "evstdw \0" /* 12984 */ "vmrgew \0" /* 12992 */ "vcmpnew \0" /* 13001 */ "evsubfw \0" /* 13010 */ "evsubifw \0" /* 13020 */ "vnegw \0" /* 13027 */ "vmrghw \0" /* 13035 */ "xxmrghw \0" /* 13044 */ "mulhw \0" /* 13051 */ "evaddiw \0" /* 13060 */ "qvfctiw \0" /* 13069 */ "xxspltiw \0" /* 13079 */ "vmrglw \0" /* 13087 */ "xxmrglw \0" /* 13096 */ "mullw \0" /* 13103 */ "cmplw \0" /* 13110 */ "evrlw \0" /* 13117 */ "evslw \0" /* 13124 */ "lmw \0" /* 13129 */ "stmw \0" /* 13135 */ "vpmsumw \0" /* 13144 */ "evmhesmfanw \0" /* 13157 */ "evmhosmfanw \0" /* 13170 */ "evmhessfanw \0" /* 13183 */ "evmhossfanw \0" /* 13196 */ "evmhesmianw \0" /* 13209 */ "evmwlsmianw \0" /* 13222 */ "evmhosmianw \0" /* 13235 */ "evmheumianw \0" /* 13248 */ "evmwlumianw \0" /* 13261 */ "evmhoumianw \0" /* 13274 */ "evmhessianw \0" /* 13287 */ "evmwlssianw \0" /* 13300 */ "evmhossianw \0" /* 13313 */ "evmheusianw \0" /* 13326 */ "evmwlusianw \0" /* 13339 */ "evmhousianw \0" /* 13352 */ "vmrgow \0" /* 13360 */ "cmpw \0" /* 13366 */ "xxbrw \0" /* 13373 */ "vsrw \0" /* 13379 */ "vmodsw \0" /* 13387 */ "vmulesw \0" /* 13396 */ "vdivesw \0" /* 13405 */ "vavgsw \0" /* 13413 */ "vupkhsw \0" /* 13422 */ "vmulhsw \0" /* 13431 */ "vspltisw \0" /* 13441 */ "vupklsw \0" /* 13450 */ "evcntlsw \0" /* 13460 */ "vminsw \0" /* 13468 */ "vinsw \0" /* 13475 */ "vmulosw \0" /* 13484 */ "vcmpgtsw \0" /* 13494 */ "extsw \0" /* 13501 */ "vdivsw \0" /* 13509 */ "vmaxsw \0" /* 13517 */ "vspltw \0" /* 13525 */ "xxspltw \0" /* 13534 */ "vpopcntw \0" /* 13544 */ "vinsertw \0" /* 13554 */ "xxinsertw \0" /* 13565 */ "pstw \0" /* 13571 */ "vsubcuw \0" /* 13580 */ "vaddcuw \0" /* 13589 */ "vmoduw \0" /* 13597 */ "vabsduw \0" /* 13606 */ "vmuleuw \0" /* 13615 */ "vdiveuw \0" /* 13624 */ "vavguw \0" /* 13632 */ "vmulhuw \0" /* 13641 */ "vminuw \0" /* 13649 */ "vmulouw \0" /* 13658 */ "vcmpequw \0" /* 13668 */ "vextractuw \0" /* 13680 */ "xxextractuw \0" /* 13693 */ "vcmpgtuw \0" /* 13703 */ "vdivuw \0" /* 13711 */ "vmaxuw \0" /* 13719 */ "xxblendvw \0" /* 13730 */ "divw \0" /* 13736 */ "vcmpnezw \0" /* 13746 */ "vclzw \0" /* 13753 */ "evcntlzw \0" /* 13763 */ "vctzw \0" /* 13770 */ "cnttzw \0" /* 13778 */ "lxvd2x \0" /* 13786 */ "stxvd2x \0" /* 13795 */ "lxvw4x \0" /* 13803 */ "stxvw4x \0" /* 13812 */ "lxvb16x \0" /* 13821 */ "stxvb16x \0" /* 13831 */ "lxvh8x \0" /* 13839 */ "stxvh8x \0" /* 13848 */ "lhax \0" /* 13854 */ "tlbivax \0" /* 13863 */ "qvlfiwax \0" /* 13873 */ "lxsiwax \0" /* 13882 */ "lwax \0" /* 13888 */ "lvebx \0" /* 13895 */ "stvebx \0" /* 13903 */ "stxsibx \0" /* 13912 */ "lxvrbx \0" /* 13920 */ "stxvrbx \0" /* 13929 */ "stbx \0" /* 13935 */ "xxsplti32dx \0" /* 13948 */ "qvlfcdx \0" /* 13957 */ "qvstfcdx \0" /* 13967 */ "evlddx \0" /* 13975 */ "evstddx \0" /* 13984 */ "qvlfdx \0" /* 13992 */ "qvstfdx \0" /* 14001 */ "qvlpcldx \0" /* 14011 */ "qvlpcrdx \0" /* 14021 */ "lxvrdx \0" /* 14029 */ "stxvrdx \0" /* 14038 */ "lxsdx \0" /* 14045 */ "stxsdx \0" /* 14053 */ "stdx \0" /* 14059 */ "addex \0" /* 14066 */ "evlwhex \0" /* 14075 */ "evstwhex \0" /* 14085 */ "evstwwex \0" /* 14095 */ "evldhx \0" /* 14103 */ "evstdhx \0" /* 14112 */ "lvehx \0" /* 14119 */ "stvehx \0" /* 14127 */ "stxsihx \0" /* 14136 */ "lxvrhx \0" /* 14144 */ "stxvrhx \0" /* 14153 */ "sthx \0" /* 14159 */ "stbcix \0" /* 14167 */ "ldcix \0" /* 14174 */ "stdcix \0" /* 14182 */ "sthcix \0" /* 14190 */ "stwcix \0" /* 14198 */ "lbzcix \0" /* 14206 */ "lhzcix \0" /* 14214 */ "lwzcix \0" /* 14222 */ "xsrqpix \0" /* 14231 */ "psq_lx \0" /* 14239 */ "vinsblx \0" /* 14248 */ "vextublx \0" /* 14258 */ "vinsdlx \0" /* 14267 */ "vinshlx \0" /* 14276 */ "vextuhlx \0" /* 14286 */ "vinsbvlx \0" /* 14296 */ "vextdubvlx \0" /* 14308 */ "vextddvlx \0" /* 14319 */ "vinshvlx \0" /* 14329 */ "vextduhvlx \0" /* 14341 */ "vinswvlx \0" /* 14351 */ "vextduwvlx \0" /* 14363 */ "vinswlx \0" /* 14372 */ "vextuwlx \0" /* 14382 */ "xxpermx \0" /* 14391 */ "vsbox \0" /* 14398 */ "evstwhox \0" /* 14408 */ "evstwwox \0" /* 14418 */ "lbepx \0" /* 14425 */ "stbepx \0" /* 14433 */ "lfdepx \0" /* 14441 */ "stfdepx \0" /* 14450 */ "lhepx \0" /* 14457 */ "sthepx \0" /* 14465 */ "lwepx \0" /* 14472 */ "stwepx \0" /* 14480 */ "vupkhpx \0" /* 14489 */ "vpkpx \0" /* 14496 */ "vupklpx \0" /* 14505 */ "lxsspx \0" /* 14513 */ "stxsspx \0" /* 14522 */ "lxvpx \0" /* 14529 */ "stxvpx \0" /* 14537 */ "lbarx \0" /* 14544 */ "ldarx \0" /* 14551 */ "lharx \0" /* 14558 */ "lqarx \0" /* 14565 */ "lwarx \0" /* 14572 */ "ldbrx \0" /* 14579 */ "stdbrx \0" /* 14587 */ "lhbrx \0" /* 14594 */ "sthbrx \0" /* 14602 */ "vinsbrx \0" /* 14611 */ "vextubrx \0" /* 14621 */ "lwbrx \0" /* 14628 */ "stwbrx \0" /* 14636 */ "vinsdrx \0" /* 14645 */ "vinshrx \0" /* 14654 */ "vextuhrx \0" /* 14664 */ "vinsbvrx \0" /* 14674 */ "vextdubvrx \0" /* 14686 */ "vextddvrx \0" /* 14697 */ "vinshvrx \0" /* 14707 */ "vextduhvrx \0" /* 14719 */ "vinswvrx \0" /* 14729 */ "vextduwvrx \0" /* 14741 */ "vinswrx \0" /* 14750 */ "vextuwrx \0" /* 14760 */ "mcrxrx \0" /* 14768 */ "tlbsx \0" /* 14775 */ "qvlfcsx \0" /* 14784 */ "qvstfcsx \0" /* 14794 */ "lxvdsx \0" /* 14802 */ "vcfsx \0" /* 14809 */ "qvlfsx \0" /* 14817 */ "qvstfsx \0" /* 14826 */ "qvlpclsx \0" /* 14836 */ "evlwhosx \0" /* 14846 */ "qvlpcrsx \0" /* 14856 */ "lxvwsx \0" /* 14864 */ "evlhhesplatx \0" /* 14878 */ "evlwhsplatx \0" /* 14891 */ "evlhhossplatx \0" /* 14906 */ "evlhhousplatx \0" /* 14921 */ "evlwwsplatx \0" /* 14934 */ "psq_stx \0" /* 14943 */ "lhaux \0" /* 14950 */ "lwaux \0" /* 14957 */ "stbux \0" /* 14964 */ "qvlfcdux \0" /* 14974 */ "qvstfcdux \0" /* 14985 */ "qvlfdux \0" /* 14994 */ "qvstfdux \0" /* 15004 */ "ldux \0" /* 15010 */ "stdux \0" /* 15017 */ "vcfux \0" /* 15024 */ "sthux \0" /* 15031 */ "psq_lux \0" /* 15040 */ "evlwhoux \0" /* 15050 */ "qvlfcsux \0" /* 15060 */ "qvstfcsux \0" /* 15071 */ "qvlfsux \0" /* 15080 */ "qvstfsux \0" /* 15090 */ "psq_stux \0" /* 15100 */ "stwux \0" /* 15107 */ "lbzux \0" /* 15114 */ "lhzux \0" /* 15121 */ "lwzux \0" /* 15128 */ "lvx \0" /* 15133 */ "stvx \0" /* 15139 */ "lxvx \0" /* 15145 */ "stxvx \0" /* 15152 */ "evldwx \0" /* 15160 */ "evstdwx \0" /* 15169 */ "lvewx \0" /* 15176 */ "stvewx \0" /* 15184 */ "qvstfiwx \0" /* 15194 */ "stxsiwx \0" /* 15203 */ "lxvrwx \0" /* 15211 */ "stxvrwx \0" /* 15220 */ "stwx \0" /* 15226 */ "lxsibzx \0" /* 15235 */ "lbzx \0" /* 15241 */ "lxsihzx \0" /* 15250 */ "lhzx \0" /* 15256 */ "qvlfiwzx \0" /* 15266 */ "lxsiwzx \0" /* 15275 */ "lwzx \0" /* 15281 */ "copy \0" /* 15287 */ "dcbz \0" /* 15293 */ "plbz \0" /* 15299 */ "xxsetaccz \0" /* 15310 */ "efdctsidz \0" /* 15321 */ "qvfctidz \0" /* 15331 */ "efdctuidz \0" /* 15342 */ "xscvqpsdz \0" /* 15353 */ "xscvqpudz \0" /* 15364 */ "plhz \0" /* 15370 */ "vrfiz \0" /* 15377 */ "xsrdpiz \0" /* 15386 */ "xvrdpiz \0" /* 15395 */ "xvrspiz \0" /* 15404 */ "qvfriz \0" /* 15412 */ "efdctsiz \0" /* 15422 */ "efsctsiz \0" /* 15432 */ "evfsctsiz \0" /* 15443 */ "efdctuiz \0" /* 15453 */ "efsctuiz \0" /* 15463 */ "xscvqpsqz \0" /* 15474 */ "xscvqpuqz \0" /* 15485 */ "dmsetdmrz \0" /* 15496 */ "qvfctiduz \0" /* 15507 */ "qvfctiwuz \0" /* 15518 */ "qvfctiwz \0" /* 15528 */ "plwz \0" /* 15534 */ "mfvsrwz \0" /* 15543 */ "mtvsrwz \0" /* 15552 */ "xscvqpswz \0" /* 15563 */ "xscvqpuwz \0" /* 15574 */ "evsel crD,\0" /* 15585 */ "# XRay Function Patchable RET.\0" /* 15616 */ "# XRay Typed Event Log.\0" /* 15640 */ "# XRay Custom Event Log.\0" /* 15665 */ "# XRay Function Enter.\0" /* 15688 */ "# XRay Tail Call Exit.\0" /* 15711 */ "# XRay Function Exit.\0" /* 15733 */ "trechkpt.\0" /* 15743 */ "ori 1, 1, 0\0" /* 15755 */ "ori 2, 2, 0\0" /* 15767 */ "#ADDISdtprelHA32\0" /* 15784 */ "#ATOMIC_LOAD_SUB_I32\0" /* 15805 */ "#ATOMIC_LOAD_ADD_I32\0" /* 15826 */ "#ATOMIC_LOAD_NAND_I32\0" /* 15848 */ "#ATOMIC_LOAD_AND_I32\0" /* 15869 */ "#ATOMIC_LOAD_UMIN_I32\0" /* 15891 */ "#ATOMIC_LOAD_MIN_I32\0" /* 15912 */ "#ATOMIC_SWAP_I32\0" /* 15929 */ "#ATOMIC_LOAD_XOR_I32\0" /* 15950 */ "#ATOMIC_LOAD_OR_I32\0" /* 15970 */ "#ATOMIC_LOAD_UMAX_I32\0" /* 15992 */ "#ATOMIC_LOAD_MAX_I32\0" /* 16013 */ "#ADDItlsgdL32\0" /* 16027 */ "#ADDItlsldL32\0" /* 16041 */ "#LDgotTprelL32\0" /* 16056 */ "#ADDIdtprelL32\0" /* 16071 */ "#EH_SJLJ_LONGJMP32\0" /* 16090 */ "#EH_SJLJ_SETJMP32\0" /* 16108 */ "#ADDItlsgdLADDR32\0" /* 16126 */ "#ADDItlsldLADDR32\0" /* 16144 */ "GETtlsldADDR32\0" /* 16159 */ "GETtlsADDR32\0" /* 16172 */ "#PROBED_ALLOCA_32\0" /* 16190 */ "#PREPARE_PROBED_ALLOCA_32\0" /* 16216 */ "#PROBED_STACKALLOC_32\0" /* 16238 */ "#PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32\0" /* 16281 */ "#DFLOADf32\0" /* 16292 */ "#XFLOADf32\0" /* 16303 */ "#DFSTOREf32\0" /* 16315 */ "#XFSTOREf32\0" /* 16327 */ "#ATOMIC_LOAD_SUB_I64\0" /* 16348 */ "#ATOMIC_LOAD_ADD_I64\0" /* 16369 */ "#ATOMIC_LOAD_NAND_I64\0" /* 16391 */ "#ATOMIC_LOAD_UMIN_I64\0" /* 16413 */ "#ATOMIC_LOAD_MIN_I64\0" /* 16434 */ "#ATOMIC_SWAP_I64\0" /* 16451 */ "#ATOMIC_CMP_SWAP_I64\0" /* 16472 */ "#ATOMIC_LOAD_XOR_I64\0" /* 16493 */ "#ATOMIC_LOAD_OR_I64\0" /* 16513 */ "#ATOMIC_LOAD_UMAX_I64\0" /* 16535 */ "#ATOMIC_LOAD_MAX_I64\0" /* 16556 */ "#EH_SJLJ_LONGJMP64\0" /* 16575 */ "#EH_SJLJ_SETJMP64\0" /* 16593 */ "#PROBED_ALLOCA_64\0" /* 16611 */ "#PREPARE_PROBED_ALLOCA_64\0" /* 16637 */ "#PROBED_STACKALLOC_64\0" /* 16659 */ "#PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64\0" /* 16702 */ "#DFLOADf64\0" /* 16713 */ "#XFLOADf64\0" /* 16724 */ "#DFSTOREf64\0" /* 16736 */ "#XFSTOREf64\0" /* 16748 */ "#ATOMIC_LOAD_AND_i64\0" /* 16769 */ "#SELECT_CC_SPE4\0" /* 16785 */ "#SELECT_SPE4\0" /* 16798 */ "#SELECT_CC_F4\0" /* 16812 */ "#SELECT_F4\0" /* 16823 */ "#SELECT_CC_I4\0" /* 16837 */ "#SELECT_I4\0" /* 16848 */ "crxor 6, 6, 6\0" /* 16862 */ "creqv 6, 6, 6\0" /* 16876 */ "#SELECT_CC_F16\0" /* 16891 */ "#SELECT_F16\0" /* 16903 */ "#ATOMIC_LOAD_SUB_I16\0" /* 16924 */ "#ATOMIC_LOAD_ADD_I16\0" /* 16945 */ "#ATOMIC_LOAD_NAND_I16\0" /* 16967 */ "#ATOMIC_LOAD_AND_I16\0" /* 16988 */ "#ATOMIC_LOAD_UMIN_I16\0" /* 17010 */ "#ATOMIC_LOAD_MIN_I16\0" /* 17031 */ "#ATOMIC_SWAP_I16\0" /* 17048 */ "#ATOMIC_LOAD_XOR_I16\0" /* 17069 */ "#ATOMIC_LOAD_OR_I16\0" /* 17089 */ "#ATOMIC_LOAD_UMAX_I16\0" /* 17111 */ "#ATOMIC_LOAD_MAX_I16\0" /* 17132 */ "#ATOMIC_LOAD_SUB_I128\0" /* 17154 */ "#ATOMIC_LOAD_ADD_I128\0" /* 17176 */ "#ATOMIC_LOAD_NAND_I128\0" /* 17199 */ "#ATOMIC_LOAD_AND_I128\0" /* 17221 */ "#ATOMIC_SWAP_I128\0" /* 17239 */ "#ATOMIC_CMP_SWAP_I128\0" /* 17261 */ "#ATOMIC_LOAD_XOR_I128\0" /* 17283 */ "#ATOMIC_LOAD_OR_I128\0" /* 17304 */ "#ADDIStocHA8\0" /* 17317 */ "#DYNALLOC8\0" /* 17328 */ "#CFENCE8\0" /* 17337 */ "#SELECT_CC_F8\0" /* 17351 */ "#SELECT_F8\0" /* 17362 */ "#ATOMIC_LOAD_SUB_I8\0" /* 17382 */ "#SELECT_CC_I8\0" /* 17396 */ "#ATOMIC_LOAD_ADD_I8\0" /* 17416 */ "#ATOMIC_LOAD_NAND_I8\0" /* 17437 */ "#ATOMIC_LOAD_AND_I8\0" /* 17457 */ "#ATOMIC_LOAD_UMIN_I8\0" /* 17478 */ "#ATOMIC_LOAD_MIN_I8\0" /* 17498 */ "#ATOMIC_CMP_SWAP_I8\0" /* 17518 */ "ATOMIC_LOAD_XOR_I8\0" /* 17537 */ "#ATOMIC_LOAD_OR_I8\0" /* 17556 */ "#SELECT_I8\0" /* 17567 */ "#ATOMIC_LOAD_UMAX_I8\0" /* 17588 */ "#ATOMIC_LOAD_MAX_I8\0" /* 17608 */ "#MovePCtoLR8\0" /* 17621 */ "#DYNAREAOFFSET8\0" /* 17637 */ "#ANDI_rec_1_EQ_BIT8\0" /* 17657 */ "#ANDI_rec_1_GT_BIT8\0" /* 17677 */ "#TLSGDAIX8\0" /* 17688 */ "#ADDItoc8\0" /* 17698 */ "#ATOMIC_SWAP_i8\0" /* 17714 */ "#ADDIStocHA\0" /* 17726 */ "#ADDIStlsgdHA\0" /* 17740 */ "#ADDIStlsldHA\0" /* 17754 */ "#ADDISgotTprelHA\0" /* 17771 */ "#ADDISdtprelHA\0" /* 17786 */ "#ReadTB\0" /* 17794 */ "#RESTORE_UACC\0" /* 17808 */ "#SPILL_UACC\0" /* 17820 */ "#RESTORE_WACC\0" /* 17834 */ "#SPILL_WACC\0" /* 17846 */ "#RESTORE_ACC\0" /* 17859 */ "#SPILL_ACC\0" /* 17870 */ "#DYNALLOC\0" /* 17880 */ "#SELECT_CC_QBRC\0" /* 17896 */ "#SELECT_QBRC\0" /* 17909 */ "#SELECT_CC_QFRC\0" /* 17925 */ "#SELECT_QFRC\0" /* 17938 */ "#SELECT_CC_VSFRC\0" /* 17955 */ "#SELECT_VSFRC\0" /* 17969 */ "#SELECT_CC_VRRC\0" /* 17985 */ "#SELECT_VRRC\0" /* 17998 */ "#SELECT_CC_QSRC\0" /* 18014 */ "#SELECT_QSRC\0" /* 18027 */ "#SELECT_CC_VSSRC\0" /* 18044 */ "#SELECT_VSSRC\0" /* 18058 */ "#SELECT_CC_VSRC\0" /* 18074 */ "#SELECT_VSRC\0" /* 18087 */ "#SPILLTOVSR_LD\0" /* 18102 */ "LIFETIME_END\0" /* 18115 */ "#SETRND\0" /* 18123 */ "#BUILD_QUADWORD\0" /* 18139 */ "#RESTORE_QUADWORD\0" /* 18157 */ "#SPILL_QUADWORD\0" /* 18173 */ "#SPLIT_QUADWORD\0" /* 18189 */ "PSEUDO_PROBE\0" /* 18202 */ "BUNDLE\0" /* 18209 */ "#SELECT_CC_SPE\0" /* 18224 */ "#SELECT_SPE\0" /* 18236 */ "DBG_VALUE\0" /* 18246 */ "DBG_INSTR_REF\0" /* 18260 */ "DBG_PHI\0" /* 18268 */ "#LDtocJTI\0" /* 18278 */ "DBG_LABEL\0" /* 18288 */ "#GETtlsldADDRPCREL\0" /* 18307 */ "#GETtlsADDRPCREL\0" /* 18324 */ "#LDtocL\0" /* 18332 */ "#ADDItocL\0" /* 18342 */ "#LWZtocL\0" /* 18351 */ "#ADDItlsgdL\0" /* 18363 */ "#ADDItlsldL\0" /* 18375 */ "#LDgotTprelL\0" /* 18388 */ "#ADDIdtprelL\0" /* 18401 */ "#SETFLM\0" /* 18409 */ "#LQX_PSEUDO\0" /* 18421 */ "#STQX_PSEUDO\0" /* 18434 */ "#PPCEIEIO\0" /* 18444 */ "#UNENCODED_NOP\0" /* 18459 */ "#UpdateGBR\0" /* 18470 */ "#RESTORE_CR\0" /* 18482 */ "#SPILL_CR\0" /* 18492 */ "#ADDItlsgdLADDR\0" /* 18508 */ "#ADDItlsldLADDR\0" /* 18524 */ "#GETtlsldADDR\0" /* 18538 */ "#GETtlsADDR\0" /* 18550 */ "#KILL_PAIR\0" /* 18561 */ "#MovePCtoLR\0" /* 18573 */ "#MoveGOTtoLR\0" /* 18586 */ "#TCHECK_RET\0" /* 18598 */ "#TBEGIN_RET\0" /* 18610 */ "#DYNAREAOFFSET\0" /* 18625 */ "#RESTORE_CRBIT\0" /* 18640 */ "#SPILL_CRBIT\0" /* 18653 */ "#ANDI_rec_1_EQ_BIT\0" /* 18672 */ "#ANDI_rec_1_GT_BIT\0" /* 18691 */ "#PPC32GOT\0" /* 18701 */ "#PPC32PICGOT\0" /* 18714 */ "#LDtocCPT\0" /* 18724 */ "LIFETIME_START\0" /* 18739 */ "DBG_VALUE_LIST\0" /* 18754 */ "#SPILLTOVSR_ST\0" /* 18769 */ "#LIWAX\0" /* 18776 */ "#SPILLTOVSR_LDX\0" /* 18792 */ "GETtlsADDR32AIX\0" /* 18808 */ "GETtlsADDR64AIX\0" /* 18824 */ "#TLSGDAIX\0" /* 18834 */ "#SPILLTOVSR_STX\0" /* 18850 */ "#STIWX\0" /* 18857 */ "#LIWZX\0" /* 18864 */ "bca\0" /* 18868 */ "slbia\0" /* 18874 */ "tlbia\0" /* 18880 */ "bcla\0" /* 18885 */ "clrbhrb\0" /* 18893 */ "bc\0" /* 18896 */ "slbsync\0" /* 18904 */ "tlbsync\0" /* 18912 */ "msgsync\0" /* 18920 */ "isync\0" /* 18926 */ "msync\0" /* 18932 */ "#LDtoc\0" /* 18939 */ "#ADDItoc\0" /* 18948 */ "#LWZtoc\0" /* 18956 */ "hrfid\0" /* 18962 */ "tlbre\0" /* 18968 */ "tlbwe\0" /* 18974 */ "#SETRNDi\0" /* 18983 */ "rfci\0" /* 18988 */ "rfmci\0" /* 18994 */ "rfdi\0" /* 18999 */ "rfi\0" /* 19003 */ "bcl\0" /* 19007 */ "#PADDIdtprel\0" /* 19020 */ "# FEntry call\0" /* 19034 */ "dssall\0" /* 19041 */ "blrl\0" /* 19046 */ "bctrl\0" /* 19052 */ "attn\0" /* 19057 */ "eieio\0" /* 19063 */ "nap\0" /* 19067 */ "trap\0" /* 19072 */ "nop\0" /* 19076 */ "#DecreaseCTR8loop\0" /* 19094 */ "#DecreaseCTRloop\0" /* 19111 */ "stop\0" /* 19116 */ "blr\0" /* 19120 */ "bctr\0" /* 19125 */ "cpabort\0" }; #endif // CAPSTONE_DIET static const uint32_t OpInfo0[] = { 0U, // PHI 0U, // INLINEASM 0U, // INLINEASM_BR 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // ANNOTATION_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 18237U, // DBG_VALUE 18740U, // DBG_VALUE_LIST 18247U, // DBG_INSTR_REF 18261U, // DBG_PHI 18279U, // DBG_LABEL 0U, // REG_SEQUENCE 0U, // COPY 18203U, // BUNDLE 18725U, // LIFETIME_START 18103U, // LIFETIME_END 18190U, // PSEUDO_PROBE 0U, // ARITH_FENCE 0U, // STACKMAP 19021U, // FENTRY_CALL 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // PREALLOCATED_SETUP 0U, // PREALLOCATED_ARG 0U, // STATEPOINT 0U, // LOCAL_ESCAPE 0U, // FAULTING_OP 0U, // PATCHABLE_OP 15666U, // PATCHABLE_FUNCTION_ENTER 15586U, // PATCHABLE_RET 15712U, // PATCHABLE_FUNCTION_EXIT 15689U, // PATCHABLE_TAIL_CALL 15641U, // PATCHABLE_EVENT_CALL 15617U, // PATCHABLE_TYPED_EVENT_CALL 0U, // ICALL_BRANCH_FUNNEL 0U, // MEMBARRIER 0U, // G_ASSERT_SEXT 0U, // G_ASSERT_ZEXT 0U, // G_ASSERT_ALIGN 0U, // G_ADD 0U, // G_SUB 0U, // G_MUL 0U, // G_SDIV 0U, // G_UDIV 0U, // G_SREM 0U, // G_UREM 0U, // G_SDIVREM 0U, // G_UDIVREM 0U, // G_AND 0U, // G_OR 0U, // G_XOR 0U, // G_IMPLICIT_DEF 0U, // G_PHI 0U, // G_FRAME_INDEX 0U, // G_GLOBAL_VALUE 0U, // G_EXTRACT 0U, // G_UNMERGE_VALUES 0U, // G_INSERT 0U, // G_MERGE_VALUES 0U, // G_BUILD_VECTOR 0U, // G_BUILD_VECTOR_TRUNC 0U, // G_CONCAT_VECTORS 0U, // G_PTRTOINT 0U, // G_INTTOPTR 0U, // G_BITCAST 0U, // G_FREEZE 0U, // G_INTRINSIC_FPTRUNC_ROUND 0U, // G_INTRINSIC_TRUNC 0U, // G_INTRINSIC_ROUND 0U, // G_INTRINSIC_LRINT 0U, // G_INTRINSIC_ROUNDEVEN 0U, // G_READCYCLECOUNTER 0U, // G_LOAD 0U, // G_SEXTLOAD 0U, // G_ZEXTLOAD 0U, // G_INDEXED_LOAD 0U, // G_INDEXED_SEXTLOAD 0U, // G_INDEXED_ZEXTLOAD 0U, // G_STORE 0U, // G_INDEXED_STORE 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS 0U, // G_ATOMIC_CMPXCHG 0U, // G_ATOMICRMW_XCHG 0U, // G_ATOMICRMW_ADD 0U, // G_ATOMICRMW_SUB 0U, // G_ATOMICRMW_AND 0U, // G_ATOMICRMW_NAND 0U, // G_ATOMICRMW_OR 0U, // G_ATOMICRMW_XOR 0U, // G_ATOMICRMW_MAX 0U, // G_ATOMICRMW_MIN 0U, // G_ATOMICRMW_UMAX 0U, // G_ATOMICRMW_UMIN 0U, // G_ATOMICRMW_FADD 0U, // G_ATOMICRMW_FSUB 0U, // G_ATOMICRMW_FMAX 0U, // G_ATOMICRMW_FMIN 0U, // G_ATOMICRMW_UINC_WRAP 0U, // G_ATOMICRMW_UDEC_WRAP 0U, // G_FENCE 0U, // G_BRCOND 0U, // G_BRINDIRECT 0U, // G_INVOKE_REGION_START 0U, // G_INTRINSIC 0U, // G_INTRINSIC_W_SIDE_EFFECTS 0U, // G_ANYEXT 0U, // G_TRUNC 0U, // G_CONSTANT 0U, // G_FCONSTANT 0U, // G_VASTART 0U, // G_VAARG 0U, // G_SEXT 0U, // G_SEXT_INREG 0U, // G_ZEXT 0U, // G_SHL 0U, // G_LSHR 0U, // G_ASHR 0U, // G_FSHL 0U, // G_FSHR 0U, // G_ROTR 0U, // G_ROTL 0U, // G_ICMP 0U, // G_FCMP 0U, // G_SELECT 0U, // G_UADDO 0U, // G_UADDE 0U, // G_USUBO 0U, // G_USUBE 0U, // G_SADDO 0U, // G_SADDE 0U, // G_SSUBO 0U, // G_SSUBE 0U, // G_UMULO 0U, // G_SMULO 0U, // G_UMULH 0U, // G_SMULH 0U, // G_UADDSAT 0U, // G_SADDSAT 0U, // G_USUBSAT 0U, // G_SSUBSAT 0U, // G_USHLSAT 0U, // G_SSHLSAT 0U, // G_SMULFIX 0U, // G_UMULFIX 0U, // G_SMULFIXSAT 0U, // G_UMULFIXSAT 0U, // G_SDIVFIX 0U, // G_UDIVFIX 0U, // G_SDIVFIXSAT 0U, // G_UDIVFIXSAT 0U, // G_FADD 0U, // G_FSUB 0U, // G_FMUL 0U, // G_FMA 0U, // G_FMAD 0U, // G_FDIV 0U, // G_FREM 0U, // G_FPOW 0U, // G_FPOWI 0U, // G_FEXP 0U, // G_FEXP2 0U, // G_FLOG 0U, // G_FLOG2 0U, // G_FLOG10 0U, // G_FNEG 0U, // G_FPEXT 0U, // G_FPTRUNC 0U, // G_FPTOSI 0U, // G_FPTOUI 0U, // G_SITOFP 0U, // G_UITOFP 0U, // G_FABS 0U, // G_FCOPYSIGN 0U, // G_IS_FPCLASS 0U, // G_FCANONICALIZE 0U, // G_FMINNUM 0U, // G_FMAXNUM 0U, // G_FMINNUM_IEEE 0U, // G_FMAXNUM_IEEE 0U, // G_FMINIMUM 0U, // G_FMAXIMUM 0U, // G_PTR_ADD 0U, // G_PTRMASK 0U, // G_SMIN 0U, // G_SMAX 0U, // G_UMIN 0U, // G_UMAX 0U, // G_ABS 0U, // G_LROUND 0U, // G_LLROUND 0U, // G_BR 0U, // G_BRJT 0U, // G_INSERT_VECTOR_ELT 0U, // G_EXTRACT_VECTOR_ELT 0U, // G_SHUFFLE_VECTOR 0U, // G_CTTZ 0U, // G_CTTZ_ZERO_UNDEF 0U, // G_CTLZ 0U, // G_CTLZ_ZERO_UNDEF 0U, // G_CTPOP 0U, // G_BSWAP 0U, // G_BITREVERSE 0U, // G_FCEIL 0U, // G_FCOS 0U, // G_FSIN 0U, // G_FSQRT 0U, // G_FFLOOR 0U, // G_FRINT 0U, // G_FNEARBYINT 0U, // G_ADDRSPACE_CAST 0U, // G_BLOCK_ADDR 0U, // G_JUMP_TABLE 0U, // G_DYN_STACKALLOC 0U, // G_STRICT_FADD 0U, // G_STRICT_FSUB 0U, // G_STRICT_FMUL 0U, // G_STRICT_FDIV 0U, // G_STRICT_FREM 0U, // G_STRICT_FMA 0U, // G_STRICT_FSQRT 0U, // G_READ_REGISTER 0U, // G_WRITE_REGISTER 0U, // G_MEMCPY 0U, // G_MEMCPY_INLINE 0U, // G_MEMMOVE 0U, // G_MEMSET 0U, // G_BZERO 0U, // G_VECREDUCE_SEQ_FADD 0U, // G_VECREDUCE_SEQ_FMUL 0U, // G_VECREDUCE_FADD 0U, // G_VECREDUCE_FMUL 0U, // G_VECREDUCE_FMAX 0U, // G_VECREDUCE_FMIN 0U, // G_VECREDUCE_ADD 0U, // G_VECREDUCE_MUL 0U, // G_VECREDUCE_AND 0U, // G_VECREDUCE_OR 0U, // G_VECREDUCE_XOR 0U, // G_VECREDUCE_SMAX 0U, // G_VECREDUCE_SMIN 0U, // G_VECREDUCE_UMAX 0U, // G_VECREDUCE_UMIN 0U, // G_SBFX 0U, // G_UBFX 17240U, // ATOMIC_CMP_SWAP_I128 17155U, // ATOMIC_LOAD_ADD_I128 17200U, // ATOMIC_LOAD_AND_I128 17177U, // ATOMIC_LOAD_NAND_I128 17284U, // ATOMIC_LOAD_OR_I128 17133U, // ATOMIC_LOAD_SUB_I128 17262U, // ATOMIC_LOAD_XOR_I128 17222U, // ATOMIC_SWAP_I128 18124U, // BUILD_QUADWORD 35470U, // BUILD_UACC 17329U, // CFENCE8 1073780323U, // CLRLSLDI 1073775550U, // CLRLSLDI_rec 1073780855U, // CLRLSLWI 1073775659U, // CLRLSLWI_rec 1073780358U, // CLRRDI 1073775577U, // CLRRDI_rec 1073780896U, // CLRRWI 1073775688U, // CLRRWI_rec 1120678U, // DCBFL 1123187U, // DCBFLP 1125641U, // DCBFPS 1119150U, // DCBFx 1125649U, // DCBSTPS 33631921U, // DCBTCT 33631167U, // DCBTDS 33631929U, // DCBTSTCT 33631175U, // DCBTSTDS 1126338U, // DCBTSTT 1126310U, // DCBTSTx 1126325U, // DCBTT 1126053U, // DCBTx 16282U, // DFLOADf32 16703U, // DFLOADf64 16304U, // DFSTOREf32 16725U, // DFSTOREf64 1073780333U, // EXTLDI 1073775561U, // EXTLDI_rec 1073780881U, // EXTLWI 1073775679U, // EXTLWI_rec 1073780382U, // EXTRDI 1073775604U, // EXTRDI_rec 1073780920U, // EXTRWI 1073775715U, // EXTRWI_rec 1073780865U, // INSLWI 1073775670U, // INSLWI_rec 1073780366U, // INSRDI 1073775586U, // INSRDI_rec 1073780904U, // INSRWI 1073775697U, // INSRWI_rec 18551U, // KILL_PAIR 67144815U, // LAx 18770U, // LIWAX 18858U, // LIWZX 1073780501U, // RLWIMIbm 1073775642U, // RLWIMIbm_rec 1073781699U, // RLWINMbm 1073775811U, // RLWINMbm_rec 1073781716U, // RLWNMbm 1073775820U, // RLWNMbm_rec 1073780374U, // ROTRDI 1073775595U, // ROTRDI_rec 1073780912U, // ROTRWI 1073775706U, // ROTRWI_rec 1073780327U, // SLDI 1073775554U, // SLDI_rec 1073780859U, // SLWI 1073775663U, // SLWI_rec 18088U, // SPILLTOVSR_LD 18777U, // SPILLTOVSR_LDX 18755U, // SPILLTOVSR_ST 18835U, // SPILLTOVSR_STX 1073780368U, // SRDI 1073775588U, // SRDI_rec 1073780906U, // SRWI 1073775699U, // SRWI_rec 18851U, // STIWX 1073780273U, // SUBI 1073778568U, // SUBIC 1073775065U, // SUBIC_rec 1073786032U, // SUBIS 100707511U, // SUBPCIS 16293U, // XFLOADf32 16714U, // XFLOADf64 16316U, // XFSTOREf32 16737U, // XFSTOREf64 1073778760U, // ADD4 1073782282U, // ADD4O 1073775911U, // ADD4O_rec 1073778760U, // ADD4TLS 1073775139U, // ADD4_rec 1073778760U, // ADD8 1073782282U, // ADD8O 1073775911U, // ADD8O_rec 1073778760U, // ADD8TLS 1073778760U, // ADD8TLS_ 1073775139U, // ADD8_rec 1073778530U, // ADDC 1073778530U, // ADDC8 1073782267U, // ADDC8O 1073775894U, // ADDC8O_rec 1073775032U, // ADDC8_rec 1073782267U, // ADDCO 1073775894U, // ADDCO_rec 1073775032U, // ADDC_rec 1073779466U, // ADDE 1073779466U, // ADDE8 1073782303U, // ADDE8O 1073775935U, // ADDE8O_rec 1073775315U, // ADDE8_rec 1073782303U, // ADDEO 1073775935U, // ADDEO_rec 1073788652U, // ADDEX 1073788652U, // ADDEX8 1073775315U, // ADDE_rec 1073780309U, // ADDI 1073780309U, // ADDI8 1073778575U, // ADDIC 1073778575U, // ADDIC8 1073775073U, // ADDIC_rec 1073786057U, // ADDIS 1073786057U, // ADDIS8 17772U, // ADDISdtprelHA 15768U, // ADDISdtprelHA32 17755U, // ADDISgotTprelHA 17727U, // ADDIStlsgdHA 17741U, // ADDIStlsldHA 17715U, // ADDIStocHA 17305U, // ADDIStocHA8 18389U, // ADDIdtprelL 16057U, // ADDIdtprelL32 18352U, // ADDItlsgdL 16014U, // ADDItlsgdL32 18493U, // ADDItlsgdLADDR 16109U, // ADDItlsgdLADDR32 18364U, // ADDItlsldL 16028U, // ADDItlsldL32 18509U, // ADDItlsldLADDR 16127U, // ADDItlsldLADDR32 18940U, // ADDItoc 17689U, // ADDItoc8 18333U, // ADDItocL 37709U, // ADDME 37709U, // ADDME8 40502U, // ADDME8O 34137U, // ADDME8O_rec 33523U, // ADDME8_rec 40502U, // ADDMEO 34137U, // ADDMEO_rec 33523U, // ADDME_rec 44224U, // ADDPCIS 37791U, // ADDZE 37791U, // ADDZE8 40527U, // ADDZE8O 34165U, // ADDZE8O_rec 33584U, // ADDZE8_rec 40527U, // ADDZEO 34165U, // ADDZEO_rec 33584U, // ADDZE_rec 101019U, // ADJCALLSTACKDOWN 101038U, // ADJCALLSTACKUP 1073779070U, // AND 1073779070U, // AND8 1073775238U, // AND8_rec 1073778539U, // ANDC 1073778539U, // ANDC8 1073775039U, // ANDC8_rec 1073775039U, // ANDC_rec 1073775570U, // ANDI8_rec 1073776483U, // ANDIS8_rec 1073776483U, // ANDIS_rec 1073775570U, // ANDI_rec 18654U, // ANDI_rec_1_EQ_BIT 17638U, // ANDI_rec_1_EQ_BIT8 18673U, // ANDI_rec_1_GT_BIT 17658U, // ANDI_rec_1_GT_BIT8 1073775238U, // AND_rec 2283833877U, // ATOMIC_CMP_SWAP_I16 2283833803U, // ATOMIC_CMP_SWAP_I32 16452U, // ATOMIC_CMP_SWAP_I64 17499U, // ATOMIC_CMP_SWAP_I8 16925U, // ATOMIC_LOAD_ADD_I16 15806U, // ATOMIC_LOAD_ADD_I32 16349U, // ATOMIC_LOAD_ADD_I64 17397U, // ATOMIC_LOAD_ADD_I8 16968U, // ATOMIC_LOAD_AND_I16 15849U, // ATOMIC_LOAD_AND_I32 16749U, // ATOMIC_LOAD_AND_I64 17438U, // ATOMIC_LOAD_AND_I8 17112U, // ATOMIC_LOAD_MAX_I16 15993U, // ATOMIC_LOAD_MAX_I32 16536U, // ATOMIC_LOAD_MAX_I64 17589U, // ATOMIC_LOAD_MAX_I8 17011U, // ATOMIC_LOAD_MIN_I16 15892U, // ATOMIC_LOAD_MIN_I32 16414U, // ATOMIC_LOAD_MIN_I64 17479U, // ATOMIC_LOAD_MIN_I8 16946U, // ATOMIC_LOAD_NAND_I16 15827U, // ATOMIC_LOAD_NAND_I32 16370U, // ATOMIC_LOAD_NAND_I64 17417U, // ATOMIC_LOAD_NAND_I8 17070U, // ATOMIC_LOAD_OR_I16 15951U, // ATOMIC_LOAD_OR_I32 16494U, // ATOMIC_LOAD_OR_I64 17538U, // ATOMIC_LOAD_OR_I8 16904U, // ATOMIC_LOAD_SUB_I16 15785U, // ATOMIC_LOAD_SUB_I32 16328U, // ATOMIC_LOAD_SUB_I64 17363U, // ATOMIC_LOAD_SUB_I8 17090U, // ATOMIC_LOAD_UMAX_I16 15971U, // ATOMIC_LOAD_UMAX_I32 16514U, // ATOMIC_LOAD_UMAX_I64 17568U, // ATOMIC_LOAD_UMAX_I8 16989U, // ATOMIC_LOAD_UMIN_I16 15870U, // ATOMIC_LOAD_UMIN_I32 16392U, // ATOMIC_LOAD_UMIN_I64 17458U, // ATOMIC_LOAD_UMIN_I8 17049U, // ATOMIC_LOAD_XOR_I16 15930U, // ATOMIC_LOAD_XOR_I32 16473U, // ATOMIC_LOAD_XOR_I64 17519U, // ATOMIC_LOAD_XOR_I8 17032U, // ATOMIC_SWAP_I16 15913U, // ATOMIC_SWAP_I32 16435U, // ATOMIC_SWAP_I64 17699U, // ATOMIC_SWAP_I8 19053U, // ATTN 1183068U, // B 1215304U, // BA 167804987U, // BC 3361228U, // BCC 4409804U, // BCCA 5458380U, // BCCCTR 5458380U, // BCCCTR8 6506956U, // BCCCTRL 6506956U, // BCCCTRL8 7555532U, // BCCL 8604108U, // BCCLA 9652684U, // BCCLR 10701260U, // BCCLRL 11567213U, // BCCTR 11567213U, // BCCTR8 11567279U, // BCCTR8n 11567191U, // BCCTRL 11567191U, // BCCTRL8 11567259U, // BCCTRL8n 11567259U, // BCCTRLn 11567279U, // BCCTRn 1073775145U, // BCDADD_rec 1073775828U, // BCDCFN_rec 1073776215U, // BCDCFSQ_rec 1073776848U, // BCDCFZ_rec 1073775837U, // BCDCPSGN_rec 34061U, // BCDCTN_rec 34401U, // BCDCTSQ_rec 1073776864U, // BCDCTZ_rec 1073775857U, // BCDSETSGN_rec 1073776331U, // BCDSR_rec 1073774956U, // BCDSUB_rec 1073776406U, // BCDS_rec 1073775089U, // BCDTRUNC_rec 1073776508U, // BCDUS_rec 1073775100U, // BCDUTRUNC_rec 167804995U, // BCL 11567203U, // BCLR 11567180U, // BCLRL 11567249U, // BCLRLn 11567270U, // BCLRn 1179665U, // BCLalways 167805065U, // BCLn 19121U, // BCTR 19121U, // BCTR8 19047U, // BCTRL 19047U, // BCTRL8 229406U, // BCTRL8_LDinto_toc 229406U, // BCTRL8_LDinto_toc_RM 19047U, // BCTRL8_RM 229420U, // BCTRL_LWZinto_toc 229420U, // BCTRL_LWZinto_toc_RM 19047U, // BCTRL_RM 167805058U, // BCn 1186147U, // BL 1186147U, // BL8 12720483U, // BL8_NOP 12720483U, // BL8_NOP_RM 12851555U, // BL8_NOP_TLS 1186147U, // BL8_NOTOC 1186147U, // BL8_NOTOC_RM 1317219U, // BL8_NOTOC_TLS 1186147U, // BL8_RM 1317219U, // BL8_TLS 1317219U, // BL8_TLS_ 1215598U, // BLA 1215598U, // BLA8 12749934U, // BLA8_NOP 12749934U, // BLA8_NOP_RM 1215598U, // BLA8_RM 1215598U, // BLA_RM 19117U, // BLR 19117U, // BLR8 19042U, // BLRL 12720483U, // BL_NOP 12720483U, // BL_NOP_RM 1186147U, // BL_RM 1317219U, // BL_TLS 1073779050U, // BPERMD 37306U, // BRD 38169U, // BRH 38169U, // BRH8 1073778631U, // BRINC 46137U, // BRW 46137U, // BRW8 1073778909U, // CFUGED 18886U, // CLRBHRB 1073778130U, // CMPB 1073778130U, // CMPB8 1073779122U, // CMPD 1073780351U, // CMPDI 1073778136U, // CMPEQB 1073779021U, // CMPLD 1073780315U, // CMPLDI 1073787696U, // CMPLW 1073780839U, // CMPLWI 1275104736U, // CMPRB 1275104736U, // CMPRB8 1073787953U, // CMPW 1073780889U, // CMPWI 37602U, // CNTLZD 1073781530U, // CNTLZDM 33473U, // CNTLZD_rec 46524U, // CNTLZW 46524U, // CNTLZW8 34949U, // CNTLZW8_rec 34949U, // CNTLZW_rec 37617U, // CNTTZD 1073781547U, // CNTTZDM 33482U, // CNTTZD_rec 46539U, // CNTTZW 46539U, // CNTTZW8 34958U, // CNTTZW8_rec 34958U, // CNTTZW_rec 19126U, // CP_ABORT 48050U, // CP_COPY 48050U, // CP_COPY8 1073775392U, // CP_PASTE8_rec 1073775392U, // CP_PASTE_rec 16863U, // CR6SET 16849U, // CR6UNSET 1073779100U, // CRAND 1073778545U, // CRANDC 1073787140U, // CREQV 1073779084U, // CRNAND 1073785373U, // CRNOR 44889U, // CRNOT 1073785387U, // CROR 1073778652U, // CRORC 1308668164U, // CRSET 1308666448U, // CRUNSET 1073785424U, // CRXOR 3361228U, // CTRL_DEP 268475874U, // DARN 1116998U, // DCBA 13931438U, // DCBF 1122928U, // DCBFEP 1119765U, // DCBI 1126290U, // DCBST 1122961U, // DCBSTEP 14986917U, // DCBT 336521U, // DCBTEP 14987174U, // DCBTST 336538U, // DCBTSTEP 1129400U, // DCBZ 1122980U, // DCBZEP 1120881U, // DCBZL 1122944U, // DCBZLEP 38455U, // DCCCI 1073779413U, // DIVD 1073779472U, // DIVDE 1073782310U, // DIVDEO 1073775943U, // DIVDEO_rec 1073786915U, // DIVDEU 1073782549U, // DIVDEUO 1073776032U, // DIVDEUO_rec 1073776595U, // DIVDEU_rec 1073775322U, // DIVDE_rec 1073782296U, // DIVDO 1073775927U, // DIVDO_rec 1073786908U, // DIVDU 1073782541U, // DIVDUO 1073776023U, // DIVDUO_rec 1073776587U, // DIVDU_rec 1073775290U, // DIVD_rec 1073788323U, // DIVW 1073779599U, // DIVWE 1073782343U, // DIVWEO 1073775980U, // DIVWEO_rec 1073786923U, // DIVWEU 1073782558U, // DIVWEUO 1073776042U, // DIVWEUO_rec 1073776604U, // DIVWEU_rec 1073775400U, // DIVWE_rec 1073782583U, // DIVWO 1073776070U, // DIVWO_rec 1073787046U, // DIVWU 1073782567U, // DIVWUO 1073776052U, // DIVWUO_rec 1073776631U, // DIVWU_rec 1073776755U, // DIVW_rec 43497U, // DMMR 1096830U, // DMSETDMRZ 302033471U, // DMXOR 1308985928U, // DMXXEXTFDMR256 11930043U, // DMXXEXTFDMR512 16124347U, // DMXXEXTFDMR512_HI 1073777207U, // DMXXINSTFDMR256 1073777066U, // DMXXINSTFDMR512 1073777066U, // DMXXINSTFDMR512_HI 1486110U, // DSS 19035U, // DSSALL 1376104345U, // DST 1376104345U, // DST64 1376104366U, // DSTST 1376104366U, // DSTST64 1376104395U, // DSTSTT 1376104395U, // DSTSTT64 1376104380U, // DSTT 1376104380U, // DSTT64 17871U, // DYNALLOC 17318U, // DYNALLOC8 18611U, // DYNAREAOFFSET 17622U, // DYNAREAOFFSET8 19077U, // DecreaseCTR8loop 19095U, // DecreaseCTRloop 43703U, // EFDABS 1073778765U, // EFDADD 44085U, // EFDCFS 37886U, // EFDCFSF 38866U, // EFDCFSI 37145U, // EFDCFSID 37988U, // EFDCFUF 38943U, // EFDCFUI 37164U, // EFDCFUID 1073784836U, // EFDCMPEQ 1073786563U, // EFDCMPGT 1073786641U, // EFDCMPLT 37960U, // EFDCTSF 38894U, // EFDCTSI 48079U, // EFDCTSIDZ 48181U, // EFDCTSIZ 38016U, // EFDCTUF 38971U, // EFDCTUI 48100U, // EFDCTUIDZ 48212U, // EFDCTUIZ 1073787088U, // EFDDIV 1073781293U, // EFDMUL 43728U, // EFDNABS 38050U, // EFDNEG 1073778361U, // EFDSUB 1073784886U, // EFDTSTEQ 1073786604U, // EFDTSTGT 1073786682U, // EFDTSTLT 43765U, // EFSABS 1073778867U, // EFSADD 37093U, // EFSCFD 37895U, // EFSCFSF 38875U, // EFSCFSI 37997U, // EFSCFUF 38952U, // EFSCFUI 1073784856U, // EFSCMPEQ 1073786583U, // EFSCMPGT 1073786661U, // EFSCMPLT 37969U, // EFSCTSF 38903U, // EFSCTSI 48191U, // EFSCTSIZ 38025U, // EFSCTUF 38980U, // EFSCTUI 48222U, // EFSCTUIZ 1073787102U, // EFSDIV 1073781309U, // EFSMUL 43746U, // EFSNABS 38066U, // EFSNEG 1073778415U, // EFSSUB 1073784896U, // EFSTSTEQ 1073786614U, // EFSTSTGT 1073786692U, // EFSTSTLT 16072U, // EH_SjLj_LongJmp32 16557U, // EH_SjLj_LongJmp64 16091U, // EH_SjLj_SetJmp32 16576U, // EH_SjLj_SetJmp64 1179649U, // EH_SjLj_Setup 1073787135U, // EQV 1073787135U, // EQV8 1073776655U, // EQV8_rec 1073776655U, // EQV_rec 43782U, // EVABS 1107342076U, // EVADDIW 45421U, // EVADDSMIAAW 45553U, // EVADDSSIAAW 45487U, // EVADDUMIAAW 45619U, // EVADDUSIAAW 1073787546U, // EVADDW 1073779107U, // EVAND 1073778553U, // EVANDC 1073784877U, // EVCMPEQ 1073786165U, // EVCMPGTS 1073786983U, // EVCMPGTU 1073786175U, // EVCMPLTS 1073786993U, // EVCMPLTU 46219U, // EVCNTLSW 46522U, // EVCNTLZW 1073786345U, // EVDIVWS 1073787044U, // EVDIVWU 1073787147U, // EVEQV 36413U, // EVEXTSB 38252U, // EVEXTSH 43773U, // EVFSABS 1073778875U, // EVFSADD 37904U, // EVFSCFSF 38884U, // EVFSCFSI 38006U, // EVFSCFUF 38961U, // EVFSCFUI 1073784866U, // EVFSCMPEQ 1073786593U, // EVFSCMPGT 1073786671U, // EVFSCMPLT 37978U, // EVFSCTSF 38912U, // EVFSCTSI 48201U, // EVFSCTSIZ 37978U, // EVFSCTUF 38989U, // EVFSCTUI 48201U, // EVFSCTUIZ 1073787110U, // EVFSDIV 1073781317U, // EVFSMUL 43755U, // EVFSNABS 38074U, // EVFSNEG 1073778423U, // EVFSSUB 1073784906U, // EVFSTSTEQ 1073786624U, // EVFSTSTGT 1073786702U, // EVFSTSTLT 67145924U, // EVLDD 134264464U, // EVLDDX 67146970U, // EVLDH 134264592U, // EVLDHX 67154594U, // EVLDW 134265649U, // EVLDWX 67153495U, // EVLHHESPLAT 134265361U, // EVLHHESPLATX 67153520U, // EVLHHOSSPLAT 134265388U, // EVLHHOSSPLATX 67153534U, // EVLHHOUSPLAT 134265403U, // EVLHHOUSPLATX 67146542U, // EVLWHE 134264563U, // EVLWHEX 67153152U, // EVLWHOS 134265333U, // EVLWHOSX 67153994U, // EVLWHOU 134265537U, // EVLWHOUX 67153508U, // EVLWHSPLAT 134265375U, // EVLWHSPLATX 67153548U, // EVLWWSPLAT 134265418U, // EVLWWSPLATX 1073780422U, // EVMERGEHI 1073782401U, // EVMERGEHILO 1073782390U, // EVMERGELO 1073780433U, // EVMERGELOHI 1073777356U, // EVMHEGSMFAA 1073781915U, // EVMHEGSMFAN 1073777404U, // EVMHEGSMIAA 1073781963U, // EVMHEGSMIAN 1073777441U, // EVMHEGUMIAA 1073782000U, // EVMHEGUMIAN 1073779642U, // EVMHESMF 1073777489U, // EVMHESMFA 1073787193U, // EVMHESMFAAW 1073787737U, // EVMHESMFANW 1073780517U, // EVMHESMI 1073777581U, // EVMHESMIA 1073787258U, // EVMHESMIAAW 1073787789U, // EVMHESMIANW 1073779745U, // EVMHESSF 1073777532U, // EVMHESSFA 1073787219U, // EVMHESSFAAW 1073787763U, // EVMHESSFANW 1073787390U, // EVMHESSIAAW 1073787867U, // EVMHESSIANW 1073780556U, // EVMHEUMI 1073777624U, // EVMHEUMIA 1073787324U, // EVMHEUMIAAW 1073787828U, // EVMHEUMIANW 1073787456U, // EVMHEUSIAAW 1073787906U, // EVMHEUSIANW 1073777369U, // EVMHOGSMFAA 1073781928U, // EVMHOGSMFAN 1073777417U, // EVMHOGSMIAA 1073781976U, // EVMHOGSMIAN 1073777454U, // EVMHOGUMIAA 1073782013U, // EVMHOGUMIAN 1073779662U, // EVMHOSMF 1073777511U, // EVMHOSMFA 1073787206U, // EVMHOSMFAAW 1073787750U, // EVMHOSMFANW 1073780537U, // EVMHOSMI 1073777603U, // EVMHOSMIA 1073787298U, // EVMHOSMIAAW 1073787815U, // EVMHOSMIANW 1073779765U, // EVMHOSSF 1073777554U, // EVMHOSSFA 1073787232U, // EVMHOSSFAAW 1073787776U, // EVMHOSSFANW 1073787430U, // EVMHOSSIAAW 1073787893U, // EVMHOSSIANW 1073780586U, // EVMHOUMI 1073777657U, // EVMHOUMIA 1073787364U, // EVMHOUMIAAW 1073787854U, // EVMHOUMIANW 1073787496U, // EVMHOUSIAAW 1073787932U, // EVMHOUSIANW 35961U, // EVMRA 1073779652U, // EVMWHSMF 1073777500U, // EVMWHSMFA 1073780527U, // EVMWHSMI 1073777592U, // EVMWHSMIA 1073779755U, // EVMWHSSF 1073777543U, // EVMWHSSFA 1073780566U, // EVMWHUMI 1073777635U, // EVMWHUMIA 1073787285U, // EVMWLSMIAAW 1073787802U, // EVMWLSMIANW 1073787417U, // EVMWLSSIAAW 1073787880U, // EVMWLSSIANW 1073780576U, // EVMWLUMI 1073777646U, // EVMWLUMIA 1073787351U, // EVMWLUMIAAW 1073787841U, // EVMWLUMIANW 1073787483U, // EVMWLUSIAAW 1073787919U, // EVMWLUSIANW 1073779672U, // EVMWSMF 1073777522U, // EVMWSMFA 1073777382U, // EVMWSMFAA 1073781941U, // EVMWSMFAN 1073780547U, // EVMWSMI 1073777614U, // EVMWSMIA 1073777430U, // EVMWSMIAA 1073781989U, // EVMWSMIAN 1073779775U, // EVMWSSF 1073777565U, // EVMWSSFA 1073777393U, // EVMWSSFAA 1073781952U, // EVMWSSFAN 1073780596U, // EVMWUMI 1073777668U, // EVMWUMIA 1073777467U, // EVMWUMIAA 1073782026U, // EVMWUMIAN 1073779092U, // EVNAND 38083U, // EVNEG 1073785380U, // EVNOR 1073785393U, // EVOR 1073778659U, // EVORC 1073787703U, // EVRLW 1073780847U, // EVRLWI 45737U, // EVRNDW 3238051031U, // EVSEL 1073787710U, // EVSLW 1073780873U, // EVSLWI 335582907U, // EVSPLATFI 335583253U, // EVSPLATI 1073786076U, // EVSRWIS 1073786937U, // EVSRWIU 1073786273U, // EVSRWS 1073787030U, // EVSRWU 67145940U, // EVSTDD 134264472U, // EVSTDDX 67146977U, // EVSTDH 134264600U, // EVSTDHX 67154609U, // EVSTDW 134265657U, // EVSTDWX 67146550U, // EVSTWHE 134264572U, // EVSTWHEX 67149421U, // EVSTWHO 134264895U, // EVSTWHOX 67146646U, // EVSTWWE 134264582U, // EVSTWWEX 67149630U, // EVSTWWO 134264905U, // EVSTWWOX 45447U, // EVSUBFSMIAAW 45579U, // EVSUBFSSIAAW 45513U, // EVSUBFUMIAAW 45645U, // EVSUBFUSIAAW 1073787594U, // EVSUBFW 1442886355U, // EVSUBIFW 1073785431U, // EVXOR 36415U, // EXTSB 36415U, // EXTSB8 36415U, // EXTSB8_32_64 33104U, // EXTSB8_rec 33104U, // EXTSB_rec 38254U, // EXTSH 38254U, // EXTSH8 38254U, // EXTSH8_32_64 33653U, // EXTSH8_rec 33653U, // EXTSH_rec 46263U, // EXTSW 1073780465U, // EXTSWSLI 1073780465U, // EXTSWSLI_32_64 1073775622U, // EXTSWSLI_32_64_rec 1073775622U, // EXTSWSLI_rec 46263U, // EXTSW_32 46263U, // EXTSW_32_64 34901U, // EXTSW_32_64_rec 34901U, // EXTSW_rec 19058U, // EnforceIEIO 43713U, // FABSD 34530U, // FABSD_rec 43713U, // FABSS 34530U, // FABSS_rec 1073778775U, // FADD 1073785701U, // FADDS 1073776413U, // FADDS_rec 1073775154U, // FADD_rec 0U, // FADDrtz 37138U, // FCFID 43959U, // FCFIDS 34616U, // FCFIDS_rec 45055U, // FCFIDU 44371U, // FCFIDUS 34692U, // FCFIDUS_rec 34745U, // FCFIDU_rec 33383U, // FCFID_rec 1073782431U, // FCMPOD 1073782431U, // FCMPOS 1073786963U, // FCMPUD 1073786963U, // FCMPUS 1073782050U, // FCPSGND 1073775848U, // FCPSGND_rec 1073782050U, // FCPSGNS 1073775848U, // FCPSGNS_rec 37157U, // FCTID 45065U, // FCTIDU 48267U, // FCTIDUZ 35049U, // FCTIDUZ_rec 34754U, // FCTIDU_rec 48092U, // FCTIDZ 35015U, // FCTIDZ_rec 33391U, // FCTID_rec 45831U, // FCTIW 45198U, // FCTIWU 48278U, // FCTIWUZ 35059U, // FCTIWUZ_rec 34798U, // FCTIWU_rec 48289U, // FCTIWZ 35069U, // FCTIWZ_rec 34862U, // FCTIW_rec 1073787096U, // FDIV 1073786266U, // FDIVS 1073776535U, // FDIVS_rec 1073776648U, // FDIV_rec 1073778792U, // FMADD 1073785710U, // FMADDS 1073776421U, // FMADDS_rec 1073775171U, // FMADD_rec 43492U, // FMR 34489U, // FMR_rec 1073778388U, // FMSUB 1073785680U, // FMSUBS 1073776387U, // FMSUBS_rec 1073774982U, // FMSUB_rec 1073781303U, // FMUL 1073786095U, // FMULS 1073776491U, // FMULS_rec 1073775786U, // FMUL_rec 43739U, // FNABSD 34547U, // FNABSD_rec 43739U, // FNABSS 34547U, // FNABSS_rec 38060U, // FNEGD 33625U, // FNEGD_rec 38060U, // FNEGS 33625U, // FNEGS_rec 1073778811U, // FNMADD 1073785720U, // FNMADDS 1073776430U, // FNMADDS_rec 1073775190U, // FNMADD_rec 1073778407U, // FNMSUB 1073785690U, // FNMSUBS 1073776396U, // FNMSUBS_rec 1073775001U, // FNMSUB_rec 37733U, // FRE 44067U, // FRES 34634U, // FRES_rec 33540U, // FRE_rec 39861U, // FRIMD 33980U, // FRIMD_rec 39861U, // FRIMS 33980U, // FRIMS_rec 40243U, // FRIND 34054U, // FRIND_rec 40243U, // FRINS 34054U, // FRINS_rec 41827U, // FRIPD 34333U, // FRIPD_rec 41827U, // FRIPS 34333U, // FRIPS_rec 48175U, // FRIZD 35033U, // FRIZD_rec 48175U, // FRIZS 35033U, // FRIZS_rec 42803U, // FRSP 34364U, // FRSP_rec 37759U, // FRSQRTE 44075U, // FRSQRTES 34641U, // FRSQRTES_rec 33558U, // FRSQRTE_rec 1073781133U, // FSELD 1073775760U, // FSELD_rec 1073781133U, // FSELS 1073775760U, // FSELS_rec 44896U, // FSQRT 44361U, // FSQRTS 34675U, // FSQRTS_rec 34728U, // FSQRT_rec 1073778371U, // FSUB 1073785671U, // FSUBS 1073776379U, // FSUBS_rec 1073774965U, // FSUB_rec 1073787119U, // FTDIV 44903U, // FTSQRT 18539U, // GETtlsADDR 16160U, // GETtlsADDR32 18793U, // GETtlsADDR32AIX 18809U, // GETtlsADDR64AIX 18308U, // GETtlsADDRPCREL 18525U, // GETtlsldADDR 16145U, // GETtlsldADDR32 18289U, // GETtlsldADDRPCREL 402692402U, // HASHCHK 402692402U, // HASHCHK8 402695017U, // HASHCHKP 402695017U, // HASHCHKP8 402698142U, // HASHST 402698142U, // HASHST8 402696137U, // HASHSTP 402696137U, // HASHSTP8 18957U, // HRFID 1119771U, // ICBI 1122936U, // ICBIEP 462784U, // ICBLC 460367U, // ICBLQ 470699U, // ICBT 470245U, // ICBTLS 38462U, // ICCCI 1073781139U, // ISEL 1073781139U, // ISEL8 18921U, // ISYNC 436243567U, // LA 436243567U, // LA8 134265034U, // LBARX 134265034U, // LBARXL 134264915U, // LBEPX 67156927U, // LBZ 67156927U, // LBZ8 1073788791U, // LBZCIX 469807277U, // LBZU 469807277U, // LBZU8 503364356U, // LBZUX 503364356U, // LBZUX8 134265732U, // LBZX 134265732U, // LBZX8 1073789828U, // LBZXTLS 1073789828U, // LBZXTLS_ 1073789828U, // LBZXTLS_32 67146041U, // LD 134265041U, // LDARX 134265041U, // LDARXL 1073786442U, // LDAT 134265069U, // LDBRX 1073788760U, // LDCIX 469807121U, // LDU 503364253U, // LDUX 134264503U, // LDX 1073788599U, // LDXTLS 1073788599U, // LDXTLS_ 18376U, // LDgotTprelL 16042U, // LDgotTprelL32 18933U, // LDtoc 18715U, // LDtocBA 18715U, // LDtocCPT 18269U, // LDtocJTI 18325U, // LDtocL 67145966U, // LFD 134264930U, // LFDEPX 469807071U, // LFDU 503364236U, // LFDUX 134264483U, // LFDX 134264362U, // LFIWAX 134265755U, // LFIWZX 67152964U, // LFS 469807194U, // LFSU 503364322U, // LFSUX 134265308U, // LFSX 67144616U, // LHA 67144616U, // LHA8 134265048U, // LHARX 134265048U, // LHARXL 469807059U, // LHAU 469807059U, // LHAU8 503364192U, // LHAUX 503364192U, // LHAUX8 134264345U, // LHAX 134264345U, // LHAX8 134265084U, // LHBRX 134265084U, // LHBRX8 134264947U, // LHEPX 67156998U, // LHZ 67156998U, // LHZ8 1073788799U, // LHZCIX 469807283U, // LHZU 469807283U, // LHZU8 503364363U, // LHZUX 503364363U, // LHZUX8 134265747U, // LHZX 134265747U, // LHZX8 1073789843U, // LHZXTLS 1073789843U, // LHZXTLS_ 1073789843U, // LHZXTLS_32 100701921U, // LI 100701921U, // LI8 100707536U, // LIS 100707536U, // LIS8 67154757U, // LMW 67151966U, // LQ 134265055U, // LQARX 134265055U, // LQARXL 18410U, // LQX_PSEUDO 1073780928U, // LSWI 134264385U, // LVEBX 134264609U, // LVEHX 134265666U, // LVEWX 134257183U, // LVSL 134261382U, // LVSR 134265625U, // LVX 134257252U, // LVXL 67144833U, // LWA 134265062U, // LWARX 134265062U, // LWARXL 1073786520U, // LWAT 503364199U, // LWAUX 134264379U, // LWAX 134264379U, // LWAX_32 67144833U, // LWA_32 134265118U, // LWBRX 134265118U, // LWBRX8 134264962U, // LWEPX 67157162U, // LWZ 67157162U, // LWZ8 1073788807U, // LWZCIX 469807289U, // LWZU 469807289U, // LWZU8 503364370U, // LWZUX 503364370U, // LWZUX8 134265772U, // LWZX 134265772U, // LWZX8 1073789868U, // LWZXTLS 1073789868U, // LWZXTLS_ 1073789868U, // LWZXTLS_32 18949U, // LWZtoc 18343U, // LWZtocL 67146285U, // LXSD 134264535U, // LXSDX 134265723U, // LXSIBZX 134265738U, // LXSIHZX 134264370U, // LXSIWAX 134265763U, // LXSIWZX 67151700U, // LXSSP 134265002U, // LXSSPX 67154201U, // LXV 134264309U, // LXVB16X 134264275U, // LXVD2X 134265291U, // LXVDSX 134264328U, // LXVH8X 369141845U, // LXVKQ 1073781335U, // LXVL 1073781210U, // LXVLL 67151827U, // LXVP 1073781232U, // LXVPRL 1073781174U, // LXVPRLL 134265019U, // LXVPX 134264409U, // LXVRBX 134264518U, // LXVRDX 134264633U, // LXVRHX 1073781257U, // LXVRL 1073781193U, // LXVRLL 134265700U, // LXVRWX 134264292U, // LXVW4X 134265353U, // LXVWSX 134265636U, // LXVX 1073778945U, // MADDHD 1073786860U, // MADDHDU 1073779005U, // MADDLD 1073779005U, // MADDLD8 1485122U, // MBAR 37857U, // MCRF 44105U, // MCRFS 1096105U, // MCRXRX 536908537U, // MFBHRBE 1091959U, // MFCR 1091959U, // MFCR8 1092243U, // MFCTR 1092243U, // MFCTR8 43362U, // MFDCR 1092669U, // MFFS 40433U, // MFFSCDRN 570464153U, // MFFSCDRNI 1086210U, // MFFSCE 40424U, // MFFSCRN 268474255U, // MFFSCRNI 1088024U, // MFFSL 1083228U, // MFFS_rec 1092047U, // MFLR 1092047U, // MFLR8 1092210U, // MFMSR 604017639U, // MFOCRF 604017639U, // MFOCRF8 43503U, // MFPMR 43614U, // MFSPR 43614U, // MFSPR8 637577836U, // MFSR 40249U, // MFSRIN 36436U, // MFTB 17869406U, // MFTB8 18917982U, // MFUDSCR 37319U, // MFVRD 19966558U, // MFVRSAVE 19966558U, // MFVRSAVEv 48303U, // MFVRWZ 1091973U, // MFVSCR 37319U, // MFVSRD 37204U, // MFVSRLD 48303U, // MFVSRWZ 1073779160U, // MODSD 1073787973U, // MODSW 1073779315U, // MODUD 1073788183U, // MODUW 18913U, // MSGSYNC 18927U, // MSYNC 37879U, // MTCRF 37879U, // MTCRF8 1092250U, // MTCTR 1092250U, // MTCTR8 1092250U, // MTCTR8loop 1092250U, // MTCTRloop 235252080U, // MTDCR 1476894U, // MTFSB0 1476976U, // MTFSB1 1073779738U, // MTFSF 302487219U, // MTFSFI 671581181U, // MTFSFI_rec 1545907U, // MTFSFIb 1073775432U, // MTFSF_rec 37914U, // MTFSFb 1092053U, // MTLR 1092053U, // MTLR8 201370233U, // MTMSR 201363903U, // MTMSRD 529391U, // MTOCRF 529391U, // MTOCRF8 43510U, // MTPMR 43621U, // MTSPR 43621U, // MTSPR8 567936U, // MTSR 40257U, // MTSRIN 1081464U, // MTUDSCR 37327U, // MTVRD 1081529U, // MTVRSAVE 1409209U, // MTVRSAVEv 35974U, // MTVRWA 48312U, // MTVRWZ 1091981U, // MTVSCR 39565U, // MTVSRBM 704681723U, // MTVSRBMI 37327U, // MTVSRD 1073778891U, // MTVSRDD 39637U, // MTVSRDM 39743U, // MTVSRHM 39910U, // MTVSRQM 35974U, // MTVSRWA 40031U, // MTVSRWM 44457U, // MTVSRWS 48312U, // MTVSRWZ 1073778953U, // MULHD 1073786869U, // MULHDU 1073776560U, // MULHDU_rec 1073775199U, // MULHD_rec 1073787637U, // MULHW 1073787012U, // MULHWU 1073776613U, // MULHWU_rec 1073776678U, // MULHW_rec 1073779014U, // MULLD 1073782288U, // MULLDO 1073775918U, // MULLDO_rec 1073775223U, // MULLD_rec 1073780453U, // MULLI 1073780453U, // MULLI8 1073787689U, // MULLW 1073782575U, // MULLWO 1073776061U, // MULLWO_rec 1073776694U, // MULLW_rec 18574U, // MoveGOTtoLR 18562U, // MovePCtoLR 17609U, // MovePCtoLR8 1073779078U, // NAND 1073779078U, // NAND8 1073775237U, // NAND8_rec 1073775237U, // NAND_rec 19064U, // NAP 38045U, // NEG 38045U, // NEG8 40551U, // NEG8O 34192U, // NEG8O_rec 33619U, // NEG8_rec 40551U, // NEGO 34192U, // NEGO_rec 33619U, // NEG_rec 19073U, // NOP 15744U, // NOP_GT_PWR6 15756U, // NOP_GT_PWR7 1073785368U, // NOR 1073785368U, // NOR8 1073776319U, // NOR8_rec 1073776319U, // NOR_rec 1073785361U, // OR 1073785361U, // OR8 1073776320U, // OR8_rec 1073778647U, // ORC 1073778647U, // ORC8 1073775112U, // ORC8_rec 1073775112U, // ORC_rec 1073780685U, // ORI 1073780685U, // ORI8 1073786070U, // ORIS 1073786070U, // ORIS8 1073776320U, // OR_rec 1073780308U, // PADDI 1073780308U, // PADDI8 738235988U, // PADDI8pc 19008U, // PADDIdtprel 738235988U, // PADDIpc 1073779115U, // PDEPD 1073779297U, // PEXTD 771799998U, // PLBZ 771799998U, // PLBZ8 805354430U, // PLBZ8pc 805354430U, // PLBZpc 771789135U, // PLD 805343567U, // PLDpc 771789037U, // PLFD 805343469U, // PLFDpc 771796035U, // PLFS 805350467U, // PLFSpc 771787687U, // PLHA 771787687U, // PLHA8 805342119U, // PLHA8pc 805342119U, // PLHApc 771800069U, // PLHZ 771800069U, // PLHZ8 805354501U, // PLHZ8pc 805354501U, // PLHZpc 838899436U, // PLI 838899436U, // PLI8 771787904U, // PLWA 771787904U, // PLWA8 805342336U, // PLWA8pc 805342336U, // PLWApc 771800233U, // PLWZ 771800233U, // PLWZ8 805354665U, // PLWZ8pc 805354665U, // PLWZpc 771789356U, // PLXSD 805343788U, // PLXSDpc 771794771U, // PLXSSP 805349203U, // PLXSSPpc 771797272U, // PLXV 771794898U, // PLXVP 805349330U, // PLXVPpc 805351704U, // PLXVpc 1073777121U, // PMXVBF16GER2 1375771977U, // PMXVBF16GER2NN 1375773563U, // PMXVBF16GER2NP 1375772036U, // PMXVBF16GER2PN 1375773622U, // PMXVBF16GER2PP 1073777121U, // PMXVBF16GER2W 1375771977U, // PMXVBF16GER2WNN 1375773563U, // PMXVBF16GER2WNP 1375772036U, // PMXVBF16GER2WPN 1375773622U, // PMXVBF16GER2WPP 1073777135U, // PMXVF16GER2 1375771993U, // PMXVF16GER2NN 1375773579U, // PMXVF16GER2NP 1375772052U, // PMXVF16GER2PN 1375773638U, // PMXVF16GER2PP 1073777135U, // PMXVF16GER2W 1375771993U, // PMXVF16GER2WNN 1375773579U, // PMXVF16GER2WNP 1375772052U, // PMXVF16GER2WPN 1375773638U, // PMXVF16GER2WPP 1073785237U, // PMXVF32GER 1375772008U, // PMXVF32GERNN 1375773594U, // PMXVF32GERNP 1375772078U, // PMXVF32GERPN 1375773696U, // PMXVF32GERPP 1073785237U, // PMXVF32GERW 1375772008U, // PMXVF32GERWNN 1375773594U, // PMXVF32GERWNP 1375772078U, // PMXVF32GERWPN 1375773696U, // PMXVF32GERWPP 1073785249U, // PMXVF64GER 1375772022U, // PMXVF64GERNN 1375773608U, // PMXVF64GERNP 1375772092U, // PMXVF64GERPN 1375773710U, // PMXVF64GERPP 1073785249U, // PMXVF64GERW 1375772022U, // PMXVF64GERWNN 1375773608U, // PMXVF64GERWNP 1375772092U, // PMXVF64GERWPN 1375773710U, // PMXVF64GERWPP 1073777148U, // PMXVI16GER2 1375773653U, // PMXVI16GER2PP 1073785505U, // PMXVI16GER2S 1375773724U, // PMXVI16GER2SPP 1073785505U, // PMXVI16GER2SW 1375773724U, // PMXVI16GER2SWPP 1073777148U, // PMXVI16GER2W 1375773653U, // PMXVI16GER2WPP 1073777282U, // PMXVI4GER8 1375773682U, // PMXVI4GER8PP 1073777282U, // PMXVI4GER8W 1375773682U, // PMXVI4GER8WPP 1073777161U, // PMXVI8GER4 1375773668U, // PMXVI8GER4PP 1375773740U, // PMXVI8GER4SPP 1073777161U, // PMXVI8GER4W 1375773668U, // PMXVI8GER4WPP 1375773740U, // PMXVI8GER4WSPP 36451U, // POPCNTB 36451U, // POPCNTB8 37447U, // POPCNTD 46304U, // POPCNTW 18692U, // PPC32GOT 18702U, // PPC32PICGOT 16191U, // PREPARE_PROBED_ALLOCA_32 16612U, // PREPARE_PROBED_ALLOCA_64 16239U, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 16660U, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 16173U, // PROBED_ALLOCA_32 16594U, // PROBED_ALLOCA_64 16217U, // PROBED_STACKALLOC_32 16638U, // PROBED_STACKALLOC_64 39234U, // PSC_DCBZL 872454459U, // PSQ_L 872460354U, // PSQ_LU 1073789624U, // PSQ_LUX 1073788824U, // PSQ_LX 872460143U, // PSQ_ST 872460411U, // PSQ_STU 1073789683U, // PSQ_STUX 1073789527U, // PSQ_STX 771788406U, // PSTB 771788406U, // PSTB8 805342838U, // PSTB8pc 805342838U, // PSTBpc 771789402U, // PSTD 805343834U, // PSTDpc 771789043U, // PSTFD 805343475U, // PSTFDpc 771796048U, // PSTFS 805350480U, // PSTFSpc 771790233U, // PSTH 771790233U, // PSTH8 805344665U, // PSTH8pc 805344665U, // PSTHpc 771798270U, // PSTW 771798270U, // PSTW8 805352702U, // PSTW8pc 805352702U, // PSTWpc 771789363U, // PSTXSD 805343795U, // PSTXSDpc 771794779U, // PSTXSSP 805349211U, // PSTXSSPpc 771797278U, // PSTXV 771794905U, // PSTXVP 805349337U, // PSTXVPpc 805351710U, // PSTXVpc 43695U, // PS_ABS 34521U, // PS_ABSo 1073778757U, // PS_ADD 1073775136U, // PS_ADDo 1073776943U, // PS_CMPO0 1073777025U, // PS_CMPO1 1073776974U, // PS_CMPU0 1073777056U, // PS_CMPU1 1073787080U, // PS_DIV 1073776639U, // PS_DIVo 1073778781U, // PS_MADD 1073776953U, // PS_MADDS0 1073774825U, // PS_MADDS0o 1073777035U, // PS_MADDS1 1073774884U, // PS_MADDS1o 1073775161U, // PS_MADDo 1073776902U, // PS_MERGE00 1073774789U, // PS_MERGE00o 1073776984U, // PS_MERGE01 1073774848U, // PS_MERGE01o 1073776914U, // PS_MERGE10 1073774802U, // PS_MERGE10o 1073776996U, // PS_MERGE11 1073774861U, // PS_MERGE11o 43483U, // PS_MR 34481U, // PS_MRo 1073778377U, // PS_MSUB 1073774972U, // PS_MSUBo 1073781285U, // PS_MUL 1073776964U, // PS_MULS0 1073774837U, // PS_MULS0o 1073777046U, // PS_MULS1 1073774896U, // PS_MULS1o 1073775777U, // PS_MULo 43719U, // PS_NABS 34537U, // PS_NABSo 38042U, // PS_NEG 33616U, // PS_NEGo 1073778799U, // PS_NMADD 1073775179U, // PS_NMADDo 1073778395U, // PS_NMSUB 1073774990U, // PS_NMSUBo 44057U, // PS_RES 34625U, // PS_RESo 37746U, // PS_RSQRTE 33546U, // PS_RSQRTEo 1073781123U, // PS_SEL 1073775751U, // PS_SELo 1073778353U, // PS_SUB 1073774947U, // PS_SUBo 1073776934U, // PS_SUM0 1073774815U, // PS_SUM0o 1073777016U, // PS_SUM1 1073774874U, // PS_SUM1o 18435U, // PseudoEIEIO 1073780613U, // QVALIGNI 1073780613U, // QVALIGNIb 1073780613U, // QVALIGNIs 1073780746U, // QVESPLATI 1073780746U, // QVESPLATIb 1073780746U, // QVESPLATIs 43711U, // QVFABS 43711U, // QVFABSs 1073778773U, // QVFADD 1073785699U, // QVFADDS 1073785699U, // QVFADDSs 37136U, // QVFCFID 43957U, // QVFCFIDS 45053U, // QVFCFIDU 44369U, // QVFCFIDUS 37136U, // QVFCFIDb 1073784846U, // QVFCMPEQ 1073784846U, // QVFCMPEQb 1073784846U, // QVFCMPEQbs 1073786573U, // QVFCMPGT 1073786573U, // QVFCMPGTb 1073786573U, // QVFCMPGTbs 1073786651U, // QVFCMPLT 1073786651U, // QVFCMPLTb 1073786651U, // QVFCMPLTbs 1073782048U, // QVFCPSGN 1073782048U, // QVFCPSGNs 37155U, // QVFCTID 45063U, // QVFCTIDU 48265U, // QVFCTIDUZ 48090U, // QVFCTIDZ 37155U, // QVFCTIDb 45829U, // QVFCTIW 45196U, // QVFCTIWU 48276U, // QVFCTIWUZ 48287U, // QVFCTIWZ 1073781066U, // QVFLOGICAL 1073781066U, // QVFLOGICALb 1073781066U, // QVFLOGICALs 1073778790U, // QVFMADD 1073785708U, // QVFMADDS 1073785708U, // QVFMADDSs 43490U, // QVFMR 43490U, // QVFMRb 43490U, // QVFMRs 1073778386U, // QVFMSUB 1073785678U, // QVFMSUBS 1073785678U, // QVFMSUBSs 1073781301U, // QVFMUL 1073786093U, // QVFMULS 1073786093U, // QVFMULSs 43737U, // QVFNABS 43737U, // QVFNABSs 38058U, // QVFNEG 38058U, // QVFNEGs 1073778809U, // QVFNMADD 1073785718U, // QVFNMADDS 1073785718U, // QVFNMADDSs 1073778405U, // QVFNMSUB 1073785688U, // QVFNMSUBS 1073785688U, // QVFNMSUBSs 1073781793U, // QVFPERM 1073781793U, // QVFPERMs 37731U, // QVFRE 44065U, // QVFRES 44065U, // QVFRESs 39859U, // QVFRIM 39859U, // QVFRIMs 40241U, // QVFRIN 40241U, // QVFRINs 41825U, // QVFRIP 41825U, // QVFRIPs 48173U, // QVFRIZ 48173U, // QVFRIZs 42801U, // QVFRSP 42801U, // QVFRSPs 37757U, // QVFRSQRTE 44073U, // QVFRSQRTES 44073U, // QVFRSQRTESs 1073781131U, // QVFSEL 1073781131U, // QVFSELb 1073781131U, // QVFSELbb 1073781131U, // QVFSELbs 1073778369U, // QVFSUB 1073785669U, // QVFSUBS 1073785669U, // QVFSUBSs 1073782037U, // QVFTSTNAN 1073782037U, // QVFTSTNANb 1073782037U, // QVFTSTNANbs 1073778846U, // QVFXMADD 1073785758U, // QVFXMADDS 1073781326U, // QVFXMUL 1073786102U, // QVFXMULS 1073778819U, // QVFXXCPNMADD 1073785729U, // QVFXXCPNMADDS 1073778856U, // QVFXXMADD 1073785769U, // QVFXXMADDS 1073778833U, // QVFXXNPMADD 1073785744U, // QVFXXNPMADDS 906008133U, // QVGPCI 134265461U, // QVLFCDUX 134253802U, // QVLFCDUXA 134264445U, // QVLFCDX 134253722U, // QVLFCDXA 134265547U, // QVLFCSUX 134253846U, // QVLFCSUXA 134265272U, // QVLFCSX 134253762U, // QVLFCSXA 134265272U, // QVLFCSXs 503364234U, // QVLFDUX 134253825U, // QVLFDUXA 134264481U, // QVLFDX 134253743U, // QVLFDXA 134264481U, // QVLFDXb 134264360U, // QVLFIWAX 134253711U, // QVLFIWAXA 134265753U, // QVLFIWZX 134253901U, // QVLFIWZXA 503364320U, // QVLFSUX 134253869U, // QVLFSUXA 134265306U, // QVLFSX 134253783U, // QVLFSXA 134265306U, // QVLFSXb 134265306U, // QVLFSXs 134264498U, // QVLPCLDX 134265323U, // QVLPCLSX 21019115U, // QVLPCLSXint 134264508U, // QVLPCRDX 134265343U, // QVLPCRSX 134265471U, // QVSTFCDUX 134253813U, // QVSTFCDUXA 134256892U, // QVSTFCDUXI 134253628U, // QVSTFCDUXIA 134264454U, // QVSTFCDX 134253732U, // QVSTFCDXA 134256850U, // QVSTFCDXI 134253582U, // QVSTFCDXIA 134265557U, // QVSTFCSUX 134253857U, // QVSTFCSUXA 134256915U, // QVSTFCSUXI 134253653U, // QVSTFCSUXIA 134265281U, // QVSTFCSX 134253772U, // QVSTFCSXA 134256871U, // QVSTFCSXI 134253605U, // QVSTFCSXIA 134265281U, // QVSTFCSXs 503691923U, // QVSTFDUX 134253835U, // QVSTFDUXA 134256904U, // QVSTFDUXI 134253641U, // QVSTFDUXIA 134264489U, // QVSTFDX 134253752U, // QVSTFDXA 134256861U, // QVSTFDXI 134253594U, // QVSTFDXIA 134264489U, // QVSTFDXb 134265681U, // QVSTFIWX 134253890U, // QVSTFIWXA 503692009U, // QVSTFSUX 134253879U, // QVSTFSUXA 134256927U, // QVSTFSUXI 134253666U, // QVSTFSUXIA 503692009U, // QVSTFSUXs 134265314U, // QVSTFSX 134253792U, // QVSTFSXA 134256882U, // QVSTFSXI 134253617U, // QVSTFSXIA 134265314U, // QVSTFSXs 17847U, // RESTORE_ACC 18471U, // RESTORE_CR 18626U, // RESTORE_CRBIT 18140U, // RESTORE_QUADWORD 17795U, // RESTORE_UACC 17821U, // RESTORE_WACC 18984U, // RFCI 18995U, // RFDI 593247U, // RFEBB 19000U, // RFI 18958U, // RFID 18989U, // RFMCI 1073781100U, // RLDCL 1073775734U, // RLDCL_rec 1073785193U, // RLDCR 1073776278U, // RLDCR_rec 1073778582U, // RLDIC 1073781107U, // RLDICL 1073781107U, // RLDICL_32 1073781107U, // RLDICL_32_64 1073775742U, // RLDICL_32_rec 1073775742U, // RLDICL_rec 1073785213U, // RLDICR 1073785213U, // RLDICR_32 1073776286U, // RLDICR_rec 1073775081U, // RLDIC_rec 1375770381U, // RLDIMI 1375765521U, // RLDIMI_rec 1375770389U, // RLWIMI 1375770389U, // RLWIMI8 1375765530U, // RLWIMI8_rec 1375765530U, // RLWIMI_rec 1073781699U, // RLWINM 1073781699U, // RLWINM8 1073775811U, // RLWINM8_rec 1073775811U, // RLWINM_rec 1073781716U, // RLWNM 1073781716U, // RLWNM8 1073775820U, // RLWNM8_rec 1073775820U, // RLWNM_rec 17787U, // ReadTB 1085418U, // SC 16877U, // SELECT_CC_F16 16799U, // SELECT_CC_F4 17338U, // SELECT_CC_F8 16824U, // SELECT_CC_I4 17383U, // SELECT_CC_I8 17881U, // SELECT_CC_QBRC 17910U, // SELECT_CC_QFRC 17999U, // SELECT_CC_QSRC 18210U, // SELECT_CC_SPE 16770U, // SELECT_CC_SPE4 17970U, // SELECT_CC_VRRC 17939U, // SELECT_CC_VSFRC 18059U, // SELECT_CC_VSRC 18028U, // SELECT_CC_VSSRC 16892U, // SELECT_F16 16813U, // SELECT_F4 17352U, // SELECT_F8 16838U, // SELECT_I4 17557U, // SELECT_I8 17897U, // SELECT_QBRC 17926U, // SELECT_QFRC 18015U, // SELECT_QSRC 18225U, // SELECT_SPE 16786U, // SELECT_SPE4 17986U, // SELECT_VRRC 17956U, // SELECT_VSFRC 18075U, // SELECT_VSRC 18045U, // SELECT_VSSRC 36430U, // SETB 36430U, // SETB8 36681U, // SETBC 36681U, // SETBC8 43354U, // SETBCR 43354U, // SETBCR8 18402U, // SETFLM 36673U, // SETNBC 36673U, // SETNBC8 43345U, // SETNBCR 43345U, // SETNBCR8 18116U, // SETRND 18975U, // SETRNDi 33506U, // SLBFEE_rec 18869U, // SLBIA 1086271U, // SLBIE 38034U, // SLBIEG 37655U, // SLBMFEE 45247U, // SLBMFEV 37738U, // SLBMTE 18897U, // SLBSYNC 1073779044U, // SLD 1073775231U, // SLD_rec 1073787712U, // SLW 1073787712U, // SLW8 1073776702U, // SLW8_rec 1073776702U, // SLW_rec 67157162U, // SPELWZ 134265772U, // SPELWZX 67155199U, // SPESTW 134265717U, // SPESTWX 17860U, // SPILL_ACC 18483U, // SPILL_CR 18641U, // SPILL_CRBIT 18158U, // SPILL_QUADWORD 17809U, // SPILL_UACC 17835U, // SPILL_WACC 18174U, // SPLIT_QUADWORD 1073778726U, // SRAD 1073780301U, // SRADI 1073780301U, // SRADI_32 1073775542U, // SRADI_rec 1073775129U, // SRAD_rec 1073787522U, // SRAW 1073780823U, // SRAWI 1073775651U, // SRAWI_rec 1073776661U, // SRAW_rec 1073779138U, // SRD 1073775251U, // SRD_rec 1073787967U, // SRW 1073787967U, // SRW8 1073776708U, // SRW8_rec 1073776708U, // SRW_rec 67145335U, // STB 67145335U, // STB8 1073788752U, // STBCIX 134252695U, // STBCX 134264922U, // STBEPX 470134745U, // STBU 470134745U, // STBU8 503691886U, // STBUX 503691886U, // STBUX8 134264426U, // STBX 134264426U, // STBX8 1073788522U, // STBXTLS 1073788522U, // STBXTLS_ 1073788522U, // STBXTLS_32 67146331U, // STD 1073786448U, // STDAT 134265076U, // STDBRX 1073788767U, // STDCIX 134252703U, // STDCX 470134806U, // STDU 503691939U, // STDUX 134264550U, // STDX 1073788646U, // STDXTLS 1073788646U, // STDXTLS_ 67145972U, // STFD 134264938U, // STFDEPX 470134757U, // STFDU 503691925U, // STFDUX 134264491U, // STFDX 134265683U, // STFIWX 67152977U, // STFS 470134880U, // STFSU 503692011U, // STFSUX 134265316U, // STFSX 67147162U, // STH 67147162U, // STH8 134265091U, // STHBRX 1073788775U, // STHCIX 134252711U, // STHCX 134264954U, // STHEPX 470134835U, // STHU 470134835U, // STHU8 503691953U, // STHUX 503691953U, // STHUX8 134264650U, // STHX 134264650U, // STHX8 1073788746U, // STHXTLS 1073788746U, // STHXTLS_ 1073788746U, // STHXTLS_32 67154762U, // STMW 19112U, // STOP 67152041U, // STQ 134252719U, // STQCX 18422U, // STQX_PSEUDO 1073780934U, // STSWI 134264392U, // STVEBX 134264616U, // STVEHX 134265673U, // STVEWX 134265630U, // STVX 134257258U, // STVXL 67155199U, // STW 67155199U, // STW8 1073786526U, // STWAT 134265125U, // STWBRX 1073788783U, // STWCIX 134252727U, // STWCX 134264969U, // STWEPX 470134942U, // STWU 470134942U, // STWU8 503692029U, // STWUX 503692029U, // STWUX8 134265717U, // STWX 134265717U, // STWX8 1073789813U, // STWXTLS 1073789813U, // STWXTLS_ 1073789813U, // STWXTLS_32 67146292U, // STXSD 134264542U, // STXSDX 134264400U, // STXSIBX 134264400U, // STXSIBXv 134264624U, // STXSIHX 134264624U, // STXSIHXv 134265691U, // STXSIWX 67151708U, // STXSSP 134265010U, // STXSSPX 67154207U, // STXV 134264318U, // STXVB16X 134264283U, // STXVD2X 134264336U, // STXVH8X 1073781341U, // STXVL 1073781217U, // STXVLL 67151834U, // STXVP 1073781240U, // STXVPRL 1073781183U, // STXVPRLL 134265026U, // STXVPX 134264417U, // STXVRBX 134264526U, // STXVRDX 134264641U, // STXVRHX 1073781264U, // STXVRL 1073781201U, // STXVRLL 134265708U, // STXVRWX 134264300U, // STXVW4X 134265642U, // STXVX 1073779636U, // SUBF 1073779636U, // SUBF8 1073782368U, // SUBF8O 1073776008U, // SUBF8O_rec 1073775425U, // SUBF8_rec 1073778561U, // SUBFC 1073778561U, // SUBFC8 1073782274U, // SUBFC8O 1073775902U, // SUBFC8O_rec 1073775057U, // SUBFC8_rec 1073782274U, // SUBFCO 1073775902U, // SUBFCO_rec 1073775057U, // SUBFC_rec 1073779495U, // SUBFE 1073779495U, // SUBFE8 1073782318U, // SUBFE8O 1073775952U, // SUBFE8O_rec 1073775339U, // SUBFE8_rec 1073782318U, // SUBFEO 1073775952U, // SUBFEO_rec 1073775339U, // SUBFE_rec 1073778589U, // SUBFIC 1073778589U, // SUBFIC8 37716U, // SUBFME 37716U, // SUBFME8 40510U, // SUBFME8O 34146U, // SUBFME8O_rec 33531U, // SUBFME8_rec 40510U, // SUBFMEO 34146U, // SUBFMEO_rec 33531U, // SUBFME_rec 1073782368U, // SUBFO 1073776008U, // SUBFO_rec 939568494U, // SUBFUS 939558798U, // SUBFUS_rec 37798U, // SUBFZE 37798U, // SUBFZE8 40535U, // SUBFZE8O 34174U, // SUBFZE8O_rec 33592U, // SUBFZE8_rec 40535U, // SUBFZEO 34174U, // SUBFZEO_rec 33592U, // SUBFZE_rec 1073775425U, // SUBF_rec 626638U, // SYNC 1083295U, // TABORT 1074168262U, // TABORTDC 1074168734U, // TABORTDCI 1074168334U, // TABORTWC 1074168746U, // TABORTWCI 1183068U, // TAILB 1183068U, // TAILB8 1215304U, // TAILBA 1215304U, // TAILBA8 19121U, // TAILBCTR 19121U, // TAILBCTR8 591101U, // TBEGIN 18599U, // TBEGIN_RET 1087786U, // TCHECK 18587U, // TCHECK_RET 2263743U, // TCRETURNai 2263640U, // TCRETURNai8 2232332U, // TCRETURNdi 2230886U, // TCRETURNdi8 2140469U, // TCRETURNri 2132596U, // TCRETURNri8 1074172482U, // TD 1074173606U, // TDI 590476U, // TEND 18875U, // TLBIA 252023622U, // TLBIE 1087867U, // TLBIEL 46623U, // TLBIVAX 1085750U, // TLBLD 1087198U, // TLBLI 18963U, // TLBRE 1073779548U, // TLBRE2 47537U, // TLBSX 1073789361U, // TLBSX2 1073776831U, // TLBSX2D 18905U, // TLBSYNC 18969U, // TLBWE 1073779592U, // TLBWE2 18825U, // TLSGDAIX 17678U, // TLSGDAIX8 19068U, // TRAP 15734U, // TRECHKPT 1082545U, // TRECLAIM 591571U, // TSR 1074181330U, // TW 1074174157U, // TWI 18445U, // UNENCODED_NOP 18460U, // UpdateGBR 1073778300U, // VABSDUB 1073780127U, // VABSDUH 1073788190U, // VABSDUW 1073785036U, // VADDCUQ 1073788173U, // VADDCUW 1073785067U, // VADDECUQ 1073781783U, // VADDEUQM 1073783504U, // VADDFP 1073785632U, // VADDSBS 1073785985U, // VADDSHS 1073786309U, // VADDSWS 1073781419U, // VADDUBM 1073785660U, // VADDUBS 1073781491U, // VADDUDM 1073781618U, // VADDUHM 1073786013U, // VADDUHS 1073781764U, // VADDUQM 1073781885U, // VADDUWM 1073786336U, // VADDUWS 1073779108U, // VAND 1073778554U, // VANDC 1073778174U, // VAVGSB 1073780013U, // VAVGSH 1073787998U, // VAVGSW 1073778318U, // VAVGUB 1073780145U, // VAVGUH 1073788217U, // VAVGUW 1073779049U, // VBPERMD 1073784936U, // VBPERMQ 1375779283U, // VCFSX 1073789395U, // VCFSX_0 1073778908U, // VCFUGED 1375779498U, // VCFUX 1073789610U, // VCFUX_0 1073785271U, // VCIPHER 1073786757U, // VCIPHERLAST 1073778095U, // VCLRLB 1073778151U, // VCLRRB 36659U, // VCLZB 37595U, // VCLZD 1073781522U, // VCLZDM 38407U, // VCLZH 36216U, // VCLZLSBB 46515U, // VCLZW 1073783468U, // VCMPBFP 1073776114U, // VCMPBFP_rec 1073783567U, // VCMPEQFP 1073776135U, // VCMPEQFP_rec 1073778343U, // VCMPEQUB 1073774936U, // VCMPEQUB_rec 1073779366U, // VCMPEQUD 1073775268U, // VCMPEQUD_rec 1073780170U, // VCMPEQUH 1073775485U, // VCMPEQUH_rec 1073785113U, // VCMPEQUQ 1073776246U, // VCMPEQUQ_rec 1073788251U, // VCMPEQUW 1073776733U, // VCMPEQUW_rec 1073783521U, // VCMPGEFP 1073776124U, // VCMPGEFP_rec 1073783577U, // VCMPGTFP 1073776146U, // VCMPGTFP_rec 1073778227U, // VCMPGTSB 1073774917U, // VCMPGTSB_rec 1073779218U, // VCMPGTSD 1073775257U, // VCMPGTSD_rec 1073780066U, // VCMPGTSH 1073775466U, // VCMPGTSH_rec 1073784983U, // VCMPGTSQ 1073776235U, // VCMPGTSQ_rec 1073788077U, // VCMPGTSW 1073776714U, // VCMPGTSW_rec 1073778444U, // VCMPGTUB 1073775010U, // VCMPGTUB_rec 1073779376U, // VCMPGTUD 1073775279U, // VCMPGTUD_rec 1073780192U, // VCMPGTUH 1073775496U, // VCMPGTUH_rec 1073785123U, // VCMPGTUQ 1073776257U, // VCMPGTUQ_rec 1073788286U, // VCMPGTUW 1073776744U, // VCMPGTUW_rec 1073778060U, // VCMPNEB 1073774907U, // VCMPNEB_rec 1073779945U, // VCMPNEH 1073775456U, // VCMPNEH_rec 1073787585U, // VCMPNEW 1073776668U, // VCMPNEW_rec 1073778473U, // VCMPNEZB 1073775021U, // VCMPNEZB_rec 1073780221U, // VCMPNEZH 1073775507U, // VCMPNEZH_rec 1073788329U, // VCMPNEZW 1073776762U, // VCMPNEZW_rec 1073784975U, // VCMPSQ 1073785105U, // VCMPUQ 1073778022U, // VCNTMBB 1073778739U, // VCNTMBD 1073779921U, // VCNTMBH 1073787528U, // VCNTMBW 1375776314U, // VCTSXS 1073786426U, // VCTSXS_0 1375776322U, // VCTUXS 1073786434U, // VCTUXS_0 36666U, // VCTZB 37610U, // VCTZD 1073781539U, // VCTZDM 38414U, // VCTZH 36226U, // VCTZLSBB 46532U, // VCTZW 1073779176U, // VDIVESD 1073784966U, // VDIVESQ 1073787989U, // VDIVESW 1073779331U, // VDIVEUD 1073785096U, // VDIVEUQ 1073788208U, // VDIVEUW 1073779228U, // VDIVSD 1073784993U, // VDIVSQ 1073788094U, // VDIVSW 1073779386U, // VDIVUD 1073785133U, // VDIVUQ 1073788296U, // VDIVUW 1073787148U, // VEQV 39544U, // VEXPANDBM 39626U, // VEXPANDDM 39732U, // VEXPANDHM 39899U, // VEXPANDQM 40020U, // VEXPANDWM 41714U, // VEXPTEFP 1073788901U, // VEXTDDVLX 1073789279U, // VEXTDDVRX 1073788889U, // VEXTDUBVLX 1073789267U, // VEXTDUBVRX 1073788922U, // VEXTDUHVLX 1073789300U, // VEXTDUHVRX 1073788944U, // VEXTDUWVLX 1073789322U, // VEXTDUWVRX 39574U, // VEXTRACTBM 1375769147U, // VEXTRACTD 39646U, // VEXTRACTDM 39762U, // VEXTRACTHM 39919U, // VEXTRACTQM 1375768320U, // VEXTRACTUB 1375770068U, // VEXTRACTUH 1375778149U, // VEXTRACTUW 40040U, // VEXTRACTWM 36846U, // VEXTSB2D 36846U, // VEXTSB2Ds 45349U, // VEXTSB2W 45349U, // VEXTSB2Ws 42986U, // VEXTSD2Q 36856U, // VEXTSH2D 36856U, // VEXTSH2Ds 45359U, // VEXTSH2W 45359U, // VEXTSH2Ws 36866U, // VEXTSW2D 36866U, // VEXTSW2Ds 1073788841U, // VEXTUBLX 1073789204U, // VEXTUBRX 1073788869U, // VEXTUHLX 1073789247U, // VEXTUHRX 1073788965U, // VEXTUWLX 1073789343U, // VEXTUWRX 36908U, // VGBBD 1073778124U, // VGNB 1375778720U, // VINSBLX 1375779083U, // VINSBRX 1375778767U, // VINSBVLX 1375779145U, // VINSBVRX 973115906U, // VINSD 1375778739U, // VINSDLX 1375779117U, // VINSDRX 973114988U, // VINSERTB 1375769168U, // VINSERTD 973116815U, // VINSERTH 1375778025U, // VINSERTW 1375778748U, // VINSHLX 1375779126U, // VINSHRX 1375778800U, // VINSHVLX 1375779178U, // VINSHVRX 973124765U, // VINSW 1375778844U, // VINSWLX 1375779222U, // VINSWRX 1375778822U, // VINSWVLX 1375779200U, // VINSWVRX 41688U, // VLOGEFP 1073783495U, // VMADDFP 1073783587U, // VMAXFP 1073778246U, // VMAXSB 1073779236U, // VMAXSD 1073780085U, // VMAXSH 1073788102U, // VMAXSW 1073778454U, // VMAXUB 1073779394U, // VMAXUD 1073780202U, // VMAXUH 1073788304U, // VMAXUW 1073785962U, // VMHADDSHS 1073785973U, // VMHRADDSHS 1073783559U, // VMINFP 1073778210U, // VMINSB 1073779194U, // VMINSD 1073780049U, // VMINSH 1073788053U, // VMINSW 1073778326U, // VMINUB 1073779349U, // VMINUD 1073780153U, // VMINUH 1073788234U, // VMINUW 1073781607U, // VMLADDUHM 1073779159U, // VMODSD 1073784958U, // VMODSQ 1073787972U, // VMODSW 1073779314U, // VMODUD 1073785077U, // VMODUQ 1073788182U, // VMODUW 1073787577U, // VMRGEW 1073778069U, // VMRGHB 1073779954U, // VMRGHH 1073787620U, // VMRGHW 1073778087U, // VMRGLB 1073779962U, // VMRGLH 1073787672U, // VMRGLW 1073787945U, // VMRGOW 1073779304U, // VMSUMCUD 1073781379U, // VMSUMMBM 1073781576U, // VMSUMSHM 1073785994U, // VMSUMSHS 1073781428U, // VMSUMUBM 1073781500U, // VMSUMUDM 1073781627U, // VMSUMUHM 1073786022U, // VMSUMUHS 43192U, // VMUL10CUQ 1073785045U, // VMUL10ECUQ 1073785085U, // VMUL10EUQ 43182U, // VMUL10UQ 1073778165U, // VMULESB 1073779167U, // VMULESD 1073780004U, // VMULESH 1073787980U, // VMULESW 1073778309U, // VMULEUB 1073779322U, // VMULEUD 1073780136U, // VMULEUH 1073788199U, // VMULEUW 1073779185U, // VMULHSD 1073788015U, // VMULHSW 1073779340U, // VMULHUD 1073788225U, // VMULHUW 1073779013U, // VMULLD 1073778218U, // VMULOSB 1073779209U, // VMULOSD 1073780057U, // VMULOSH 1073788068U, // VMULOSW 1073778334U, // VMULOUB 1073779357U, // VMULOUD 1073780161U, // VMULOUH 1073788242U, // VMULOUW 1073781894U, // VMULUWM 1073779093U, // VNAND 1073785261U, // VNCIPHER 1073786743U, // VNCIPHERLAST 37114U, // VNEGD 45789U, // VNEGW 1073783477U, // VNMSUBFP 1073785381U, // VNOR 1073785394U, // VOR 1073778660U, // VORC 1073779114U, // VPDEPD 1073781802U, // VPERM 1073785341U, // VPERMR 1073785414U, // VPERMXOR 1073779296U, // VPEXTD 1073789082U, // VPKPX 1073786138U, // VPKSDSS 1073786204U, // VPKSDUS 1073786147U, // VPKSHSS 1073786230U, // VPKSHUS 1073786156U, // VPKSWSS 1073786248U, // VPKSWUS 1073781817U, // VPKUDUM 1073786213U, // VPKUDUS 1073781826U, // VPKUHUM 1073786239U, // VPKUHUS 1073781835U, // VPKUWUM 1073786257U, // VPKUWUS 1073778115U, // VPMSUMB 1073779058U, // VPMSUMD 1073779982U, // VPMSUMH 1073787728U, // VPMSUMW 36450U, // VPOPCNTB 37446U, // VPOPCNTD 38277U, // VPOPCNTH 46303U, // VPOPCNTW 36924U, // VPRTYBD 43003U, // VPRTYBQ 45713U, // VPRTYBW 41707U, // VREFP 39825U, // VRFIM 40234U, // VRFIN 41791U, // VRFIP 48139U, // VRFIZ 1073778103U, // VRLB 1073779037U, // VRLD 1073780485U, // VRLDMI 1073781691U, // VRLDNM 1073779970U, // VRLH 1073784924U, // VRLQ 1073780509U, // VRLQMI 1073781707U, // VRLQNM 1073787704U, // VRLW 1073780605U, // VRLWMI 1073781715U, // VRLWNM 41724U, // VRSQRTEFP 47160U, // VSBOX 1073781145U, // VSEL 1073778713U, // VSHASIGMAD 1073787509U, // VSHASIGMAW 1073781280U, // VSL 1073778109U, // VSLB 1073779043U, // VSLD 1073780257U, // VSLDBI 1073780644U, // VSLDOI 1073779976U, // VSLH 1073782414U, // VSLO 1073784930U, // VSLQ 1073787126U, // VSLV 1073787711U, // VSLW 1375768154U, // VSPLTB 1375768154U, // VSPLTBs 1375769981U, // VSPLTH 1375769981U, // VSPLTHs 335580687U, // VSPLTISB 335582526U, // VSPLTISH 335590520U, // VSPLTISW 1375777998U, // VSPLTW 1073785479U, // VSR 1073778008U, // VSRAB 1073778725U, // VSRAD 1073779914U, // VSRAH 1073784820U, // VSRAQ 1073787521U, // VSRAW 1073778159U, // VSRB 1073779145U, // VSRD 1073780265U, // VSRDBI 1073779998U, // VSRH 1073782535U, // VSRO 1073784952U, // VSRQ 1073787154U, // VSRV 1073787966U, // VSRW 39262U, // VSTRIBL 33900U, // VSTRIBL_rec 43336U, // VSTRIBR 34444U, // VSTRIBR_rec 39341U, // VSTRIHL 33943U, // VSTRIHL_rec 43456U, // VSTRIHR 34471U, // VSTRIHR_rec 1073785027U, // VSUBCUQ 1073788164U, // VSUBCUW 1073785057U, // VSUBECUQ 1073781773U, // VSUBEUQM 1073783487U, // VSUBFP 1073785623U, // VSUBSBS 1073785953U, // VSUBSHS 1073786300U, // VSUBSWS 1073781410U, // VSUBUBM 1073785651U, // VSUBUBS 1073781482U, // VSUBUDM 1073781598U, // VSUBUHM 1073786004U, // VSUBUHS 1073781755U, // VSUBUQM 1073781876U, // VSUBUWM 1073786327U, // VSUBUWS 1073786290U, // VSUM2SWS 1073785613U, // VSUM4SBS 1073785943U, // VSUM4SHS 1073785641U, // VSUM4UBS 1073786318U, // VSUMSWS 47249U, // VUPKHPX 36358U, // VUPKHSB 38197U, // VUPKHSH 46182U, // VUPKHSW 47265U, // VUPKLPX 36377U, // VUPKLSB 38216U, // VUPKLSH 46210U, // VUPKLSW 1073785432U, // VXOR 1308666456U, // V_SET0 1308666456U, // V_SET0B 1308666456U, // V_SET0H 22066296U, // V_SETALLONES 22066296U, // V_SETALLONESB 22066296U, // V_SETALLONESH 634635U, // WAIT 1086240U, // WRTEE 1087147U, // WRTEEI 1073785402U, // XOR 1073785402U, // XOR8 1073776325U, // XOR8_rec 1073780684U, // XORI 1073780684U, // XORI8 1073786069U, // XORIS 1073786069U, // XORIS8 1073776325U, // XOR_rec 41414U, // XSABSDP 42297U, // XSABSQP 1073782751U, // XSADDDP 1073783949U, // XSADDQP 1073782494U, // XSADDQPO 1073784302U, // XSADDSP 1073783196U, // XSCMPEQDP 1073784080U, // XSCMPEQQP 1073783164U, // XSCMPEXPDP 1073784058U, // XSCMPEXPQP 1073782813U, // XSCMPGEDP 1073783978U, // XSCMPGEQP 1073783256U, // XSCMPGTDP 1073784130U, // XSCMPGTQP 1073783094U, // XSCMPODP 1073784028U, // XSCMPOQP 1073783320U, // XSCMPUDP 1073784151U, // XSCMPUQP 1073783054U, // XSCPSGNDP 1073784017U, // XSCPSGNQP 41771U, // XSCVDPHP 42214U, // XSCVDPQP 42740U, // XSCVDPSP 40407U, // XSCVDPSPN 43985U, // XSCVDPSXDS 43985U, // XSCVDPSXDSs 44530U, // XSCVDPSXWS 44530U, // XSCVDPSXWSs 44021U, // XSCVDPUXDS 44021U, // XSCVDPUXDSs 44566U, // XSCVDPUXWS 44566U, // XSCVDPUXWSs 41280U, // XSCVHPDP 41290U, // XSCVQPDP 40596U, // XSCVQPDPO 48111U, // XSCVQPSDZ 48232U, // XSCVQPSQZ 48321U, // XSCVQPSWZ 48122U, // XSCVQPUDZ 48243U, // XSCVQPUQZ 48332U, // XSCVQPUWZ 42134U, // XSCVSDQP 41300U, // XSCVSPDP 40355U, // XSCVSPDPN 42267U, // XSCVSQQP 40945U, // XSCVSXDDP 42496U, // XSCVSXDSP 42144U, // XSCVUDQP 42277U, // XSCVUQQP 40967U, // XSCVUXDDP 42518U, // XSCVUXDSP 1073783330U, // XSDIVDP 1073784161U, // XSDIVQP 1073782525U, // XSDIVQPO 1073784718U, // XSDIVSP 1073783144U, // XSIEXPDP 1073784048U, // XSIEXPQP 1375772557U, // XSMADDADP 1375774128U, // XSMADDASP 1375772920U, // XSMADDMDP 1375774410U, // XSMADDMSP 1375773827U, // XSMADDQP 1375772371U, // XSMADDQPO 1073782741U, // XSMAXCDP 1073783918U, // XSMAXCQP 1073783390U, // XSMAXDP 1073782934U, // XSMAXJDP 1073782731U, // XSMINCDP 1073783908U, // XSMINCQP 1073783076U, // XSMINDP 1073782924U, // XSMINJDP 1375772511U, // XSMSUBADP 1375774082U, // XSMSUBASP 1375772874U, // XSMSUBMDP 1375774364U, // XSMSUBMSP 1375773766U, // XSMSUBQP 1375772338U, // XSMSUBQPO 1073782944U, // XSMULDP 1073784008U, // XSMULQP 1073782504U, // XSMULQPO 1073784434U, // XSMULSP 41394U, // XSNABSDP 41394U, // XSNABSDPs 42287U, // XSNABSQP 41051U, // XSNEGDP 42165U, // XSNEGQP 1375772533U, // XSNMADDADP 1375774104U, // XSNMADDASP 1375772896U, // XSNMADDMDP 1375774386U, // XSNMADDMSP 1375773816U, // XSNMADDQP 1375772359U, // XSNMADDQPO 1375772487U, // XSNMSUBADP 1375774058U, // XSNMSUBASP 1375772850U, // XSNMSUBMDP 1375774340U, // XSNMSUBMSP 1375773755U, // XSNMSUBQP 1375772326U, // XSNMSUBQPO 38828U, // XSRDPI 36773U, // XSRDPIC 39832U, // XSRDPIM 41798U, // XSRDPIP 48146U, // XSRDPIZ 41011U, // XSREDP 42551U, // XSRESP 661436U, // XSRQPI 669583U, // XSRQPIX 665569U, // XSRQPXP 42809U, // XSRSP 41027U, // XSRSQRTEDP 42567U, // XSRSQRTESP 41454U, // XSSQRTDP 42317U, // XSSQRTQP 40690U, // XSSQRTQPO 42863U, // XSSQRTSP 1073782691U, // XSSUBDP 1073783888U, // XSSUBQP 1073782461U, // XSSUBQPO 1073784262U, // XSSUBSP 1073783339U, // XSTDIVDP 41464U, // XSTSQRTDP 1375772597U, // XSTSTDCDP 1375773785U, // XSTSTDCQP 1375774168U, // XSTSTDCSP 41352U, // XSXEXPDP 42246U, // XSXEXPQP 41069U, // XSXSIGDP 42174U, // XSXSIGQP 41423U, // XVABSDP 42826U, // XVABSSP 1073782760U, // XVADDDP 1073784311U, // XVADDSP 1073777123U, // XVBF16GER2 1375771979U, // XVBF16GER2NN 1375773565U, // XVBF16GER2NP 1375772038U, // XVBF16GER2PN 1375773624U, // XVBF16GER2PP 1073777123U, // XVBF16GER2W 1375771979U, // XVBF16GER2WNN 1375773565U, // XVBF16GER2WNP 1375772038U, // XVBF16GER2WPN 1375773624U, // XVBF16GER2WPP 1073783207U, // XVCMPEQDP 1073776090U, // XVCMPEQDP_rec 1073784614U, // XVCMPEQSP 1073776176U, // XVCMPEQSP_rec 1073782824U, // XVCMPGEDP 1073776078U, // XVCMPGEDP_rec 1073784364U, // XVCMPGESP 1073776164U, // XVCMPGESP_rec 1073783267U, // XVCMPGTDP 1073776102U, // XVCMPGTDP_rec 1073784676U, // XVCMPGTSP 1073776195U, // XVCMPGTSP_rec 1073783065U, // XVCPSGNDP 1073784544U, // XVCPSGNSP 40394U, // XVCVBF16SPN 42750U, // XVCVDPSP 43997U, // XVCVDPSXDS 44542U, // XVCVDPSXWS 44033U, // XVCVDPUXDS 44578U, // XVCVDPUXWS 42760U, // XVCVHPSP 35371U, // XVCVSPBF16 41310U, // XVCVSPDP 41781U, // XVCVSPHP 44009U, // XVCVSPSXDS 44554U, // XVCVSPSXWS 44045U, // XVCVSPUXDS 44590U, // XVCVSPUXWS 40956U, // XVCVSXDDP 42507U, // XVCVSXDSP 41544U, // XVCVSXWDP 42922U, // XVCVSXWSP 40978U, // XVCVUXDDP 42529U, // XVCVUXDSP 41555U, // XVCVUXWDP 42933U, // XVCVUXWSP 1073783359U, // XVDIVDP 1073784737U, // XVDIVSP 1073777137U, // XVF16GER2 1375771995U, // XVF16GER2NN 1375773581U, // XVF16GER2NP 1375772054U, // XVF16GER2PN 1375773640U, // XVF16GER2PP 1073777137U, // XVF16GER2W 1375771995U, // XVF16GER2WNN 1375773581U, // XVF16GER2WNP 1375772054U, // XVF16GER2WPN 1375773640U, // XVF16GER2WPP 1073785239U, // XVF32GER 1375772010U, // XVF32GERNN 1375773596U, // XVF32GERNP 1375772080U, // XVF32GERPN 1375773698U, // XVF32GERPP 1073785239U, // XVF32GERW 1375772010U, // XVF32GERWNN 1375773596U, // XVF32GERWNP 1375772080U, // XVF32GERWPN 1375773698U, // XVF32GERWPP 1073785251U, // XVF64GER 1375772024U, // XVF64GERNN 1375773610U, // XVF64GERNP 1375772094U, // XVF64GERPN 1375773712U, // XVF64GERPP 1073785251U, // XVF64GERW 1375772024U, // XVF64GERWNN 1375773610U, // XVF64GERWNP 1375772094U, // XVF64GERWPN 1375773712U, // XVF64GERWPP 1073777150U, // XVI16GER2 1375773655U, // XVI16GER2PP 1073785507U, // XVI16GER2S 1375773726U, // XVI16GER2SPP 1073785507U, // XVI16GER2SW 1375773726U, // XVI16GER2SWPP 1073777150U, // XVI16GER2W 1375773655U, // XVI16GER2WPP 1073777284U, // XVI4GER8 1375773684U, // XVI4GER8PP 1073777284U, // XVI4GER8W 1375773684U, // XVI4GER8WPP 1073777163U, // XVI8GER4 1375773670U, // XVI8GER4PP 1375773742U, // XVI8GER4SPP 1073777163U, // XVI8GER4W 1375773670U, // XVI8GER4WPP 1375773742U, // XVI8GER4WSPP 1073783154U, // XVIEXPDP 1073784594U, // XVIEXPSP 1375772568U, // XVMADDADP 1375774139U, // XVMADDASP 1375772931U, // XVMADDMDP 1375774421U, // XVMADDMSP 1073783399U, // XVMAXDP 1073784768U, // XVMAXSP 1073783085U, // XVMINDP 1073784555U, // XVMINSP 1375772522U, // XVMSUBADP 1375774093U, // XVMSUBASP 1375772885U, // XVMSUBMDP 1375774375U, // XVMSUBMSP 1073782953U, // XVMULDP 1073784443U, // XVMULSP 41404U, // XVNABSDP 42816U, // XVNABSSP 41060U, // XVNEGDP 42591U, // XVNEGSP 1375772545U, // XVNMADDADP 1375774116U, // XVNMADDASP 1375772908U, // XVNMADDMDP 1375774398U, // XVNMADDMSP 1375772499U, // XVNMSUBADP 1375774070U, // XVNMSUBASP 1375772862U, // XVNMSUBMDP 1375774352U, // XVNMSUBMSP 38836U, // XVRDPI 36782U, // XVRDPIC 39841U, // XVRDPIM 41807U, // XVRDPIP 48155U, // XVRDPIZ 41019U, // XVREDP 42559U, // XVRESP 38852U, // XVRSPI 36791U, // XVRSPIC 39850U, // XVRSPIM 41816U, // XVRSPIP 48164U, // XVRSPIZ 41039U, // XVRSQRTEDP 42579U, // XVRSQRTESP 41486U, // XVSQRTDP 42884U, // XVSQRTSP 1073782700U, // XVSUBDP 1073784271U, // XVSUBSP 1073783349U, // XVTDIVDP 1073784727U, // XVTDIVSP 36207U, // XVTLSBB 41475U, // XVTSQRTDP 42873U, // XVTSQRTSP 1375772608U, // XVTSTDCDP 1375774179U, // XVTSTDCSP 41362U, // XVXEXPDP 42780U, // XVXEXPSP 41079U, // XVXSIGDP 42600U, // XVXSIGSP 1073778462U, // XXBLENDVB 1073779402U, // XXBLENDVD 1073780210U, // XXBLENDVH 1073788312U, // XXBLENDVW 37304U, // XXBRD 38167U, // XXBRH 43121U, // XXBRQ 46135U, // XXBRW 1073781078U, // XXEVAL 1073788273U, // XXEXTRACTUW 1073781438U, // XXGENPCVBM 1073781510U, // XXGENPCVDM 1073781637U, // XXGENPCVHM 1073781903U, // XXGENPCVWM 1375778035U, // XXINSERTW 1073779067U, // XXLAND 1073778536U, // XXLANDC 1073787132U, // XXLEQV 1308668156U, // XXLEQVOnes 1073779075U, // XXLNAND 1073785365U, // XXLNOR 1073785358U, // XXLOR 1073778644U, // XXLORC 1073785358U, // XXLORf 1073785399U, // XXLXOR 1308666423U, // XXLXORdpz 1308666423U, // XXLXORspz 1308666423U, // XXLXORz 1412944U, // XXMFACC 1412944U, // XXMFACCW 1073787628U, // XXMRGHW 1073787680U, // XXMRGLW 1085273U, // XXMTACC 1085273U, // XXMTACCW 1073781809U, // XXPERM 1073780341U, // XXPERMDI 1073780341U, // XXPERMDIs 1073785349U, // XXPERMR 1073788975U, // XXPERMX 1073781151U, // XXSEL 1096644U, // XXSETACCZ 1096644U, // XXSETACCZW 1073780830U, // XXSLDWI 1073780830U, // XXSLDWIs 1744877168U, // XXSPLTI32DX 1006669213U, // XXSPLTIB 41089U, // XXSPLTIDP 45838U, // XXSPLTIW 1073788118U, // XXSPLTW 1073788118U, // XXSPLTWs 1074171717U, // gBC 1074170700U, // gBCA 23775665U, // gBCAat 1074178700U, // gBCCTR 1074174465U, // gBCCTRL 1074174311U, // gBCL 1074170995U, // gBCLA 23775681U, // gBCLAat 1074178505U, // gBCLR 1074174441U, // gBCLRL 24824380U, // gBCLat 24824270U, // gBCat }; static const uint16_t OpInfo1[] = { 0U, // PHI 0U, // INLINEASM 0U, // INLINEASM_BR 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // ANNOTATION_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 0U, // DBG_VALUE 0U, // DBG_VALUE_LIST 0U, // DBG_INSTR_REF 0U, // DBG_PHI 0U, // DBG_LABEL 0U, // REG_SEQUENCE 0U, // COPY 0U, // BUNDLE 0U, // LIFETIME_START 0U, // LIFETIME_END 0U, // PSEUDO_PROBE 0U, // ARITH_FENCE 0U, // STACKMAP 0U, // FENTRY_CALL 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // PREALLOCATED_SETUP 0U, // PREALLOCATED_ARG 0U, // STATEPOINT 0U, // LOCAL_ESCAPE 0U, // FAULTING_OP 0U, // PATCHABLE_OP 0U, // PATCHABLE_FUNCTION_ENTER 0U, // PATCHABLE_RET 0U, // PATCHABLE_FUNCTION_EXIT 0U, // PATCHABLE_TAIL_CALL 0U, // PATCHABLE_EVENT_CALL 0U, // PATCHABLE_TYPED_EVENT_CALL 0U, // ICALL_BRANCH_FUNNEL 0U, // MEMBARRIER 0U, // G_ASSERT_SEXT 0U, // G_ASSERT_ZEXT 0U, // G_ASSERT_ALIGN 0U, // G_ADD 0U, // G_SUB 0U, // G_MUL 0U, // G_SDIV 0U, // G_UDIV 0U, // G_SREM 0U, // G_UREM 0U, // G_SDIVREM 0U, // G_UDIVREM 0U, // G_AND 0U, // G_OR 0U, // G_XOR 0U, // G_IMPLICIT_DEF 0U, // G_PHI 0U, // G_FRAME_INDEX 0U, // G_GLOBAL_VALUE 0U, // G_EXTRACT 0U, // G_UNMERGE_VALUES 0U, // G_INSERT 0U, // G_MERGE_VALUES 0U, // G_BUILD_VECTOR 0U, // G_BUILD_VECTOR_TRUNC 0U, // G_CONCAT_VECTORS 0U, // G_PTRTOINT 0U, // G_INTTOPTR 0U, // G_BITCAST 0U, // G_FREEZE 0U, // G_INTRINSIC_FPTRUNC_ROUND 0U, // G_INTRINSIC_TRUNC 0U, // G_INTRINSIC_ROUND 0U, // G_INTRINSIC_LRINT 0U, // G_INTRINSIC_ROUNDEVEN 0U, // G_READCYCLECOUNTER 0U, // G_LOAD 0U, // G_SEXTLOAD 0U, // G_ZEXTLOAD 0U, // G_INDEXED_LOAD 0U, // G_INDEXED_SEXTLOAD 0U, // G_INDEXED_ZEXTLOAD 0U, // G_STORE 0U, // G_INDEXED_STORE 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS 0U, // G_ATOMIC_CMPXCHG 0U, // G_ATOMICRMW_XCHG 0U, // G_ATOMICRMW_ADD 0U, // G_ATOMICRMW_SUB 0U, // G_ATOMICRMW_AND 0U, // G_ATOMICRMW_NAND 0U, // G_ATOMICRMW_OR 0U, // G_ATOMICRMW_XOR 0U, // G_ATOMICRMW_MAX 0U, // G_ATOMICRMW_MIN 0U, // G_ATOMICRMW_UMAX 0U, // G_ATOMICRMW_UMIN 0U, // G_ATOMICRMW_FADD 0U, // G_ATOMICRMW_FSUB 0U, // G_ATOMICRMW_FMAX 0U, // G_ATOMICRMW_FMIN 0U, // G_ATOMICRMW_UINC_WRAP 0U, // G_ATOMICRMW_UDEC_WRAP 0U, // G_FENCE 0U, // G_BRCOND 0U, // G_BRINDIRECT 0U, // G_INVOKE_REGION_START 0U, // G_INTRINSIC 0U, // G_INTRINSIC_W_SIDE_EFFECTS 0U, // G_ANYEXT 0U, // G_TRUNC 0U, // G_CONSTANT 0U, // G_FCONSTANT 0U, // G_VASTART 0U, // G_VAARG 0U, // G_SEXT 0U, // G_SEXT_INREG 0U, // G_ZEXT 0U, // G_SHL 0U, // G_LSHR 0U, // G_ASHR 0U, // G_FSHL 0U, // G_FSHR 0U, // G_ROTR 0U, // G_ROTL 0U, // G_ICMP 0U, // G_FCMP 0U, // G_SELECT 0U, // G_UADDO 0U, // G_UADDE 0U, // G_USUBO 0U, // G_USUBE 0U, // G_SADDO 0U, // G_SADDE 0U, // G_SSUBO 0U, // G_SSUBE 0U, // G_UMULO 0U, // G_SMULO 0U, // G_UMULH 0U, // G_SMULH 0U, // G_UADDSAT 0U, // G_SADDSAT 0U, // G_USUBSAT 0U, // G_SSUBSAT 0U, // G_USHLSAT 0U, // G_SSHLSAT 0U, // G_SMULFIX 0U, // G_UMULFIX 0U, // G_SMULFIXSAT 0U, // G_UMULFIXSAT 0U, // G_SDIVFIX 0U, // G_UDIVFIX 0U, // G_SDIVFIXSAT 0U, // G_UDIVFIXSAT 0U, // G_FADD 0U, // G_FSUB 0U, // G_FMUL 0U, // G_FMA 0U, // G_FMAD 0U, // G_FDIV 0U, // G_FREM 0U, // G_FPOW 0U, // G_FPOWI 0U, // G_FEXP 0U, // G_FEXP2 0U, // G_FLOG 0U, // G_FLOG2 0U, // G_FLOG10 0U, // G_FNEG 0U, // G_FPEXT 0U, // G_FPTRUNC 0U, // G_FPTOSI 0U, // G_FPTOUI 0U, // G_SITOFP 0U, // G_UITOFP 0U, // G_FABS 0U, // G_FCOPYSIGN 0U, // G_IS_FPCLASS 0U, // G_FCANONICALIZE 0U, // G_FMINNUM 0U, // G_FMAXNUM 0U, // G_FMINNUM_IEEE 0U, // G_FMAXNUM_IEEE 0U, // G_FMINIMUM 0U, // G_FMAXIMUM 0U, // G_PTR_ADD 0U, // G_PTRMASK 0U, // G_SMIN 0U, // G_SMAX 0U, // G_UMIN 0U, // G_UMAX 0U, // G_ABS 0U, // G_LROUND 0U, // G_LLROUND 0U, // G_BR 0U, // G_BRJT 0U, // G_INSERT_VECTOR_ELT 0U, // G_EXTRACT_VECTOR_ELT 0U, // G_SHUFFLE_VECTOR 0U, // G_CTTZ 0U, // G_CTTZ_ZERO_UNDEF 0U, // G_CTLZ 0U, // G_CTLZ_ZERO_UNDEF 0U, // G_CTPOP 0U, // G_BSWAP 0U, // G_BITREVERSE 0U, // G_FCEIL 0U, // G_FCOS 0U, // G_FSIN 0U, // G_FSQRT 0U, // G_FFLOOR 0U, // G_FRINT 0U, // G_FNEARBYINT 0U, // G_ADDRSPACE_CAST 0U, // G_BLOCK_ADDR 0U, // G_JUMP_TABLE 0U, // G_DYN_STACKALLOC 0U, // G_STRICT_FADD 0U, // G_STRICT_FSUB 0U, // G_STRICT_FMUL 0U, // G_STRICT_FDIV 0U, // G_STRICT_FREM 0U, // G_STRICT_FMA 0U, // G_STRICT_FSQRT 0U, // G_READ_REGISTER 0U, // G_WRITE_REGISTER 0U, // G_MEMCPY 0U, // G_MEMCPY_INLINE 0U, // G_MEMMOVE 0U, // G_MEMSET 0U, // G_BZERO 0U, // G_VECREDUCE_SEQ_FADD 0U, // G_VECREDUCE_SEQ_FMUL 0U, // G_VECREDUCE_FADD 0U, // G_VECREDUCE_FMUL 0U, // G_VECREDUCE_FMAX 0U, // G_VECREDUCE_FMIN 0U, // G_VECREDUCE_ADD 0U, // G_VECREDUCE_MUL 0U, // G_VECREDUCE_AND 0U, // G_VECREDUCE_OR 0U, // G_VECREDUCE_XOR 0U, // G_VECREDUCE_SMAX 0U, // G_VECREDUCE_SMIN 0U, // G_VECREDUCE_UMAX 0U, // G_VECREDUCE_UMIN 0U, // G_SBFX 0U, // G_UBFX 0U, // ATOMIC_CMP_SWAP_I128 0U, // ATOMIC_LOAD_ADD_I128 0U, // ATOMIC_LOAD_AND_I128 0U, // ATOMIC_LOAD_NAND_I128 0U, // ATOMIC_LOAD_OR_I128 0U, // ATOMIC_LOAD_SUB_I128 0U, // ATOMIC_LOAD_XOR_I128 0U, // ATOMIC_SWAP_I128 0U, // BUILD_QUADWORD 0U, // BUILD_UACC 0U, // CFENCE8 0U, // CLRLSLDI 0U, // CLRLSLDI_rec 258U, // CLRLSLWI 258U, // CLRLSLWI_rec 64U, // CLRRDI 64U, // CLRRDI_rec 66U, // CLRRWI 66U, // CLRRWI_rec 0U, // DCBFL 0U, // DCBFLP 0U, // DCBFPS 0U, // DCBFx 0U, // DCBSTPS 0U, // DCBTCT 0U, // DCBTDS 0U, // DCBTSTCT 0U, // DCBTSTDS 0U, // DCBTSTT 0U, // DCBTSTx 0U, // DCBTT 0U, // DCBTx 0U, // DFLOADf32 0U, // DFLOADf64 0U, // DFSTOREf32 0U, // DFSTOREf64 0U, // EXTLDI 0U, // EXTLDI_rec 258U, // EXTLWI 258U, // EXTLWI_rec 0U, // EXTRDI 0U, // EXTRDI_rec 258U, // EXTRWI 258U, // EXTRWI_rec 258U, // INSLWI 258U, // INSLWI_rec 0U, // INSRDI 0U, // INSRDI_rec 258U, // INSRWI 258U, // INSRWI_rec 0U, // KILL_PAIR 0U, // LAx 0U, // LIWAX 0U, // LIWZX 514U, // RLWIMIbm 514U, // RLWIMIbm_rec 514U, // RLWINMbm 514U, // RLWINMbm_rec 514U, // RLWNMbm 514U, // RLWNMbm_rec 64U, // ROTRDI 64U, // ROTRDI_rec 66U, // ROTRWI 66U, // ROTRWI_rec 64U, // SLDI 64U, // SLDI_rec 66U, // SLWI 66U, // SLWI_rec 0U, // SPILLTOVSR_LD 0U, // SPILLTOVSR_LDX 0U, // SPILLTOVSR_ST 0U, // SPILLTOVSR_STX 64U, // SRDI 64U, // SRDI_rec 66U, // SRWI 66U, // SRWI_rec 0U, // STIWX 4U, // SUBI 4U, // SUBIC 4U, // SUBIC_rec 4U, // SUBIS 0U, // SUBPCIS 0U, // XFLOADf32 0U, // XFLOADf64 0U, // XFSTOREf32 0U, // XFSTOREf64 70U, // ADD4 70U, // ADD4O 70U, // ADD4O_rec 70U, // ADD4TLS 70U, // ADD4_rec 70U, // ADD8 70U, // ADD8O 70U, // ADD8O_rec 70U, // ADD8TLS 70U, // ADD8TLS_ 70U, // ADD8_rec 70U, // ADDC 70U, // ADDC8 70U, // ADDC8O 70U, // ADDC8O_rec 70U, // ADDC8_rec 70U, // ADDCO 70U, // ADDCO_rec 70U, // ADDC_rec 70U, // ADDE 70U, // ADDE8 70U, // ADDE8O 70U, // ADDE8O_rec 70U, // ADDE8_rec 70U, // ADDEO 70U, // ADDEO_rec 774U, // ADDEX 774U, // ADDEX8 70U, // ADDE_rec 4U, // ADDI 4U, // ADDI8 4U, // ADDIC 4U, // ADDIC8 4U, // ADDIC_rec 4U, // ADDIS 4U, // ADDIS8 0U, // ADDISdtprelHA 0U, // ADDISdtprelHA32 0U, // ADDISgotTprelHA 0U, // ADDIStlsgdHA 0U, // ADDIStlsldHA 0U, // ADDIStocHA 0U, // ADDIStocHA8 0U, // ADDIdtprelL 0U, // ADDIdtprelL32 0U, // ADDItlsgdL 0U, // ADDItlsgdL32 0U, // ADDItlsgdLADDR 0U, // ADDItlsgdLADDR32 0U, // ADDItlsldL 0U, // ADDItlsldL32 0U, // ADDItlsldLADDR 0U, // ADDItlsldLADDR32 0U, // ADDItoc 0U, // ADDItoc8 0U, // ADDItocL 0U, // ADDME 0U, // ADDME8 0U, // ADDME8O 0U, // ADDME8O_rec 0U, // ADDME8_rec 0U, // ADDMEO 0U, // ADDMEO_rec 0U, // ADDME_rec 0U, // ADDPCIS 0U, // ADDZE 0U, // ADDZE8 0U, // ADDZE8O 0U, // ADDZE8O_rec 0U, // ADDZE8_rec 0U, // ADDZEO 0U, // ADDZEO_rec 0U, // ADDZE_rec 0U, // ADJCALLSTACKDOWN 0U, // ADJCALLSTACKUP 70U, // AND 70U, // AND8 70U, // AND8_rec 70U, // ANDC 70U, // ANDC8 70U, // ANDC8_rec 70U, // ANDC_rec 8U, // ANDI8_rec 8U, // ANDIS8_rec 8U, // ANDIS_rec 8U, // ANDI_rec 0U, // ANDI_rec_1_EQ_BIT 0U, // ANDI_rec_1_EQ_BIT8 0U, // ANDI_rec_1_GT_BIT 0U, // ANDI_rec_1_GT_BIT8 70U, // AND_rec 0U, // ATOMIC_CMP_SWAP_I16 0U, // ATOMIC_CMP_SWAP_I32 0U, // ATOMIC_CMP_SWAP_I64 0U, // ATOMIC_CMP_SWAP_I8 0U, // ATOMIC_LOAD_ADD_I16 0U, // ATOMIC_LOAD_ADD_I32 0U, // ATOMIC_LOAD_ADD_I64 0U, // ATOMIC_LOAD_ADD_I8 0U, // ATOMIC_LOAD_AND_I16 0U, // ATOMIC_LOAD_AND_I32 0U, // ATOMIC_LOAD_AND_I64 0U, // ATOMIC_LOAD_AND_I8 0U, // ATOMIC_LOAD_MAX_I16 0U, // ATOMIC_LOAD_MAX_I32 0U, // ATOMIC_LOAD_MAX_I64 0U, // ATOMIC_LOAD_MAX_I8 0U, // ATOMIC_LOAD_MIN_I16 0U, // ATOMIC_LOAD_MIN_I32 0U, // ATOMIC_LOAD_MIN_I64 0U, // ATOMIC_LOAD_MIN_I8 0U, // ATOMIC_LOAD_NAND_I16 0U, // ATOMIC_LOAD_NAND_I32 0U, // ATOMIC_LOAD_NAND_I64 0U, // ATOMIC_LOAD_NAND_I8 0U, // ATOMIC_LOAD_OR_I16 0U, // ATOMIC_LOAD_OR_I32 0U, // ATOMIC_LOAD_OR_I64 0U, // ATOMIC_LOAD_OR_I8 0U, // ATOMIC_LOAD_SUB_I16 0U, // ATOMIC_LOAD_SUB_I32 0U, // ATOMIC_LOAD_SUB_I64 0U, // ATOMIC_LOAD_SUB_I8 0U, // ATOMIC_LOAD_UMAX_I16 0U, // ATOMIC_LOAD_UMAX_I32 0U, // ATOMIC_LOAD_UMAX_I64 0U, // ATOMIC_LOAD_UMAX_I8 0U, // ATOMIC_LOAD_UMIN_I16 0U, // ATOMIC_LOAD_UMIN_I32 0U, // ATOMIC_LOAD_UMIN_I64 0U, // ATOMIC_LOAD_UMIN_I8 0U, // ATOMIC_LOAD_XOR_I16 0U, // ATOMIC_LOAD_XOR_I32 0U, // ATOMIC_LOAD_XOR_I64 0U, // ATOMIC_LOAD_XOR_I8 0U, // ATOMIC_SWAP_I16 0U, // ATOMIC_SWAP_I32 0U, // ATOMIC_SWAP_I64 0U, // ATOMIC_SWAP_I8 0U, // ATTN 0U, // B 0U, // BA 0U, // BC 0U, // BCC 0U, // BCCA 0U, // BCCCTR 0U, // BCCCTR8 0U, // BCCCTRL 0U, // BCCCTRL8 0U, // BCCL 0U, // BCCLA 0U, // BCCLR 0U, // BCCLRL 0U, // BCCTR 0U, // BCCTR8 0U, // BCCTR8n 0U, // BCCTRL 0U, // BCCTRL8 0U, // BCCTRL8n 0U, // BCCTRLn 0U, // BCCTRn 1030U, // BCDADD_rec 74U, // BCDCFN_rec 74U, // BCDCFSQ_rec 74U, // BCDCFZ_rec 70U, // BCDCPSGN_rec 0U, // BCDCTN_rec 0U, // BCDCTSQ_rec 74U, // BCDCTZ_rec 74U, // BCDSETSGN_rec 1030U, // BCDSR_rec 1030U, // BCDSUB_rec 1030U, // BCDS_rec 1030U, // BCDTRUNC_rec 70U, // BCDUS_rec 70U, // BCDUTRUNC_rec 0U, // BCL 0U, // BCLR 0U, // BCLRL 0U, // BCLRLn 0U, // BCLRn 0U, // BCLalways 0U, // BCLn 0U, // BCTR 0U, // BCTR8 0U, // BCTRL 0U, // BCTRL8 0U, // BCTRL8_LDinto_toc 0U, // BCTRL8_LDinto_toc_RM 0U, // BCTRL8_RM 0U, // BCTRL_LWZinto_toc 0U, // BCTRL_LWZinto_toc_RM 0U, // BCTRL_RM 0U, // BCn 0U, // BL 0U, // BL8 0U, // BL8_NOP 0U, // BL8_NOP_RM 0U, // BL8_NOP_TLS 0U, // BL8_NOTOC 0U, // BL8_NOTOC_RM 0U, // BL8_NOTOC_TLS 0U, // BL8_RM 0U, // BL8_TLS 0U, // BL8_TLS_ 0U, // BLA 0U, // BLA8 0U, // BLA8_NOP 0U, // BLA8_NOP_RM 0U, // BLA8_RM 0U, // BLA_RM 0U, // BLR 0U, // BLR8 0U, // BLRL 0U, // BL_NOP 0U, // BL_NOP_RM 0U, // BL_RM 0U, // BL_TLS 70U, // BPERMD 0U, // BRD 0U, // BRH 0U, // BRH8 70U, // BRINC 0U, // BRW 0U, // BRW8 70U, // CFUGED 0U, // CLRBHRB 70U, // CMPB 70U, // CMPB8 70U, // CMPD 4U, // CMPDI 70U, // CMPEQB 70U, // CMPLD 8U, // CMPLDI 70U, // CMPLW 8U, // CMPLWI 518U, // CMPRB 518U, // CMPRB8 70U, // CMPW 4U, // CMPWI 0U, // CNTLZD 70U, // CNTLZDM 0U, // CNTLZD_rec 0U, // CNTLZW 0U, // CNTLZW8 0U, // CNTLZW8_rec 0U, // CNTLZW_rec 0U, // CNTTZD 70U, // CNTTZDM 0U, // CNTTZD_rec 0U, // CNTTZW 0U, // CNTTZW8 0U, // CNTTZW8_rec 0U, // CNTTZW_rec 0U, // CP_ABORT 0U, // CP_COPY 0U, // CP_COPY8 74U, // CP_PASTE8_rec 74U, // CP_PASTE_rec 0U, // CR6SET 0U, // CR6UNSET 70U, // CRAND 70U, // CRANDC 70U, // CREQV 70U, // CRNAND 70U, // CRNOR 0U, // CRNOT 70U, // CROR 70U, // CRORC 12U, // CRSET 12U, // CRUNSET 70U, // CRXOR 0U, // CTRL_DEP 0U, // DARN 0U, // DCBA 0U, // DCBF 0U, // DCBFEP 0U, // DCBI 0U, // DCBST 0U, // DCBSTEP 0U, // DCBT 0U, // DCBTEP 0U, // DCBTST 0U, // DCBTSTEP 0U, // DCBZ 0U, // DCBZEP 0U, // DCBZL 0U, // DCBZLEP 0U, // DCCCI 70U, // DIVD 70U, // DIVDE 70U, // DIVDEO 70U, // DIVDEO_rec 70U, // DIVDEU 70U, // DIVDEUO 70U, // DIVDEUO_rec 70U, // DIVDEU_rec 70U, // DIVDE_rec 70U, // DIVDO 70U, // DIVDO_rec 70U, // DIVDU 70U, // DIVDUO 70U, // DIVDUO_rec 70U, // DIVDU_rec 70U, // DIVD_rec 70U, // DIVW 70U, // DIVWE 70U, // DIVWEO 70U, // DIVWEO_rec 70U, // DIVWEU 70U, // DIVWEUO 70U, // DIVWEUO_rec 70U, // DIVWEU_rec 70U, // DIVWE_rec 70U, // DIVWO 70U, // DIVWO_rec 70U, // DIVWU 70U, // DIVWUO 70U, // DIVWUO_rec 70U, // DIVWU_rec 70U, // DIVW_rec 0U, // DMMR 0U, // DMSETDMRZ 0U, // DMXOR 14U, // DMXXEXTFDMR256 0U, // DMXXEXTFDMR512 0U, // DMXXEXTFDMR512_HI 14U, // DMXXINSTFDMR256 134U, // DMXXINSTFDMR512 198U, // DMXXINSTFDMR512_HI 0U, // DSS 0U, // DSSALL 16U, // DST 16U, // DST64 16U, // DSTST 16U, // DSTST64 16U, // DSTSTT 16U, // DSTSTT64 16U, // DSTT 16U, // DSTT64 0U, // DYNALLOC 0U, // DYNALLOC8 0U, // DYNAREAOFFSET 0U, // DYNAREAOFFSET8 0U, // DecreaseCTR8loop 0U, // DecreaseCTRloop 0U, // EFDABS 70U, // EFDADD 0U, // EFDCFS 0U, // EFDCFSF 0U, // EFDCFSI 0U, // EFDCFSID 0U, // EFDCFUF 0U, // EFDCFUI 0U, // EFDCFUID 70U, // EFDCMPEQ 70U, // EFDCMPGT 70U, // EFDCMPLT 0U, // EFDCTSF 0U, // EFDCTSI 0U, // EFDCTSIDZ 0U, // EFDCTSIZ 0U, // EFDCTUF 0U, // EFDCTUI 0U, // EFDCTUIDZ 0U, // EFDCTUIZ 70U, // EFDDIV 70U, // EFDMUL 0U, // EFDNABS 0U, // EFDNEG 70U, // EFDSUB 70U, // EFDTSTEQ 70U, // EFDTSTGT 70U, // EFDTSTLT 0U, // EFSABS 70U, // EFSADD 0U, // EFSCFD 0U, // EFSCFSF 0U, // EFSCFSI 0U, // EFSCFUF 0U, // EFSCFUI 70U, // EFSCMPEQ 70U, // EFSCMPGT 70U, // EFSCMPLT 0U, // EFSCTSF 0U, // EFSCTSI 0U, // EFSCTSIZ 0U, // EFSCTUF 0U, // EFSCTUI 0U, // EFSCTUIZ 70U, // EFSDIV 70U, // EFSMUL 0U, // EFSNABS 0U, // EFSNEG 70U, // EFSSUB 70U, // EFSTSTEQ 70U, // EFSTSTGT 70U, // EFSTSTLT 0U, // EH_SjLj_LongJmp32 0U, // EH_SjLj_LongJmp64 0U, // EH_SjLj_SetJmp32 0U, // EH_SjLj_SetJmp64 0U, // EH_SjLj_Setup 70U, // EQV 70U, // EQV8 70U, // EQV8_rec 70U, // EQV_rec 0U, // EVABS 82U, // EVADDIW 0U, // EVADDSMIAAW 0U, // EVADDSSIAAW 0U, // EVADDUMIAAW 0U, // EVADDUSIAAW 70U, // EVADDW 70U, // EVAND 70U, // EVANDC 70U, // EVCMPEQ 70U, // EVCMPGTS 70U, // EVCMPGTU 70U, // EVCMPLTS 70U, // EVCMPLTU 0U, // EVCNTLSW 0U, // EVCNTLZW 70U, // EVDIVWS 70U, // EVDIVWU 70U, // EVEQV 0U, // EVEXTSB 0U, // EVEXTSH 0U, // EVFSABS 70U, // EVFSADD 0U, // EVFSCFSF 0U, // EVFSCFSI 0U, // EVFSCFUF 0U, // EVFSCFUI 70U, // EVFSCMPEQ 70U, // EVFSCMPGT 70U, // EVFSCMPLT 0U, // EVFSCTSF 0U, // EVFSCTSI 0U, // EVFSCTSIZ 0U, // EVFSCTUF 0U, // EVFSCTUI 0U, // EVFSCTUIZ 70U, // EVFSDIV 70U, // EVFSMUL 0U, // EVFSNABS 0U, // EVFSNEG 70U, // EVFSSUB 70U, // EVFSTSTEQ 70U, // EVFSTSTGT 70U, // EVFSTSTLT 0U, // EVLDD 0U, // EVLDDX 0U, // EVLDH 0U, // EVLDHX 0U, // EVLDW 0U, // EVLDWX 0U, // EVLHHESPLAT 0U, // EVLHHESPLATX 0U, // EVLHHOSSPLAT 0U, // EVLHHOSSPLATX 0U, // EVLHHOUSPLAT 0U, // EVLHHOUSPLATX 0U, // EVLWHE 0U, // EVLWHEX 0U, // EVLWHOS 0U, // EVLWHOSX 0U, // EVLWHOU 0U, // EVLWHOUX 0U, // EVLWHSPLAT 0U, // EVLWHSPLATX 0U, // EVLWWSPLAT 0U, // EVLWWSPLATX 70U, // EVMERGEHI 70U, // EVMERGEHILO 70U, // EVMERGELO 70U, // EVMERGELOHI 70U, // EVMHEGSMFAA 70U, // EVMHEGSMFAN 70U, // EVMHEGSMIAA 70U, // EVMHEGSMIAN 70U, // EVMHEGUMIAA 70U, // EVMHEGUMIAN 70U, // EVMHESMF 70U, // EVMHESMFA 70U, // EVMHESMFAAW 70U, // EVMHESMFANW 70U, // EVMHESMI 70U, // EVMHESMIA 70U, // EVMHESMIAAW 70U, // EVMHESMIANW 70U, // EVMHESSF 70U, // EVMHESSFA 70U, // EVMHESSFAAW 70U, // EVMHESSFANW 70U, // EVMHESSIAAW 70U, // EVMHESSIANW 70U, // EVMHEUMI 70U, // EVMHEUMIA 70U, // EVMHEUMIAAW 70U, // EVMHEUMIANW 70U, // EVMHEUSIAAW 70U, // EVMHEUSIANW 70U, // EVMHOGSMFAA 70U, // EVMHOGSMFAN 70U, // EVMHOGSMIAA 70U, // EVMHOGSMIAN 70U, // EVMHOGUMIAA 70U, // EVMHOGUMIAN 70U, // EVMHOSMF 70U, // EVMHOSMFA 70U, // EVMHOSMFAAW 70U, // EVMHOSMFANW 70U, // EVMHOSMI 70U, // EVMHOSMIA 70U, // EVMHOSMIAAW 70U, // EVMHOSMIANW 70U, // EVMHOSSF 70U, // EVMHOSSFA 70U, // EVMHOSSFAAW 70U, // EVMHOSSFANW 70U, // EVMHOSSIAAW 70U, // EVMHOSSIANW 70U, // EVMHOUMI 70U, // EVMHOUMIA 70U, // EVMHOUMIAAW 70U, // EVMHOUMIANW 70U, // EVMHOUSIAAW 70U, // EVMHOUSIANW 0U, // EVMRA 70U, // EVMWHSMF 70U, // EVMWHSMFA 70U, // EVMWHSMI 70U, // EVMWHSMIA 70U, // EVMWHSSF 70U, // EVMWHSSFA 70U, // EVMWHUMI 70U, // EVMWHUMIA 70U, // EVMWLSMIAAW 70U, // EVMWLSMIANW 70U, // EVMWLSSIAAW 70U, // EVMWLSSIANW 70U, // EVMWLUMI 70U, // EVMWLUMIA 70U, // EVMWLUMIAAW 70U, // EVMWLUMIANW 70U, // EVMWLUSIAAW 70U, // EVMWLUSIANW 70U, // EVMWSMF 70U, // EVMWSMFA 70U, // EVMWSMFAA 70U, // EVMWSMFAN 70U, // EVMWSMI 70U, // EVMWSMIA 70U, // EVMWSMIAA 70U, // EVMWSMIAN 70U, // EVMWSSF 70U, // EVMWSSFA 70U, // EVMWSSFAA 70U, // EVMWSSFAN 70U, // EVMWUMI 70U, // EVMWUMIA 70U, // EVMWUMIAA 70U, // EVMWUMIAN 70U, // EVNAND 0U, // EVNEG 70U, // EVNOR 70U, // EVOR 70U, // EVORC 70U, // EVRLW 66U, // EVRLWI 0U, // EVRNDW 0U, // EVSEL 70U, // EVSLW 66U, // EVSLWI 0U, // EVSPLATFI 0U, // EVSPLATI 66U, // EVSRWIS 66U, // EVSRWIU 70U, // EVSRWS 70U, // EVSRWU 0U, // EVSTDD 0U, // EVSTDDX 0U, // EVSTDH 0U, // EVSTDHX 0U, // EVSTDW 0U, // EVSTDWX 0U, // EVSTWHE 0U, // EVSTWHEX 0U, // EVSTWHO 0U, // EVSTWHOX 0U, // EVSTWWE 0U, // EVSTWWEX 0U, // EVSTWWO 0U, // EVSTWWOX 0U, // EVSUBFSMIAAW 0U, // EVSUBFSSIAAW 0U, // EVSUBFUMIAAW 0U, // EVSUBFUSIAAW 70U, // EVSUBFW 70U, // EVSUBIFW 70U, // EVXOR 0U, // EXTSB 0U, // EXTSB8 0U, // EXTSB8_32_64 0U, // EXTSB8_rec 0U, // EXTSB_rec 0U, // EXTSH 0U, // EXTSH8 0U, // EXTSH8_32_64 0U, // EXTSH8_rec 0U, // EXTSH_rec 0U, // EXTSW 64U, // EXTSWSLI 64U, // EXTSWSLI_32_64 64U, // EXTSWSLI_32_64_rec 64U, // EXTSWSLI_rec 0U, // EXTSW_32 0U, // EXTSW_32_64 0U, // EXTSW_32_64_rec 0U, // EXTSW_rec 0U, // EnforceIEIO 0U, // FABSD 0U, // FABSD_rec 0U, // FABSS 0U, // FABSS_rec 70U, // FADD 70U, // FADDS 70U, // FADDS_rec 70U, // FADD_rec 0U, // FADDrtz 0U, // FCFID 0U, // FCFIDS 0U, // FCFIDS_rec 0U, // FCFIDU 0U, // FCFIDUS 0U, // FCFIDUS_rec 0U, // FCFIDU_rec 0U, // FCFID_rec 70U, // FCMPOD 70U, // FCMPOS 70U, // FCMPUD 70U, // FCMPUS 70U, // FCPSGND 70U, // FCPSGND_rec 70U, // FCPSGNS 70U, // FCPSGNS_rec 0U, // FCTID 0U, // FCTIDU 0U, // FCTIDUZ 0U, // FCTIDUZ_rec 0U, // FCTIDU_rec 0U, // FCTIDZ 0U, // FCTIDZ_rec 0U, // FCTID_rec 0U, // FCTIW 0U, // FCTIWU 0U, // FCTIWUZ 0U, // FCTIWUZ_rec 0U, // FCTIWU_rec 0U, // FCTIWZ 0U, // FCTIWZ_rec 0U, // FCTIW_rec 70U, // FDIV 70U, // FDIVS 70U, // FDIVS_rec 70U, // FDIV_rec 518U, // FMADD 518U, // FMADDS 518U, // FMADDS_rec 518U, // FMADD_rec 0U, // FMR 0U, // FMR_rec 518U, // FMSUB 518U, // FMSUBS 518U, // FMSUBS_rec 518U, // FMSUB_rec 70U, // FMUL 70U, // FMULS 70U, // FMULS_rec 70U, // FMUL_rec 0U, // FNABSD 0U, // FNABSD_rec 0U, // FNABSS 0U, // FNABSS_rec 0U, // FNEGD 0U, // FNEGD_rec 0U, // FNEGS 0U, // FNEGS_rec 518U, // FNMADD 518U, // FNMADDS 518U, // FNMADDS_rec 518U, // FNMADD_rec 518U, // FNMSUB 518U, // FNMSUBS 518U, // FNMSUBS_rec 518U, // FNMSUB_rec 0U, // FRE 0U, // FRES 0U, // FRES_rec 0U, // FRE_rec 0U, // FRIMD 0U, // FRIMD_rec 0U, // FRIMS 0U, // FRIMS_rec 0U, // FRIND 0U, // FRIND_rec 0U, // FRINS 0U, // FRINS_rec 0U, // FRIPD 0U, // FRIPD_rec 0U, // FRIPS 0U, // FRIPS_rec 0U, // FRIZD 0U, // FRIZD_rec 0U, // FRIZS 0U, // FRIZS_rec 0U, // FRSP 0U, // FRSP_rec 0U, // FRSQRTE 0U, // FRSQRTES 0U, // FRSQRTES_rec 0U, // FRSQRTE_rec 518U, // FSELD 518U, // FSELD_rec 518U, // FSELS 518U, // FSELS_rec 0U, // FSQRT 0U, // FSQRTS 0U, // FSQRTS_rec 0U, // FSQRT_rec 70U, // FSUB 70U, // FSUBS 70U, // FSUBS_rec 70U, // FSUB_rec 70U, // FTDIV 0U, // FTSQRT 0U, // GETtlsADDR 0U, // GETtlsADDR32 0U, // GETtlsADDR32AIX 0U, // GETtlsADDR64AIX 0U, // GETtlsADDRPCREL 0U, // GETtlsldADDR 0U, // GETtlsldADDR32 0U, // GETtlsldADDRPCREL 0U, // HASHCHK 0U, // HASHCHK8 0U, // HASHCHKP 0U, // HASHCHKP8 0U, // HASHST 0U, // HASHST8 0U, // HASHSTP 0U, // HASHSTP8 0U, // HRFID 0U, // ICBI 0U, // ICBIEP 0U, // ICBLC 0U, // ICBLQ 0U, // ICBT 0U, // ICBTLS 0U, // ICCCI 518U, // ISEL 518U, // ISEL8 0U, // ISYNC 0U, // LA 0U, // LA8 0U, // LBARX 1U, // LBARXL 0U, // LBEPX 0U, // LBZ 0U, // LBZ8 70U, // LBZCIX 0U, // LBZU 0U, // LBZU8 0U, // LBZUX 0U, // LBZUX8 0U, // LBZX 0U, // LBZX8 70U, // LBZXTLS 70U, // LBZXTLS_ 70U, // LBZXTLS_32 0U, // LD 0U, // LDARX 1U, // LDARXL 66U, // LDAT 0U, // LDBRX 70U, // LDCIX 0U, // LDU 0U, // LDUX 0U, // LDX 70U, // LDXTLS 70U, // LDXTLS_ 0U, // LDgotTprelL 0U, // LDgotTprelL32 0U, // LDtoc 0U, // LDtocBA 0U, // LDtocCPT 0U, // LDtocJTI 0U, // LDtocL 0U, // LFD 0U, // LFDEPX 0U, // LFDU 0U, // LFDUX 0U, // LFDX 0U, // LFIWAX 0U, // LFIWZX 0U, // LFS 0U, // LFSU 0U, // LFSUX 0U, // LFSX 0U, // LHA 0U, // LHA8 0U, // LHARX 1U, // LHARXL 0U, // LHAU 0U, // LHAU8 0U, // LHAUX 0U, // LHAUX8 0U, // LHAX 0U, // LHAX8 0U, // LHBRX 0U, // LHBRX8 0U, // LHEPX 0U, // LHZ 0U, // LHZ8 70U, // LHZCIX 0U, // LHZU 0U, // LHZU8 0U, // LHZUX 0U, // LHZUX8 0U, // LHZX 0U, // LHZX8 70U, // LHZXTLS 70U, // LHZXTLS_ 70U, // LHZXTLS_32 0U, // LI 0U, // LI8 0U, // LIS 0U, // LIS8 0U, // LMW 0U, // LQ 0U, // LQARX 1U, // LQARXL 0U, // LQX_PSEUDO 66U, // LSWI 0U, // LVEBX 0U, // LVEHX 0U, // LVEWX 0U, // LVSL 0U, // LVSR 0U, // LVX 0U, // LVXL 0U, // LWA 0U, // LWARX 1U, // LWARXL 66U, // LWAT 0U, // LWAUX 0U, // LWAX 0U, // LWAX_32 0U, // LWA_32 0U, // LWBRX 0U, // LWBRX8 0U, // LWEPX 0U, // LWZ 0U, // LWZ8 70U, // LWZCIX 0U, // LWZU 0U, // LWZU8 0U, // LWZUX 0U, // LWZUX8 0U, // LWZX 0U, // LWZX8 70U, // LWZXTLS 70U, // LWZXTLS_ 70U, // LWZXTLS_32 0U, // LWZtoc 0U, // LWZtocL 0U, // LXSD 0U, // LXSDX 0U, // LXSIBZX 0U, // LXSIHZX 0U, // LXSIWAX 0U, // LXSIWZX 0U, // LXSSP 0U, // LXSSPX 0U, // LXV 0U, // LXVB16X 0U, // LXVD2X 0U, // LXVDSX 0U, // LXVH8X 0U, // LXVKQ 70U, // LXVL 70U, // LXVLL 0U, // LXVP 70U, // LXVPRL 70U, // LXVPRLL 0U, // LXVPX 0U, // LXVRBX 0U, // LXVRDX 0U, // LXVRHX 70U, // LXVRL 70U, // LXVRLL 0U, // LXVRWX 0U, // LXVW4X 0U, // LXVWSX 0U, // LXVX 518U, // MADDHD 518U, // MADDHDU 518U, // MADDLD 518U, // MADDLD8 0U, // MBAR 0U, // MCRF 0U, // MCRFS 0U, // MCRXRX 0U, // MFBHRBE 0U, // MFCR 0U, // MFCR8 0U, // MFCTR 0U, // MFCTR8 0U, // MFDCR 0U, // MFFS 0U, // MFFSCDRN 0U, // MFFSCDRNI 0U, // MFFSCE 0U, // MFFSCRN 0U, // MFFSCRNI 0U, // MFFSL 0U, // MFFS_rec 0U, // MFLR 0U, // MFLR8 0U, // MFMSR 0U, // MFOCRF 0U, // MFOCRF8 0U, // MFPMR 0U, // MFSPR 0U, // MFSPR8 0U, // MFSR 0U, // MFSRIN 0U, // MFTB 0U, // MFTB8 0U, // MFUDSCR 0U, // MFVRD 0U, // MFVRSAVE 0U, // MFVRSAVEv 0U, // MFVRWZ 0U, // MFVSCR 0U, // MFVSRD 0U, // MFVSRLD 0U, // MFVSRWZ 70U, // MODSD 70U, // MODSW 70U, // MODUD 70U, // MODUW 0U, // MSGSYNC 0U, // MSYNC 0U, // MTCRF 0U, // MTCRF8 0U, // MTCTR 0U, // MTCTR8 0U, // MTCTR8loop 0U, // MTCTRloop 0U, // MTDCR 0U, // MTFSB0 0U, // MTFSB1 522U, // MTFSF 0U, // MTFSFI 0U, // MTFSFI_rec 0U, // MTFSFIb 522U, // MTFSF_rec 0U, // MTFSFb 0U, // MTLR 0U, // MTLR8 0U, // MTMSR 0U, // MTMSRD 0U, // MTOCRF 0U, // MTOCRF8 0U, // MTPMR 0U, // MTSPR 0U, // MTSPR8 0U, // MTSR 0U, // MTSRIN 0U, // MTUDSCR 0U, // MTVRD 0U, // MTVRSAVE 0U, // MTVRSAVEv 0U, // MTVRWA 0U, // MTVRWZ 0U, // MTVSCR 0U, // MTVSRBM 0U, // MTVSRBMI 0U, // MTVSRD 70U, // MTVSRDD 0U, // MTVSRDM 0U, // MTVSRHM 0U, // MTVSRQM 0U, // MTVSRWA 0U, // MTVSRWM 0U, // MTVSRWS 0U, // MTVSRWZ 70U, // MULHD 70U, // MULHDU 70U, // MULHDU_rec 70U, // MULHD_rec 70U, // MULHW 70U, // MULHWU 70U, // MULHWU_rec 70U, // MULHW_rec 70U, // MULLD 70U, // MULLDO 70U, // MULLDO_rec 70U, // MULLD_rec 4U, // MULLI 4U, // MULLI8 70U, // MULLW 70U, // MULLWO 70U, // MULLWO_rec 70U, // MULLW_rec 0U, // MoveGOTtoLR 0U, // MovePCtoLR 0U, // MovePCtoLR8 70U, // NAND 70U, // NAND8 70U, // NAND8_rec 70U, // NAND_rec 0U, // NAP 0U, // NEG 0U, // NEG8 0U, // NEG8O 0U, // NEG8O_rec 0U, // NEG8_rec 0U, // NEGO 0U, // NEGO_rec 0U, // NEG_rec 0U, // NOP 0U, // NOP_GT_PWR6 0U, // NOP_GT_PWR7 70U, // NOR 70U, // NOR8 70U, // NOR8_rec 70U, // NOR_rec 70U, // OR 70U, // OR8 70U, // OR8_rec 70U, // ORC 70U, // ORC8 70U, // ORC8_rec 70U, // ORC_rec 8U, // ORI 8U, // ORI8 8U, // ORIS 8U, // ORIS8 70U, // OR_rec 20U, // PADDI 20U, // PADDI8 0U, // PADDI8pc 0U, // PADDIdtprel 0U, // PADDIpc 70U, // PDEPD 70U, // PEXTD 0U, // PLBZ 0U, // PLBZ8 0U, // PLBZ8pc 0U, // PLBZpc 0U, // PLD 0U, // PLDpc 0U, // PLFD 0U, // PLFDpc 0U, // PLFS 0U, // PLFSpc 0U, // PLHA 0U, // PLHA8 0U, // PLHA8pc 0U, // PLHApc 0U, // PLHZ 0U, // PLHZ8 0U, // PLHZ8pc 0U, // PLHZpc 0U, // PLI 0U, // PLI8 0U, // PLWA 0U, // PLWA8 0U, // PLWA8pc 0U, // PLWApc 0U, // PLWZ 0U, // PLWZ8 0U, // PLWZ8pc 0U, // PLWZpc 0U, // PLXSD 0U, // PLXSDpc 0U, // PLXSSP 0U, // PLXSSPpc 0U, // PLXV 0U, // PLXVP 0U, // PLXVPpc 0U, // PLXVpc 5382U, // PMXVBF16GER2 26134U, // PMXVBF16GER2NN 26134U, // PMXVBF16GER2NP 26134U, // PMXVBF16GER2PN 26134U, // PMXVBF16GER2PP 5382U, // PMXVBF16GER2W 26134U, // PMXVBF16GER2WNN 26134U, // PMXVBF16GER2WNP 26134U, // PMXVBF16GER2WPN 26134U, // PMXVBF16GER2WPP 5382U, // PMXVF16GER2 26134U, // PMXVF16GER2NN 26134U, // PMXVF16GER2NP 26134U, // PMXVF16GER2PN 26134U, // PMXVF16GER2PP 5382U, // PMXVF16GER2W 26134U, // PMXVF16GER2WNN 26134U, // PMXVF16GER2WNP 26134U, // PMXVF16GER2WPN 26134U, // PMXVF16GER2WPP 5382U, // PMXVF32GER 42518U, // PMXVF32GERNN 42518U, // PMXVF32GERNP 42518U, // PMXVF32GERPN 42518U, // PMXVF32GERPP 5382U, // PMXVF32GERW 42518U, // PMXVF32GERWNN 42518U, // PMXVF32GERWNP 42518U, // PMXVF32GERWPN 42518U, // PMXVF32GERWPP 54534U, // PMXVF64GER 13846U, // PMXVF64GERNN 13846U, // PMXVF64GERNP 13846U, // PMXVF64GERPN 13846U, // PMXVF64GERPP 54534U, // PMXVF64GERW 13846U, // PMXVF64GERWNN 13846U, // PMXVF64GERWNP 13846U, // PMXVF64GERWPN 13846U, // PMXVF64GERWPP 5382U, // PMXVI16GER2 26134U, // PMXVI16GER2PP 5382U, // PMXVI16GER2S 26134U, // PMXVI16GER2SPP 5382U, // PMXVI16GER2SW 26134U, // PMXVI16GER2SWPP 5382U, // PMXVI16GER2W 26134U, // PMXVI16GER2WPP 5382U, // PMXVI4GER8 26134U, // PMXVI4GER8PP 5382U, // PMXVI4GER8W 26134U, // PMXVI4GER8WPP 5382U, // PMXVI8GER4 26134U, // PMXVI8GER4PP 26134U, // PMXVI8GER4SPP 5382U, // PMXVI8GER4W 26134U, // PMXVI8GER4WPP 26134U, // PMXVI8GER4WSPP 0U, // POPCNTB 0U, // POPCNTB8 0U, // POPCNTD 0U, // POPCNTW 0U, // PPC32GOT 0U, // PPC32PICGOT 0U, // PREPARE_PROBED_ALLOCA_32 0U, // PREPARE_PROBED_ALLOCA_64 0U, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 0U, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 0U, // PROBED_ALLOCA_32 0U, // PROBED_ALLOCA_64 0U, // PROBED_STACKALLOC_32 0U, // PROBED_STACKALLOC_64 0U, // PSC_DCBZL 0U, // PSQ_L 0U, // PSQ_LU 5126U, // PSQ_LUX 5126U, // PSQ_LX 0U, // PSQ_ST 0U, // PSQ_STU 5126U, // PSQ_STUX 5126U, // PSQ_STX 0U, // PSTB 0U, // PSTB8 0U, // PSTB8pc 0U, // PSTBpc 0U, // PSTD 0U, // PSTDpc 0U, // PSTFD 0U, // PSTFDpc 0U, // PSTFS 0U, // PSTFSpc 0U, // PSTH 0U, // PSTH8 0U, // PSTH8pc 0U, // PSTHpc 0U, // PSTW 0U, // PSTW8 0U, // PSTW8pc 0U, // PSTWpc 0U, // PSTXSD 0U, // PSTXSDpc 0U, // PSTXSSP 0U, // PSTXSSPpc 0U, // PSTXV 0U, // PSTXVP 0U, // PSTXVPpc 0U, // PSTXVpc 0U, // PS_ABS 0U, // PS_ABSo 70U, // PS_ADD 70U, // PS_ADDo 70U, // PS_CMPO0 70U, // PS_CMPO1 70U, // PS_CMPU0 70U, // PS_CMPU1 70U, // PS_DIV 70U, // PS_DIVo 518U, // PS_MADD 518U, // PS_MADDS0 518U, // PS_MADDS0o 518U, // PS_MADDS1 518U, // PS_MADDS1o 518U, // PS_MADDo 70U, // PS_MERGE00 70U, // PS_MERGE00o 70U, // PS_MERGE01 70U, // PS_MERGE01o 70U, // PS_MERGE10 70U, // PS_MERGE10o 70U, // PS_MERGE11 70U, // PS_MERGE11o 0U, // PS_MR 0U, // PS_MRo 518U, // PS_MSUB 518U, // PS_MSUBo 70U, // PS_MUL 70U, // PS_MULS0 70U, // PS_MULS0o 70U, // PS_MULS1 70U, // PS_MULS1o 70U, // PS_MULo 0U, // PS_NABS 0U, // PS_NABSo 0U, // PS_NEG 0U, // PS_NEGo 518U, // PS_NMADD 518U, // PS_NMADDo 518U, // PS_NMSUB 518U, // PS_NMSUBo 0U, // PS_RES 0U, // PS_RESo 0U, // PS_RSQRTE 0U, // PS_RSQRTEo 518U, // PS_SEL 518U, // PS_SELo 70U, // PS_SUB 70U, // PS_SUBo 518U, // PS_SUM0 518U, // PS_SUM0o 518U, // PS_SUM1 518U, // PS_SUM1o 0U, // PseudoEIEIO 774U, // QVALIGNI 774U, // QVALIGNIb 774U, // QVALIGNIs 14U, // QVESPLATI 14U, // QVESPLATIb 14U, // QVESPLATIs 0U, // QVFABS 0U, // QVFABSs 70U, // QVFADD 70U, // QVFADDS 70U, // QVFADDSs 0U, // QVFCFID 0U, // QVFCFIDS 0U, // QVFCFIDU 0U, // QVFCFIDUS 0U, // QVFCFIDb 70U, // QVFCMPEQ 70U, // QVFCMPEQb 70U, // QVFCMPEQbs 70U, // QVFCMPGT 70U, // QVFCMPGTb 70U, // QVFCMPGTbs 70U, // QVFCMPLT 70U, // QVFCMPLTb 70U, // QVFCMPLTbs 70U, // QVFCPSGN 70U, // QVFCPSGNs 0U, // QVFCTID 0U, // QVFCTIDU 0U, // QVFCTIDUZ 0U, // QVFCTIDZ 0U, // QVFCTIDb 0U, // QVFCTIW 0U, // QVFCTIWU 0U, // QVFCTIWUZ 0U, // QVFCTIWZ 1798U, // QVFLOGICAL 1798U, // QVFLOGICALb 1798U, // QVFLOGICALs 518U, // QVFMADD 2070U, // QVFMADDS 518U, // QVFMADDSs 0U, // QVFMR 0U, // QVFMRb 0U, // QVFMRs 518U, // QVFMSUB 2070U, // QVFMSUBS 518U, // QVFMSUBSs 70U, // QVFMUL 70U, // QVFMULS 70U, // QVFMULSs 0U, // QVFNABS 0U, // QVFNABSs 0U, // QVFNEG 0U, // QVFNEGs 518U, // QVFNMADD 2070U, // QVFNMADDS 518U, // QVFNMADDSs 518U, // QVFNMSUB 2070U, // QVFNMSUBS 518U, // QVFNMSUBSs 518U, // QVFPERM 518U, // QVFPERMs 0U, // QVFRE 0U, // QVFRES 0U, // QVFRESs 0U, // QVFRIM 0U, // QVFRIMs 0U, // QVFRIN 0U, // QVFRINs 0U, // QVFRIP 0U, // QVFRIPs 0U, // QVFRIZ 0U, // QVFRIZs 0U, // QVFRSP 0U, // QVFRSPs 0U, // QVFRSQRTE 0U, // QVFRSQRTES 0U, // QVFRSQRTESs 2070U, // QVFSEL 2070U, // QVFSELb 2070U, // QVFSELbb 2070U, // QVFSELbs 70U, // QVFSUB 70U, // QVFSUBS 70U, // QVFSUBSs 70U, // QVFTSTNAN 70U, // QVFTSTNANb 70U, // QVFTSTNANbs 2070U, // QVFXMADD 2070U, // QVFXMADDS 70U, // QVFXMUL 70U, // QVFXMULS 2070U, // QVFXXCPNMADD 2070U, // QVFXXCPNMADDS 2070U, // QVFXXMADD 2070U, // QVFXXMADDS 2070U, // QVFXXNPMADD 2070U, // QVFXXNPMADDS 0U, // QVGPCI 0U, // QVLFCDUX 0U, // QVLFCDUXA 0U, // QVLFCDX 0U, // QVLFCDXA 0U, // QVLFCSUX 0U, // QVLFCSUXA 0U, // QVLFCSX 0U, // QVLFCSXA 0U, // QVLFCSXs 0U, // QVLFDUX 0U, // QVLFDUXA 0U, // QVLFDX 0U, // QVLFDXA 0U, // QVLFDXb 0U, // QVLFIWAX 0U, // QVLFIWAXA 0U, // QVLFIWZX 0U, // QVLFIWZXA 0U, // QVLFSUX 0U, // QVLFSUXA 0U, // QVLFSX 0U, // QVLFSXA 0U, // QVLFSXb 0U, // QVLFSXs 0U, // QVLPCLDX 0U, // QVLPCLSX 0U, // QVLPCLSXint 0U, // QVLPCRDX 0U, // QVLPCRSX 0U, // QVSTFCDUX 0U, // QVSTFCDUXA 0U, // QVSTFCDUXI 0U, // QVSTFCDUXIA 0U, // QVSTFCDX 0U, // QVSTFCDXA 0U, // QVSTFCDXI 0U, // QVSTFCDXIA 0U, // QVSTFCSUX 0U, // QVSTFCSUXA 0U, // QVSTFCSUXI 0U, // QVSTFCSUXIA 0U, // QVSTFCSX 0U, // QVSTFCSXA 0U, // QVSTFCSXI 0U, // QVSTFCSXIA 0U, // QVSTFCSXs 0U, // QVSTFDUX 0U, // QVSTFDUXA 0U, // QVSTFDUXI 0U, // QVSTFDUXIA 0U, // QVSTFDX 0U, // QVSTFDXA 0U, // QVSTFDXI 0U, // QVSTFDXIA 0U, // QVSTFDXb 0U, // QVSTFIWX 0U, // QVSTFIWXA 0U, // QVSTFSUX 0U, // QVSTFSUXA 0U, // QVSTFSUXI 0U, // QVSTFSUXIA 0U, // QVSTFSUXs 0U, // QVSTFSX 0U, // QVSTFSXA 0U, // QVSTFSXI 0U, // QVSTFSXIA 0U, // QVSTFSXs 0U, // RESTORE_ACC 0U, // RESTORE_CR 0U, // RESTORE_CRBIT 0U, // RESTORE_QUADWORD 0U, // RESTORE_UACC 0U, // RESTORE_WACC 0U, // RFCI 0U, // RFDI 0U, // RFEBB 0U, // RFI 0U, // RFID 0U, // RFMCI 6U, // RLDCL 6U, // RLDCL_rec 6U, // RLDCR 6U, // RLDCR_rec 0U, // RLDIC 0U, // RLDICL 0U, // RLDICL_32 0U, // RLDICL_32_64 0U, // RLDICL_32_rec 0U, // RLDICL_rec 0U, // RLDICR 0U, // RLDICR_32 0U, // RLDICR_rec 0U, // RLDIC_rec 24U, // RLDIMI 24U, // RLDIMI_rec 26U, // RLWIMI 26U, // RLWIMI8 26U, // RLWIMI8_rec 26U, // RLWIMI_rec 20738U, // RLWINM 20738U, // RLWINM8 20738U, // RLWINM8_rec 20738U, // RLWINM_rec 20742U, // RLWNM 20742U, // RLWNM8 20742U, // RLWNM8_rec 20742U, // RLWNM_rec 0U, // ReadTB 0U, // SC 0U, // SELECT_CC_F16 0U, // SELECT_CC_F4 0U, // SELECT_CC_F8 0U, // SELECT_CC_I4 0U, // SELECT_CC_I8 0U, // SELECT_CC_QBRC 0U, // SELECT_CC_QFRC 0U, // SELECT_CC_QSRC 0U, // SELECT_CC_SPE 0U, // SELECT_CC_SPE4 0U, // SELECT_CC_VRRC 0U, // SELECT_CC_VSFRC 0U, // SELECT_CC_VSRC 0U, // SELECT_CC_VSSRC 0U, // SELECT_F16 0U, // SELECT_F4 0U, // SELECT_F8 0U, // SELECT_I4 0U, // SELECT_I8 0U, // SELECT_QBRC 0U, // SELECT_QFRC 0U, // SELECT_QSRC 0U, // SELECT_SPE 0U, // SELECT_SPE4 0U, // SELECT_VRRC 0U, // SELECT_VSFRC 0U, // SELECT_VSRC 0U, // SELECT_VSSRC 0U, // SETB 0U, // SETB8 0U, // SETBC 0U, // SETBC8 0U, // SETBCR 0U, // SETBCR8 0U, // SETFLM 0U, // SETNBC 0U, // SETNBC8 0U, // SETNBCR 0U, // SETNBCR8 0U, // SETRND 0U, // SETRNDi 0U, // SLBFEE_rec 0U, // SLBIA 0U, // SLBIE 0U, // SLBIEG 0U, // SLBMFEE 0U, // SLBMFEV 0U, // SLBMTE 0U, // SLBSYNC 70U, // SLD 70U, // SLD_rec 70U, // SLW 70U, // SLW8 70U, // SLW8_rec 70U, // SLW_rec 0U, // SPELWZ 0U, // SPELWZX 0U, // SPESTW 0U, // SPESTWX 0U, // SPILL_ACC 0U, // SPILL_CR 0U, // SPILL_CRBIT 0U, // SPILL_QUADWORD 0U, // SPILL_UACC 0U, // SPILL_WACC 0U, // SPLIT_QUADWORD 70U, // SRAD 64U, // SRADI 64U, // SRADI_32 64U, // SRADI_rec 70U, // SRAD_rec 70U, // SRAW 66U, // SRAWI 66U, // SRAWI_rec 70U, // SRAW_rec 70U, // SRD 70U, // SRD_rec 70U, // SRW 70U, // SRW8 70U, // SRW8_rec 70U, // SRW_rec 0U, // STB 0U, // STB8 70U, // STBCIX 0U, // STBCX 0U, // STBEPX 0U, // STBU 0U, // STBU8 0U, // STBUX 0U, // STBUX8 0U, // STBX 0U, // STBX8 70U, // STBXTLS 70U, // STBXTLS_ 70U, // STBXTLS_32 0U, // STD 66U, // STDAT 0U, // STDBRX 70U, // STDCIX 0U, // STDCX 0U, // STDU 0U, // STDUX 0U, // STDX 70U, // STDXTLS 70U, // STDXTLS_ 0U, // STFD 0U, // STFDEPX 0U, // STFDU 0U, // STFDUX 0U, // STFDX 0U, // STFIWX 0U, // STFS 0U, // STFSU 0U, // STFSUX 0U, // STFSX 0U, // STH 0U, // STH8 0U, // STHBRX 70U, // STHCIX 0U, // STHCX 0U, // STHEPX 0U, // STHU 0U, // STHU8 0U, // STHUX 0U, // STHUX8 0U, // STHX 0U, // STHX8 70U, // STHXTLS 70U, // STHXTLS_ 70U, // STHXTLS_32 0U, // STMW 0U, // STOP 0U, // STQ 0U, // STQCX 0U, // STQX_PSEUDO 66U, // STSWI 0U, // STVEBX 0U, // STVEHX 0U, // STVEWX 0U, // STVX 0U, // STVXL 0U, // STW 0U, // STW8 66U, // STWAT 0U, // STWBRX 70U, // STWCIX 0U, // STWCX 0U, // STWEPX 0U, // STWU 0U, // STWU8 0U, // STWUX 0U, // STWUX8 0U, // STWX 0U, // STWX8 70U, // STWXTLS 70U, // STWXTLS_ 70U, // STWXTLS_32 0U, // STXSD 0U, // STXSDX 0U, // STXSIBX 0U, // STXSIBXv 0U, // STXSIHX 0U, // STXSIHXv 0U, // STXSIWX 0U, // STXSSP 0U, // STXSSPX 0U, // STXV 0U, // STXVB16X 0U, // STXVD2X 0U, // STXVH8X 70U, // STXVL 70U, // STXVLL 0U, // STXVP 70U, // STXVPRL 70U, // STXVPRLL 0U, // STXVPX 0U, // STXVRBX 0U, // STXVRDX 0U, // STXVRHX 70U, // STXVRL 70U, // STXVRLL 0U, // STXVRWX 0U, // STXVW4X 0U, // STXVX 70U, // SUBF 70U, // SUBF8 70U, // SUBF8O 70U, // SUBF8O_rec 70U, // SUBF8_rec 70U, // SUBFC 70U, // SUBFC8 70U, // SUBFC8O 70U, // SUBFC8O_rec 70U, // SUBFC8_rec 70U, // SUBFCO 70U, // SUBFCO_rec 70U, // SUBFC_rec 70U, // SUBFE 70U, // SUBFE8 70U, // SUBFE8O 70U, // SUBFE8O_rec 70U, // SUBFE8_rec 70U, // SUBFEO 70U, // SUBFEO_rec 70U, // SUBFE_rec 4U, // SUBFIC 4U, // SUBFIC8 0U, // SUBFME 0U, // SUBFME8 0U, // SUBFME8O 0U, // SUBFME8O_rec 0U, // SUBFME8_rec 0U, // SUBFMEO 0U, // SUBFMEO_rec 0U, // SUBFME_rec 70U, // SUBFO 70U, // SUBFO_rec 0U, // SUBFUS 0U, // SUBFUS_rec 0U, // SUBFZE 0U, // SUBFZE8 0U, // SUBFZE8O 0U, // SUBFZE8O_rec 0U, // SUBFZE8_rec 0U, // SUBFZEO 0U, // SUBFZEO_rec 0U, // SUBFZE_rec 70U, // SUBF_rec 0U, // SYNC 0U, // TABORT 70U, // TABORTDC 66U, // TABORTDCI 70U, // TABORTWC 66U, // TABORTWCI 0U, // TAILB 0U, // TAILB8 0U, // TAILBA 0U, // TAILBA8 0U, // TAILBCTR 0U, // TAILBCTR8 0U, // TBEGIN 0U, // TBEGIN_RET 0U, // TCHECK 0U, // TCHECK_RET 0U, // TCRETURNai 0U, // TCRETURNai8 0U, // TCRETURNdi 0U, // TCRETURNdi8 0U, // TCRETURNri 0U, // TCRETURNri8 70U, // TD 4U, // TDI 0U, // TEND 0U, // TLBIA 0U, // TLBIE 0U, // TLBIEL 0U, // TLBIVAX 0U, // TLBLD 0U, // TLBLI 0U, // TLBRE 70U, // TLBRE2 0U, // TLBSX 70U, // TLBSX2 70U, // TLBSX2D 0U, // TLBSYNC 0U, // TLBWE 70U, // TLBWE2 0U, // TLSGDAIX 0U, // TLSGDAIX8 0U, // TRAP 0U, // TRECHKPT 0U, // TRECLAIM 0U, // TSR 70U, // TW 4U, // TWI 0U, // UNENCODED_NOP 0U, // UpdateGBR 70U, // VABSDUB 70U, // VABSDUH 70U, // VABSDUW 70U, // VADDCUQ 70U, // VADDCUW 518U, // VADDECUQ 518U, // VADDEUQM 70U, // VADDFP 70U, // VADDSBS 70U, // VADDSHS 70U, // VADDSWS 70U, // VADDUBM 70U, // VADDUBS 70U, // VADDUDM 70U, // VADDUHM 70U, // VADDUHS 70U, // VADDUQM 70U, // VADDUWM 70U, // VADDUWS 70U, // VAND 70U, // VANDC 70U, // VAVGSB 70U, // VAVGSH 70U, // VAVGSW 70U, // VAVGUB 70U, // VAVGUH 70U, // VAVGUW 70U, // VBPERMD 70U, // VBPERMQ 28U, // VCFSX 1U, // VCFSX_0 70U, // VCFUGED 28U, // VCFUX 1U, // VCFUX_0 70U, // VCIPHER 70U, // VCIPHERLAST 70U, // VCLRLB 70U, // VCLRRB 0U, // VCLZB 0U, // VCLZD 70U, // VCLZDM 0U, // VCLZH 0U, // VCLZLSBB 0U, // VCLZW 70U, // VCMPBFP 70U, // VCMPBFP_rec 70U, // VCMPEQFP 70U, // VCMPEQFP_rec 70U, // VCMPEQUB 70U, // VCMPEQUB_rec 70U, // VCMPEQUD 70U, // VCMPEQUD_rec 70U, // VCMPEQUH 70U, // VCMPEQUH_rec 70U, // VCMPEQUQ 70U, // VCMPEQUQ_rec 70U, // VCMPEQUW 70U, // VCMPEQUW_rec 70U, // VCMPGEFP 70U, // VCMPGEFP_rec 70U, // VCMPGTFP 70U, // VCMPGTFP_rec 70U, // VCMPGTSB 70U, // VCMPGTSB_rec 70U, // VCMPGTSD 70U, // VCMPGTSD_rec 70U, // VCMPGTSH 70U, // VCMPGTSH_rec 70U, // VCMPGTSQ 70U, // VCMPGTSQ_rec 70U, // VCMPGTSW 70U, // VCMPGTSW_rec 70U, // VCMPGTUB 70U, // VCMPGTUB_rec 70U, // VCMPGTUD 70U, // VCMPGTUD_rec 70U, // VCMPGTUH 70U, // VCMPGTUH_rec 70U, // VCMPGTUQ 70U, // VCMPGTUQ_rec 70U, // VCMPGTUW 70U, // VCMPGTUW_rec 70U, // VCMPNEB 70U, // VCMPNEB_rec 70U, // VCMPNEH 70U, // VCMPNEH_rec 70U, // VCMPNEW 70U, // VCMPNEW_rec 70U, // VCMPNEZB 70U, // VCMPNEZB_rec 70U, // VCMPNEZH 70U, // VCMPNEZH_rec 70U, // VCMPNEZW 70U, // VCMPNEZW_rec 70U, // VCMPSQ 70U, // VCMPUQ 74U, // VCNTMBB 74U, // VCNTMBD 74U, // VCNTMBH 74U, // VCNTMBW 28U, // VCTSXS 1U, // VCTSXS_0 28U, // VCTUXS 1U, // VCTUXS_0 0U, // VCTZB 0U, // VCTZD 70U, // VCTZDM 0U, // VCTZH 0U, // VCTZLSBB 0U, // VCTZW 70U, // VDIVESD 70U, // VDIVESQ 70U, // VDIVESW 70U, // VDIVEUD 70U, // VDIVEUQ 70U, // VDIVEUW 70U, // VDIVSD 70U, // VDIVSQ 70U, // VDIVSW 70U, // VDIVUD 70U, // VDIVUQ 70U, // VDIVUW 70U, // VEQV 0U, // VEXPANDBM 0U, // VEXPANDDM 0U, // VEXPANDHM 0U, // VEXPANDQM 0U, // VEXPANDWM 0U, // VEXPTEFP 518U, // VEXTDDVLX 518U, // VEXTDDVRX 518U, // VEXTDUBVLX 518U, // VEXTDUBVRX 518U, // VEXTDUHVLX 518U, // VEXTDUHVRX 518U, // VEXTDUWVLX 518U, // VEXTDUWVRX 0U, // VEXTRACTBM 30U, // VEXTRACTD 0U, // VEXTRACTDM 0U, // VEXTRACTHM 0U, // VEXTRACTQM 30U, // VEXTRACTUB 30U, // VEXTRACTUH 30U, // VEXTRACTUW 0U, // VEXTRACTWM 0U, // VEXTSB2D 0U, // VEXTSB2Ds 0U, // VEXTSB2W 0U, // VEXTSB2Ws 0U, // VEXTSD2Q 0U, // VEXTSH2D 0U, // VEXTSH2Ds 0U, // VEXTSH2W 0U, // VEXTSH2Ws 0U, // VEXTSW2D 0U, // VEXTSW2Ds 70U, // VEXTUBLX 70U, // VEXTUBRX 70U, // VEXTUHLX 70U, // VEXTUHRX 70U, // VEXTUWLX 70U, // VEXTUWRX 0U, // VGBBD 32U, // VGNB 86U, // VINSBLX 86U, // VINSBRX 86U, // VINSBVLX 86U, // VINSBVRX 0U, // VINSD 86U, // VINSDLX 86U, // VINSDRX 0U, // VINSERTB 30U, // VINSERTD 0U, // VINSERTH 30U, // VINSERTW 86U, // VINSHLX 86U, // VINSHRX 86U, // VINSHVLX 86U, // VINSHVRX 0U, // VINSW 86U, // VINSWLX 86U, // VINSWRX 86U, // VINSWVLX 86U, // VINSWVRX 0U, // VLOGEFP 518U, // VMADDFP 70U, // VMAXFP 70U, // VMAXSB 70U, // VMAXSD 70U, // VMAXSH 70U, // VMAXSW 70U, // VMAXUB 70U, // VMAXUD 70U, // VMAXUH 70U, // VMAXUW 518U, // VMHADDSHS 518U, // VMHRADDSHS 70U, // VMINFP 70U, // VMINSB 70U, // VMINSD 70U, // VMINSH 70U, // VMINSW 70U, // VMINUB 70U, // VMINUD 70U, // VMINUH 70U, // VMINUW 518U, // VMLADDUHM 70U, // VMODSD 70U, // VMODSQ 70U, // VMODSW 70U, // VMODUD 70U, // VMODUQ 70U, // VMODUW 70U, // VMRGEW 70U, // VMRGHB 70U, // VMRGHH 70U, // VMRGHW 70U, // VMRGLB 70U, // VMRGLH 70U, // VMRGLW 70U, // VMRGOW 518U, // VMSUMCUD 518U, // VMSUMMBM 518U, // VMSUMSHM 518U, // VMSUMSHS 518U, // VMSUMUBM 518U, // VMSUMUDM 518U, // VMSUMUHM 518U, // VMSUMUHS 0U, // VMUL10CUQ 70U, // VMUL10ECUQ 70U, // VMUL10EUQ 0U, // VMUL10UQ 70U, // VMULESB 70U, // VMULESD 70U, // VMULESH 70U, // VMULESW 70U, // VMULEUB 70U, // VMULEUD 70U, // VMULEUH 70U, // VMULEUW 70U, // VMULHSD 70U, // VMULHSW 70U, // VMULHUD 70U, // VMULHUW 70U, // VMULLD 70U, // VMULOSB 70U, // VMULOSD 70U, // VMULOSH 70U, // VMULOSW 70U, // VMULOUB 70U, // VMULOUD 70U, // VMULOUH 70U, // VMULOUW 70U, // VMULUWM 70U, // VNAND 70U, // VNCIPHER 70U, // VNCIPHERLAST 0U, // VNEGD 0U, // VNEGW 518U, // VNMSUBFP 70U, // VNOR 70U, // VOR 70U, // VORC 70U, // VPDEPD 518U, // VPERM 518U, // VPERMR 518U, // VPERMXOR 70U, // VPEXTD 70U, // VPKPX 70U, // VPKSDSS 70U, // VPKSDUS 70U, // VPKSHSS 70U, // VPKSHUS 70U, // VPKSWSS 70U, // VPKSWUS 70U, // VPKUDUM 70U, // VPKUDUS 70U, // VPKUHUM 70U, // VPKUHUS 70U, // VPKUWUM 70U, // VPKUWUS 70U, // VPMSUMB 70U, // VPMSUMD 70U, // VPMSUMH 70U, // VPMSUMW 0U, // VPOPCNTB 0U, // VPOPCNTD 0U, // VPOPCNTH 0U, // VPOPCNTW 0U, // VPRTYBD 0U, // VPRTYBQ 0U, // VPRTYBW 0U, // VREFP 0U, // VRFIM 0U, // VRFIN 0U, // VRFIP 0U, // VRFIZ 70U, // VRLB 70U, // VRLD 70U, // VRLDMI 70U, // VRLDNM 70U, // VRLH 70U, // VRLQ 70U, // VRLQMI 70U, // VRLQNM 70U, // VRLW 70U, // VRLWMI 70U, // VRLWNM 0U, // VRSQRTEFP 0U, // VSBOX 518U, // VSEL 1290U, // VSHASIGMAD 1290U, // VSHASIGMAW 70U, // VSL 70U, // VSLB 70U, // VSLD 2310U, // VSLDBI 1286U, // VSLDOI 70U, // VSLH 70U, // VSLO 70U, // VSLQ 70U, // VSLV 70U, // VSLW 28U, // VSPLTB 28U, // VSPLTBs 28U, // VSPLTH 28U, // VSPLTHs 0U, // VSPLTISB 0U, // VSPLTISH 0U, // VSPLTISW 28U, // VSPLTW 70U, // VSR 70U, // VSRAB 70U, // VSRAD 70U, // VSRAH 70U, // VSRAQ 70U, // VSRAW 70U, // VSRB 70U, // VSRD 2310U, // VSRDBI 70U, // VSRH 70U, // VSRO 70U, // VSRQ 70U, // VSRV 70U, // VSRW 0U, // VSTRIBL 0U, // VSTRIBL_rec 0U, // VSTRIBR 0U, // VSTRIBR_rec 0U, // VSTRIHL 0U, // VSTRIHL_rec 0U, // VSTRIHR 0U, // VSTRIHR_rec 70U, // VSUBCUQ 70U, // VSUBCUW 518U, // VSUBECUQ 518U, // VSUBEUQM 70U, // VSUBFP 70U, // VSUBSBS 70U, // VSUBSHS 70U, // VSUBSWS 70U, // VSUBUBM 70U, // VSUBUBS 70U, // VSUBUDM 70U, // VSUBUHM 70U, // VSUBUHS 70U, // VSUBUQM 70U, // VSUBUWM 70U, // VSUBUWS 70U, // VSUM2SWS 70U, // VSUM4SBS 70U, // VSUM4SHS 70U, // VSUM4UBS 70U, // VSUMSWS 0U, // VUPKHPX 0U, // VUPKHSB 0U, // VUPKHSH 0U, // VUPKHSW 0U, // VUPKLPX 0U, // VUPKLSB 0U, // VUPKLSH 0U, // VUPKLSW 70U, // VXOR 12U, // V_SET0 12U, // V_SET0B 12U, // V_SET0H 0U, // V_SETALLONES 0U, // V_SETALLONESB 0U, // V_SETALLONESH 0U, // WAIT 0U, // WRTEE 0U, // WRTEEI 70U, // XOR 70U, // XOR8 70U, // XOR8_rec 8U, // XORI 8U, // XORI8 8U, // XORIS 8U, // XORIS8 70U, // XOR_rec 0U, // XSABSDP 0U, // XSABSQP 70U, // XSADDDP 70U, // XSADDQP 70U, // XSADDQPO 70U, // XSADDSP 70U, // XSCMPEQDP 70U, // XSCMPEQQP 70U, // XSCMPEXPDP 70U, // XSCMPEXPQP 70U, // XSCMPGEDP 70U, // XSCMPGEQP 70U, // XSCMPGTDP 70U, // XSCMPGTQP 70U, // XSCMPODP 70U, // XSCMPOQP 70U, // XSCMPUDP 70U, // XSCMPUQP 70U, // XSCPSGNDP 70U, // XSCPSGNQP 0U, // XSCVDPHP 0U, // XSCVDPQP 0U, // XSCVDPSP 0U, // XSCVDPSPN 0U, // XSCVDPSXDS 0U, // XSCVDPSXDSs 0U, // XSCVDPSXWS 0U, // XSCVDPSXWSs 0U, // XSCVDPUXDS 0U, // XSCVDPUXDSs 0U, // XSCVDPUXWS 0U, // XSCVDPUXWSs 0U, // XSCVHPDP 0U, // XSCVQPDP 0U, // XSCVQPDPO 0U, // XSCVQPSDZ 0U, // XSCVQPSQZ 0U, // XSCVQPSWZ 0U, // XSCVQPUDZ 0U, // XSCVQPUQZ 0U, // XSCVQPUWZ 0U, // XSCVSDQP 0U, // XSCVSPDP 0U, // XSCVSPDPN 0U, // XSCVSQQP 0U, // XSCVSXDDP 0U, // XSCVSXDSP 0U, // XSCVUDQP 0U, // XSCVUQQP 0U, // XSCVUXDDP 0U, // XSCVUXDSP 70U, // XSDIVDP 70U, // XSDIVQP 70U, // XSDIVQPO 70U, // XSDIVSP 70U, // XSIEXPDP 70U, // XSIEXPQP 86U, // XSMADDADP 86U, // XSMADDASP 86U, // XSMADDMDP 86U, // XSMADDMSP 86U, // XSMADDQP 86U, // XSMADDQPO 70U, // XSMAXCDP 70U, // XSMAXCQP 70U, // XSMAXDP 70U, // XSMAXJDP 70U, // XSMINCDP 70U, // XSMINCQP 70U, // XSMINDP 70U, // XSMINJDP 86U, // XSMSUBADP 86U, // XSMSUBASP 86U, // XSMSUBMDP 86U, // XSMSUBMSP 86U, // XSMSUBQP 86U, // XSMSUBQPO 70U, // XSMULDP 70U, // XSMULQP 70U, // XSMULQPO 70U, // XSMULSP 0U, // XSNABSDP 0U, // XSNABSDPs 0U, // XSNABSQP 0U, // XSNEGDP 0U, // XSNEGQP 86U, // XSNMADDADP 86U, // XSNMADDASP 86U, // XSNMADDMDP 86U, // XSNMADDMSP 86U, // XSNMADDQP 86U, // XSNMADDQPO 86U, // XSNMSUBADP 86U, // XSNMSUBASP 86U, // XSNMSUBMDP 86U, // XSNMSUBMSP 86U, // XSNMSUBQP 86U, // XSNMSUBQPO 0U, // XSRDPI 0U, // XSRDPIC 0U, // XSRDPIM 0U, // XSRDPIP 0U, // XSRDPIZ 0U, // XSREDP 0U, // XSRESP 0U, // XSRQPI 0U, // XSRQPIX 0U, // XSRQPXP 0U, // XSRSP 0U, // XSRSQRTEDP 0U, // XSRSQRTESP 0U, // XSSQRTDP 0U, // XSSQRTQP 0U, // XSSQRTQPO 0U, // XSSQRTSP 70U, // XSSUBDP 70U, // XSSUBQP 70U, // XSSUBQPO 70U, // XSSUBSP 70U, // XSTDIVDP 0U, // XSTSQRTDP 34U, // XSTSTDCDP 34U, // XSTSTDCQP 34U, // XSTSTDCSP 0U, // XSXEXPDP 0U, // XSXEXPQP 0U, // XSXSIGDP 0U, // XSXSIGQP 0U, // XVABSDP 0U, // XVABSSP 70U, // XVADDDP 70U, // XVADDSP 70U, // XVBF16GER2 86U, // XVBF16GER2NN 86U, // XVBF16GER2NP 86U, // XVBF16GER2PN 86U, // XVBF16GER2PP 70U, // XVBF16GER2W 86U, // XVBF16GER2WNN 86U, // XVBF16GER2WNP 86U, // XVBF16GER2WPN 86U, // XVBF16GER2WPP 70U, // XVCMPEQDP 70U, // XVCMPEQDP_rec 70U, // XVCMPEQSP 70U, // XVCMPEQSP_rec 70U, // XVCMPGEDP 70U, // XVCMPGEDP_rec 70U, // XVCMPGESP 70U, // XVCMPGESP_rec 70U, // XVCMPGTDP 70U, // XVCMPGTDP_rec 70U, // XVCMPGTSP 70U, // XVCMPGTSP_rec 70U, // XVCPSGNDP 70U, // XVCPSGNSP 0U, // XVCVBF16SPN 0U, // XVCVDPSP 0U, // XVCVDPSXDS 0U, // XVCVDPSXWS 0U, // XVCVDPUXDS 0U, // XVCVDPUXWS 0U, // XVCVHPSP 0U, // XVCVSPBF16 0U, // XVCVSPDP 0U, // XVCVSPHP 0U, // XVCVSPSXDS 0U, // XVCVSPSXWS 0U, // XVCVSPUXDS 0U, // XVCVSPUXWS 0U, // XVCVSXDDP 0U, // XVCVSXDSP 0U, // XVCVSXWDP 0U, // XVCVSXWSP 0U, // XVCVUXDDP 0U, // XVCVUXDSP 0U, // XVCVUXWDP 0U, // XVCVUXWSP 70U, // XVDIVDP 70U, // XVDIVSP 70U, // XVF16GER2 86U, // XVF16GER2NN 86U, // XVF16GER2NP 86U, // XVF16GER2PN 86U, // XVF16GER2PP 70U, // XVF16GER2W 86U, // XVF16GER2WNN 86U, // XVF16GER2WNP 86U, // XVF16GER2WPN 86U, // XVF16GER2WPP 70U, // XVF32GER 86U, // XVF32GERNN 86U, // XVF32GERNP 86U, // XVF32GERPN 86U, // XVF32GERPP 70U, // XVF32GERW 86U, // XVF32GERWNN 86U, // XVF32GERWNP 86U, // XVF32GERWPN 86U, // XVF32GERWPP 70U, // XVF64GER 86U, // XVF64GERNN 86U, // XVF64GERNP 86U, // XVF64GERPN 86U, // XVF64GERPP 70U, // XVF64GERW 86U, // XVF64GERWNN 86U, // XVF64GERWNP 86U, // XVF64GERWPN 86U, // XVF64GERWPP 70U, // XVI16GER2 86U, // XVI16GER2PP 70U, // XVI16GER2S 86U, // XVI16GER2SPP 70U, // XVI16GER2SW 86U, // XVI16GER2SWPP 70U, // XVI16GER2W 86U, // XVI16GER2WPP 70U, // XVI4GER8 86U, // XVI4GER8PP 70U, // XVI4GER8W 86U, // XVI4GER8WPP 70U, // XVI8GER4 86U, // XVI8GER4PP 86U, // XVI8GER4SPP 70U, // XVI8GER4W 86U, // XVI8GER4WPP 86U, // XVI8GER4WSPP 70U, // XVIEXPDP 70U, // XVIEXPSP 86U, // XVMADDADP 86U, // XVMADDASP 86U, // XVMADDMDP 86U, // XVMADDMSP 70U, // XVMAXDP 70U, // XVMAXSP 70U, // XVMINDP 70U, // XVMINSP 86U, // XVMSUBADP 86U, // XVMSUBASP 86U, // XVMSUBMDP 86U, // XVMSUBMSP 70U, // XVMULDP 70U, // XVMULSP 0U, // XVNABSDP 0U, // XVNABSSP 0U, // XVNEGDP 0U, // XVNEGSP 86U, // XVNMADDADP 86U, // XVNMADDASP 86U, // XVNMADDMDP 86U, // XVNMADDMSP 86U, // XVNMSUBADP 86U, // XVNMSUBASP 86U, // XVNMSUBMDP 86U, // XVNMSUBMSP 0U, // XVRDPI 0U, // XVRDPIC 0U, // XVRDPIM 0U, // XVRDPIP 0U, // XVRDPIZ 0U, // XVREDP 0U, // XVRESP 0U, // XVRSPI 0U, // XVRSPIC 0U, // XVRSPIM 0U, // XVRSPIP 0U, // XVRSPIZ 0U, // XVRSQRTEDP 0U, // XVRSQRTESP 0U, // XVSQRTDP 0U, // XVSQRTSP 70U, // XVSUBDP 70U, // XVSUBSP 70U, // XVTDIVDP 70U, // XVTDIVSP 0U, // XVTLSBB 0U, // XVTSQRTDP 0U, // XVTSQRTSP 34U, // XVTSTDCDP 34U, // XVTSTDCSP 0U, // XVXEXPDP 0U, // XVXEXPSP 0U, // XVXSIGDP 0U, // XVXSIGSP 518U, // XXBLENDVB 518U, // XXBLENDVD 518U, // XXBLENDVH 518U, // XXBLENDVW 0U, // XXBRD 0U, // XXBRH 0U, // XXBRQ 0U, // XXBRW 37382U, // XXEVAL 36U, // XXEXTRACTUW 38U, // XXGENPCVBM 38U, // XXGENPCVDM 38U, // XXGENPCVHM 38U, // XXGENPCVWM 40U, // XXINSERTW 70U, // XXLAND 70U, // XXLANDC 70U, // XXLEQV 12U, // XXLEQVOnes 70U, // XXLNAND 70U, // XXLNOR 70U, // XXLOR 70U, // XXLORC 70U, // XXLORf 70U, // XXLXOR 12U, // XXLXORdpz 12U, // XXLXORspz 12U, // XXLXORz 0U, // XXMFACC 0U, // XXMFACCW 70U, // XXMRGHW 70U, // XXMRGLW 0U, // XXMTACC 0U, // XXMTACCW 86U, // XXPERM 774U, // XXPERMDI 2578U, // XXPERMDIs 86U, // XXPERMR 4614U, // XXPERMX 518U, // XXSEL 0U, // XXSETACCZ 0U, // XXSETACCZW 774U, // XXSLDWI 2578U, // XXSLDWIs 86U, // XXSPLTI32DX 0U, // XXSPLTIB 0U, // XXSPLTIDP 0U, // XXSPLTIW 14U, // XXSPLTW 14U, // XXSPLTWs 42U, // gBC 44U, // gBCA 0U, // gBCAat 70U, // gBCCTR 70U, // gBCCTRL 42U, // gBCL 44U, // gBCLA 0U, // gBCLAat 70U, // gBCLR 70U, // gBCLRL 0U, // gBCLat 0U, // gBCat }; static const uint8_t OpInfo2[] = { 0U, // PHI 0U, // INLINEASM 0U, // INLINEASM_BR 0U, // CFI_INSTRUCTION 0U, // EH_LABEL 0U, // GC_LABEL 0U, // ANNOTATION_LABEL 0U, // KILL 0U, // EXTRACT_SUBREG 0U, // INSERT_SUBREG 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS 0U, // DBG_VALUE 0U, // DBG_VALUE_LIST 0U, // DBG_INSTR_REF 0U, // DBG_PHI 0U, // DBG_LABEL 0U, // REG_SEQUENCE 0U, // COPY 0U, // BUNDLE 0U, // LIFETIME_START 0U, // LIFETIME_END 0U, // PSEUDO_PROBE 0U, // ARITH_FENCE 0U, // STACKMAP 0U, // FENTRY_CALL 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // PREALLOCATED_SETUP 0U, // PREALLOCATED_ARG 0U, // STATEPOINT 0U, // LOCAL_ESCAPE 0U, // FAULTING_OP 0U, // PATCHABLE_OP 0U, // PATCHABLE_FUNCTION_ENTER 0U, // PATCHABLE_RET 0U, // PATCHABLE_FUNCTION_EXIT 0U, // PATCHABLE_TAIL_CALL 0U, // PATCHABLE_EVENT_CALL 0U, // PATCHABLE_TYPED_EVENT_CALL 0U, // ICALL_BRANCH_FUNNEL 0U, // MEMBARRIER 0U, // G_ASSERT_SEXT 0U, // G_ASSERT_ZEXT 0U, // G_ASSERT_ALIGN 0U, // G_ADD 0U, // G_SUB 0U, // G_MUL 0U, // G_SDIV 0U, // G_UDIV 0U, // G_SREM 0U, // G_UREM 0U, // G_SDIVREM 0U, // G_UDIVREM 0U, // G_AND 0U, // G_OR 0U, // G_XOR 0U, // G_IMPLICIT_DEF 0U, // G_PHI 0U, // G_FRAME_INDEX 0U, // G_GLOBAL_VALUE 0U, // G_EXTRACT 0U, // G_UNMERGE_VALUES 0U, // G_INSERT 0U, // G_MERGE_VALUES 0U, // G_BUILD_VECTOR 0U, // G_BUILD_VECTOR_TRUNC 0U, // G_CONCAT_VECTORS 0U, // G_PTRTOINT 0U, // G_INTTOPTR 0U, // G_BITCAST 0U, // G_FREEZE 0U, // G_INTRINSIC_FPTRUNC_ROUND 0U, // G_INTRINSIC_TRUNC 0U, // G_INTRINSIC_ROUND 0U, // G_INTRINSIC_LRINT 0U, // G_INTRINSIC_ROUNDEVEN 0U, // G_READCYCLECOUNTER 0U, // G_LOAD 0U, // G_SEXTLOAD 0U, // G_ZEXTLOAD 0U, // G_INDEXED_LOAD 0U, // G_INDEXED_SEXTLOAD 0U, // G_INDEXED_ZEXTLOAD 0U, // G_STORE 0U, // G_INDEXED_STORE 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS 0U, // G_ATOMIC_CMPXCHG 0U, // G_ATOMICRMW_XCHG 0U, // G_ATOMICRMW_ADD 0U, // G_ATOMICRMW_SUB 0U, // G_ATOMICRMW_AND 0U, // G_ATOMICRMW_NAND 0U, // G_ATOMICRMW_OR 0U, // G_ATOMICRMW_XOR 0U, // G_ATOMICRMW_MAX 0U, // G_ATOMICRMW_MIN 0U, // G_ATOMICRMW_UMAX 0U, // G_ATOMICRMW_UMIN 0U, // G_ATOMICRMW_FADD 0U, // G_ATOMICRMW_FSUB 0U, // G_ATOMICRMW_FMAX 0U, // G_ATOMICRMW_FMIN 0U, // G_ATOMICRMW_UINC_WRAP 0U, // G_ATOMICRMW_UDEC_WRAP 0U, // G_FENCE 0U, // G_BRCOND 0U, // G_BRINDIRECT 0U, // G_INVOKE_REGION_START 0U, // G_INTRINSIC 0U, // G_INTRINSIC_W_SIDE_EFFECTS 0U, // G_ANYEXT 0U, // G_TRUNC 0U, // G_CONSTANT 0U, // G_FCONSTANT 0U, // G_VASTART 0U, // G_VAARG 0U, // G_SEXT 0U, // G_SEXT_INREG 0U, // G_ZEXT 0U, // G_SHL 0U, // G_LSHR 0U, // G_ASHR 0U, // G_FSHL 0U, // G_FSHR 0U, // G_ROTR 0U, // G_ROTL 0U, // G_ICMP 0U, // G_FCMP 0U, // G_SELECT 0U, // G_UADDO 0U, // G_UADDE 0U, // G_USUBO 0U, // G_USUBE 0U, // G_SADDO 0U, // G_SADDE 0U, // G_SSUBO 0U, // G_SSUBE 0U, // G_UMULO 0U, // G_SMULO 0U, // G_UMULH 0U, // G_SMULH 0U, // G_UADDSAT 0U, // G_SADDSAT 0U, // G_USUBSAT 0U, // G_SSUBSAT 0U, // G_USHLSAT 0U, // G_SSHLSAT 0U, // G_SMULFIX 0U, // G_UMULFIX 0U, // G_SMULFIXSAT 0U, // G_UMULFIXSAT 0U, // G_SDIVFIX 0U, // G_UDIVFIX 0U, // G_SDIVFIXSAT 0U, // G_UDIVFIXSAT 0U, // G_FADD 0U, // G_FSUB 0U, // G_FMUL 0U, // G_FMA 0U, // G_FMAD 0U, // G_FDIV 0U, // G_FREM 0U, // G_FPOW 0U, // G_FPOWI 0U, // G_FEXP 0U, // G_FEXP2 0U, // G_FLOG 0U, // G_FLOG2 0U, // G_FLOG10 0U, // G_FNEG 0U, // G_FPEXT 0U, // G_FPTRUNC 0U, // G_FPTOSI 0U, // G_FPTOUI 0U, // G_SITOFP 0U, // G_UITOFP 0U, // G_FABS 0U, // G_FCOPYSIGN 0U, // G_IS_FPCLASS 0U, // G_FCANONICALIZE 0U, // G_FMINNUM 0U, // G_FMAXNUM 0U, // G_FMINNUM_IEEE 0U, // G_FMAXNUM_IEEE 0U, // G_FMINIMUM 0U, // G_FMAXIMUM 0U, // G_PTR_ADD 0U, // G_PTRMASK 0U, // G_SMIN 0U, // G_SMAX 0U, // G_UMIN 0U, // G_UMAX 0U, // G_ABS 0U, // G_LROUND 0U, // G_LLROUND 0U, // G_BR 0U, // G_BRJT 0U, // G_INSERT_VECTOR_ELT 0U, // G_EXTRACT_VECTOR_ELT 0U, // G_SHUFFLE_VECTOR 0U, // G_CTTZ 0U, // G_CTTZ_ZERO_UNDEF 0U, // G_CTLZ 0U, // G_CTLZ_ZERO_UNDEF 0U, // G_CTPOP 0U, // G_BSWAP 0U, // G_BITREVERSE 0U, // G_FCEIL 0U, // G_FCOS 0U, // G_FSIN 0U, // G_FSQRT 0U, // G_FFLOOR 0U, // G_FRINT 0U, // G_FNEARBYINT 0U, // G_ADDRSPACE_CAST 0U, // G_BLOCK_ADDR 0U, // G_JUMP_TABLE 0U, // G_DYN_STACKALLOC 0U, // G_STRICT_FADD 0U, // G_STRICT_FSUB 0U, // G_STRICT_FMUL 0U, // G_STRICT_FDIV 0U, // G_STRICT_FREM 0U, // G_STRICT_FMA 0U, // G_STRICT_FSQRT 0U, // G_READ_REGISTER 0U, // G_WRITE_REGISTER 0U, // G_MEMCPY 0U, // G_MEMCPY_INLINE 0U, // G_MEMMOVE 0U, // G_MEMSET 0U, // G_BZERO 0U, // G_VECREDUCE_SEQ_FADD 0U, // G_VECREDUCE_SEQ_FMUL 0U, // G_VECREDUCE_FADD 0U, // G_VECREDUCE_FMUL 0U, // G_VECREDUCE_FMAX 0U, // G_VECREDUCE_FMIN 0U, // G_VECREDUCE_ADD 0U, // G_VECREDUCE_MUL 0U, // G_VECREDUCE_AND 0U, // G_VECREDUCE_OR 0U, // G_VECREDUCE_XOR 0U, // G_VECREDUCE_SMAX 0U, // G_VECREDUCE_SMIN 0U, // G_VECREDUCE_UMAX 0U, // G_VECREDUCE_UMIN 0U, // G_SBFX 0U, // G_UBFX 0U, // ATOMIC_CMP_SWAP_I128 0U, // ATOMIC_LOAD_ADD_I128 0U, // ATOMIC_LOAD_AND_I128 0U, // ATOMIC_LOAD_NAND_I128 0U, // ATOMIC_LOAD_OR_I128 0U, // ATOMIC_LOAD_SUB_I128 0U, // ATOMIC_LOAD_XOR_I128 0U, // ATOMIC_SWAP_I128 0U, // BUILD_QUADWORD 0U, // BUILD_UACC 0U, // CFENCE8 0U, // CLRLSLDI 0U, // CLRLSLDI_rec 0U, // CLRLSLWI 0U, // CLRLSLWI_rec 0U, // CLRRDI 0U, // CLRRDI_rec 0U, // CLRRWI 0U, // CLRRWI_rec 0U, // DCBFL 0U, // DCBFLP 0U, // DCBFPS 0U, // DCBFx 0U, // DCBSTPS 0U, // DCBTCT 0U, // DCBTDS 0U, // DCBTSTCT 0U, // DCBTSTDS 0U, // DCBTSTT 0U, // DCBTSTx 0U, // DCBTT 0U, // DCBTx 0U, // DFLOADf32 0U, // DFLOADf64 0U, // DFSTOREf32 0U, // DFSTOREf64 0U, // EXTLDI 0U, // EXTLDI_rec 0U, // EXTLWI 0U, // EXTLWI_rec 0U, // EXTRDI 0U, // EXTRDI_rec 0U, // EXTRWI 0U, // EXTRWI_rec 0U, // INSLWI 0U, // INSLWI_rec 0U, // INSRDI 0U, // INSRDI_rec 0U, // INSRWI 0U, // INSRWI_rec 0U, // KILL_PAIR 0U, // LAx 0U, // LIWAX 0U, // LIWZX 0U, // RLWIMIbm 0U, // RLWIMIbm_rec 0U, // RLWINMbm 0U, // RLWINMbm_rec 0U, // RLWNMbm 0U, // RLWNMbm_rec 0U, // ROTRDI 0U, // ROTRDI_rec 0U, // ROTRWI 0U, // ROTRWI_rec 0U, // SLDI 0U, // SLDI_rec 0U, // SLWI 0U, // SLWI_rec 0U, // SPILLTOVSR_LD 0U, // SPILLTOVSR_LDX 0U, // SPILLTOVSR_ST 0U, // SPILLTOVSR_STX 0U, // SRDI 0U, // SRDI_rec 0U, // SRWI 0U, // SRWI_rec 0U, // STIWX 0U, // SUBI 0U, // SUBIC 0U, // SUBIC_rec 0U, // SUBIS 0U, // SUBPCIS 0U, // XFLOADf32 0U, // XFLOADf64 0U, // XFSTOREf32 0U, // XFSTOREf64 0U, // ADD4 0U, // ADD4O 0U, // ADD4O_rec 0U, // ADD4TLS 0U, // ADD4_rec 0U, // ADD8 0U, // ADD8O 0U, // ADD8O_rec 0U, // ADD8TLS 0U, // ADD8TLS_ 0U, // ADD8_rec 0U, // ADDC 0U, // ADDC8 0U, // ADDC8O 0U, // ADDC8O_rec 0U, // ADDC8_rec 0U, // ADDCO 0U, // ADDCO_rec 0U, // ADDC_rec 0U, // ADDE 0U, // ADDE8 0U, // ADDE8O 0U, // ADDE8O_rec 0U, // ADDE8_rec 0U, // ADDEO 0U, // ADDEO_rec 0U, // ADDEX 0U, // ADDEX8 0U, // ADDE_rec 0U, // ADDI 0U, // ADDI8 0U, // ADDIC 0U, // ADDIC8 0U, // ADDIC_rec 0U, // ADDIS 0U, // ADDIS8 0U, // ADDISdtprelHA 0U, // ADDISdtprelHA32 0U, // ADDISgotTprelHA 0U, // ADDIStlsgdHA 0U, // ADDIStlsldHA 0U, // ADDIStocHA 0U, // ADDIStocHA8 0U, // ADDIdtprelL 0U, // ADDIdtprelL32 0U, // ADDItlsgdL 0U, // ADDItlsgdL32 0U, // ADDItlsgdLADDR 0U, // ADDItlsgdLADDR32 0U, // ADDItlsldL 0U, // ADDItlsldL32 0U, // ADDItlsldLADDR 0U, // ADDItlsldLADDR32 0U, // ADDItoc 0U, // ADDItoc8 0U, // ADDItocL 0U, // ADDME 0U, // ADDME8 0U, // ADDME8O 0U, // ADDME8O_rec 0U, // ADDME8_rec 0U, // ADDMEO 0U, // ADDMEO_rec 0U, // ADDME_rec 0U, // ADDPCIS 0U, // ADDZE 0U, // ADDZE8 0U, // ADDZE8O 0U, // ADDZE8O_rec 0U, // ADDZE8_rec 0U, // ADDZEO 0U, // ADDZEO_rec 0U, // ADDZE_rec 0U, // ADJCALLSTACKDOWN 0U, // ADJCALLSTACKUP 0U, // AND 0U, // AND8 0U, // AND8_rec 0U, // ANDC 0U, // ANDC8 0U, // ANDC8_rec 0U, // ANDC_rec 0U, // ANDI8_rec 0U, // ANDIS8_rec 0U, // ANDIS_rec 0U, // ANDI_rec 0U, // ANDI_rec_1_EQ_BIT 0U, // ANDI_rec_1_EQ_BIT8 0U, // ANDI_rec_1_GT_BIT 0U, // ANDI_rec_1_GT_BIT8 0U, // AND_rec 0U, // ATOMIC_CMP_SWAP_I16 0U, // ATOMIC_CMP_SWAP_I32 0U, // ATOMIC_CMP_SWAP_I64 0U, // ATOMIC_CMP_SWAP_I8 0U, // ATOMIC_LOAD_ADD_I16 0U, // ATOMIC_LOAD_ADD_I32 0U, // ATOMIC_LOAD_ADD_I64 0U, // ATOMIC_LOAD_ADD_I8 0U, // ATOMIC_LOAD_AND_I16 0U, // ATOMIC_LOAD_AND_I32 0U, // ATOMIC_LOAD_AND_I64 0U, // ATOMIC_LOAD_AND_I8 0U, // ATOMIC_LOAD_MAX_I16 0U, // ATOMIC_LOAD_MAX_I32 0U, // ATOMIC_LOAD_MAX_I64 0U, // ATOMIC_LOAD_MAX_I8 0U, // ATOMIC_LOAD_MIN_I16 0U, // ATOMIC_LOAD_MIN_I32 0U, // ATOMIC_LOAD_MIN_I64 0U, // ATOMIC_LOAD_MIN_I8 0U, // ATOMIC_LOAD_NAND_I16 0U, // ATOMIC_LOAD_NAND_I32 0U, // ATOMIC_LOAD_NAND_I64 0U, // ATOMIC_LOAD_NAND_I8 0U, // ATOMIC_LOAD_OR_I16 0U, // ATOMIC_LOAD_OR_I32 0U, // ATOMIC_LOAD_OR_I64 0U, // ATOMIC_LOAD_OR_I8 0U, // ATOMIC_LOAD_SUB_I16 0U, // ATOMIC_LOAD_SUB_I32 0U, // ATOMIC_LOAD_SUB_I64 0U, // ATOMIC_LOAD_SUB_I8 0U, // ATOMIC_LOAD_UMAX_I16 0U, // ATOMIC_LOAD_UMAX_I32 0U, // ATOMIC_LOAD_UMAX_I64 0U, // ATOMIC_LOAD_UMAX_I8 0U, // ATOMIC_LOAD_UMIN_I16 0U, // ATOMIC_LOAD_UMIN_I32 0U, // ATOMIC_LOAD_UMIN_I64 0U, // ATOMIC_LOAD_UMIN_I8 0U, // ATOMIC_LOAD_XOR_I16 0U, // ATOMIC_LOAD_XOR_I32 0U, // ATOMIC_LOAD_XOR_I64 0U, // ATOMIC_LOAD_XOR_I8 0U, // ATOMIC_SWAP_I16 0U, // ATOMIC_SWAP_I32 0U, // ATOMIC_SWAP_I64 0U, // ATOMIC_SWAP_I8 0U, // ATTN 0U, // B 0U, // BA 0U, // BC 0U, // BCC 0U, // BCCA 0U, // BCCCTR 0U, // BCCCTR8 0U, // BCCCTRL 0U, // BCCCTRL8 0U, // BCCL 0U, // BCCLA 0U, // BCCLR 0U, // BCCLRL 0U, // BCCTR 0U, // BCCTR8 0U, // BCCTR8n 0U, // BCCTRL 0U, // BCCTRL8 0U, // BCCTRL8n 0U, // BCCTRLn 0U, // BCCTRn 0U, // BCDADD_rec 0U, // BCDCFN_rec 0U, // BCDCFSQ_rec 0U, // BCDCFZ_rec 0U, // BCDCPSGN_rec 0U, // BCDCTN_rec 0U, // BCDCTSQ_rec 0U, // BCDCTZ_rec 0U, // BCDSETSGN_rec 0U, // BCDSR_rec 0U, // BCDSUB_rec 0U, // BCDS_rec 0U, // BCDTRUNC_rec 0U, // BCDUS_rec 0U, // BCDUTRUNC_rec 0U, // BCL 0U, // BCLR 0U, // BCLRL 0U, // BCLRLn 0U, // BCLRn 0U, // BCLalways 0U, // BCLn 0U, // BCTR 0U, // BCTR8 0U, // BCTRL 0U, // BCTRL8 0U, // BCTRL8_LDinto_toc 0U, // BCTRL8_LDinto_toc_RM 0U, // BCTRL8_RM 0U, // BCTRL_LWZinto_toc 0U, // BCTRL_LWZinto_toc_RM 0U, // BCTRL_RM 0U, // BCn 0U, // BL 0U, // BL8 0U, // BL8_NOP 0U, // BL8_NOP_RM 0U, // BL8_NOP_TLS 0U, // BL8_NOTOC 0U, // BL8_NOTOC_RM 0U, // BL8_NOTOC_TLS 0U, // BL8_RM 0U, // BL8_TLS 0U, // BL8_TLS_ 0U, // BLA 0U, // BLA8 0U, // BLA8_NOP 0U, // BLA8_NOP_RM 0U, // BLA8_RM 0U, // BLA_RM 0U, // BLR 0U, // BLR8 0U, // BLRL 0U, // BL_NOP 0U, // BL_NOP_RM 0U, // BL_RM 0U, // BL_TLS 0U, // BPERMD 0U, // BRD 0U, // BRH 0U, // BRH8 0U, // BRINC 0U, // BRW 0U, // BRW8 0U, // CFUGED 0U, // CLRBHRB 0U, // CMPB 0U, // CMPB8 0U, // CMPD 0U, // CMPDI 0U, // CMPEQB 0U, // CMPLD 0U, // CMPLDI 0U, // CMPLW 0U, // CMPLWI 0U, // CMPRB 0U, // CMPRB8 0U, // CMPW 0U, // CMPWI 0U, // CNTLZD 0U, // CNTLZDM 0U, // CNTLZD_rec 0U, // CNTLZW 0U, // CNTLZW8 0U, // CNTLZW8_rec 0U, // CNTLZW_rec 0U, // CNTTZD 0U, // CNTTZDM 0U, // CNTTZD_rec 0U, // CNTTZW 0U, // CNTTZW8 0U, // CNTTZW8_rec 0U, // CNTTZW_rec 0U, // CP_ABORT 0U, // CP_COPY 0U, // CP_COPY8 0U, // CP_PASTE8_rec 0U, // CP_PASTE_rec 0U, // CR6SET 0U, // CR6UNSET 0U, // CRAND 0U, // CRANDC 0U, // CREQV 0U, // CRNAND 0U, // CRNOR 0U, // CRNOT 0U, // CROR 0U, // CRORC 0U, // CRSET 0U, // CRUNSET 0U, // CRXOR 0U, // CTRL_DEP 0U, // DARN 0U, // DCBA 0U, // DCBF 0U, // DCBFEP 0U, // DCBI 0U, // DCBST 0U, // DCBSTEP 0U, // DCBT 0U, // DCBTEP 0U, // DCBTST 0U, // DCBTSTEP 0U, // DCBZ 0U, // DCBZEP 0U, // DCBZL 0U, // DCBZLEP 0U, // DCCCI 0U, // DIVD 0U, // DIVDE 0U, // DIVDEO 0U, // DIVDEO_rec 0U, // DIVDEU 0U, // DIVDEUO 0U, // DIVDEUO_rec 0U, // DIVDEU_rec 0U, // DIVDE_rec 0U, // DIVDO 0U, // DIVDO_rec 0U, // DIVDU 0U, // DIVDUO 0U, // DIVDUO_rec 0U, // DIVDU_rec 0U, // DIVD_rec 0U, // DIVW 0U, // DIVWE 0U, // DIVWEO 0U, // DIVWEO_rec 0U, // DIVWEU 0U, // DIVWEUO 0U, // DIVWEUO_rec 0U, // DIVWEU_rec 0U, // DIVWE_rec 0U, // DIVWO 0U, // DIVWO_rec 0U, // DIVWU 0U, // DIVWUO 0U, // DIVWUO_rec 0U, // DIVWU_rec 0U, // DIVW_rec 0U, // DMMR 0U, // DMSETDMRZ 0U, // DMXOR 0U, // DMXXEXTFDMR256 0U, // DMXXEXTFDMR512 0U, // DMXXEXTFDMR512_HI 0U, // DMXXINSTFDMR256 0U, // DMXXINSTFDMR512 0U, // DMXXINSTFDMR512_HI 0U, // DSS 0U, // DSSALL 0U, // DST 0U, // DST64 0U, // DSTST 0U, // DSTST64 0U, // DSTSTT 0U, // DSTSTT64 0U, // DSTT 0U, // DSTT64 0U, // DYNALLOC 0U, // DYNALLOC8 0U, // DYNAREAOFFSET 0U, // DYNAREAOFFSET8 0U, // DecreaseCTR8loop 0U, // DecreaseCTRloop 0U, // EFDABS 0U, // EFDADD 0U, // EFDCFS 0U, // EFDCFSF 0U, // EFDCFSI 0U, // EFDCFSID 0U, // EFDCFUF 0U, // EFDCFUI 0U, // EFDCFUID 0U, // EFDCMPEQ 0U, // EFDCMPGT 0U, // EFDCMPLT 0U, // EFDCTSF 0U, // EFDCTSI 0U, // EFDCTSIDZ 0U, // EFDCTSIZ 0U, // EFDCTUF 0U, // EFDCTUI 0U, // EFDCTUIDZ 0U, // EFDCTUIZ 0U, // EFDDIV 0U, // EFDMUL 0U, // EFDNABS 0U, // EFDNEG 0U, // EFDSUB 0U, // EFDTSTEQ 0U, // EFDTSTGT 0U, // EFDTSTLT 0U, // EFSABS 0U, // EFSADD 0U, // EFSCFD 0U, // EFSCFSF 0U, // EFSCFSI 0U, // EFSCFUF 0U, // EFSCFUI 0U, // EFSCMPEQ 0U, // EFSCMPGT 0U, // EFSCMPLT 0U, // EFSCTSF 0U, // EFSCTSI 0U, // EFSCTSIZ 0U, // EFSCTUF 0U, // EFSCTUI 0U, // EFSCTUIZ 0U, // EFSDIV 0U, // EFSMUL 0U, // EFSNABS 0U, // EFSNEG 0U, // EFSSUB 0U, // EFSTSTEQ 0U, // EFSTSTGT 0U, // EFSTSTLT 0U, // EH_SjLj_LongJmp32 0U, // EH_SjLj_LongJmp64 0U, // EH_SjLj_SetJmp32 0U, // EH_SjLj_SetJmp64 0U, // EH_SjLj_Setup 0U, // EQV 0U, // EQV8 0U, // EQV8_rec 0U, // EQV_rec 0U, // EVABS 0U, // EVADDIW 0U, // EVADDSMIAAW 0U, // EVADDSSIAAW 0U, // EVADDUMIAAW 0U, // EVADDUSIAAW 0U, // EVADDW 0U, // EVAND 0U, // EVANDC 0U, // EVCMPEQ 0U, // EVCMPGTS 0U, // EVCMPGTU 0U, // EVCMPLTS 0U, // EVCMPLTU 0U, // EVCNTLSW 0U, // EVCNTLZW 0U, // EVDIVWS 0U, // EVDIVWU 0U, // EVEQV 0U, // EVEXTSB 0U, // EVEXTSH 0U, // EVFSABS 0U, // EVFSADD 0U, // EVFSCFSF 0U, // EVFSCFSI 0U, // EVFSCFUF 0U, // EVFSCFUI 0U, // EVFSCMPEQ 0U, // EVFSCMPGT 0U, // EVFSCMPLT 0U, // EVFSCTSF 0U, // EVFSCTSI 0U, // EVFSCTSIZ 0U, // EVFSCTUF 0U, // EVFSCTUI 0U, // EVFSCTUIZ 0U, // EVFSDIV 0U, // EVFSMUL 0U, // EVFSNABS 0U, // EVFSNEG 0U, // EVFSSUB 0U, // EVFSTSTEQ 0U, // EVFSTSTGT 0U, // EVFSTSTLT 0U, // EVLDD 0U, // EVLDDX 0U, // EVLDH 0U, // EVLDHX 0U, // EVLDW 0U, // EVLDWX 0U, // EVLHHESPLAT 0U, // EVLHHESPLATX 0U, // EVLHHOSSPLAT 0U, // EVLHHOSSPLATX 0U, // EVLHHOUSPLAT 0U, // EVLHHOUSPLATX 0U, // EVLWHE 0U, // EVLWHEX 0U, // EVLWHOS 0U, // EVLWHOSX 0U, // EVLWHOU 0U, // EVLWHOUX 0U, // EVLWHSPLAT 0U, // EVLWHSPLATX 0U, // EVLWWSPLAT 0U, // EVLWWSPLATX 0U, // EVMERGEHI 0U, // EVMERGEHILO 0U, // EVMERGELO 0U, // EVMERGELOHI 0U, // EVMHEGSMFAA 0U, // EVMHEGSMFAN 0U, // EVMHEGSMIAA 0U, // EVMHEGSMIAN 0U, // EVMHEGUMIAA 0U, // EVMHEGUMIAN 0U, // EVMHESMF 0U, // EVMHESMFA 0U, // EVMHESMFAAW 0U, // EVMHESMFANW 0U, // EVMHESMI 0U, // EVMHESMIA 0U, // EVMHESMIAAW 0U, // EVMHESMIANW 0U, // EVMHESSF 0U, // EVMHESSFA 0U, // EVMHESSFAAW 0U, // EVMHESSFANW 0U, // EVMHESSIAAW 0U, // EVMHESSIANW 0U, // EVMHEUMI 0U, // EVMHEUMIA 0U, // EVMHEUMIAAW 0U, // EVMHEUMIANW 0U, // EVMHEUSIAAW 0U, // EVMHEUSIANW 0U, // EVMHOGSMFAA 0U, // EVMHOGSMFAN 0U, // EVMHOGSMIAA 0U, // EVMHOGSMIAN 0U, // EVMHOGUMIAA 0U, // EVMHOGUMIAN 0U, // EVMHOSMF 0U, // EVMHOSMFA 0U, // EVMHOSMFAAW 0U, // EVMHOSMFANW 0U, // EVMHOSMI 0U, // EVMHOSMIA 0U, // EVMHOSMIAAW 0U, // EVMHOSMIANW 0U, // EVMHOSSF 0U, // EVMHOSSFA 0U, // EVMHOSSFAAW 0U, // EVMHOSSFANW 0U, // EVMHOSSIAAW 0U, // EVMHOSSIANW 0U, // EVMHOUMI 0U, // EVMHOUMIA 0U, // EVMHOUMIAAW 0U, // EVMHOUMIANW 0U, // EVMHOUSIAAW 0U, // EVMHOUSIANW 0U, // EVMRA 0U, // EVMWHSMF 0U, // EVMWHSMFA 0U, // EVMWHSMI 0U, // EVMWHSMIA 0U, // EVMWHSSF 0U, // EVMWHSSFA 0U, // EVMWHUMI 0U, // EVMWHUMIA 0U, // EVMWLSMIAAW 0U, // EVMWLSMIANW 0U, // EVMWLSSIAAW 0U, // EVMWLSSIANW 0U, // EVMWLUMI 0U, // EVMWLUMIA 0U, // EVMWLUMIAAW 0U, // EVMWLUMIANW 0U, // EVMWLUSIAAW 0U, // EVMWLUSIANW 0U, // EVMWSMF 0U, // EVMWSMFA 0U, // EVMWSMFAA 0U, // EVMWSMFAN 0U, // EVMWSMI 0U, // EVMWSMIA 0U, // EVMWSMIAA 0U, // EVMWSMIAN 0U, // EVMWSSF 0U, // EVMWSSFA 0U, // EVMWSSFAA 0U, // EVMWSSFAN 0U, // EVMWUMI 0U, // EVMWUMIA 0U, // EVMWUMIAA 0U, // EVMWUMIAN 0U, // EVNAND 0U, // EVNEG 0U, // EVNOR 0U, // EVOR 0U, // EVORC 0U, // EVRLW 0U, // EVRLWI 0U, // EVRNDW 0U, // EVSEL 0U, // EVSLW 0U, // EVSLWI 0U, // EVSPLATFI 0U, // EVSPLATI 0U, // EVSRWIS 0U, // EVSRWIU 0U, // EVSRWS 0U, // EVSRWU 0U, // EVSTDD 0U, // EVSTDDX 0U, // EVSTDH 0U, // EVSTDHX 0U, // EVSTDW 0U, // EVSTDWX 0U, // EVSTWHE 0U, // EVSTWHEX 0U, // EVSTWHO 0U, // EVSTWHOX 0U, // EVSTWWE 0U, // EVSTWWEX 0U, // EVSTWWO 0U, // EVSTWWOX 0U, // EVSUBFSMIAAW 0U, // EVSUBFSSIAAW 0U, // EVSUBFUMIAAW 0U, // EVSUBFUSIAAW 0U, // EVSUBFW 0U, // EVSUBIFW 0U, // EVXOR 0U, // EXTSB 0U, // EXTSB8 0U, // EXTSB8_32_64 0U, // EXTSB8_rec 0U, // EXTSB_rec 0U, // EXTSH 0U, // EXTSH8 0U, // EXTSH8_32_64 0U, // EXTSH8_rec 0U, // EXTSH_rec 0U, // EXTSW 0U, // EXTSWSLI 0U, // EXTSWSLI_32_64 0U, // EXTSWSLI_32_64_rec 0U, // EXTSWSLI_rec 0U, // EXTSW_32 0U, // EXTSW_32_64 0U, // EXTSW_32_64_rec 0U, // EXTSW_rec 0U, // EnforceIEIO 0U, // FABSD 0U, // FABSD_rec 0U, // FABSS 0U, // FABSS_rec 0U, // FADD 0U, // FADDS 0U, // FADDS_rec 0U, // FADD_rec 0U, // FADDrtz 0U, // FCFID 0U, // FCFIDS 0U, // FCFIDS_rec 0U, // FCFIDU 0U, // FCFIDUS 0U, // FCFIDUS_rec 0U, // FCFIDU_rec 0U, // FCFID_rec 0U, // FCMPOD 0U, // FCMPOS 0U, // FCMPUD 0U, // FCMPUS 0U, // FCPSGND 0U, // FCPSGND_rec 0U, // FCPSGNS 0U, // FCPSGNS_rec 0U, // FCTID 0U, // FCTIDU 0U, // FCTIDUZ 0U, // FCTIDUZ_rec 0U, // FCTIDU_rec 0U, // FCTIDZ 0U, // FCTIDZ_rec 0U, // FCTID_rec 0U, // FCTIW 0U, // FCTIWU 0U, // FCTIWUZ 0U, // FCTIWUZ_rec 0U, // FCTIWU_rec 0U, // FCTIWZ 0U, // FCTIWZ_rec 0U, // FCTIW_rec 0U, // FDIV 0U, // FDIVS 0U, // FDIVS_rec 0U, // FDIV_rec 0U, // FMADD 0U, // FMADDS 0U, // FMADDS_rec 0U, // FMADD_rec 0U, // FMR 0U, // FMR_rec 0U, // FMSUB 0U, // FMSUBS 0U, // FMSUBS_rec 0U, // FMSUB_rec 0U, // FMUL 0U, // FMULS 0U, // FMULS_rec 0U, // FMUL_rec 0U, // FNABSD 0U, // FNABSD_rec 0U, // FNABSS 0U, // FNABSS_rec 0U, // FNEGD 0U, // FNEGD_rec 0U, // FNEGS 0U, // FNEGS_rec 0U, // FNMADD 0U, // FNMADDS 0U, // FNMADDS_rec 0U, // FNMADD_rec 0U, // FNMSUB 0U, // FNMSUBS 0U, // FNMSUBS_rec 0U, // FNMSUB_rec 0U, // FRE 0U, // FRES 0U, // FRES_rec 0U, // FRE_rec 0U, // FRIMD 0U, // FRIMD_rec 0U, // FRIMS 0U, // FRIMS_rec 0U, // FRIND 0U, // FRIND_rec 0U, // FRINS 0U, // FRINS_rec 0U, // FRIPD 0U, // FRIPD_rec 0U, // FRIPS 0U, // FRIPS_rec 0U, // FRIZD 0U, // FRIZD_rec 0U, // FRIZS 0U, // FRIZS_rec 0U, // FRSP 0U, // FRSP_rec 0U, // FRSQRTE 0U, // FRSQRTES 0U, // FRSQRTES_rec 0U, // FRSQRTE_rec 0U, // FSELD 0U, // FSELD_rec 0U, // FSELS 0U, // FSELS_rec 0U, // FSQRT 0U, // FSQRTS 0U, // FSQRTS_rec 0U, // FSQRT_rec 0U, // FSUB 0U, // FSUBS 0U, // FSUBS_rec 0U, // FSUB_rec 0U, // FTDIV 0U, // FTSQRT 0U, // GETtlsADDR 0U, // GETtlsADDR32 0U, // GETtlsADDR32AIX 0U, // GETtlsADDR64AIX 0U, // GETtlsADDRPCREL 0U, // GETtlsldADDR 0U, // GETtlsldADDR32 0U, // GETtlsldADDRPCREL 0U, // HASHCHK 0U, // HASHCHK8 0U, // HASHCHKP 0U, // HASHCHKP8 0U, // HASHST 0U, // HASHST8 0U, // HASHSTP 0U, // HASHSTP8 0U, // HRFID 0U, // ICBI 0U, // ICBIEP 0U, // ICBLC 0U, // ICBLQ 0U, // ICBT 0U, // ICBTLS 0U, // ICCCI 0U, // ISEL 0U, // ISEL8 0U, // ISYNC 0U, // LA 0U, // LA8 0U, // LBARX 0U, // LBARXL 0U, // LBEPX 0U, // LBZ 0U, // LBZ8 0U, // LBZCIX 0U, // LBZU 0U, // LBZU8 0U, // LBZUX 0U, // LBZUX8 0U, // LBZX 0U, // LBZX8 0U, // LBZXTLS 0U, // LBZXTLS_ 0U, // LBZXTLS_32 0U, // LD 0U, // LDARX 0U, // LDARXL 0U, // LDAT 0U, // LDBRX 0U, // LDCIX 0U, // LDU 0U, // LDUX 0U, // LDX 0U, // LDXTLS 0U, // LDXTLS_ 0U, // LDgotTprelL 0U, // LDgotTprelL32 0U, // LDtoc 0U, // LDtocBA 0U, // LDtocCPT 0U, // LDtocJTI 0U, // LDtocL 0U, // LFD 0U, // LFDEPX 0U, // LFDU 0U, // LFDUX 0U, // LFDX 0U, // LFIWAX 0U, // LFIWZX 0U, // LFS 0U, // LFSU 0U, // LFSUX 0U, // LFSX 0U, // LHA 0U, // LHA8 0U, // LHARX 0U, // LHARXL 0U, // LHAU 0U, // LHAU8 0U, // LHAUX 0U, // LHAUX8 0U, // LHAX 0U, // LHAX8 0U, // LHBRX 0U, // LHBRX8 0U, // LHEPX 0U, // LHZ 0U, // LHZ8 0U, // LHZCIX 0U, // LHZU 0U, // LHZU8 0U, // LHZUX 0U, // LHZUX8 0U, // LHZX 0U, // LHZX8 0U, // LHZXTLS 0U, // LHZXTLS_ 0U, // LHZXTLS_32 0U, // LI 0U, // LI8 0U, // LIS 0U, // LIS8 0U, // LMW 0U, // LQ 0U, // LQARX 0U, // LQARXL 0U, // LQX_PSEUDO 0U, // LSWI 0U, // LVEBX 0U, // LVEHX 0U, // LVEWX 0U, // LVSL 0U, // LVSR 0U, // LVX 0U, // LVXL 0U, // LWA 0U, // LWARX 0U, // LWARXL 0U, // LWAT 0U, // LWAUX 0U, // LWAX 0U, // LWAX_32 0U, // LWA_32 0U, // LWBRX 0U, // LWBRX8 0U, // LWEPX 0U, // LWZ 0U, // LWZ8 0U, // LWZCIX 0U, // LWZU 0U, // LWZU8 0U, // LWZUX 0U, // LWZUX8 0U, // LWZX 0U, // LWZX8 0U, // LWZXTLS 0U, // LWZXTLS_ 0U, // LWZXTLS_32 0U, // LWZtoc 0U, // LWZtocL 0U, // LXSD 0U, // LXSDX 0U, // LXSIBZX 0U, // LXSIHZX 0U, // LXSIWAX 0U, // LXSIWZX 0U, // LXSSP 0U, // LXSSPX 0U, // LXV 0U, // LXVB16X 0U, // LXVD2X 0U, // LXVDSX 0U, // LXVH8X 0U, // LXVKQ 0U, // LXVL 0U, // LXVLL 0U, // LXVP 0U, // LXVPRL 0U, // LXVPRLL 0U, // LXVPX 0U, // LXVRBX 0U, // LXVRDX 0U, // LXVRHX 0U, // LXVRL 0U, // LXVRLL 0U, // LXVRWX 0U, // LXVW4X 0U, // LXVWSX 0U, // LXVX 0U, // MADDHD 0U, // MADDHDU 0U, // MADDLD 0U, // MADDLD8 0U, // MBAR 0U, // MCRF 0U, // MCRFS 0U, // MCRXRX 0U, // MFBHRBE 0U, // MFCR 0U, // MFCR8 0U, // MFCTR 0U, // MFCTR8 0U, // MFDCR 0U, // MFFS 0U, // MFFSCDRN 0U, // MFFSCDRNI 0U, // MFFSCE 0U, // MFFSCRN 0U, // MFFSCRNI 0U, // MFFSL 0U, // MFFS_rec 0U, // MFLR 0U, // MFLR8 0U, // MFMSR 0U, // MFOCRF 0U, // MFOCRF8 0U, // MFPMR 0U, // MFSPR 0U, // MFSPR8 0U, // MFSR 0U, // MFSRIN 0U, // MFTB 0U, // MFTB8 0U, // MFUDSCR 0U, // MFVRD 0U, // MFVRSAVE 0U, // MFVRSAVEv 0U, // MFVRWZ 0U, // MFVSCR 0U, // MFVSRD 0U, // MFVSRLD 0U, // MFVSRWZ 0U, // MODSD 0U, // MODSW 0U, // MODUD 0U, // MODUW 0U, // MSGSYNC 0U, // MSYNC 0U, // MTCRF 0U, // MTCRF8 0U, // MTCTR 0U, // MTCTR8 0U, // MTCTR8loop 0U, // MTCTRloop 0U, // MTDCR 0U, // MTFSB0 0U, // MTFSB1 0U, // MTFSF 0U, // MTFSFI 0U, // MTFSFI_rec 0U, // MTFSFIb 0U, // MTFSF_rec 0U, // MTFSFb 0U, // MTLR 0U, // MTLR8 0U, // MTMSR 0U, // MTMSRD 0U, // MTOCRF 0U, // MTOCRF8 0U, // MTPMR 0U, // MTSPR 0U, // MTSPR8 0U, // MTSR 0U, // MTSRIN 0U, // MTUDSCR 0U, // MTVRD 0U, // MTVRSAVE 0U, // MTVRSAVEv 0U, // MTVRWA 0U, // MTVRWZ 0U, // MTVSCR 0U, // MTVSRBM 0U, // MTVSRBMI 0U, // MTVSRD 0U, // MTVSRDD 0U, // MTVSRDM 0U, // MTVSRHM 0U, // MTVSRQM 0U, // MTVSRWA 0U, // MTVSRWM 0U, // MTVSRWS 0U, // MTVSRWZ 0U, // MULHD 0U, // MULHDU 0U, // MULHDU_rec 0U, // MULHD_rec 0U, // MULHW 0U, // MULHWU 0U, // MULHWU_rec 0U, // MULHW_rec 0U, // MULLD 0U, // MULLDO 0U, // MULLDO_rec 0U, // MULLD_rec 0U, // MULLI 0U, // MULLI8 0U, // MULLW 0U, // MULLWO 0U, // MULLWO_rec 0U, // MULLW_rec 0U, // MoveGOTtoLR 0U, // MovePCtoLR 0U, // MovePCtoLR8 0U, // NAND 0U, // NAND8 0U, // NAND8_rec 0U, // NAND_rec 0U, // NAP 0U, // NEG 0U, // NEG8 0U, // NEG8O 0U, // NEG8O_rec 0U, // NEG8_rec 0U, // NEGO 0U, // NEGO_rec 0U, // NEG_rec 0U, // NOP 0U, // NOP_GT_PWR6 0U, // NOP_GT_PWR7 0U, // NOR 0U, // NOR8 0U, // NOR8_rec 0U, // NOR_rec 0U, // OR 0U, // OR8 0U, // OR8_rec 0U, // ORC 0U, // ORC8 0U, // ORC8_rec 0U, // ORC_rec 0U, // ORI 0U, // ORI8 0U, // ORIS 0U, // ORIS8 0U, // OR_rec 0U, // PADDI 0U, // PADDI8 0U, // PADDI8pc 0U, // PADDIdtprel 0U, // PADDIpc 0U, // PDEPD 0U, // PEXTD 0U, // PLBZ 0U, // PLBZ8 0U, // PLBZ8pc 0U, // PLBZpc 0U, // PLD 0U, // PLDpc 0U, // PLFD 0U, // PLFDpc 0U, // PLFS 0U, // PLFSpc 0U, // PLHA 0U, // PLHA8 0U, // PLHA8pc 0U, // PLHApc 0U, // PLHZ 0U, // PLHZ8 0U, // PLHZ8pc 0U, // PLHZpc 0U, // PLI 0U, // PLI8 0U, // PLWA 0U, // PLWA8 0U, // PLWA8pc 0U, // PLWApc 0U, // PLWZ 0U, // PLWZ8 0U, // PLWZ8pc 0U, // PLWZpc 0U, // PLXSD 0U, // PLXSDpc 0U, // PLXSSP 0U, // PLXSSPpc 0U, // PLXV 0U, // PLXVP 0U, // PLXVPpc 0U, // PLXVpc 0U, // PMXVBF16GER2 2U, // PMXVBF16GER2NN 2U, // PMXVBF16GER2NP 2U, // PMXVBF16GER2PN 2U, // PMXVBF16GER2PP 0U, // PMXVBF16GER2W 2U, // PMXVBF16GER2WNN 2U, // PMXVBF16GER2WNP 2U, // PMXVBF16GER2WPN 2U, // PMXVBF16GER2WPP 0U, // PMXVF16GER2 2U, // PMXVF16GER2NN 2U, // PMXVF16GER2NP 2U, // PMXVF16GER2PN 2U, // PMXVF16GER2PP 0U, // PMXVF16GER2W 2U, // PMXVF16GER2WNN 2U, // PMXVF16GER2WNP 2U, // PMXVF16GER2WPN 2U, // PMXVF16GER2WPP 4U, // PMXVF32GER 0U, // PMXVF32GERNN 0U, // PMXVF32GERNP 0U, // PMXVF32GERPN 0U, // PMXVF32GERPP 4U, // PMXVF32GERW 0U, // PMXVF32GERWNN 0U, // PMXVF32GERWNP 0U, // PMXVF32GERWPN 0U, // PMXVF32GERWPP 0U, // PMXVF64GER 0U, // PMXVF64GERNN 0U, // PMXVF64GERNP 0U, // PMXVF64GERPN 0U, // PMXVF64GERPP 0U, // PMXVF64GERW 0U, // PMXVF64GERWNN 0U, // PMXVF64GERWNP 0U, // PMXVF64GERWPN 0U, // PMXVF64GERWPP 0U, // PMXVI16GER2 2U, // PMXVI16GER2PP 0U, // PMXVI16GER2S 2U, // PMXVI16GER2SPP 0U, // PMXVI16GER2SW 2U, // PMXVI16GER2SWPP 0U, // PMXVI16GER2W 2U, // PMXVI16GER2WPP 16U, // PMXVI4GER8 6U, // PMXVI4GER8PP 16U, // PMXVI4GER8W 6U, // PMXVI4GER8WPP 32U, // PMXVI8GER4 8U, // PMXVI8GER4PP 8U, // PMXVI8GER4SPP 32U, // PMXVI8GER4W 8U, // PMXVI8GER4WPP 8U, // PMXVI8GER4WSPP 0U, // POPCNTB 0U, // POPCNTB8 0U, // POPCNTD 0U, // POPCNTW 0U, // PPC32GOT 0U, // PPC32PICGOT 0U, // PREPARE_PROBED_ALLOCA_32 0U, // PREPARE_PROBED_ALLOCA_64 0U, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 0U, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 0U, // PROBED_ALLOCA_32 0U, // PROBED_ALLOCA_64 0U, // PROBED_STACKALLOC_32 0U, // PROBED_STACKALLOC_64 0U, // PSC_DCBZL 0U, // PSQ_L 0U, // PSQ_LU 1U, // PSQ_LUX 1U, // PSQ_LX 0U, // PSQ_ST 0U, // PSQ_STU 1U, // PSQ_STUX 1U, // PSQ_STX 0U, // PSTB 0U, // PSTB8 0U, // PSTB8pc 0U, // PSTBpc 0U, // PSTD 0U, // PSTDpc 0U, // PSTFD 0U, // PSTFDpc 0U, // PSTFS 0U, // PSTFSpc 0U, // PSTH 0U, // PSTH8 0U, // PSTH8pc 0U, // PSTHpc 0U, // PSTW 0U, // PSTW8 0U, // PSTW8pc 0U, // PSTWpc 0U, // PSTXSD 0U, // PSTXSDpc 0U, // PSTXSSP 0U, // PSTXSSPpc 0U, // PSTXV 0U, // PSTXVP 0U, // PSTXVPpc 0U, // PSTXVpc 0U, // PS_ABS 0U, // PS_ABSo 0U, // PS_ADD 0U, // PS_ADDo 0U, // PS_CMPO0 0U, // PS_CMPO1 0U, // PS_CMPU0 0U, // PS_CMPU1 0U, // PS_DIV 0U, // PS_DIVo 0U, // PS_MADD 0U, // PS_MADDS0 0U, // PS_MADDS0o 0U, // PS_MADDS1 0U, // PS_MADDS1o 0U, // PS_MADDo 0U, // PS_MERGE00 0U, // PS_MERGE00o 0U, // PS_MERGE01 0U, // PS_MERGE01o 0U, // PS_MERGE10 0U, // PS_MERGE10o 0U, // PS_MERGE11 0U, // PS_MERGE11o 0U, // PS_MR 0U, // PS_MRo 0U, // PS_MSUB 0U, // PS_MSUBo 0U, // PS_MUL 0U, // PS_MULS0 0U, // PS_MULS0o 0U, // PS_MULS1 0U, // PS_MULS1o 0U, // PS_MULo 0U, // PS_NABS 0U, // PS_NABSo 0U, // PS_NEG 0U, // PS_NEGo 0U, // PS_NMADD 0U, // PS_NMADDo 0U, // PS_NMSUB 0U, // PS_NMSUBo 0U, // PS_RES 0U, // PS_RESo 0U, // PS_RSQRTE 0U, // PS_RSQRTEo 0U, // PS_SEL 0U, // PS_SELo 0U, // PS_SUB 0U, // PS_SUBo 0U, // PS_SUM0 0U, // PS_SUM0o 0U, // PS_SUM1 0U, // PS_SUM1o 0U, // PseudoEIEIO 0U, // QVALIGNI 0U, // QVALIGNIb 0U, // QVALIGNIs 0U, // QVESPLATI 0U, // QVESPLATIb 0U, // QVESPLATIs 0U, // QVFABS 0U, // QVFABSs 0U, // QVFADD 0U, // QVFADDS 0U, // QVFADDSs 0U, // QVFCFID 0U, // QVFCFIDS 0U, // QVFCFIDU 0U, // QVFCFIDUS 0U, // QVFCFIDb 0U, // QVFCMPEQ 0U, // QVFCMPEQb 0U, // QVFCMPEQbs 0U, // QVFCMPGT 0U, // QVFCMPGTb 0U, // QVFCMPGTbs 0U, // QVFCMPLT 0U, // QVFCMPLTb 0U, // QVFCMPLTbs 0U, // QVFCPSGN 0U, // QVFCPSGNs 0U, // QVFCTID 0U, // QVFCTIDU 0U, // QVFCTIDUZ 0U, // QVFCTIDZ 0U, // QVFCTIDb 0U, // QVFCTIW 0U, // QVFCTIWU 0U, // QVFCTIWUZ 0U, // QVFCTIWZ 0U, // QVFLOGICAL 0U, // QVFLOGICALb 0U, // QVFLOGICALs 0U, // QVFMADD 0U, // QVFMADDS 0U, // QVFMADDSs 0U, // QVFMR 0U, // QVFMRb 0U, // QVFMRs 0U, // QVFMSUB 0U, // QVFMSUBS 0U, // QVFMSUBSs 0U, // QVFMUL 0U, // QVFMULS 0U, // QVFMULSs 0U, // QVFNABS 0U, // QVFNABSs 0U, // QVFNEG 0U, // QVFNEGs 0U, // QVFNMADD 0U, // QVFNMADDS 0U, // QVFNMADDSs 0U, // QVFNMSUB 0U, // QVFNMSUBS 0U, // QVFNMSUBSs 0U, // QVFPERM 0U, // QVFPERMs 0U, // QVFRE 0U, // QVFRES 0U, // QVFRESs 0U, // QVFRIM 0U, // QVFRIMs 0U, // QVFRIN 0U, // QVFRINs 0U, // QVFRIP 0U, // QVFRIPs 0U, // QVFRIZ 0U, // QVFRIZs 0U, // QVFRSP 0U, // QVFRSPs 0U, // QVFRSQRTE 0U, // QVFRSQRTES 0U, // QVFRSQRTESs 0U, // QVFSEL 0U, // QVFSELb 0U, // QVFSELbb 0U, // QVFSELbs 0U, // QVFSUB 0U, // QVFSUBS 0U, // QVFSUBSs 0U, // QVFTSTNAN 0U, // QVFTSTNANb 0U, // QVFTSTNANbs 0U, // QVFXMADD 0U, // QVFXMADDS 0U, // QVFXMUL 0U, // QVFXMULS 0U, // QVFXXCPNMADD 0U, // QVFXXCPNMADDS 0U, // QVFXXMADD 0U, // QVFXXMADDS 0U, // QVFXXNPMADD 0U, // QVFXXNPMADDS 0U, // QVGPCI 0U, // QVLFCDUX 0U, // QVLFCDUXA 0U, // QVLFCDX 0U, // QVLFCDXA 0U, // QVLFCSUX 0U, // QVLFCSUXA 0U, // QVLFCSX 0U, // QVLFCSXA 0U, // QVLFCSXs 0U, // QVLFDUX 0U, // QVLFDUXA 0U, // QVLFDX 0U, // QVLFDXA 0U, // QVLFDXb 0U, // QVLFIWAX 0U, // QVLFIWAXA 0U, // QVLFIWZX 0U, // QVLFIWZXA 0U, // QVLFSUX 0U, // QVLFSUXA 0U, // QVLFSX 0U, // QVLFSXA 0U, // QVLFSXb 0U, // QVLFSXs 0U, // QVLPCLDX 0U, // QVLPCLSX 0U, // QVLPCLSXint 0U, // QVLPCRDX 0U, // QVLPCRSX 0U, // QVSTFCDUX 0U, // QVSTFCDUXA 0U, // QVSTFCDUXI 0U, // QVSTFCDUXIA 0U, // QVSTFCDX 0U, // QVSTFCDXA 0U, // QVSTFCDXI 0U, // QVSTFCDXIA 0U, // QVSTFCSUX 0U, // QVSTFCSUXA 0U, // QVSTFCSUXI 0U, // QVSTFCSUXIA 0U, // QVSTFCSX 0U, // QVSTFCSXA 0U, // QVSTFCSXI 0U, // QVSTFCSXIA 0U, // QVSTFCSXs 0U, // QVSTFDUX 0U, // QVSTFDUXA 0U, // QVSTFDUXI 0U, // QVSTFDUXIA 0U, // QVSTFDX 0U, // QVSTFDXA 0U, // QVSTFDXI 0U, // QVSTFDXIA 0U, // QVSTFDXb 0U, // QVSTFIWX 0U, // QVSTFIWXA 0U, // QVSTFSUX 0U, // QVSTFSUXA 0U, // QVSTFSUXI 0U, // QVSTFSUXIA 0U, // QVSTFSUXs 0U, // QVSTFSX 0U, // QVSTFSXA 0U, // QVSTFSXI 0U, // QVSTFSXIA 0U, // QVSTFSXs 0U, // RESTORE_ACC 0U, // RESTORE_CR 0U, // RESTORE_CRBIT 0U, // RESTORE_QUADWORD 0U, // RESTORE_UACC 0U, // RESTORE_WACC 0U, // RFCI 0U, // RFDI 0U, // RFEBB 0U, // RFI 0U, // RFID 0U, // RFMCI 0U, // RLDCL 0U, // RLDCL_rec 0U, // RLDCR 0U, // RLDCR_rec 0U, // RLDIC 0U, // RLDICL 0U, // RLDICL_32 0U, // RLDICL_32_64 0U, // RLDICL_32_rec 0U, // RLDICL_rec 0U, // RLDICR 0U, // RLDICR_32 0U, // RLDICR_rec 0U, // RLDIC_rec 0U, // RLDIMI 0U, // RLDIMI_rec 0U, // RLWIMI 0U, // RLWIMI8 0U, // RLWIMI8_rec 0U, // RLWIMI_rec 1U, // RLWINM 1U, // RLWINM8 1U, // RLWINM8_rec 1U, // RLWINM_rec 1U, // RLWNM 1U, // RLWNM8 1U, // RLWNM8_rec 1U, // RLWNM_rec 0U, // ReadTB 0U, // SC 0U, // SELECT_CC_F16 0U, // SELECT_CC_F4 0U, // SELECT_CC_F8 0U, // SELECT_CC_I4 0U, // SELECT_CC_I8 0U, // SELECT_CC_QBRC 0U, // SELECT_CC_QFRC 0U, // SELECT_CC_QSRC 0U, // SELECT_CC_SPE 0U, // SELECT_CC_SPE4 0U, // SELECT_CC_VRRC 0U, // SELECT_CC_VSFRC 0U, // SELECT_CC_VSRC 0U, // SELECT_CC_VSSRC 0U, // SELECT_F16 0U, // SELECT_F4 0U, // SELECT_F8 0U, // SELECT_I4 0U, // SELECT_I8 0U, // SELECT_QBRC 0U, // SELECT_QFRC 0U, // SELECT_QSRC 0U, // SELECT_SPE 0U, // SELECT_SPE4 0U, // SELECT_VRRC 0U, // SELECT_VSFRC 0U, // SELECT_VSRC 0U, // SELECT_VSSRC 0U, // SETB 0U, // SETB8 0U, // SETBC 0U, // SETBC8 0U, // SETBCR 0U, // SETBCR8 0U, // SETFLM 0U, // SETNBC 0U, // SETNBC8 0U, // SETNBCR 0U, // SETNBCR8 0U, // SETRND 0U, // SETRNDi 0U, // SLBFEE_rec 0U, // SLBIA 0U, // SLBIE 0U, // SLBIEG 0U, // SLBMFEE 0U, // SLBMFEV 0U, // SLBMTE 0U, // SLBSYNC 0U, // SLD 0U, // SLD_rec 0U, // SLW 0U, // SLW8 0U, // SLW8_rec 0U, // SLW_rec 0U, // SPELWZ 0U, // SPELWZX 0U, // SPESTW 0U, // SPESTWX 0U, // SPILL_ACC 0U, // SPILL_CR 0U, // SPILL_CRBIT 0U, // SPILL_QUADWORD 0U, // SPILL_UACC 0U, // SPILL_WACC 0U, // SPLIT_QUADWORD 0U, // SRAD 0U, // SRADI 0U, // SRADI_32 0U, // SRADI_rec 0U, // SRAD_rec 0U, // SRAW 0U, // SRAWI 0U, // SRAWI_rec 0U, // SRAW_rec 0U, // SRD 0U, // SRD_rec 0U, // SRW 0U, // SRW8 0U, // SRW8_rec 0U, // SRW_rec 0U, // STB 0U, // STB8 0U, // STBCIX 0U, // STBCX 0U, // STBEPX 0U, // STBU 0U, // STBU8 0U, // STBUX 0U, // STBUX8 0U, // STBX 0U, // STBX8 0U, // STBXTLS 0U, // STBXTLS_ 0U, // STBXTLS_32 0U, // STD 0U, // STDAT 0U, // STDBRX 0U, // STDCIX 0U, // STDCX 0U, // STDU 0U, // STDUX 0U, // STDX 0U, // STDXTLS 0U, // STDXTLS_ 0U, // STFD 0U, // STFDEPX 0U, // STFDU 0U, // STFDUX 0U, // STFDX 0U, // STFIWX 0U, // STFS 0U, // STFSU 0U, // STFSUX 0U, // STFSX 0U, // STH 0U, // STH8 0U, // STHBRX 0U, // STHCIX 0U, // STHCX 0U, // STHEPX 0U, // STHU 0U, // STHU8 0U, // STHUX 0U, // STHUX8 0U, // STHX 0U, // STHX8 0U, // STHXTLS 0U, // STHXTLS_ 0U, // STHXTLS_32 0U, // STMW 0U, // STOP 0U, // STQ 0U, // STQCX 0U, // STQX_PSEUDO 0U, // STSWI 0U, // STVEBX 0U, // STVEHX 0U, // STVEWX 0U, // STVX 0U, // STVXL 0U, // STW 0U, // STW8 0U, // STWAT 0U, // STWBRX 0U, // STWCIX 0U, // STWCX 0U, // STWEPX 0U, // STWU 0U, // STWU8 0U, // STWUX 0U, // STWUX8 0U, // STWX 0U, // STWX8 0U, // STWXTLS 0U, // STWXTLS_ 0U, // STWXTLS_32 0U, // STXSD 0U, // STXSDX 0U, // STXSIBX 0U, // STXSIBXv 0U, // STXSIHX 0U, // STXSIHXv 0U, // STXSIWX 0U, // STXSSP 0U, // STXSSPX 0U, // STXV 0U, // STXVB16X 0U, // STXVD2X 0U, // STXVH8X 0U, // STXVL 0U, // STXVLL 0U, // STXVP 0U, // STXVPRL 0U, // STXVPRLL 0U, // STXVPX 0U, // STXVRBX 0U, // STXVRDX 0U, // STXVRHX 0U, // STXVRL 0U, // STXVRLL 0U, // STXVRWX 0U, // STXVW4X 0U, // STXVX 0U, // SUBF 0U, // SUBF8 0U, // SUBF8O 0U, // SUBF8O_rec 0U, // SUBF8_rec 0U, // SUBFC 0U, // SUBFC8 0U, // SUBFC8O 0U, // SUBFC8O_rec 0U, // SUBFC8_rec 0U, // SUBFCO 0U, // SUBFCO_rec 0U, // SUBFC_rec 0U, // SUBFE 0U, // SUBFE8 0U, // SUBFE8O 0U, // SUBFE8O_rec 0U, // SUBFE8_rec 0U, // SUBFEO 0U, // SUBFEO_rec 0U, // SUBFE_rec 0U, // SUBFIC 0U, // SUBFIC8 0U, // SUBFME 0U, // SUBFME8 0U, // SUBFME8O 0U, // SUBFME8O_rec 0U, // SUBFME8_rec 0U, // SUBFMEO 0U, // SUBFMEO_rec 0U, // SUBFME_rec 0U, // SUBFO 0U, // SUBFO_rec 0U, // SUBFUS 0U, // SUBFUS_rec 0U, // SUBFZE 0U, // SUBFZE8 0U, // SUBFZE8O 0U, // SUBFZE8O_rec 0U, // SUBFZE8_rec 0U, // SUBFZEO 0U, // SUBFZEO_rec 0U, // SUBFZE_rec 0U, // SUBF_rec 0U, // SYNC 0U, // TABORT 0U, // TABORTDC 0U, // TABORTDCI 0U, // TABORTWC 0U, // TABORTWCI 0U, // TAILB 0U, // TAILB8 0U, // TAILBA 0U, // TAILBA8 0U, // TAILBCTR 0U, // TAILBCTR8 0U, // TBEGIN 0U, // TBEGIN_RET 0U, // TCHECK 0U, // TCHECK_RET 0U, // TCRETURNai 0U, // TCRETURNai8 0U, // TCRETURNdi 0U, // TCRETURNdi8 0U, // TCRETURNri 0U, // TCRETURNri8 0U, // TD 0U, // TDI 0U, // TEND 0U, // TLBIA 0U, // TLBIE 0U, // TLBIEL 0U, // TLBIVAX 0U, // TLBLD 0U, // TLBLI 0U, // TLBRE 0U, // TLBRE2 0U, // TLBSX 0U, // TLBSX2 0U, // TLBSX2D 0U, // TLBSYNC 0U, // TLBWE 0U, // TLBWE2 0U, // TLSGDAIX 0U, // TLSGDAIX8 0U, // TRAP 0U, // TRECHKPT 0U, // TRECLAIM 0U, // TSR 0U, // TW 0U, // TWI 0U, // UNENCODED_NOP 0U, // UpdateGBR 0U, // VABSDUB 0U, // VABSDUH 0U, // VABSDUW 0U, // VADDCUQ 0U, // VADDCUW 0U, // VADDECUQ 0U, // VADDEUQM 0U, // VADDFP 0U, // VADDSBS 0U, // VADDSHS 0U, // VADDSWS 0U, // VADDUBM 0U, // VADDUBS 0U, // VADDUDM 0U, // VADDUHM 0U, // VADDUHS 0U, // VADDUQM 0U, // VADDUWM 0U, // VADDUWS 0U, // VAND 0U, // VANDC 0U, // VAVGSB 0U, // VAVGSH 0U, // VAVGSW 0U, // VAVGUB 0U, // VAVGUH 0U, // VAVGUW 0U, // VBPERMD 0U, // VBPERMQ 0U, // VCFSX 0U, // VCFSX_0 0U, // VCFUGED 0U, // VCFUX 0U, // VCFUX_0 0U, // VCIPHER 0U, // VCIPHERLAST 0U, // VCLRLB 0U, // VCLRRB 0U, // VCLZB 0U, // VCLZD 0U, // VCLZDM 0U, // VCLZH 0U, // VCLZLSBB 0U, // VCLZW 0U, // VCMPBFP 0U, // VCMPBFP_rec 0U, // VCMPEQFP 0U, // VCMPEQFP_rec 0U, // VCMPEQUB 0U, // VCMPEQUB_rec 0U, // VCMPEQUD 0U, // VCMPEQUD_rec 0U, // VCMPEQUH 0U, // VCMPEQUH_rec 0U, // VCMPEQUQ 0U, // VCMPEQUQ_rec 0U, // VCMPEQUW 0U, // VCMPEQUW_rec 0U, // VCMPGEFP 0U, // VCMPGEFP_rec 0U, // VCMPGTFP 0U, // VCMPGTFP_rec 0U, // VCMPGTSB 0U, // VCMPGTSB_rec 0U, // VCMPGTSD 0U, // VCMPGTSD_rec 0U, // VCMPGTSH 0U, // VCMPGTSH_rec 0U, // VCMPGTSQ 0U, // VCMPGTSQ_rec 0U, // VCMPGTSW 0U, // VCMPGTSW_rec 0U, // VCMPGTUB 0U, // VCMPGTUB_rec 0U, // VCMPGTUD 0U, // VCMPGTUD_rec 0U, // VCMPGTUH 0U, // VCMPGTUH_rec 0U, // VCMPGTUQ 0U, // VCMPGTUQ_rec 0U, // VCMPGTUW 0U, // VCMPGTUW_rec 0U, // VCMPNEB 0U, // VCMPNEB_rec 0U, // VCMPNEH 0U, // VCMPNEH_rec 0U, // VCMPNEW 0U, // VCMPNEW_rec 0U, // VCMPNEZB 0U, // VCMPNEZB_rec 0U, // VCMPNEZH 0U, // VCMPNEZH_rec 0U, // VCMPNEZW 0U, // VCMPNEZW_rec 0U, // VCMPSQ 0U, // VCMPUQ 0U, // VCNTMBB 0U, // VCNTMBD 0U, // VCNTMBH 0U, // VCNTMBW 0U, // VCTSXS 0U, // VCTSXS_0 0U, // VCTUXS 0U, // VCTUXS_0 0U, // VCTZB 0U, // VCTZD 0U, // VCTZDM 0U, // VCTZH 0U, // VCTZLSBB 0U, // VCTZW 0U, // VDIVESD 0U, // VDIVESQ 0U, // VDIVESW 0U, // VDIVEUD 0U, // VDIVEUQ 0U, // VDIVEUW 0U, // VDIVSD 0U, // VDIVSQ 0U, // VDIVSW 0U, // VDIVUD 0U, // VDIVUQ 0U, // VDIVUW 0U, // VEQV 0U, // VEXPANDBM 0U, // VEXPANDDM 0U, // VEXPANDHM 0U, // VEXPANDQM 0U, // VEXPANDWM 0U, // VEXPTEFP 0U, // VEXTDDVLX 0U, // VEXTDDVRX 0U, // VEXTDUBVLX 0U, // VEXTDUBVRX 0U, // VEXTDUHVLX 0U, // VEXTDUHVRX 0U, // VEXTDUWVLX 0U, // VEXTDUWVRX 0U, // VEXTRACTBM 0U, // VEXTRACTD 0U, // VEXTRACTDM 0U, // VEXTRACTHM 0U, // VEXTRACTQM 0U, // VEXTRACTUB 0U, // VEXTRACTUH 0U, // VEXTRACTUW 0U, // VEXTRACTWM 0U, // VEXTSB2D 0U, // VEXTSB2Ds 0U, // VEXTSB2W 0U, // VEXTSB2Ws 0U, // VEXTSD2Q 0U, // VEXTSH2D 0U, // VEXTSH2Ds 0U, // VEXTSH2W 0U, // VEXTSH2Ws 0U, // VEXTSW2D 0U, // VEXTSW2Ds 0U, // VEXTUBLX 0U, // VEXTUBRX 0U, // VEXTUHLX 0U, // VEXTUHRX 0U, // VEXTUWLX 0U, // VEXTUWRX 0U, // VGBBD 0U, // VGNB 0U, // VINSBLX 0U, // VINSBRX 0U, // VINSBVLX 0U, // VINSBVRX 0U, // VINSD 0U, // VINSDLX 0U, // VINSDRX 0U, // VINSERTB 0U, // VINSERTD 0U, // VINSERTH 0U, // VINSERTW 0U, // VINSHLX 0U, // VINSHRX 0U, // VINSHVLX 0U, // VINSHVRX 0U, // VINSW 0U, // VINSWLX 0U, // VINSWRX 0U, // VINSWVLX 0U, // VINSWVRX 0U, // VLOGEFP 0U, // VMADDFP 0U, // VMAXFP 0U, // VMAXSB 0U, // VMAXSD 0U, // VMAXSH 0U, // VMAXSW 0U, // VMAXUB 0U, // VMAXUD 0U, // VMAXUH 0U, // VMAXUW 0U, // VMHADDSHS 0U, // VMHRADDSHS 0U, // VMINFP 0U, // VMINSB 0U, // VMINSD 0U, // VMINSH 0U, // VMINSW 0U, // VMINUB 0U, // VMINUD 0U, // VMINUH 0U, // VMINUW 0U, // VMLADDUHM 0U, // VMODSD 0U, // VMODSQ 0U, // VMODSW 0U, // VMODUD 0U, // VMODUQ 0U, // VMODUW 0U, // VMRGEW 0U, // VMRGHB 0U, // VMRGHH 0U, // VMRGHW 0U, // VMRGLB 0U, // VMRGLH 0U, // VMRGLW 0U, // VMRGOW 0U, // VMSUMCUD 0U, // VMSUMMBM 0U, // VMSUMSHM 0U, // VMSUMSHS 0U, // VMSUMUBM 0U, // VMSUMUDM 0U, // VMSUMUHM 0U, // VMSUMUHS 0U, // VMUL10CUQ 0U, // VMUL10ECUQ 0U, // VMUL10EUQ 0U, // VMUL10UQ 0U, // VMULESB 0U, // VMULESD 0U, // VMULESH 0U, // VMULESW 0U, // VMULEUB 0U, // VMULEUD 0U, // VMULEUH 0U, // VMULEUW 0U, // VMULHSD 0U, // VMULHSW 0U, // VMULHUD 0U, // VMULHUW 0U, // VMULLD 0U, // VMULOSB 0U, // VMULOSD 0U, // VMULOSH 0U, // VMULOSW 0U, // VMULOUB 0U, // VMULOUD 0U, // VMULOUH 0U, // VMULOUW 0U, // VMULUWM 0U, // VNAND 0U, // VNCIPHER 0U, // VNCIPHERLAST 0U, // VNEGD 0U, // VNEGW 0U, // VNMSUBFP 0U, // VNOR 0U, // VOR 0U, // VORC 0U, // VPDEPD 0U, // VPERM 0U, // VPERMR 0U, // VPERMXOR 0U, // VPEXTD 0U, // VPKPX 0U, // VPKSDSS 0U, // VPKSDUS 0U, // VPKSHSS 0U, // VPKSHUS 0U, // VPKSWSS 0U, // VPKSWUS 0U, // VPKUDUM 0U, // VPKUDUS 0U, // VPKUHUM 0U, // VPKUHUS 0U, // VPKUWUM 0U, // VPKUWUS 0U, // VPMSUMB 0U, // VPMSUMD 0U, // VPMSUMH 0U, // VPMSUMW 0U, // VPOPCNTB 0U, // VPOPCNTD 0U, // VPOPCNTH 0U, // VPOPCNTW 0U, // VPRTYBD 0U, // VPRTYBQ 0U, // VPRTYBW 0U, // VREFP 0U, // VRFIM 0U, // VRFIN 0U, // VRFIP 0U, // VRFIZ 0U, // VRLB 0U, // VRLD 0U, // VRLDMI 0U, // VRLDNM 0U, // VRLH 0U, // VRLQ 0U, // VRLQMI 0U, // VRLQNM 0U, // VRLW 0U, // VRLWMI 0U, // VRLWNM 0U, // VRSQRTEFP 0U, // VSBOX 0U, // VSEL 0U, // VSHASIGMAD 0U, // VSHASIGMAW 0U, // VSL 0U, // VSLB 0U, // VSLD 0U, // VSLDBI 0U, // VSLDOI 0U, // VSLH 0U, // VSLO 0U, // VSLQ 0U, // VSLV 0U, // VSLW 0U, // VSPLTB 0U, // VSPLTBs 0U, // VSPLTH 0U, // VSPLTHs 0U, // VSPLTISB 0U, // VSPLTISH 0U, // VSPLTISW 0U, // VSPLTW 0U, // VSR 0U, // VSRAB 0U, // VSRAD 0U, // VSRAH 0U, // VSRAQ 0U, // VSRAW 0U, // VSRB 0U, // VSRD 0U, // VSRDBI 0U, // VSRH 0U, // VSRO 0U, // VSRQ 0U, // VSRV 0U, // VSRW 0U, // VSTRIBL 0U, // VSTRIBL_rec 0U, // VSTRIBR 0U, // VSTRIBR_rec 0U, // VSTRIHL 0U, // VSTRIHL_rec 0U, // VSTRIHR 0U, // VSTRIHR_rec 0U, // VSUBCUQ 0U, // VSUBCUW 0U, // VSUBECUQ 0U, // VSUBEUQM 0U, // VSUBFP 0U, // VSUBSBS 0U, // VSUBSHS 0U, // VSUBSWS 0U, // VSUBUBM 0U, // VSUBUBS 0U, // VSUBUDM 0U, // VSUBUHM 0U, // VSUBUHS 0U, // VSUBUQM 0U, // VSUBUWM 0U, // VSUBUWS 0U, // VSUM2SWS 0U, // VSUM4SBS 0U, // VSUM4SHS 0U, // VSUM4UBS 0U, // VSUMSWS 0U, // VUPKHPX 0U, // VUPKHSB 0U, // VUPKHSH 0U, // VUPKHSW 0U, // VUPKLPX 0U, // VUPKLSB 0U, // VUPKLSH 0U, // VUPKLSW 0U, // VXOR 0U, // V_SET0 0U, // V_SET0B 0U, // V_SET0H 0U, // V_SETALLONES 0U, // V_SETALLONESB 0U, // V_SETALLONESH 0U, // WAIT 0U, // WRTEE 0U, // WRTEEI 0U, // XOR 0U, // XOR8 0U, // XOR8_rec 0U, // XORI 0U, // XORI8 0U, // XORIS 0U, // XORIS8 0U, // XOR_rec 0U, // XSABSDP 0U, // XSABSQP 0U, // XSADDDP 0U, // XSADDQP 0U, // XSADDQPO 0U, // XSADDSP 0U, // XSCMPEQDP 0U, // XSCMPEQQP 0U, // XSCMPEXPDP 0U, // XSCMPEXPQP 0U, // XSCMPGEDP 0U, // XSCMPGEQP 0U, // XSCMPGTDP 0U, // XSCMPGTQP 0U, // XSCMPODP 0U, // XSCMPOQP 0U, // XSCMPUDP 0U, // XSCMPUQP 0U, // XSCPSGNDP 0U, // XSCPSGNQP 0U, // XSCVDPHP 0U, // XSCVDPQP 0U, // XSCVDPSP 0U, // XSCVDPSPN 0U, // XSCVDPSXDS 0U, // XSCVDPSXDSs 0U, // XSCVDPSXWS 0U, // XSCVDPSXWSs 0U, // XSCVDPUXDS 0U, // XSCVDPUXDSs 0U, // XSCVDPUXWS 0U, // XSCVDPUXWSs 0U, // XSCVHPDP 0U, // XSCVQPDP 0U, // XSCVQPDPO 0U, // XSCVQPSDZ 0U, // XSCVQPSQZ 0U, // XSCVQPSWZ 0U, // XSCVQPUDZ 0U, // XSCVQPUQZ 0U, // XSCVQPUWZ 0U, // XSCVSDQP 0U, // XSCVSPDP 0U, // XSCVSPDPN 0U, // XSCVSQQP 0U, // XSCVSXDDP 0U, // XSCVSXDSP 0U, // XSCVUDQP 0U, // XSCVUQQP 0U, // XSCVUXDDP 0U, // XSCVUXDSP 0U, // XSDIVDP 0U, // XSDIVQP 0U, // XSDIVQPO 0U, // XSDIVSP 0U, // XSIEXPDP 0U, // XSIEXPQP 0U, // XSMADDADP 0U, // XSMADDASP 0U, // XSMADDMDP 0U, // XSMADDMSP 0U, // XSMADDQP 0U, // XSMADDQPO 0U, // XSMAXCDP 0U, // XSMAXCQP 0U, // XSMAXDP 0U, // XSMAXJDP 0U, // XSMINCDP 0U, // XSMINCQP 0U, // XSMINDP 0U, // XSMINJDP 0U, // XSMSUBADP 0U, // XSMSUBASP 0U, // XSMSUBMDP 0U, // XSMSUBMSP 0U, // XSMSUBQP 0U, // XSMSUBQPO 0U, // XSMULDP 0U, // XSMULQP 0U, // XSMULQPO 0U, // XSMULSP 0U, // XSNABSDP 0U, // XSNABSDPs 0U, // XSNABSQP 0U, // XSNEGDP 0U, // XSNEGQP 0U, // XSNMADDADP 0U, // XSNMADDASP 0U, // XSNMADDMDP 0U, // XSNMADDMSP 0U, // XSNMADDQP 0U, // XSNMADDQPO 0U, // XSNMSUBADP 0U, // XSNMSUBASP 0U, // XSNMSUBMDP 0U, // XSNMSUBMSP 0U, // XSNMSUBQP 0U, // XSNMSUBQPO 0U, // XSRDPI 0U, // XSRDPIC 0U, // XSRDPIM 0U, // XSRDPIP 0U, // XSRDPIZ 0U, // XSREDP 0U, // XSRESP 0U, // XSRQPI 0U, // XSRQPIX 0U, // XSRQPXP 0U, // XSRSP 0U, // XSRSQRTEDP 0U, // XSRSQRTESP 0U, // XSSQRTDP 0U, // XSSQRTQP 0U, // XSSQRTQPO 0U, // XSSQRTSP 0U, // XSSUBDP 0U, // XSSUBQP 0U, // XSSUBQPO 0U, // XSSUBSP 0U, // XSTDIVDP 0U, // XSTSQRTDP 0U, // XSTSTDCDP 0U, // XSTSTDCQP 0U, // XSTSTDCSP 0U, // XSXEXPDP 0U, // XSXEXPQP 0U, // XSXSIGDP 0U, // XSXSIGQP 0U, // XVABSDP 0U, // XVABSSP 0U, // XVADDDP 0U, // XVADDSP 0U, // XVBF16GER2 0U, // XVBF16GER2NN 0U, // XVBF16GER2NP 0U, // XVBF16GER2PN 0U, // XVBF16GER2PP 0U, // XVBF16GER2W 0U, // XVBF16GER2WNN 0U, // XVBF16GER2WNP 0U, // XVBF16GER2WPN 0U, // XVBF16GER2WPP 0U, // XVCMPEQDP 0U, // XVCMPEQDP_rec 0U, // XVCMPEQSP 0U, // XVCMPEQSP_rec 0U, // XVCMPGEDP 0U, // XVCMPGEDP_rec 0U, // XVCMPGESP 0U, // XVCMPGESP_rec 0U, // XVCMPGTDP 0U, // XVCMPGTDP_rec 0U, // XVCMPGTSP 0U, // XVCMPGTSP_rec 0U, // XVCPSGNDP 0U, // XVCPSGNSP 0U, // XVCVBF16SPN 0U, // XVCVDPSP 0U, // XVCVDPSXDS 0U, // XVCVDPSXWS 0U, // XVCVDPUXDS 0U, // XVCVDPUXWS 0U, // XVCVHPSP 0U, // XVCVSPBF16 0U, // XVCVSPDP 0U, // XVCVSPHP 0U, // XVCVSPSXDS 0U, // XVCVSPSXWS 0U, // XVCVSPUXDS 0U, // XVCVSPUXWS 0U, // XVCVSXDDP 0U, // XVCVSXDSP 0U, // XVCVSXWDP 0U, // XVCVSXWSP 0U, // XVCVUXDDP 0U, // XVCVUXDSP 0U, // XVCVUXWDP 0U, // XVCVUXWSP 0U, // XVDIVDP 0U, // XVDIVSP 0U, // XVF16GER2 0U, // XVF16GER2NN 0U, // XVF16GER2NP 0U, // XVF16GER2PN 0U, // XVF16GER2PP 0U, // XVF16GER2W 0U, // XVF16GER2WNN 0U, // XVF16GER2WNP 0U, // XVF16GER2WPN 0U, // XVF16GER2WPP 0U, // XVF32GER 0U, // XVF32GERNN 0U, // XVF32GERNP 0U, // XVF32GERPN 0U, // XVF32GERPP 0U, // XVF32GERW 0U, // XVF32GERWNN 0U, // XVF32GERWNP 0U, // XVF32GERWPN 0U, // XVF32GERWPP 0U, // XVF64GER 0U, // XVF64GERNN 0U, // XVF64GERNP 0U, // XVF64GERPN 0U, // XVF64GERPP 0U, // XVF64GERW 0U, // XVF64GERWNN 0U, // XVF64GERWNP 0U, // XVF64GERWPN 0U, // XVF64GERWPP 0U, // XVI16GER2 0U, // XVI16GER2PP 0U, // XVI16GER2S 0U, // XVI16GER2SPP 0U, // XVI16GER2SW 0U, // XVI16GER2SWPP 0U, // XVI16GER2W 0U, // XVI16GER2WPP 0U, // XVI4GER8 0U, // XVI4GER8PP 0U, // XVI4GER8W 0U, // XVI4GER8WPP 0U, // XVI8GER4 0U, // XVI8GER4PP 0U, // XVI8GER4SPP 0U, // XVI8GER4W 0U, // XVI8GER4WPP 0U, // XVI8GER4WSPP 0U, // XVIEXPDP 0U, // XVIEXPSP 0U, // XVMADDADP 0U, // XVMADDASP 0U, // XVMADDMDP 0U, // XVMADDMSP 0U, // XVMAXDP 0U, // XVMAXSP 0U, // XVMINDP 0U, // XVMINSP 0U, // XVMSUBADP 0U, // XVMSUBASP 0U, // XVMSUBMDP 0U, // XVMSUBMSP 0U, // XVMULDP 0U, // XVMULSP 0U, // XVNABSDP 0U, // XVNABSSP 0U, // XVNEGDP 0U, // XVNEGSP 0U, // XVNMADDADP 0U, // XVNMADDASP 0U, // XVNMADDMDP 0U, // XVNMADDMSP 0U, // XVNMSUBADP 0U, // XVNMSUBASP 0U, // XVNMSUBMDP 0U, // XVNMSUBMSP 0U, // XVRDPI 0U, // XVRDPIC 0U, // XVRDPIM 0U, // XVRDPIP 0U, // XVRDPIZ 0U, // XVREDP 0U, // XVRESP 0U, // XVRSPI 0U, // XVRSPIC 0U, // XVRSPIM 0U, // XVRSPIP 0U, // XVRSPIZ 0U, // XVRSQRTEDP 0U, // XVRSQRTESP 0U, // XVSQRTDP 0U, // XVSQRTSP 0U, // XVSUBDP 0U, // XVSUBSP 0U, // XVTDIVDP 0U, // XVTDIVSP 0U, // XVTLSBB 0U, // XVTSQRTDP 0U, // XVTSQRTSP 0U, // XVTSTDCDP 0U, // XVTSTDCSP 0U, // XVXEXPDP 0U, // XVXEXPSP 0U, // XVXSIGDP 0U, // XVXSIGSP 0U, // XXBLENDVB 0U, // XXBLENDVD 0U, // XXBLENDVH 0U, // XXBLENDVW 0U, // XXBRD 0U, // XXBRH 0U, // XXBRQ 0U, // XXBRW 1U, // XXEVAL 0U, // XXEXTRACTUW 0U, // XXGENPCVBM 0U, // XXGENPCVDM 0U, // XXGENPCVHM 0U, // XXGENPCVWM 0U, // XXINSERTW 0U, // XXLAND 0U, // XXLANDC 0U, // XXLEQV 0U, // XXLEQVOnes 0U, // XXLNAND 0U, // XXLNOR 0U, // XXLOR 0U, // XXLORC 0U, // XXLORf 0U, // XXLXOR 0U, // XXLXORdpz 0U, // XXLXORspz 0U, // XXLXORz 0U, // XXMFACC 0U, // XXMFACCW 0U, // XXMRGHW 0U, // XXMRGLW 0U, // XXMTACC 0U, // XXMTACCW 0U, // XXPERM 0U, // XXPERMDI 0U, // XXPERMDIs 0U, // XXPERMR 1U, // XXPERMX 0U, // XXSEL 0U, // XXSETACCZ 0U, // XXSETACCZW 0U, // XXSLDWI 0U, // XXSLDWIs 0U, // XXSPLTI32DX 0U, // XXSPLTIB 0U, // XXSPLTIDP 0U, // XXSPLTIW 0U, // XXSPLTW 0U, // XXSPLTWs 0U, // gBC 0U, // gBCA 0U, // gBCAat 0U, // gBCCTR 0U, // gBCCTRL 0U, // gBCL 0U, // gBCLA 0U, // gBCLAat 0U, // gBCLR 0U, // gBCLRL 0U, // gBCLat 0U, // gBCat }; // Emit the opcode for the instruction. uint64_t Bits = 0; Bits |= (uint64_t)OpInfo0[MCInst_getOpcode(MI)] << 0; Bits |= (uint64_t)OpInfo1[MCInst_getOpcode(MI)] << 32; Bits |= (uint64_t)OpInfo2[MCInst_getOpcode(MI)] << 48; MnemonicBitsInfo MBI = { #ifndef CAPSTONE_DIET AsmStrs+(Bits & 32767)-1, #else NULL, #endif // CAPSTONE_DIET Bits }; return MBI; } /// printInstruction - This method is automatically generated by tablegen /// from the instruction set description. static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { SStream_concat0(O, ""); MnemonicBitsInfo MnemonicInfo = getMnemonic(MI, O); SStream_concat0(O, MnemonicInfo.first); uint64_t Bits = MnemonicInfo.second; assert(Bits != 0 && "Cannot print this instruction."); // Fragment 0 encoded into 5 bits for 22 unique commands. switch ((uint32_t)((Bits >> 15) & 31)) { default: assert(0 && "Invalid command number."); case 0: // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ... return; break; case 1: // BUILD_UACC, CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CL... printOperand(MI, 0, O); break; case 2: // DCBFL, DCBFLP, DCBFPS, DCBFx, DCBSTPS, DCBTCT, DCBTDS, DCBTSTCT, DCBTS... printMemRegReg(MI, 0, O); break; case 3: // ADJCALLSTACKDOWN, ADJCALLSTACKUP printU16ImmOperand(MI, 0, O); SStream_concat1(O, ' '); printU16ImmOperand(MI, 1, O); return; break; case 4: // B, BCLalways, BL, BL8, BL8_NOP, BL8_NOP_RM, BL8_NOTOC, BL8_NOTOC_RM, B... printBranchOperand(MI, Address, 0, O); break; case 5: // BA, BLA, BLA8, BLA8_NOP, BLA8_NOP_RM, BLA8_RM, BLA_RM, TAILBA, TAILBA8... printAbsBranchOperand(MI, 0, O); break; case 6: // BCC, BCCA, BCCCTR, BCCCTR8, BCCCTRL, BCCCTRL8, BCCL, BCCLA, BCCLR, BCC... printPredicateOperand(MI, 0, O, "cc"); break; case 7: // BCTRL8_LDinto_toc, BCTRL8_LDinto_toc_RM, BCTRL_LWZinto_toc, BCTRL_LWZi... printMemRegImm(MI, 0, O); return; break; case 8: // BL8_NOP_TLS, BL8_NOTOC_TLS, BL8_TLS, BL8_TLS_, BL_TLS printTLSCall(MI, 0, O); break; case 9: // DCBF, DCBT, DCBTST printMemRegReg(MI, 1, O); SStream_concat0(O, ", "); break; case 10: // DCBTEP, DCBTSTEP printU5ImmOperand(MI, 2, O); SStream_concat0(O, ", "); printMemRegReg(MI, 0, O); return; break; case 11: // DMXXEXTFDMR256, DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DS... printOperand(MI, 1, O); break; case 12: // DMXXEXTFDMR512, DMXXEXTFDMR512_HI printOperand(MI, 2, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); break; case 13: // DSS, MBAR, MTFSB0, MTFSB1, TABORTDC, TABORTDCI, TABORTWC, TABORTWCI, T... printU5ImmOperand(MI, 0, O); break; case 14: // ICBLC, ICBLQ, ICBT, ICBTLS printU4ImmOperand(MI, 0, O); SStream_concat0(O, ", "); printMemRegReg(MI, 1, O); return; break; case 15: // MTFSFI, MTFSFI_rec, MTFSFIb printU3ImmOperand(MI, 0, O); SStream_concat0(O, ", "); printU4ImmOperand(MI, 1, O); break; case 16: // MTOCRF, MTOCRF8 printcrbitm(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); return; break; case 17: // MTSR printU4ImmOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); return; break; case 18: // RFEBB, TBEGIN, TEND, TSR printU1ImmOperand(MI, 0, O); return; break; case 19: // SYNC, WAIT printU2ImmOperand(MI, 0, O); return; break; case 20: // XSRQPI, XSRQPIX, XSRQPXP printU1ImmOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); printU2ImmOperand(MI, 3, O); return; break; case 21: // gBCAat, gBCLAat, gBCLat, gBCat printATBitsAsHint(MI, 1, O); SStream_concat1(O, ' '); printU5ImmOperand(MI, 0, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); SStream_concat0(O, ", "); break; } // Fragment 1 encoded into 5 bits for 24 unique commands. switch ((uint32_t)((Bits >> 20) & 31)) { default: assert(0 && "Invalid command number."); case 0: // BUILD_UACC, CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CL... SStream_concat0(O, ", "); break; case 1: // DCBFL, DCBFLP, DCBFPS, DCBFx, DCBSTPS, DCBTSTT, DCBTSTx, DCBTT, DCBTx,... return; break; case 2: // ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32, TCRETURNai, TCRETURNai8, TCR... SStream_concat1(O, ' '); break; case 3: // BCC, CTRL_DEP printPredicateOperand(MI, 0, O, "pm"); SStream_concat1(O, ' '); printPredicateOperand(MI, 0, O, "reg"); SStream_concat0(O, ", "); printBranchOperand(MI, Address, 2, O); return; break; case 4: // BCCA SStream_concat1(O, 'a'); printPredicateOperand(MI, 0, O, "pm"); SStream_concat1(O, ' '); printPredicateOperand(MI, 0, O, "reg"); SStream_concat0(O, ", "); printAbsBranchOperand(MI, 2, O); return; break; case 5: // BCCCTR, BCCCTR8 SStream_concat0(O, "ctr"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat1(O, ' '); printPredicateOperand(MI, 0, O, "reg"); return; break; case 6: // BCCCTRL, BCCCTRL8 SStream_concat0(O, "ctrl"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat1(O, ' '); printPredicateOperand(MI, 0, O, "reg"); return; break; case 7: // BCCL SStream_concat1(O, 'l'); printPredicateOperand(MI, 0, O, "pm"); SStream_concat1(O, ' '); printPredicateOperand(MI, 0, O, "reg"); SStream_concat0(O, ", "); printBranchOperand(MI, Address, 2, O); return; break; case 8: // BCCLA SStream_concat0(O, "la"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat1(O, ' '); printPredicateOperand(MI, 0, O, "reg"); SStream_concat0(O, ", "); printAbsBranchOperand(MI, 2, O); return; break; case 9: // BCCLR SStream_concat0(O, "lr"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat1(O, ' '); printPredicateOperand(MI, 0, O, "reg"); return; break; case 10: // BCCLRL SStream_concat0(O, "lrl"); printPredicateOperand(MI, 0, O, "pm"); SStream_concat1(O, ' '); printPredicateOperand(MI, 0, O, "reg"); return; break; case 11: // BCCTR, BCCTR8, BCCTR8n, BCCTRL, BCCTRL8, BCCTRL8n, BCCTRLn, BCCTRn, BC... SStream_concat0(O, ", 0"); return; break; case 12: // BL8_NOP, BL8_NOP_RM, BL8_NOP_TLS, BLA8_NOP, BLA8_NOP_RM, BL_NOP, BL_NO... SStream_concat0(O, "\n\tnop"); return; break; case 13: // DCBF printU3ImmOperand(MI, 0, O); return; break; case 14: // DCBT, DCBTST printU5ImmOperand(MI, 0, O); return; break; case 15: // DMXXEXTFDMR512_HI SStream_concat0(O, ", 1"); return; break; case 16: // EVSEL, TLBIE SStream_concat1(O, ','); break; case 17: // MFTB8 SStream_concat0(O, ", 268"); return; break; case 18: // MFUDSCR SStream_concat0(O, ", 3"); return; break; case 19: // MFVRSAVE, MFVRSAVEv SStream_concat0(O, ", 256"); return; break; case 20: // QVLPCLSXint SStream_concat0(O, ", 0, "); printOperand(MI, 1, O); return; break; case 21: // V_SETALLONES, V_SETALLONESB, V_SETALLONESH SStream_concat0(O, ", -1"); return; break; case 22: // gBCAat, gBCLAat printAbsBranchOperand(MI, 3, O); return; break; case 23: // gBCLat, gBCat printBranchOperand(MI, Address, 3, O); return; break; } // Fragment 2 encoded into 5 bits for 31 unique commands. switch ((uint32_t)((Bits >> 25) & 31)) { default: assert(0 && "Invalid command number."); case 0: // BUILD_UACC, CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CL... printOperand(MI, 1, O); break; case 1: // DCBTCT, DCBTDS, DCBTSTCT, DCBTSTDS, EVADDIW printU5ImmOperand(MI, 2, O); break; case 2: // LAx, EVLDD, EVLDH, EVLDW, EVLHHESPLAT, EVLHHOSSPLAT, EVLHHOUSPLAT, EVL... printMemRegImm(MI, 1, O); return; break; case 3: // SUBPCIS, LI, LI8, LIS, LIS8 printS16ImmOperand(MI, 1, O); return; break; case 4: // ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32, EVLDDX, EVLDHX, EVLDWX, EVLH... printMemRegReg(MI, 1, O); break; case 5: // BC, BCL, BCLn, BCn printBranchOperand(MI, Address, 1, O); return; break; case 6: // CMPRB, CMPRB8, MTMSR, MTMSRD printU1ImmOperand(MI, 1, O); break; case 7: // CRSET, CRUNSET, DMXXEXTFDMR256, MTDCR, TLBIE, V_SET0, V_SET0B, V_SET0H... printOperand(MI, 0, O); break; case 8: // DARN, MFFSCRNI printU2ImmOperand(MI, 1, O); return; break; case 9: // DMXOR, DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64, MTF... printOperand(MI, 2, O); break; case 10: // EVSPLATFI, EVSPLATI, VSPLTISB, VSPLTISH, VSPLTISW printS5ImmOperand(MI, 1, O); return; break; case 11: // EVSUBIFW, LXVKQ printU5ImmOperand(MI, 1, O); break; case 12: // HASHCHK, HASHCHK8, HASHCHKP, HASHCHKP8, HASHST, HASHST8, HASHSTP, HASH... printMemRegImmHash(MI, 1, O); return; break; case 13: // LA, LA8 printS16ImmOperand(MI, 2, O); SStream_concat1(O, '('); printOperand(MI, 1, O); SStream_concat1(O, ')'); return; break; case 14: // LBZU, LBZU8, LDU, LFDU, LFSU, LHAU, LHAU8, LHZU, LHZU8, LWZU, LWZU8, S... printMemRegImm(MI, 2, O); return; break; case 15: // LBZUX, LBZUX8, LDUX, LFDUX, LFSUX, LHAUX, LHAUX8, LHZUX, LHZUX8, LWAUX... printMemRegReg(MI, 2, O); return; break; case 16: // MFBHRBE printU10ImmOperand(MI, 1, O); return; break; case 17: // MFFSCDRNI printU3ImmOperand(MI, 1, O); return; break; case 18: // MFOCRF, MFOCRF8 printcrbitm(MI, 1, O); return; break; case 19: // MFSR printU4ImmOperand(MI, 1, O); return; break; case 20: // MTFSFI_rec, XXSPLTI32DX printU1ImmOperand(MI, 2, O); break; case 21: // MTVSRBMI printU16ImmOperand(MI, 1, O); return; break; case 22: // PADDI8pc, PADDIpc printImmZeroOperand(MI, 1, O); SStream_concat0(O, ", "); printS34ImmOperand(MI, 2, O); SStream_concat0(O, ", 1"); return; break; case 23: // PLBZ, PLBZ8, PLD, PLFD, PLFS, PLHA, PLHA8, PLHZ, PLHZ8, PLWA, PLWA8, P... printMemRegImm34(MI, 1, O); SStream_concat0(O, ", 0"); return; break; case 24: // PLBZ8pc, PLBZpc, PLDpc, PLFDpc, PLFSpc, PLHA8pc, PLHApc, PLHZ8pc, PLHZ... printMemRegImm34PCRel(MI, 1, O); SStream_concat0(O, ", 1"); return; break; case 25: // PLI, PLI8 printS34ImmOperand(MI, 1, O); return; break; case 26: // PSQ_L, PSQ_LU, PSQ_ST, PSQ_STU printMemRegImmPS(MI, 1, O); SStream_concat0(O, ", "); printU1ImmOperand(MI, 3, O); SStream_concat0(O, ", "); printU3ImmOperand(MI, 4, O); return; break; case 27: // QVGPCI printU12ImmOperand(MI, 1, O); return; break; case 28: // SUBFUS, SUBFUS_rec printU1ImmOperand(MI, 3, O); SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat0(O, ", "); printOperand(MI, 2, O); return; break; case 29: // VINSD, VINSERTB, VINSERTH, VINSW printOperand(MI, 3, O); SStream_concat0(O, ", "); printU4ImmOperand(MI, 2, O); return; break; case 30: // XXSPLTIB printU8ImmOperand(MI, 1, O); return; break; } // Fragment 3 encoded into 3 bits for 6 unique commands. switch ((uint32_t)((Bits >> 30) & 7)) { default: assert(0 && "Invalid command number."); case 0: // BUILD_UACC, DCBTCT, DCBTDS, DCBTSTCT, DCBTSTDS, ADDME, ADDME8, ADDME8O... return; break; case 1: // CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CLRRDI_rec, CL... SStream_concat0(O, ", "); break; case 2: // ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32 SStream_concat1(O, ' '); printOperand(MI, 3, O); SStream_concat1(O, ' '); printOperand(MI, 4, O); return; break; case 3: // EVSEL SStream_concat1(O, ','); printOperand(MI, 2, O); return; break; case 4: // LBARXL, LDARXL, LHARXL, LQARXL, LWARXL SStream_concat0(O, ", 1"); return; break; case 5: // VCFSX_0, VCFUX_0, VCTSXS_0, VCTUXS_0 SStream_concat0(O, ", 0"); return; break; } // Fragment 4 encoded into 5 bits for 23 unique commands. switch ((uint32_t)((Bits >> 33) & 31)) { default: assert(0 && "Invalid command number."); case 0: // CLRLSLDI, CLRLSLDI_rec, CLRRDI, CLRRDI_rec, EXTLDI, EXTLDI_rec, EXTRDI... printU6ImmOperand(MI, 2, O); break; case 1: // CLRLSLWI, CLRLSLWI_rec, CLRRWI, CLRRWI_rec, EXTLWI, EXTLWI_rec, EXTRWI... printU5ImmOperand(MI, 2, O); break; case 2: // SUBI, SUBIC, SUBIC_rec, SUBIS, ADDI, ADDI8, ADDIC, ADDIC8, ADDIC_rec, ... printS16ImmOperand(MI, 2, O); return; break; case 3: // ADD4, ADD4O, ADD4O_rec, ADD4TLS, ADD4_rec, ADD8, ADD8O, ADD8O_rec, ADD... printOperand(MI, 2, O); break; case 4: // ANDI8_rec, ANDIS8_rec, ANDIS_rec, ANDI_rec, CMPLDI, CMPLWI, ORI, ORI8,... printU16ImmOperand(MI, 2, O); return; break; case 5: // BCDCFN_rec, BCDCFSQ_rec, BCDCFZ_rec, BCDCTZ_rec, BCDSETSGN_rec, CP_PAS... printU1ImmOperand(MI, 2, O); break; case 6: // CRSET, CRUNSET, V_SET0, V_SET0B, V_SET0H, XXLEQVOnes, XXLXORdpz, XXLXO... printOperand(MI, 0, O); return; break; case 7: // DMXXEXTFDMR256, DMXXINSTFDMR256, QVESPLATI, QVESPLATIb, QVESPLATIs, XX... printU2ImmOperand(MI, 2, O); return; break; case 8: // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64 printU5ImmOperand(MI, 0, O); return; break; case 9: // EVADDIW, XXPERMDIs, XXSLDWIs printOperand(MI, 1, O); break; case 10: // PADDI, PADDI8 printS34ImmOperand(MI, 2, O); SStream_concat0(O, ", 0"); return; break; case 11: // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF... printOperand(MI, 3, O); break; case 12: // RLDIMI, RLDIMI_rec printU6ImmOperand(MI, 3, O); SStream_concat0(O, ", "); printU6ImmOperand(MI, 4, O); return; break; case 13: // RLWIMI, RLWIMI8, RLWIMI8_rec, RLWIMI_rec printU5ImmOperand(MI, 3, O); SStream_concat0(O, ", "); printU5ImmOperand(MI, 4, O); SStream_concat0(O, ", "); printU5ImmOperand(MI, 5, O); return; break; case 14: // VCFSX, VCFUX, VCTSXS, VCTUXS, VSPLTB, VSPLTBs, VSPLTH, VSPLTHs, VSPLTW printU5ImmOperand(MI, 1, O); return; break; case 15: // VEXTRACTD, VEXTRACTUB, VEXTRACTUH, VEXTRACTUW, VINSERTD, VINSERTW printU4ImmOperand(MI, 1, O); return; break; case 16: // VGNB printU3ImmOperand(MI, 2, O); return; break; case 17: // XSTSTDCDP, XSTSTDCQP, XSTSTDCSP, XVTSTDCDP, XVTSTDCSP printU7ImmOperand(MI, 1, O); return; break; case 18: // XXEXTRACTUW printU4ImmOperand(MI, 2, O); return; break; case 19: // XXGENPCVBM, XXGENPCVDM, XXGENPCVHM, XXGENPCVWM printS5ImmOperand(MI, 2, O); return; break; case 20: // XXINSERTW printU4ImmOperand(MI, 3, O); return; break; case 21: // gBC, gBCL printBranchOperand(MI, Address, 2, O); return; break; case 22: // gBCA, gBCLA printAbsBranchOperand(MI, 2, O); return; break; } // Fragment 5 encoded into 2 bits for 4 unique commands. switch ((uint32_t)((Bits >> 38) & 3)) { default: assert(0 && "Invalid command number."); case 0: // CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, EXTLDI, EXTLDI_rec, EX... SStream_concat0(O, ", "); break; case 1: // CLRRDI, CLRRDI_rec, CLRRWI, CLRRWI_rec, ROTRDI, ROTRDI_rec, ROTRWI, RO... return; break; case 2: // DMXXINSTFDMR512 SStream_concat0(O, ", 0"); return; break; case 3: // DMXXINSTFDMR512_HI SStream_concat0(O, ", 1"); return; break; } // Fragment 6 encoded into 4 bits for 11 unique commands. switch ((uint32_t)((Bits >> 40) & 15)) { default: assert(0 && "Invalid command number."); case 0: // CLRLSLDI, CLRLSLDI_rec, EXTLDI, EXTLDI_rec, EXTRDI, EXTRDI_rec, INSRDI... printU6ImmOperand(MI, 3, O); return; break; case 1: // CLRLSLWI, CLRLSLWI_rec, EXTLWI, EXTLWI_rec, EXTRWI, EXTRWI_rec, INSLWI... printU5ImmOperand(MI, 3, O); break; case 2: // RLWIMIbm, RLWIMIbm_rec, RLWINMbm, RLWINMbm_rec, RLWNMbm, RLWNMbm_rec, ... printOperand(MI, 3, O); break; case 3: // ADDEX, ADDEX8, QVALIGNI, QVALIGNIb, QVALIGNIs, XXPERMDI, XXSLDWI printU2ImmOperand(MI, 3, O); return; break; case 4: // BCDADD_rec, BCDSR_rec, BCDSUB_rec, BCDS_rec, BCDTRUNC_rec, PSQ_LUX, PS... printU1ImmOperand(MI, 3, O); break; case 5: // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVF32GER, PM... printU4ImmOperand(MI, 3, O); break; case 6: // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF... printU4ImmOperand(MI, 4, O); SStream_concat0(O, ", "); break; case 7: // QVFLOGICAL, QVFLOGICALb, QVFLOGICALs printU12ImmOperand(MI, 3, O); return; break; case 8: // QVFMADDS, QVFMSUBS, QVFNMADDS, QVFNMSUBS, QVFSEL, QVFSELb, QVFSELbb, Q... printOperand(MI, 2, O); return; break; case 9: // VSLDBI, VSRDBI printU3ImmOperand(MI, 3, O); return; break; case 10: // XXPERMDIs, XXSLDWIs printU2ImmOperand(MI, 2, O); return; break; } // Fragment 7 encoded into 2 bits for 4 unique commands. switch ((uint32_t)((Bits >> 44) & 3)) { default: assert(0 && "Invalid command number."); case 0: // CLRLSLWI, CLRLSLWI_rec, EXTLWI, EXTLWI_rec, EXTRWI, EXTRWI_rec, INSLWI... return; break; case 1: // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVF32GER, PM... SStream_concat0(O, ", "); break; case 2: // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF... printU4ImmOperand(MI, 5, O); break; case 3: // PMXVF64GERNN, PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVF64GERWNN,... printU2ImmOperand(MI, 5, O); return; break; } // Fragment 8 encoded into 3 bits for 7 unique commands. switch ((uint32_t)((Bits >> 46) & 7)) { default: assert(0 && "Invalid command number."); case 0: // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVF32GER, PM... printU4ImmOperand(MI, 4, O); break; case 1: // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF... SStream_concat0(O, ", "); break; case 2: // PMXVF32GERNN, PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF32GERWNN,... return; break; case 3: // PMXVF64GER, PMXVF64GERW printU2ImmOperand(MI, 4, O); return; break; case 4: // PSQ_LUX, PSQ_LX, PSQ_STUX, PSQ_STX, XXPERMX printU3ImmOperand(MI, 4, O); return; break; case 5: // RLWINM, RLWINM8, RLWINM8_rec, RLWINM_rec, RLWNM, RLWNM8, RLWNM8_rec, R... printU5ImmOperand(MI, 4, O); return; break; case 6: // XXEVAL printU8ImmOperand(MI, 4, O); return; break; } // Fragment 9 encoded into 3 bits for 5 unique commands. switch ((uint32_t)((Bits >> 49) & 7)) { default: assert(0 && "Invalid command number."); case 0: // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVI16GER2, P... SStream_concat0(O, ", "); break; case 1: // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF... printU2ImmOperand(MI, 6, O); return; break; case 2: // PMXVF32GER, PMXVF32GERW return; break; case 3: // PMXVI4GER8PP, PMXVI4GER8WPP printU8ImmOperand(MI, 6, O); return; break; case 4: // PMXVI8GER4PP, PMXVI8GER4SPP, PMXVI8GER4WPP, PMXVI8GER4WSPP printU4ImmOperand(MI, 6, O); return; break; } // Fragment 10 encoded into 2 bits for 3 unique commands. switch ((uint32_t)((Bits >> 52) & 3)) { default: assert(0 && "Invalid command number."); case 0: // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVI16GER2, P... printU2ImmOperand(MI, 5, O); return; break; case 1: // PMXVI4GER8, PMXVI4GER8W printU8ImmOperand(MI, 5, O); return; break; case 2: // PMXVI8GER4, PMXVI8GER4W printU4ImmOperand(MI, 5, O); return; break; } } /// getRegisterName - This method is automatically generated by tblgen /// from the register set description. This returns the assembler name /// for the specified register. static const char *getRegisterName(unsigned RegNo) { #ifndef CAPSTONE_DIET assert(RegNo && RegNo < 532 && "Invalid register number!"); static const char AsmStrs[] = { /* 0 */ "**ROUNDING MODE**\0" /* 18 */ "**FRAME POINTER**\0" /* 36 */ "**BASE POINTER**\0" /* 53 */ "f10\0" /* 57 */ "vsp10\0" /* 63 */ "dmrrowp10\0" /* 73 */ "q10\0" /* 77 */ "r10\0" /* 81 */ "vs10\0" /* 86 */ "v10\0" /* 90 */ "dmrrow10\0" /* 99 */ "f20\0" /* 103 */ "vsp20\0" /* 109 */ "dmrrowp20\0" /* 119 */ "q20\0" /* 123 */ "r20\0" /* 127 */ "vs20\0" /* 132 */ "v20\0" /* 136 */ "dmrrow20\0" /* 145 */ "f30\0" /* 149 */ "vsp30\0" /* 155 */ "dmrrowp30\0" /* 165 */ "q30\0" /* 169 */ "r30\0" /* 173 */ "vs30\0" /* 178 */ "v30\0" /* 182 */ "dmrrow30\0" /* 191 */ "vsp40\0" /* 197 */ "vs40\0" /* 202 */ "dmrrow40\0" /* 211 */ "vsp50\0" /* 217 */ "vs50\0" /* 222 */ "dmrrow50\0" /* 231 */ "vsp60\0" /* 237 */ "vs60\0" /* 242 */ "dmrrow60\0" /* 251 */ "wacc0\0" /* 257 */ "f0\0" /* 260 */ "wacc_hi0\0" /* 269 */ "dmrp0\0" /* 275 */ "vsp0\0" /* 280 */ "dmrrowp0\0" /* 289 */ "q0\0" /* 292 */ "cr0\0" /* 296 */ "dmr0\0" /* 301 */ "vs0\0" /* 305 */ "v0\0" /* 308 */ "dmrrow0\0" /* 316 */ "f11\0" /* 320 */ "dmrrowp11\0" /* 330 */ "q11\0" /* 334 */ "r11\0" /* 338 */ "vs11\0" /* 343 */ "v11\0" /* 347 */ "dmrrow11\0" /* 356 */ "f21\0" /* 360 */ "dmrrowp21\0" /* 370 */ "q21\0" /* 374 */ "r21\0" /* 378 */ "vs21\0" /* 383 */ "v21\0" /* 387 */ "dmrrow21\0" /* 396 */ "f31\0" /* 400 */ "dmrrowp31\0" /* 410 */ "q31\0" /* 414 */ "r31\0" /* 418 */ "vs31\0" /* 423 */ "v31\0" /* 427 */ "dmrrow31\0" /* 436 */ "vs41\0" /* 441 */ "dmrrow41\0" /* 450 */ "vs51\0" /* 455 */ "dmrrow51\0" /* 464 */ "vs61\0" /* 469 */ "dmrrow61\0" /* 478 */ "wacc1\0" /* 484 */ "f1\0" /* 487 */ "wacc_hi1\0" /* 496 */ "dmrp1\0" /* 502 */ "dmrrowp1\0" /* 511 */ "q1\0" /* 514 */ "cr1\0" /* 518 */ "dmr1\0" /* 523 */ "vs1\0" /* 527 */ "v1\0" /* 530 */ "dmrrow1\0" /* 538 */ "f12\0" /* 542 */ "vsp12\0" /* 548 */ "dmrrowp12\0" /* 558 */ "q12\0" /* 562 */ "r12\0" /* 566 */ "vs12\0" /* 571 */ "v12\0" /* 575 */ "dmrrow12\0" /* 584 */ "f22\0" /* 588 */ "vsp22\0" /* 594 */ "dmrrowp22\0" /* 604 */ "q22\0" /* 608 */ "r22\0" /* 612 */ "vs22\0" /* 617 */ "v22\0" /* 621 */ "dmrrow22\0" /* 630 */ "vsp32\0" /* 636 */ "vs32\0" /* 641 */ "dmrrow32\0" /* 650 */ "vsp42\0" /* 656 */ "vs42\0" /* 661 */ "dmrrow42\0" /* 670 */ "vsp52\0" /* 676 */ "vs52\0" /* 681 */ "dmrrow52\0" /* 690 */ "vsp62\0" /* 696 */ "vs62\0" /* 701 */ "dmrrow62\0" /* 710 */ "wacc2\0" /* 716 */ "f2\0" /* 719 */ "wacc_hi2\0" /* 728 */ "dmrp2\0" /* 734 */ "vsp2\0" /* 739 */ "dmrrowp2\0" /* 748 */ "q2\0" /* 751 */ "cr2\0" /* 755 */ "dmr2\0" /* 760 */ "vs2\0" /* 764 */ "v2\0" /* 767 */ "dmrrow2\0" /* 775 */ "f13\0" /* 779 */ "dmrrowp13\0" /* 789 */ "q13\0" /* 793 */ "r13\0" /* 797 */ "vs13\0" /* 802 */ "v13\0" /* 806 */ "dmrrow13\0" /* 815 */ "f23\0" /* 819 */ "dmrrowp23\0" /* 829 */ "q23\0" /* 833 */ "r23\0" /* 837 */ "vs23\0" /* 842 */ "v23\0" /* 846 */ "dmrrow23\0" /* 855 */ "vs33\0" /* 860 */ "dmrrow33\0" /* 869 */ "vs43\0" /* 874 */ "dmrrow43\0" /* 883 */ "vs53\0" /* 888 */ "dmrrow53\0" /* 897 */ "vs63\0" /* 902 */ "dmrrow63\0" /* 911 */ "wacc3\0" /* 917 */ "f3\0" /* 920 */ "wacc_hi3\0" /* 929 */ "dmrp3\0" /* 935 */ "dmrrowp3\0" /* 944 */ "q3\0" /* 947 */ "cr3\0" /* 951 */ "dmr3\0" /* 956 */ "vs3\0" /* 960 */ "v3\0" /* 963 */ "dmrrow3\0" /* 971 */ "f14\0" /* 975 */ "vsp14\0" /* 981 */ "dmrrowp14\0" /* 991 */ "q14\0" /* 995 */ "r14\0" /* 999 */ "vs14\0" /* 1004 */ "v14\0" /* 1008 */ "dmrrow14\0" /* 1017 */ "f24\0" /* 1021 */ "vsp24\0" /* 1027 */ "dmrrowp24\0" /* 1037 */ "q24\0" /* 1041 */ "r24\0" /* 1045 */ "vs24\0" /* 1050 */ "v24\0" /* 1054 */ "dmrrow24\0" /* 1063 */ "vsp34\0" /* 1069 */ "vs34\0" /* 1074 */ "dmrrow34\0" /* 1083 */ "vsp44\0" /* 1089 */ "vs44\0" /* 1094 */ "dmrrow44\0" /* 1103 */ "vsp54\0" /* 1109 */ "vs54\0" /* 1114 */ "dmrrow54\0" /* 1123 */ "wacc4\0" /* 1129 */ "f4\0" /* 1132 */ "wacc_hi4\0" /* 1141 */ "vsp4\0" /* 1146 */ "dmrrowp4\0" /* 1155 */ "q4\0" /* 1158 */ "cr4\0" /* 1162 */ "dmr4\0" /* 1167 */ "vs4\0" /* 1171 */ "v4\0" /* 1174 */ "dmrrow4\0" /* 1182 */ "f15\0" /* 1186 */ "dmrrowp15\0" /* 1196 */ "q15\0" /* 1200 */ "r15\0" /* 1204 */ "vs15\0" /* 1209 */ "v15\0" /* 1213 */ "dmrrow15\0" /* 1222 */ "f25\0" /* 1226 */ "dmrrowp25\0" /* 1236 */ "q25\0" /* 1240 */ "r25\0" /* 1244 */ "vs25\0" /* 1249 */ "v25\0" /* 1253 */ "dmrrow25\0" /* 1262 */ "vs35\0" /* 1267 */ "dmrrow35\0" /* 1276 */ "vs45\0" /* 1281 */ "dmrrow45\0" /* 1290 */ "vs55\0" /* 1295 */ "dmrrow55\0" /* 1304 */ "wacc5\0" /* 1310 */ "f5\0" /* 1313 */ "wacc_hi5\0" /* 1322 */ "dmrrowp5\0" /* 1331 */ "q5\0" /* 1334 */ "cr5\0" /* 1338 */ "dmr5\0" /* 1343 */ "vs5\0" /* 1347 */ "v5\0" /* 1350 */ "dmrrow5\0" /* 1358 */ "f16\0" /* 1362 */ "vsp16\0" /* 1368 */ "dmrrowp16\0" /* 1378 */ "q16\0" /* 1382 */ "r16\0" /* 1386 */ "vs16\0" /* 1391 */ "v16\0" /* 1395 */ "dmrrow16\0" /* 1404 */ "f26\0" /* 1408 */ "vsp26\0" /* 1414 */ "dmrrowp26\0" /* 1424 */ "q26\0" /* 1428 */ "r26\0" /* 1432 */ "vs26\0" /* 1437 */ "v26\0" /* 1441 */ "dmrrow26\0" /* 1450 */ "vsp36\0" /* 1456 */ "vs36\0" /* 1461 */ "dmrrow36\0" /* 1470 */ "vsp46\0" /* 1476 */ "vs46\0" /* 1481 */ "dmrrow46\0" /* 1490 */ "vsp56\0" /* 1496 */ "vs56\0" /* 1501 */ "dmrrow56\0" /* 1510 */ "wacc6\0" /* 1516 */ "f6\0" /* 1519 */ "wacc_hi6\0" /* 1528 */ "vsp6\0" /* 1533 */ "dmrrowp6\0" /* 1542 */ "q6\0" /* 1545 */ "cr6\0" /* 1549 */ "dmr6\0" /* 1554 */ "vs6\0" /* 1558 */ "v6\0" /* 1561 */ "dmrrow6\0" /* 1569 */ "f17\0" /* 1573 */ "dmrrowp17\0" /* 1583 */ "q17\0" /* 1587 */ "r17\0" /* 1591 */ "vs17\0" /* 1596 */ "v17\0" /* 1600 */ "dmrrow17\0" /* 1609 */ "f27\0" /* 1613 */ "dmrrowp27\0" /* 1623 */ "q27\0" /* 1627 */ "r27\0" /* 1631 */ "vs27\0" /* 1636 */ "v27\0" /* 1640 */ "dmrrow27\0" /* 1649 */ "vs37\0" /* 1654 */ "dmrrow37\0" /* 1663 */ "vs47\0" /* 1668 */ "dmrrow47\0" /* 1677 */ "vs57\0" /* 1682 */ "dmrrow57\0" /* 1691 */ "wacc7\0" /* 1697 */ "f7\0" /* 1700 */ "wacc_hi7\0" /* 1709 */ "dmrrowp7\0" /* 1718 */ "q7\0" /* 1721 */ "cr7\0" /* 1725 */ "dmr7\0" /* 1730 */ "vs7\0" /* 1734 */ "v7\0" /* 1737 */ "dmrrow7\0" /* 1745 */ "f18\0" /* 1749 */ "vsp18\0" /* 1755 */ "dmrrowp18\0" /* 1765 */ "q18\0" /* 1769 */ "r18\0" /* 1773 */ "vs18\0" /* 1778 */ "v18\0" /* 1782 */ "dmrrow18\0" /* 1791 */ "f28\0" /* 1795 */ "vsp28\0" /* 1801 */ "dmrrowp28\0" /* 1811 */ "q28\0" /* 1815 */ "r28\0" /* 1819 */ "vs28\0" /* 1824 */ "v28\0" /* 1828 */ "dmrrow28\0" /* 1837 */ "vsp38\0" /* 1843 */ "vs38\0" /* 1848 */ "dmrrow38\0" /* 1857 */ "vsp48\0" /* 1863 */ "vs48\0" /* 1868 */ "dmrrow48\0" /* 1877 */ "vsp58\0" /* 1883 */ "vs58\0" /* 1888 */ "dmrrow58\0" /* 1897 */ "f8\0" /* 1900 */ "vsp8\0" /* 1905 */ "dmrrowp8\0" /* 1914 */ "q8\0" /* 1917 */ "r8\0" /* 1920 */ "vs8\0" /* 1924 */ "v8\0" /* 1927 */ "dmrrow8\0" /* 1935 */ "f19\0" /* 1939 */ "dmrrowp19\0" /* 1949 */ "q19\0" /* 1953 */ "r19\0" /* 1957 */ "vs19\0" /* 1962 */ "v19\0" /* 1966 */ "dmrrow19\0" /* 1975 */ "f29\0" /* 1979 */ "dmrrowp29\0" /* 1989 */ "q29\0" /* 1993 */ "r29\0" /* 1997 */ "vs29\0" /* 2002 */ "v29\0" /* 2006 */ "dmrrow29\0" /* 2015 */ "vs39\0" /* 2020 */ "dmrrow39\0" /* 2029 */ "vs49\0" /* 2034 */ "dmrrow49\0" /* 2043 */ "vs59\0" /* 2048 */ "dmrrow59\0" /* 2057 */ "f9\0" /* 2060 */ "dmrrowp9\0" /* 2069 */ "q9\0" /* 2072 */ "r9\0" /* 2075 */ "vs9\0" /* 2079 */ "v9\0" /* 2082 */ "dmrrow9\0" /* 2090 */ "vrsave\0" /* 2097 */ "spefscr\0" /* 2105 */ "xer\0" /* 2109 */ "lr\0" /* 2112 */ "ctr\0" }; static const uint16_t RegAsmOffset[] = { 36, 2105, 2112, 18, 2109, 0, 2097, 2090, 2105, 55, 252, 479, 711, 912, 1124, 1305, 1511, 1692, 36, 292, 514, 751, 947, 1158, 1334, 1545, 1721, 2112, 296, 518, 755, 951, 1162, 1338, 1549, 1725, 308, 530, 767, 963, 1174, 1350, 1561, 1737, 1927, 2082, 90, 347, 575, 806, 1008, 1213, 1395, 1600, 1782, 1966, 136, 387, 621, 846, 1054, 1253, 1441, 1640, 1828, 2006, 182, 427, 641, 860, 1074, 1267, 1461, 1654, 1848, 2020, 202, 441, 661, 874, 1094, 1281, 1481, 1668, 1868, 2034, 222, 455, 681, 888, 1114, 1295, 1501, 1682, 1888, 2048, 242, 469, 701, 902, 280, 502, 739, 935, 1146, 1322, 1533, 1709, 1905, 2060, 63, 320, 548, 779, 981, 1186, 1368, 1573, 1755, 1939, 109, 360, 594, 819, 1027, 1226, 1414, 1613, 1801, 1979, 155, 400, 269, 496, 728, 929, 257, 484, 716, 917, 1129, 1310, 1516, 1697, 1897, 2057, 53, 316, 538, 775, 971, 1182, 1358, 1569, 1745, 1935, 99, 356, 584, 815, 1017, 1222, 1404, 1609, 1791, 1975, 145, 396, 18, 2109, 289, 511, 748, 944, 1155, 1331, 1542, 1718, 1914, 2069, 73, 330, 558, 789, 991, 1196, 1378, 1583, 1765, 1949, 119, 370, 604, 829, 1037, 1236, 1424, 1623, 1811, 1989, 165, 410, 293, 515, 752, 948, 1159, 1335, 1546, 1722, 1917, 2072, 77, 334, 562, 793, 995, 1200, 1382, 1587, 1769, 1953, 123, 374, 608, 833, 1041, 1240, 1428, 1627, 1815, 1993, 169, 414, 293, 515, 752, 948, 1159, 1335, 1546, 1722, 1917, 2072, 77, 334, 562, 793, 995, 1200, 1382, 1587, 1769, 1953, 123, 374, 608, 833, 1041, 1240, 1428, 1627, 1815, 1993, 169, 414, 252, 479, 711, 912, 1124, 1305, 1511, 1692, 305, 527, 764, 960, 1171, 1347, 1558, 1734, 1924, 2079, 86, 343, 571, 802, 1004, 1209, 1391, 1596, 1778, 1962, 132, 383, 617, 842, 1050, 1249, 1437, 1636, 1824, 2002, 178, 423, 305, 527, 764, 960, 1171, 1347, 1558, 1734, 1924, 2079, 86, 343, 571, 802, 1004, 1209, 1391, 1596, 1778, 1962, 132, 383, 617, 842, 1050, 1249, 1437, 1636, 1824, 2002, 178, 423, 301, 523, 760, 956, 1167, 1343, 1554, 1730, 1920, 2075, 81, 338, 566, 797, 999, 1204, 1386, 1591, 1773, 1957, 127, 378, 612, 837, 1045, 1244, 1432, 1631, 1819, 1997, 173, 418, 275, 734, 1141, 1528, 1900, 57, 542, 975, 1362, 1749, 103, 588, 1021, 1408, 1795, 149, 630, 1063, 1450, 1837, 191, 650, 1083, 1470, 1857, 211, 670, 1103, 1490, 1877, 231, 690, 636, 855, 1069, 1262, 1456, 1649, 1843, 2015, 197, 436, 656, 869, 1089, 1276, 1476, 1663, 1863, 2029, 217, 450, 676, 883, 1109, 1290, 1496, 1677, 1883, 2043, 237, 464, 696, 897, 251, 478, 710, 911, 1123, 1304, 1510, 1691, 260, 487, 719, 920, 1132, 1313, 1519, 1700, 293, 515, 752, 948, 1159, 1335, 1546, 1722, 1917, 2072, 77, 334, 562, 793, 995, 1200, 1382, 1587, 1769, 1953, 123, 374, 608, 833, 1041, 1240, 1428, 1627, 1815, 1993, 169, 414, 55, 540, 1360, 54, 972, 1746, 585, 1405, 146, 318, 1184, 1937, 776, 1570, 357, 1223, 1976, 55, 973, 1747, 539, 1359, 100, 1018, 1792, 777, 1571, 317, 1183, 1936, 816, 1610, 397, 293, 752, 1159, 1546, 1917, 77, 562, 995, 1382, 1769, 123, 608, 1041, 1428, 1815, 169, }; assert (*(AsmStrs+RegAsmOffset[RegNo-1]) && "Invalid alt name index for register!"); return AsmStrs+RegAsmOffset[RegNo-1]; #else return NULL; #endif // CAPSTONE_DIET } #ifdef PRINT_ALIAS_INSTR #undef PRINT_ALIAS_INSTR static bool printAliasInstr(MCInst *MI, uint64_t Address, SStream *OS) { #ifndef CAPSTONE_DIET static const PatternsForOpcode OpToPatterns[] = { {PPC_ADDI, 0, 1 }, {PPC_ADDI8, 1, 1 }, {PPC_ADDIS, 2, 1 }, {PPC_ADDIS8, 3, 1 }, {PPC_ADDPCIS, 4, 1 }, {PPC_BCC, 5, 24 }, {PPC_BCCA, 29, 24 }, {PPC_BCCCTR, 53, 24 }, {PPC_BCCCTRL, 77, 24 }, {PPC_BCCL, 101, 24 }, {PPC_BCCLA, 125, 24 }, {PPC_BCCLR, 149, 24 }, {PPC_BCCLRL, 173, 24 }, {PPC_CMPD, 197, 1 }, {PPC_CMPDI, 198, 1 }, {PPC_CMPLD, 199, 1 }, {PPC_CMPLDI, 200, 1 }, {PPC_CMPLW, 201, 1 }, {PPC_CMPLWI, 202, 1 }, {PPC_CMPW, 203, 1 }, {PPC_CMPWI, 204, 1 }, {PPC_CNTLZW, 205, 1 }, {PPC_CNTLZW8, 206, 1 }, {PPC_CNTLZW8_rec, 207, 1 }, {PPC_CNTLZW_rec, 208, 1 }, {PPC_CP_PASTE_rec, 209, 1 }, {PPC_CREQV, 210, 1 }, {PPC_CRNOR, 211, 1 }, {PPC_CROR, 212, 1 }, {PPC_CRXOR, 213, 1 }, {PPC_ISEL, 214, 3 }, {PPC_ISEL8, 217, 3 }, {PPC_MBAR, 220, 1 }, {PPC_MFDCR, 221, 8 }, {PPC_MFSPR, 229, 46 }, {PPC_MFSPR8, 275, 19 }, {PPC_MFTB, 294, 1 }, {PPC_MFUDSCR, 295, 1 }, {PPC_MFVRSAVE, 296, 1 }, {PPC_MFVSRD, 297, 1 }, {PPC_MFVSRWZ, 298, 1 }, {PPC_MTCRF, 299, 1 }, {PPC_MTCRF8, 300, 1 }, {PPC_MTDCR, 301, 8 }, {PPC_MTFSF, 309, 1 }, {PPC_MTFSFI, 310, 1 }, {PPC_MTFSFI_rec, 311, 1 }, {PPC_MTFSF_rec, 312, 1 }, {PPC_MTMSR, 313, 1 }, {PPC_MTMSRD, 314, 1 }, {PPC_MTSPR, 315, 45 }, {PPC_MTSPR8, 360, 18 }, {PPC_MTUDSCR, 378, 1 }, {PPC_MTVRSAVE, 379, 1 }, {PPC_MTVSRD, 380, 1 }, {PPC_MTVSRWA, 381, 1 }, {PPC_MTVSRWZ, 382, 1 }, {PPC_NOR, 383, 1 }, {PPC_NOR8, 384, 1 }, {PPC_NOR8_rec, 385, 1 }, {PPC_NOR_rec, 386, 1 }, {PPC_OR, 387, 1 }, {PPC_OR8, 388, 1 }, {PPC_OR8_rec, 389, 1 }, {PPC_ORI, 390, 1 }, {PPC_ORI8, 391, 1 }, {PPC_OR_rec, 392, 1 }, {PPC_QVFLOGICALb, 393, 12 }, {PPC_RFEBB, 405, 1 }, {PPC_RLDCL, 406, 1 }, {PPC_RLDCL_rec, 407, 1 }, {PPC_RLDICL, 408, 2 }, {PPC_RLDICL_32_64, 410, 2 }, {PPC_RLDICL_rec, 412, 2 }, {PPC_RLWINM, 414, 2 }, {PPC_RLWINM8, 416, 2 }, {PPC_RLWINM8_rec, 418, 2 }, {PPC_RLWINM_rec, 420, 2 }, {PPC_RLWNM, 422, 1 }, {PPC_RLWNM8, 423, 1 }, {PPC_RLWNM8_rec, 424, 1 }, {PPC_RLWNM_rec, 425, 1 }, {PPC_SC, 426, 1 }, {PPC_SUBF, 427, 1 }, {PPC_SUBF8, 428, 1 }, {PPC_SUBF8_rec, 429, 1 }, {PPC_SUBFC, 430, 1 }, {PPC_SUBFC8, 431, 1 }, {PPC_SUBFC8_rec, 432, 1 }, {PPC_SUBFC_rec, 433, 1 }, {PPC_SUBF_rec, 434, 1 }, {PPC_SYNC, 435, 3 }, {PPC_TD, 438, 7 }, {PPC_TDI, 445, 7 }, {PPC_TEND, 452, 2 }, {PPC_TLBIE, 454, 1 }, {PPC_TLBRE2, 455, 2 }, {PPC_TLBWE2, 457, 2 }, {PPC_TSR, 459, 2 }, {PPC_TW, 461, 8 }, {PPC_TWI, 469, 7 }, {PPC_VNOR, 476, 1 }, {PPC_VOR, 477, 1 }, {PPC_WAIT, 478, 3 }, {PPC_XORI, 481, 1 }, {PPC_XORI8, 482, 1 }, {PPC_XVCPSGNDP, 483, 1 }, {PPC_XVCPSGNSP, 484, 1 }, {PPC_XXPERMDI, 485, 5 }, {PPC_XXPERMDIs, 490, 3 }, {PPC_gBC, 493, 11 }, {PPC_gBCA, 504, 11 }, {PPC_gBCAat, 515, 8 }, {PPC_gBCCTR, 523, 7 }, {PPC_gBCCTRL, 530, 7 }, {PPC_gBCL, 537, 11 }, {PPC_gBCLA, 548, 11 }, {PPC_gBCLAat, 559, 8 }, {PPC_gBCLR, 567, 17 }, {PPC_gBCLRL, 584, 17 }, {PPC_gBCLat, 601, 8 }, {PPC_gBCat, 609, 8 }, {0}, }; static const AliasPattern Patterns[] = { // PPC_ADDI - 0 {0, 0, 3, 2 }, // PPC_ADDI8 - 1 {0, 2, 3, 2 }, // PPC_ADDIS - 2 {12, 4, 3, 2 }, // PPC_ADDIS8 - 3 {12, 6, 3, 2 }, // PPC_ADDPCIS - 4 {25, 8, 2, 2 }, // PPC_BCC - 5 {33, 10, 3, 2 }, {46, 12, 3, 2 }, {55, 14, 3, 2 }, {69, 16, 3, 2 }, {79, 18, 3, 2 }, {93, 20, 3, 2 }, {103, 22, 3, 2 }, {116, 24, 3, 2 }, {125, 26, 3, 2 }, {139, 28, 3, 2 }, {149, 30, 3, 2 }, {163, 32, 3, 2 }, {173, 34, 3, 2 }, {186, 36, 3, 2 }, {195, 38, 3, 2 }, {209, 40, 3, 2 }, {219, 42, 3, 2 }, {233, 44, 3, 2 }, {243, 46, 3, 2 }, {256, 48, 3, 2 }, {265, 50, 3, 2 }, {279, 52, 3, 2 }, {289, 54, 3, 2 }, {303, 56, 3, 2 }, // PPC_BCCA - 29 {313, 58, 3, 2 }, {327, 60, 3, 2 }, {337, 62, 3, 2 }, {352, 64, 3, 2 }, {363, 66, 3, 2 }, {378, 68, 3, 2 }, {389, 70, 3, 2 }, {403, 72, 3, 2 }, {413, 74, 3, 2 }, {428, 76, 3, 2 }, {439, 78, 3, 2 }, {454, 80, 3, 2 }, {465, 82, 3, 2 }, {479, 84, 3, 2 }, {489, 86, 3, 2 }, {504, 88, 3, 2 }, {515, 90, 3, 2 }, {530, 92, 3, 2 }, {541, 94, 3, 2 }, {555, 96, 3, 2 }, {565, 98, 3, 2 }, {580, 100, 3, 2 }, {591, 102, 3, 2 }, {606, 104, 3, 2 }, // PPC_BCCCTR - 53 {617, 106, 2, 2 }, {627, 108, 2, 2 }, {634, 110, 2, 2 }, {645, 112, 2, 2 }, {653, 114, 2, 2 }, {664, 116, 2, 2 }, {672, 118, 2, 2 }, {682, 120, 2, 2 }, {689, 122, 2, 2 }, {700, 124, 2, 2 }, {708, 126, 2, 2 }, {719, 128, 2, 2 }, {727, 130, 2, 2 }, {737, 132, 2, 2 }, {744, 134, 2, 2 }, {755, 136, 2, 2 }, {763, 138, 2, 2 }, {774, 140, 2, 2 }, {782, 142, 2, 2 }, {792, 144, 2, 2 }, {799, 146, 2, 2 }, {810, 148, 2, 2 }, {818, 150, 2, 2 }, {829, 152, 2, 2 }, // PPC_BCCCTRL - 77 {837, 154, 2, 2 }, {848, 156, 2, 2 }, {856, 158, 2, 2 }, {868, 160, 2, 2 }, {877, 162, 2, 2 }, {889, 164, 2, 2 }, {898, 166, 2, 2 }, {909, 168, 2, 2 }, {917, 170, 2, 2 }, {929, 172, 2, 2 }, {938, 174, 2, 2 }, {950, 176, 2, 2 }, {959, 178, 2, 2 }, {970, 180, 2, 2 }, {978, 182, 2, 2 }, {990, 184, 2, 2 }, {999, 186, 2, 2 }, {1011, 188, 2, 2 }, {1020, 190, 2, 2 }, {1031, 192, 2, 2 }, {1039, 194, 2, 2 }, {1051, 196, 2, 2 }, {1060, 198, 2, 2 }, {1072, 200, 2, 2 }, // PPC_BCCL - 101 {1081, 202, 3, 2 }, {1095, 204, 3, 2 }, {1105, 206, 3, 2 }, {1120, 208, 3, 2 }, {1131, 210, 3, 2 }, {1146, 212, 3, 2 }, {1157, 214, 3, 2 }, {1171, 216, 3, 2 }, {1181, 218, 3, 2 }, {1196, 220, 3, 2 }, {1207, 222, 3, 2 }, {1222, 224, 3, 2 }, {1233, 226, 3, 2 }, {1247, 228, 3, 2 }, {1257, 230, 3, 2 }, {1272, 232, 3, 2 }, {1283, 234, 3, 2 }, {1298, 236, 3, 2 }, {1309, 238, 3, 2 }, {1323, 240, 3, 2 }, {1333, 242, 3, 2 }, {1348, 244, 3, 2 }, {1359, 246, 3, 2 }, {1374, 248, 3, 2 }, // PPC_BCCLA - 125 {1385, 250, 3, 2 }, {1400, 252, 3, 2 }, {1411, 254, 3, 2 }, {1427, 256, 3, 2 }, {1439, 258, 3, 2 }, {1455, 260, 3, 2 }, {1467, 262, 3, 2 }, {1482, 264, 3, 2 }, {1493, 266, 3, 2 }, {1509, 268, 3, 2 }, {1521, 270, 3, 2 }, {1537, 272, 3, 2 }, {1549, 274, 3, 2 }, {1564, 276, 3, 2 }, {1575, 278, 3, 2 }, {1591, 280, 3, 2 }, {1603, 282, 3, 2 }, {1619, 284, 3, 2 }, {1631, 286, 3, 2 }, {1646, 288, 3, 2 }, {1657, 290, 3, 2 }, {1673, 292, 3, 2 }, {1685, 294, 3, 2 }, {1701, 296, 3, 2 }, // PPC_BCCLR - 149 {1713, 298, 2, 2 }, {1722, 300, 2, 2 }, {1728, 302, 2, 2 }, {1738, 304, 2, 2 }, {1745, 306, 2, 2 }, {1755, 308, 2, 2 }, {1762, 310, 2, 2 }, {1771, 312, 2, 2 }, {1777, 314, 2, 2 }, {1787, 316, 2, 2 }, {1794, 318, 2, 2 }, {1804, 320, 2, 2 }, {1811, 322, 2, 2 }, {1820, 324, 2, 2 }, {1826, 326, 2, 2 }, {1836, 328, 2, 2 }, {1843, 330, 2, 2 }, {1853, 332, 2, 2 }, {1860, 334, 2, 2 }, {1869, 336, 2, 2 }, {1875, 338, 2, 2 }, {1885, 340, 2, 2 }, {1892, 342, 2, 2 }, {1902, 344, 2, 2 }, // PPC_BCCLRL - 173 {1909, 346, 2, 2 }, {1919, 348, 2, 2 }, {1926, 350, 2, 2 }, {1937, 352, 2, 2 }, {1945, 354, 2, 2 }, {1956, 356, 2, 2 }, {1964, 358, 2, 2 }, {1974, 360, 2, 2 }, {1981, 362, 2, 2 }, {1992, 364, 2, 2 }, {2000, 366, 2, 2 }, {2011, 368, 2, 2 }, {2019, 370, 2, 2 }, {2029, 372, 2, 2 }, {2036, 374, 2, 2 }, {2047, 376, 2, 2 }, {2055, 378, 2, 2 }, {2066, 380, 2, 2 }, {2074, 382, 2, 2 }, {2084, 384, 2, 2 }, {2091, 386, 2, 2 }, {2102, 388, 2, 2 }, {2110, 390, 2, 2 }, {2121, 392, 2, 2 }, // PPC_CMPD - 197 {2129, 394, 3, 3 }, // PPC_CMPDI - 198 {2141, 397, 3, 2 }, // PPC_CMPLD - 199 {2156, 399, 3, 3 }, // PPC_CMPLDI - 200 {2169, 402, 3, 2 }, // PPC_CMPLW - 201 {2185, 404, 3, 3 }, // PPC_CMPLWI - 202 {2198, 407, 3, 2 }, // PPC_CMPW - 203 {2214, 409, 3, 3 }, // PPC_CMPWI - 204 {2226, 412, 3, 2 }, // PPC_CNTLZW - 205 {2241, 414, 2, 2 }, // PPC_CNTLZW8 - 206 {2241, 416, 2, 2 }, // PPC_CNTLZW8_rec - 207 {2255, 418, 2, 2 }, // PPC_CNTLZW_rec - 208 {2255, 420, 2, 2 }, // PPC_CP_PASTE_rec - 209 {2270, 422, 3, 4 }, // PPC_CREQV - 210 {2284, 426, 3, 3 }, // PPC_CRNOR - 211 {2293, 429, 3, 3 }, // PPC_CROR - 212 {2306, 432, 3, 3 }, // PPC_CRXOR - 213 {2320, 435, 3, 3 }, // PPC_ISEL - 214 {2329, 438, 4, 4 }, {2347, 442, 4, 4 }, {2365, 446, 4, 4 }, // PPC_ISEL8 - 217 {2329, 450, 4, 4 }, {2347, 454, 4, 4 }, {2365, 458, 4, 4 }, // PPC_MBAR - 220 {2383, 462, 1, 2 }, // PPC_MFDCR - 221 {2388, 464, 2, 5 }, {2397, 469, 2, 5 }, {2406, 474, 2, 5 }, {2415, 479, 2, 5 }, {2424, 484, 2, 5 }, {2433, 489, 2, 5 }, {2442, 494, 2, 5 }, {2451, 499, 2, 5 }, // PPC_MFSPR - 229 {2460, 504, 2, 2 }, {2469, 506, 2, 5 }, {2480, 511, 2, 5 }, {2490, 516, 2, 5 }, {2500, 521, 2, 5 }, {2508, 526, 2, 5 }, {2517, 531, 2, 5 }, {2527, 536, 2, 5 }, {2537, 541, 2, 5 }, {2548, 546, 2, 5 }, {2557, 551, 2, 5 }, {2566, 556, 2, 5 }, {2576, 561, 2, 5 }, {2586, 566, 2, 5 }, {2596, 571, 2, 5 }, {2606, 576, 2, 5 }, {2615, 581, 2, 5 }, {2624, 586, 2, 5 }, {2633, 591, 2, 5 }, {2642, 596, 2, 5 }, {2655, 601, 2, 5 }, {2669, 606, 2, 5 }, {2683, 611, 2, 5 }, {2697, 616, 2, 5 }, {2711, 621, 2, 5 }, {2725, 626, 2, 5 }, {2739, 631, 2, 5 }, {2753, 636, 2, 5 }, {2767, 641, 2, 5 }, {2781, 646, 2, 5 }, {2795, 651, 2, 5 }, {2809, 656, 2, 5 }, {2823, 661, 2, 5 }, {2837, 666, 2, 5 }, {2851, 671, 2, 5 }, {2865, 676, 2, 5 }, {2879, 681, 2, 5 }, {2888, 686, 2, 5 }, {2897, 691, 2, 5 }, {2907, 696, 2, 5 }, {2916, 701, 2, 5 }, {2926, 706, 2, 5 }, {2936, 711, 2, 5 }, {2946, 716, 2, 5 }, {2956, 721, 2, 5 }, {2966, 726, 2, 5 }, // PPC_MFSPR8 - 275 {2460, 731, 2, 2 }, {2469, 733, 2, 5 }, {2480, 738, 2, 5 }, {2490, 743, 2, 5 }, {2500, 748, 2, 5 }, {2508, 753, 2, 5 }, {2517, 758, 2, 5 }, {2527, 763, 2, 5 }, {2537, 768, 2, 5 }, {2548, 773, 2, 5 }, {2557, 778, 2, 5 }, {2566, 783, 2, 5 }, {2576, 788, 2, 5 }, {2586, 793, 2, 5 }, {2596, 798, 2, 5 }, {2606, 803, 2, 5 }, {2624, 808, 2, 5 }, {2633, 813, 2, 5 }, {2642, 818, 2, 5 }, // PPC_MFTB - 294 {2976, 823, 2, 2 }, // PPC_MFUDSCR - 295 {2469, 825, 1, 4 }, // PPC_MFVRSAVE - 296 {2985, 829, 1, 1 }, // PPC_MFVSRD - 297 {2997, 830, 2, 2 }, // PPC_MFVSRWZ - 298 {3011, 832, 2, 2 }, // PPC_MTCRF - 299 {3026, 834, 2, 2 }, // PPC_MTCRF8 - 300 {3026, 836, 2, 2 }, // PPC_MTDCR - 301 {3034, 838, 2, 5 }, {3043, 843, 2, 5 }, {3052, 848, 2, 5 }, {3061, 853, 2, 5 }, {3070, 858, 2, 5 }, {3079, 863, 2, 5 }, {3088, 868, 2, 5 }, {3097, 873, 2, 5 }, // PPC_MTFSF - 309 {3106, 878, 4, 5 }, // PPC_MTFSFI - 310 {3119, 883, 3, 4 }, // PPC_MTFSFI_rec - 311 {3137, 887, 3, 4 }, // PPC_MTFSF_rec - 312 {3156, 891, 4, 5 }, // PPC_MTMSR - 313 {3170, 896, 2, 5 }, // PPC_MTMSRD - 314 {3179, 901, 2, 5 }, // PPC_MTSPR - 315 {3189, 906, 2, 2 }, {3198, 908, 2, 5 }, {3209, 913, 2, 5 }, {3217, 918, 2, 5 }, {3226, 923, 2, 5 }, {3236, 928, 2, 5 }, {3246, 933, 2, 5 }, {3257, 938, 2, 5 }, {3266, 943, 2, 5 }, {3275, 948, 2, 5 }, {3285, 953, 2, 5 }, {3295, 958, 2, 5 }, {3305, 963, 2, 5 }, {3315, 968, 2, 5 }, {3324, 973, 2, 5 }, {3333, 978, 2, 5 }, {3342, 983, 2, 5 }, {3351, 988, 2, 5 }, {3360, 993, 2, 5 }, {3373, 998, 2, 5 }, {3387, 1003, 2, 5 }, {3401, 1008, 2, 5 }, {3415, 1013, 2, 5 }, {3429, 1018, 2, 5 }, {3443, 1023, 2, 5 }, {3457, 1028, 2, 5 }, {3471, 1033, 2, 5 }, {3485, 1038, 2, 5 }, {3499, 1043, 2, 5 }, {3513, 1048, 2, 5 }, {3527, 1053, 2, 5 }, {3541, 1058, 2, 5 }, {3555, 1063, 2, 5 }, {3569, 1068, 2, 5 }, {3583, 1073, 2, 5 }, {3597, 1078, 2, 5 }, {3606, 1083, 2, 5 }, {3615, 1088, 2, 5 }, {3625, 1093, 2, 5 }, {3634, 1098, 2, 5 }, {3644, 1103, 2, 5 }, {3654, 1108, 2, 5 }, {3664, 1113, 2, 5 }, {3674, 1118, 2, 5 }, {3684, 1123, 2, 5 }, // PPC_MTSPR8 - 360 {3189, 1128, 2, 2 }, {3198, 1130, 2, 5 }, {3209, 1135, 2, 5 }, {3217, 1140, 2, 5 }, {3226, 1145, 2, 5 }, {3236, 1150, 2, 5 }, {3246, 1155, 2, 5 }, {3257, 1160, 2, 5 }, {3266, 1165, 2, 5 }, {3275, 1170, 2, 5 }, {3285, 1175, 2, 5 }, {3295, 1180, 2, 5 }, {3305, 1185, 2, 5 }, {3315, 1190, 2, 5 }, {3333, 1195, 2, 5 }, {3342, 1200, 2, 5 }, {3351, 1205, 2, 5 }, {3360, 1210, 2, 5 }, // PPC_MTUDSCR - 378 {3694, 1215, 1, 4 }, // PPC_MTVRSAVE - 379 {3705, 1219, 1, 1 }, // PPC_MTVSRD - 380 {3717, 1220, 2, 2 }, // PPC_MTVSRWA - 381 {3731, 1222, 2, 2 }, // PPC_MTVSRWZ - 382 {3746, 1224, 2, 2 }, // PPC_NOR - 383 {3761, 1226, 3, 3 }, // PPC_NOR8 - 384 {3761, 1229, 3, 3 }, // PPC_NOR8_rec - 385 {3772, 1232, 3, 3 }, // PPC_NOR_rec - 386 {3772, 1235, 3, 3 }, // PPC_OR - 387 {3784, 1238, 3, 3 }, // PPC_OR8 - 388 {3784, 1241, 3, 3 }, // PPC_OR8_rec - 389 {3794, 1244, 3, 3 }, // PPC_ORI - 390 {3805, 1247, 3, 3 }, // PPC_ORI8 - 391 {3805, 1250, 3, 3 }, // PPC_OR_rec - 392 {3794, 1253, 3, 3 }, // PPC_QVFLOGICALb - 393 {3809, 1256, 4, 5 }, {3819, 1261, 4, 5 }, {3837, 1266, 4, 5 }, {3856, 1271, 4, 5 }, {3871, 1276, 4, 5 }, {3889, 1281, 4, 5 }, {3906, 1286, 4, 5 }, {3924, 1291, 4, 5 }, {3942, 1296, 4, 5 }, {3956, 1301, 4, 5 }, {3974, 1306, 4, 5 }, {3993, 1311, 4, 5 }, // PPC_RFEBB - 405 {4003, 1316, 1, 1 }, // PPC_RLDCL - 406 {4009, 1317, 4, 4 }, // PPC_RLDCL_rec - 407 {4026, 1321, 4, 4 }, // PPC_RLDICL - 408 {4044, 1325, 4, 4 }, {4064, 1329, 4, 3 }, // PPC_RLDICL_32_64 - 410 {4044, 1332, 4, 4 }, {4064, 1336, 4, 3 }, // PPC_RLDICL_rec - 412 {4084, 1339, 4, 4 }, {4105, 1343, 4, 3 }, // PPC_RLWINM - 414 {4126, 1346, 5, 5 }, {4146, 1351, 5, 5 }, // PPC_RLWINM8 - 416 {4126, 1356, 5, 5 }, {4146, 1361, 5, 5 }, // PPC_RLWINM8_rec - 418 {4166, 1366, 5, 5 }, {4187, 1371, 5, 5 }, // PPC_RLWINM_rec - 420 {4166, 1376, 5, 5 }, {4187, 1381, 5, 5 }, // PPC_RLWNM - 422 {4208, 1386, 5, 5 }, // PPC_RLWNM8 - 423 {4208, 1391, 5, 5 }, // PPC_RLWNM8_rec - 424 {4225, 1396, 5, 5 }, // PPC_RLWNM_rec - 425 {4225, 1401, 5, 5 }, // PPC_SC - 426 {4243, 1406, 1, 1 }, // PPC_SUBF - 427 {4246, 1407, 3, 3 }, // PPC_SUBF8 - 428 {4246, 1410, 3, 3 }, // PPC_SUBF8_rec - 429 {4261, 1413, 3, 3 }, // PPC_SUBFC - 430 {4277, 1416, 3, 3 }, // PPC_SUBFC8 - 431 {4277, 1419, 3, 3 }, // PPC_SUBFC8_rec - 432 {4293, 1422, 3, 3 }, // PPC_SUBFC_rec - 433 {4293, 1425, 3, 3 }, // PPC_SUBF_rec - 434 {4261, 1428, 3, 3 }, // PPC_SYNC - 435 {4310, 1431, 1, 2 }, {4315, 1433, 1, 2 }, {4322, 1435, 1, 2 }, // PPC_TD - 438 {4330, 1437, 3, 3 }, {4342, 1440, 3, 3 }, {4354, 1443, 3, 3 }, {4366, 1446, 3, 3 }, {4378, 1449, 3, 3 }, {4391, 1452, 3, 3 }, {4404, 1455, 3, 3 }, // PPC_TDI - 445 {4415, 1458, 3, 2 }, {4430, 1460, 3, 2 }, {4445, 1462, 3, 2 }, {4460, 1464, 3, 2 }, {4475, 1466, 3, 2 }, {4491, 1468, 3, 2 }, {4507, 1470, 3, 2 }, // PPC_TEND - 452 {4521, 1472, 1, 1 }, {4527, 1473, 1, 1 }, // PPC_TLBIE - 454 {4536, 1474, 2, 2 }, // PPC_TLBRE2 - 455 {4545, 1476, 3, 4 }, {4560, 1480, 3, 4 }, // PPC_TLBWE2 - 457 {4575, 1484, 3, 4 }, {4590, 1488, 3, 4 }, // PPC_TSR - 459 {4605, 1492, 1, 1 }, {4615, 1493, 1, 1 }, // PPC_TW - 461 {4624, 1494, 3, 3 }, {4629, 1497, 3, 3 }, {4641, 1500, 3, 3 }, {4653, 1503, 3, 3 }, {4665, 1506, 3, 3 }, {4677, 1509, 3, 3 }, {4690, 1512, 3, 3 }, {4703, 1515, 3, 3 }, // PPC_TWI - 469 {4714, 1518, 3, 2 }, {4729, 1520, 3, 2 }, {4744, 1522, 3, 2 }, {4759, 1524, 3, 2 }, {4774, 1526, 3, 2 }, {4790, 1528, 3, 2 }, {4806, 1530, 3, 2 }, // PPC_VNOR - 476 {4820, 1532, 3, 3 }, // PPC_VOR - 477 {4832, 1535, 3, 3 }, // PPC_WAIT - 478 {4843, 1538, 1, 1 }, {4848, 1539, 1, 1 }, {4856, 1540, 1, 1 }, // PPC_XORI - 481 {4865, 1541, 3, 3 }, // PPC_XORI8 - 482 {4865, 1544, 3, 3 }, // PPC_XVCPSGNDP - 483 {4870, 1547, 3, 3 }, // PPC_XVCPSGNSP - 484 {4885, 1550, 3, 3 }, // PPC_XXPERMDI - 485 {4900, 1553, 4, 7 }, {4918, 1560, 4, 7 }, {4936, 1567, 4, 4 }, {4955, 1571, 4, 4 }, {4974, 1575, 4, 4 }, // PPC_XXPERMDIs - 490 {4900, 1579, 3, 6 }, {4918, 1585, 3, 6 }, {4974, 1591, 3, 3 }, // PPC_gBC - 493 {4989, 1594, 3, 2 }, {5001, 1596, 3, 2 }, {5013, 1598, 3, 2 }, {5026, 1600, 3, 2 }, {5039, 1602, 3, 2 }, {5052, 1604, 3, 2 }, {5065, 1606, 3, 2 }, {5080, 1608, 3, 2 }, {5095, 1610, 3, 2 }, {5109, 1612, 3, 2 }, {5123, 1614, 3, 2 }, // PPC_gBCA - 504 {5130, 1616, 3, 2 }, {5143, 1618, 3, 2 }, {5156, 1620, 3, 2 }, {5170, 1622, 3, 2 }, {5184, 1624, 3, 2 }, {5198, 1626, 3, 2 }, {5212, 1628, 3, 2 }, {5228, 1630, 3, 2 }, {5244, 1632, 3, 2 }, {5259, 1634, 3, 2 }, {5274, 1636, 3, 2 }, // PPC_gBCAat - 515 {5282, 1638, 4, 3 }, {5302, 1641, 4, 3 }, {5322, 1644, 4, 3 }, {5331, 1647, 4, 3 }, {5341, 1650, 4, 3 }, {5351, 1653, 4, 3 }, {5362, 1656, 4, 3 }, {5372, 1659, 4, 3 }, // PPC_gBCCTR - 523 {5383, 1662, 3, 3 }, {5392, 1665, 3, 3 }, {5401, 1668, 3, 3 }, {5411, 1671, 3, 3 }, {5421, 1674, 3, 3 }, {5431, 1677, 3, 3 }, {5441, 1680, 3, 3 }, // PPC_gBCCTRL - 530 {5446, 1683, 3, 3 }, {5456, 1686, 3, 3 }, {5466, 1689, 3, 3 }, {5477, 1692, 3, 3 }, {5488, 1695, 3, 3 }, {5499, 1698, 3, 3 }, {5510, 1701, 3, 3 }, // PPC_gBCL - 537 {5516, 1704, 3, 2 }, {5529, 1706, 3, 2 }, {5542, 1708, 3, 2 }, {5556, 1710, 3, 2 }, {5570, 1712, 3, 2 }, {5584, 1714, 3, 2 }, {5598, 1716, 3, 2 }, {5614, 1718, 3, 2 }, {5630, 1720, 3, 2 }, {5645, 1722, 3, 2 }, {5660, 1724, 3, 2 }, // PPC_gBCLA - 548 {5668, 1726, 3, 2 }, {5682, 1728, 3, 2 }, {5696, 1730, 3, 2 }, {5711, 1732, 3, 2 }, {5726, 1734, 3, 2 }, {5741, 1736, 3, 2 }, {5756, 1738, 3, 2 }, {5773, 1740, 3, 2 }, {5790, 1742, 3, 2 }, {5806, 1744, 3, 2 }, {5822, 1746, 3, 2 }, // PPC_gBCLAat - 559 {5831, 1748, 4, 3 }, {5852, 1751, 4, 3 }, {5873, 1754, 4, 3 }, {5884, 1757, 4, 3 }, {5896, 1760, 4, 3 }, {5908, 1763, 4, 3 }, {5921, 1766, 4, 3 }, {5933, 1769, 4, 3 }, // PPC_gBCLR - 567 {5946, 1772, 3, 3 }, {5952, 1775, 3, 3 }, {5959, 1778, 3, 3 }, {5966, 1781, 3, 3 }, {5974, 1784, 3, 3 }, {5981, 1787, 3, 3 }, {5989, 1790, 3, 3 }, {5997, 1793, 3, 3 }, {6005, 1796, 3, 3 }, {6014, 1799, 3, 3 }, {6023, 1802, 3, 3 }, {6032, 1805, 3, 3 }, {6041, 1808, 3, 3 }, {6052, 1811, 3, 3 }, {6063, 1814, 3, 3 }, {6073, 1817, 3, 3 }, {6083, 1820, 3, 3 }, // PPC_gBCLRL - 584 {6087, 1823, 3, 3 }, {6094, 1826, 3, 3 }, {6102, 1829, 3, 3 }, {6110, 1832, 3, 3 }, {6119, 1835, 3, 3 }, {6127, 1838, 3, 3 }, {6136, 1841, 3, 3 }, {6145, 1844, 3, 3 }, {6154, 1847, 3, 3 }, {6164, 1850, 3, 3 }, {6174, 1853, 3, 3 }, {6184, 1856, 3, 3 }, {6194, 1859, 3, 3 }, {6206, 1862, 3, 3 }, {6218, 1865, 3, 3 }, {6229, 1868, 3, 3 }, {6240, 1871, 3, 3 }, // PPC_gBCLat - 601 {6245, 1874, 4, 3 }, {6265, 1877, 4, 3 }, {6285, 1880, 4, 3 }, {6295, 1883, 4, 3 }, {6306, 1886, 4, 3 }, {6317, 1889, 4, 3 }, {6329, 1892, 4, 3 }, {6340, 1895, 4, 3 }, // PPC_gBCat - 609 {6352, 1898, 4, 3 }, {6371, 1901, 4, 3 }, {6390, 1904, 4, 3 }, {6399, 1907, 4, 3 }, {6409, 1910, 4, 3 }, {6419, 1913, 4, 3 }, {6430, 1916, 4, 3 }, {6440, 1919, 4, 3 }, {0}, }; static const AliasPatternCond Conds[] = { // (ADDI gprc:$rD, ZERO, s16imm:$imm) - 0 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Reg, PPC_ZERO}, // (ADDI8 g8rc:$rD, ZERO8, s16imm64:$imm) - 2 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Reg, PPC_ZERO8}, // (ADDIS gprc:$rD, ZERO, s17imm:$imm) - 4 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Reg, PPC_ZERO}, // (ADDIS8 g8rc:$rD, ZERO8, s17imm64:$imm) - 6 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Reg, PPC_ZERO8}, // (ADDPCIS g8rc:$RT, 0) - 8 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (BCC 12, crrc:$cc, condbrtarget:$dst) - 10 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 12, CR0, condbrtarget:$dst) - 12 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 14, crrc:$cc, condbrtarget:$dst) - 14 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 14, CR0, condbrtarget:$dst) - 16 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 15, crrc:$cc, condbrtarget:$dst) - 18 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 15, CR0, condbrtarget:$dst) - 20 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 44, crrc:$cc, condbrtarget:$dst) - 22 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 44, CR0, condbrtarget:$dst) - 24 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 46, crrc:$cc, condbrtarget:$dst) - 26 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 46, CR0, condbrtarget:$dst) - 28 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 47, crrc:$cc, condbrtarget:$dst) - 30 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 47, CR0, condbrtarget:$dst) - 32 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 76, crrc:$cc, condbrtarget:$dst) - 34 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 76, CR0, condbrtarget:$dst) - 36 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 78, crrc:$cc, condbrtarget:$dst) - 38 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 78, CR0, condbrtarget:$dst) - 40 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 79, crrc:$cc, condbrtarget:$dst) - 42 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 79, CR0, condbrtarget:$dst) - 44 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 68, crrc:$cc, condbrtarget:$dst) - 46 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 68, CR0, condbrtarget:$dst) - 48 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 70, crrc:$cc, condbrtarget:$dst) - 50 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 70, CR0, condbrtarget:$dst) - 52 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCC 71, crrc:$cc, condbrtarget:$dst) - 54 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCC 71, CR0, condbrtarget:$dst) - 56 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 12, crrc:$cc, abscondbrtarget:$dst) - 58 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 12, CR0, abscondbrtarget:$dst) - 60 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 14, crrc:$cc, abscondbrtarget:$dst) - 62 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 14, CR0, abscondbrtarget:$dst) - 64 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 15, crrc:$cc, abscondbrtarget:$dst) - 66 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 15, CR0, abscondbrtarget:$dst) - 68 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 44, crrc:$cc, abscondbrtarget:$dst) - 70 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 44, CR0, abscondbrtarget:$dst) - 72 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 46, crrc:$cc, abscondbrtarget:$dst) - 74 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 46, CR0, abscondbrtarget:$dst) - 76 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 47, crrc:$cc, abscondbrtarget:$dst) - 78 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 47, CR0, abscondbrtarget:$dst) - 80 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 76, crrc:$cc, abscondbrtarget:$dst) - 82 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 76, CR0, abscondbrtarget:$dst) - 84 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 78, crrc:$cc, abscondbrtarget:$dst) - 86 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 78, CR0, abscondbrtarget:$dst) - 88 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 79, crrc:$cc, abscondbrtarget:$dst) - 90 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 79, CR0, abscondbrtarget:$dst) - 92 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 68, crrc:$cc, abscondbrtarget:$dst) - 94 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 68, CR0, abscondbrtarget:$dst) - 96 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 70, crrc:$cc, abscondbrtarget:$dst) - 98 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 70, CR0, abscondbrtarget:$dst) - 100 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCA 71, crrc:$cc, abscondbrtarget:$dst) - 102 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCA 71, CR0, abscondbrtarget:$dst) - 104 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 12, crrc:$cc) - 106 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 12, CR0) - 108 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 14, crrc:$cc) - 110 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 14, CR0) - 112 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 15, crrc:$cc) - 114 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 15, CR0) - 116 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 44, crrc:$cc) - 118 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 44, CR0) - 120 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 46, crrc:$cc) - 122 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 46, CR0) - 124 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 47, crrc:$cc) - 126 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 47, CR0) - 128 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 76, crrc:$cc) - 130 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 76, CR0) - 132 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 78, crrc:$cc) - 134 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 78, CR0) - 136 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 79, crrc:$cc) - 138 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 79, CR0) - 140 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 68, crrc:$cc) - 142 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 68, CR0) - 144 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 70, crrc:$cc) - 146 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 70, CR0) - 148 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTR 71, crrc:$cc) - 150 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTR 71, CR0) - 152 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 12, crrc:$cc) - 154 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 12, CR0) - 156 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 14, crrc:$cc) - 158 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 14, CR0) - 160 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 15, crrc:$cc) - 162 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 15, CR0) - 164 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 44, crrc:$cc) - 166 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 44, CR0) - 168 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 46, crrc:$cc) - 170 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 46, CR0) - 172 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 47, crrc:$cc) - 174 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 47, CR0) - 176 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 76, crrc:$cc) - 178 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 76, CR0) - 180 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 78, crrc:$cc) - 182 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 78, CR0) - 184 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 79, crrc:$cc) - 186 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 79, CR0) - 188 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 68, crrc:$cc) - 190 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 68, CR0) - 192 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 70, crrc:$cc) - 194 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 70, CR0) - 196 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCCTRL 71, crrc:$cc) - 198 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCCTRL 71, CR0) - 200 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 12, crrc:$cc, condbrtarget:$dst) - 202 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 12, CR0, condbrtarget:$dst) - 204 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 14, crrc:$cc, condbrtarget:$dst) - 206 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 14, CR0, condbrtarget:$dst) - 208 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 15, crrc:$cc, condbrtarget:$dst) - 210 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 15, CR0, condbrtarget:$dst) - 212 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 44, crrc:$cc, condbrtarget:$dst) - 214 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 44, CR0, condbrtarget:$dst) - 216 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 46, crrc:$cc, condbrtarget:$dst) - 218 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 46, CR0, condbrtarget:$dst) - 220 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 47, crrc:$cc, condbrtarget:$dst) - 222 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 47, CR0, condbrtarget:$dst) - 224 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 76, crrc:$cc, condbrtarget:$dst) - 226 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 76, CR0, condbrtarget:$dst) - 228 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 78, crrc:$cc, condbrtarget:$dst) - 230 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 78, CR0, condbrtarget:$dst) - 232 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 79, crrc:$cc, condbrtarget:$dst) - 234 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 79, CR0, condbrtarget:$dst) - 236 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 68, crrc:$cc, condbrtarget:$dst) - 238 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 68, CR0, condbrtarget:$dst) - 240 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 70, crrc:$cc, condbrtarget:$dst) - 242 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 70, CR0, condbrtarget:$dst) - 244 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCL 71, crrc:$cc, condbrtarget:$dst) - 246 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCL 71, CR0, condbrtarget:$dst) - 248 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 12, crrc:$cc, abscondbrtarget:$dst) - 250 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 12, CR0, abscondbrtarget:$dst) - 252 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 14, crrc:$cc, abscondbrtarget:$dst) - 254 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 14, CR0, abscondbrtarget:$dst) - 256 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 15, crrc:$cc, abscondbrtarget:$dst) - 258 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 15, CR0, abscondbrtarget:$dst) - 260 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 44, crrc:$cc, abscondbrtarget:$dst) - 262 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 44, CR0, abscondbrtarget:$dst) - 264 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 46, crrc:$cc, abscondbrtarget:$dst) - 266 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 46, CR0, abscondbrtarget:$dst) - 268 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 47, crrc:$cc, abscondbrtarget:$dst) - 270 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 47, CR0, abscondbrtarget:$dst) - 272 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 76, crrc:$cc, abscondbrtarget:$dst) - 274 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 76, CR0, abscondbrtarget:$dst) - 276 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 78, crrc:$cc, abscondbrtarget:$dst) - 278 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 78, CR0, abscondbrtarget:$dst) - 280 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 79, crrc:$cc, abscondbrtarget:$dst) - 282 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 79, CR0, abscondbrtarget:$dst) - 284 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 68, crrc:$cc, abscondbrtarget:$dst) - 286 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 68, CR0, abscondbrtarget:$dst) - 288 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 70, crrc:$cc, abscondbrtarget:$dst) - 290 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 70, CR0, abscondbrtarget:$dst) - 292 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLA 71, crrc:$cc, abscondbrtarget:$dst) - 294 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLA 71, CR0, abscondbrtarget:$dst) - 296 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 12, crrc:$cc) - 298 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 12, CR0) - 300 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 14, crrc:$cc) - 302 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 14, CR0) - 304 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 15, crrc:$cc) - 306 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 15, CR0) - 308 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 44, crrc:$cc) - 310 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 44, CR0) - 312 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 46, crrc:$cc) - 314 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 46, CR0) - 316 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 47, crrc:$cc) - 318 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 47, CR0) - 320 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 76, crrc:$cc) - 322 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 76, CR0) - 324 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 78, crrc:$cc) - 326 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 78, CR0) - 328 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 79, crrc:$cc) - 330 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 79, CR0) - 332 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 68, crrc:$cc) - 334 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 68, CR0) - 336 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 70, crrc:$cc) - 338 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 70, CR0) - 340 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLR 71, crrc:$cc) - 342 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLR 71, CR0) - 344 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 12, crrc:$cc) - 346 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 12, CR0) - 348 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 14, crrc:$cc) - 350 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 14, CR0) - 352 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 15, crrc:$cc) - 354 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 15, CR0) - 356 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 44, crrc:$cc) - 358 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 44, CR0) - 360 {AliasPatternCond_K_Imm, (uint32_t)44}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 46, crrc:$cc) - 362 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 46, CR0) - 364 {AliasPatternCond_K_Imm, (uint32_t)46}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 47, crrc:$cc) - 366 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 47, CR0) - 368 {AliasPatternCond_K_Imm, (uint32_t)47}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 76, crrc:$cc) - 370 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 76, CR0) - 372 {AliasPatternCond_K_Imm, (uint32_t)76}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 78, crrc:$cc) - 374 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 78, CR0) - 376 {AliasPatternCond_K_Imm, (uint32_t)78}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 79, crrc:$cc) - 378 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 79, CR0) - 380 {AliasPatternCond_K_Imm, (uint32_t)79}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 68, crrc:$cc) - 382 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 68, CR0) - 384 {AliasPatternCond_K_Imm, (uint32_t)68}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 70, crrc:$cc) - 386 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 70, CR0) - 388 {AliasPatternCond_K_Imm, (uint32_t)70}, {AliasPatternCond_K_Reg, PPC_CR0}, // (BCCLRL 71, crrc:$cc) - 390 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_RegClass, PPC_CRRCRegClassID}, // (BCCLRL 71, CR0) - 392 {AliasPatternCond_K_Imm, (uint32_t)71}, {AliasPatternCond_K_Reg, PPC_CR0}, // (CMPD CR0, g8rc:$rA, g8rc:$rB) - 394 {AliasPatternCond_K_Reg, PPC_CR0}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (CMPDI CR0, g8rc:$rA, s16imm64:$imm) - 397 {AliasPatternCond_K_Reg, PPC_CR0}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (CMPLD CR0, g8rc:$rA, g8rc:$rB) - 399 {AliasPatternCond_K_Reg, PPC_CR0}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (CMPLDI CR0, g8rc:$rA, u16imm64:$imm) - 402 {AliasPatternCond_K_Reg, PPC_CR0}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (CMPLW CR0, gprc:$rA, gprc:$rB) - 404 {AliasPatternCond_K_Reg, PPC_CR0}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (CMPLWI CR0, gprc:$rA, u16imm:$imm) - 407 {AliasPatternCond_K_Reg, PPC_CR0}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (CMPW CR0, gprc:$rA, gprc:$rB) - 409 {AliasPatternCond_K_Reg, PPC_CR0}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (CMPWI CR0, gprc:$rA, s16imm:$imm) - 412 {AliasPatternCond_K_Reg, PPC_CR0}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (CNTLZW gprc:$rA, gprc:$rS) - 414 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (CNTLZW8 g8rc:$rA, g8rc:$rS) - 416 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (CNTLZW8_rec g8rc:$rA, g8rc:$rS) - 418 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (CNTLZW_rec gprc:$rA, gprc:$rS) - 420 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (CP_PASTE_rec gprc:$RA, gprc:$RB, 1) - 422 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_Feature, PPC_FeatureISA2_06}, // (CREQV crbitrc:$bx, crbitrc:$bx, crbitrc:$bx) - 426 {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_TiedReg, 0}, {AliasPatternCond_K_TiedReg, 0}, // (CRNOR crbitrc:$bx, crbitrc:$by, crbitrc:$by) - 429 {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (CROR crbitrc:$bx, crbitrc:$by, crbitrc:$by) - 432 {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (CRXOR crbitrc:$bx, crbitrc:$bx, crbitrc:$bx) - 435 {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_TiedReg, 0}, {AliasPatternCond_K_TiedReg, 0}, // (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0LT) - 438 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRC_NOR0RegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0GT) - 442 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRC_NOR0RegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Reg, PPC_CR0GT}, // (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0EQ) - 446 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRC_NOR0RegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Reg, PPC_CR0EQ}, // (ISEL8 g8rc:$rT, g8rc_nox0:$rA, g8rc:$rB, CR0LT) - 450 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RC_NOX0RegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (ISEL8 g8rc:$rT, g8rc_nox0:$rA, g8rc:$rB, CR0GT) - 454 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RC_NOX0RegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Reg, PPC_CR0GT}, // (ISEL8 g8rc:$rT, g8rc_nox0:$rA, g8rc:$rB, CR0EQ) - 458 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RC_NOX0RegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Reg, PPC_CR0EQ}, // (MBAR 0) - 462 {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Feature, PPC_FeatureBookE}, // (MFDCR gprc:$Rx, 128) - 464 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)128}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFDCR gprc:$Rx, 129) - 469 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)129}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFDCR gprc:$Rx, 130) - 474 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)130}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFDCR gprc:$Rx, 131) - 479 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)131}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFDCR gprc:$Rx, 132) - 484 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)132}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFDCR gprc:$Rx, 133) - 489 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)133}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFDCR gprc:$Rx, 134) - 494 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)134}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFDCR gprc:$Rx, 135) - 499 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)135}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 1) - 504 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)1}, // (MFSPR gprc:$Rx, 3) - 506 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 4) - 511 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 5) - 516 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)5}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 8) - 521 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 9) - 526 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)9}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 13) - 531 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)13}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 17) - 536 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)17}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 18) - 541 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)18}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 19) - 546 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)19}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 22) - 551 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)22}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 25) - 556 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)25}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 26) - 561 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)26}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 27) - 566 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)27}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 28) - 571 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)28}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 29) - 576 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)29}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 48) - 581 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)48}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$RT, 280) - 586 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)280}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$RT, 287) - 591 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)287}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 512) - 596 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)512}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 536) - 601 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)536}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 537) - 606 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)537}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 528) - 611 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)528}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 529) - 616 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)529}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 538) - 621 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)538}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 539) - 626 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)539}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 530) - 631 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)530}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 531) - 636 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)531}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 540) - 641 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)540}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 541) - 646 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)541}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 532) - 651 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)532}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 533) - 656 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)533}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 542) - 661 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)542}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 543) - 666 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)543}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 534) - 671 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)534}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 535) - 676 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)535}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$RT, 896) - 681 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)896}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 980) - 686 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)980}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 981) - 691 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)981}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 986) - 696 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)986}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 988) - 701 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)988}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 989) - 706 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)989}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 990) - 711 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)990}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 991) - 716 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)991}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 1018) - 721 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)1018}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR gprc:$Rx, 1019) - 726 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)1019}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 1) - 731 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)1}, // (MFSPR8 g8rc:$Rx, 3) - 733 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 4) - 738 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 5) - 743 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)5}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 8) - 748 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 9) - 753 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)9}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 13) - 758 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)13}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 17) - 763 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)17}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 18) - 768 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)18}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 19) - 773 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)19}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 22) - 778 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)22}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 25) - 783 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)25}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 26) - 788 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)26}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 27) - 793 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)27}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 28) - 798 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)28}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 29) - 803 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)29}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$RT, 280) - 808 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)280}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$RT, 287) - 813 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)287}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFSPR8 g8rc:$Rx, 512) - 818 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)512}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFTB gprc:$Rx, 269) - 823 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)269}, // (MFUDSCR gprc:$Rx) - 825 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MFVRSAVE gprc:$rS) - 829 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (MFVSRD g8rc:$rA, f8rc:$src) - 830 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_F8RCRegClassID}, // (MFVSRWZ gprc:$rA, f8rc:$src) - 832 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_F8RCRegClassID}, // (MTCRF 255, gprc:$rA) - 834 {AliasPatternCond_K_Imm, (uint32_t)255}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (MTCRF8 255, g8rc:$rA) - 836 {AliasPatternCond_K_Imm, (uint32_t)255}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (MTDCR gprc:$Rx, 128) - 838 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)128}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTDCR gprc:$Rx, 129) - 843 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)129}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTDCR gprc:$Rx, 130) - 848 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)130}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTDCR gprc:$Rx, 131) - 853 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)131}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTDCR gprc:$Rx, 132) - 858 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)132}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTDCR gprc:$Rx, 133) - 863 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)133}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTDCR gprc:$Rx, 134) - 868 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)134}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTDCR gprc:$Rx, 135) - 873 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)135}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTFSF i32imm:$FLM, f8rc:$FRB, 0, 0) - 878 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_RegClass, PPC_F8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Feature, PPC_FeatureISA2_07}, // (MTFSFI u3imm:$BF, u4imm:$U, 0) - 883 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Feature, PPC_FeatureISA2_07}, // (MTFSFI_rec u3imm:$BF, u4imm:$U, 0) - 887 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Feature, PPC_FeatureISA2_07}, // (MTFSF_rec i32imm:$FLM, f8rc:$FRB, 0, 0) - 891 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_RegClass, PPC_F8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Feature, PPC_FeatureISA2_07}, // (MTMSR gprc:$RS, 0) - 896 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTMSRD gprc:$RS, 0) - 901 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 1, gprc:$Rx) - 906 {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (MTSPR 3, gprc:$Rx) - 908 {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 8, gprc:$Rx) - 913 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 9, gprc:$Rx) - 918 {AliasPatternCond_K_Imm, (uint32_t)9}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 13, gprc:$Rx) - 923 {AliasPatternCond_K_Imm, (uint32_t)13}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 17, gprc:$Rx) - 928 {AliasPatternCond_K_Imm, (uint32_t)17}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 18, gprc:$Rx) - 933 {AliasPatternCond_K_Imm, (uint32_t)18}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 19, gprc:$Rx) - 938 {AliasPatternCond_K_Imm, (uint32_t)19}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 22, gprc:$Rx) - 943 {AliasPatternCond_K_Imm, (uint32_t)22}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 25, gprc:$Rx) - 948 {AliasPatternCond_K_Imm, (uint32_t)25}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 26, gprc:$Rx) - 953 {AliasPatternCond_K_Imm, (uint32_t)26}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 27, gprc:$Rx) - 958 {AliasPatternCond_K_Imm, (uint32_t)27}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 28, gprc:$Rx) - 963 {AliasPatternCond_K_Imm, (uint32_t)28}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 29, gprc:$Rx) - 968 {AliasPatternCond_K_Imm, (uint32_t)29}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 48, gprc:$Rx) - 973 {AliasPatternCond_K_Imm, (uint32_t)48}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 280, gprc:$RT) - 978 {AliasPatternCond_K_Imm, (uint32_t)280}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 284, gprc:$Rx) - 983 {AliasPatternCond_K_Imm, (uint32_t)284}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 285, gprc:$Rx) - 988 {AliasPatternCond_K_Imm, (uint32_t)285}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 512, gprc:$Rx) - 993 {AliasPatternCond_K_Imm, (uint32_t)512}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 536, gprc:$Rx) - 998 {AliasPatternCond_K_Imm, (uint32_t)536}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 537, gprc:$Rx) - 1003 {AliasPatternCond_K_Imm, (uint32_t)537}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 528, gprc:$Rx) - 1008 {AliasPatternCond_K_Imm, (uint32_t)528}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 529, gprc:$Rx) - 1013 {AliasPatternCond_K_Imm, (uint32_t)529}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 538, gprc:$Rx) - 1018 {AliasPatternCond_K_Imm, (uint32_t)538}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 539, gprc:$Rx) - 1023 {AliasPatternCond_K_Imm, (uint32_t)539}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 530, gprc:$Rx) - 1028 {AliasPatternCond_K_Imm, (uint32_t)530}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 531, gprc:$Rx) - 1033 {AliasPatternCond_K_Imm, (uint32_t)531}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 540, gprc:$Rx) - 1038 {AliasPatternCond_K_Imm, (uint32_t)540}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 541, gprc:$Rx) - 1043 {AliasPatternCond_K_Imm, (uint32_t)541}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 532, gprc:$Rx) - 1048 {AliasPatternCond_K_Imm, (uint32_t)532}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 533, gprc:$Rx) - 1053 {AliasPatternCond_K_Imm, (uint32_t)533}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 542, gprc:$Rx) - 1058 {AliasPatternCond_K_Imm, (uint32_t)542}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 543, gprc:$Rx) - 1063 {AliasPatternCond_K_Imm, (uint32_t)543}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 534, gprc:$Rx) - 1068 {AliasPatternCond_K_Imm, (uint32_t)534}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 535, gprc:$Rx) - 1073 {AliasPatternCond_K_Imm, (uint32_t)535}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 896, gprc:$RT) - 1078 {AliasPatternCond_K_Imm, (uint32_t)896}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 980, gprc:$Rx) - 1083 {AliasPatternCond_K_Imm, (uint32_t)980}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 981, gprc:$Rx) - 1088 {AliasPatternCond_K_Imm, (uint32_t)981}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 986, gprc:$Rx) - 1093 {AliasPatternCond_K_Imm, (uint32_t)986}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 988, gprc:$Rx) - 1098 {AliasPatternCond_K_Imm, (uint32_t)988}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 989, gprc:$Rx) - 1103 {AliasPatternCond_K_Imm, (uint32_t)989}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 990, gprc:$Rx) - 1108 {AliasPatternCond_K_Imm, (uint32_t)990}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 991, gprc:$Rx) - 1113 {AliasPatternCond_K_Imm, (uint32_t)991}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 1018, gprc:$Rx) - 1118 {AliasPatternCond_K_Imm, (uint32_t)1018}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR 1019, gprc:$Rx) - 1123 {AliasPatternCond_K_Imm, (uint32_t)1019}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 1, g8rc:$Rx) - 1128 {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (MTSPR8 3, g8rc:$Rx) - 1130 {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 8, g8rc:$Rx) - 1135 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 9, g8rc:$Rx) - 1140 {AliasPatternCond_K_Imm, (uint32_t)9}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 13, g8rc:$Rx) - 1145 {AliasPatternCond_K_Imm, (uint32_t)13}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 17, g8rc:$Rx) - 1150 {AliasPatternCond_K_Imm, (uint32_t)17}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 18, g8rc:$Rx) - 1155 {AliasPatternCond_K_Imm, (uint32_t)18}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 19, g8rc:$Rx) - 1160 {AliasPatternCond_K_Imm, (uint32_t)19}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 22, g8rc:$Rx) - 1165 {AliasPatternCond_K_Imm, (uint32_t)22}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 25, g8rc:$Rx) - 1170 {AliasPatternCond_K_Imm, (uint32_t)25}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 26, g8rc:$Rx) - 1175 {AliasPatternCond_K_Imm, (uint32_t)26}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 27, g8rc:$Rx) - 1180 {AliasPatternCond_K_Imm, (uint32_t)27}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 28, g8rc:$Rx) - 1185 {AliasPatternCond_K_Imm, (uint32_t)28}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 29, g8rc:$Rx) - 1190 {AliasPatternCond_K_Imm, (uint32_t)29}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 280, g8rc:$RT) - 1195 {AliasPatternCond_K_Imm, (uint32_t)280}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 284, g8rc:$Rx) - 1200 {AliasPatternCond_K_Imm, (uint32_t)284}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 285, g8rc:$Rx) - 1205 {AliasPatternCond_K_Imm, (uint32_t)285}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTSPR8 512, g8rc:$Rx) - 1210 {AliasPatternCond_K_Imm, (uint32_t)512}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTUDSCR gprc:$Rx) - 1215 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (MTVRSAVE gprc:$rS) - 1219 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (MTVSRD f8rc:$dst, g8rc:$rA) - 1220 {AliasPatternCond_K_RegClass, PPC_F8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (MTVSRWA f8rc:$dst, gprc:$rA) - 1222 {AliasPatternCond_K_RegClass, PPC_F8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (MTVSRWZ f8rc:$dst, gprc:$rA) - 1224 {AliasPatternCond_K_RegClass, PPC_F8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (NOR gprc:$rA, gprc:$rS, gprc:$rS) - 1226 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (NOR8 g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1229 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (NOR8_rec g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1232 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (NOR_rec gprc:$rA, gprc:$rS, gprc:$rS) - 1235 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (OR gprc:$rA, gprc:$rB, gprc:$rB) - 1238 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (OR8 g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1241 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (OR8_rec g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1244 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (ORI R0, R0, 0) - 1247 {AliasPatternCond_K_Reg, PPC_R0}, {AliasPatternCond_K_Reg, PPC_R0}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (ORI8 X0, X0, 0) - 1250 {AliasPatternCond_K_Reg, PPC_X0}, {AliasPatternCond_K_Reg, PPC_X0}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (OR_rec gprc:$rA, gprc:$rB, gprc:$rB) - 1253 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0) - 1256 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_TiedReg, 0}, {AliasPatternCond_K_TiedReg, 0}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 1) - 1261 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 4) - 1266 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 5) - 1271 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, {AliasPatternCond_K_Imm, (uint32_t)5}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 6) - 1276 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)6}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 7) - 1281 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)7}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 8) - 1286 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 9) - 1291 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)9}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 10) - 1296 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, {AliasPatternCond_K_Imm, (uint32_t)10}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 13) - 1301 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)13}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 14) - 1306 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 15) - 1311 {AliasPatternCond_K_RegClass, PPC_QBRCRegClassID}, {AliasPatternCond_K_TiedReg, 0}, {AliasPatternCond_K_TiedReg, 0}, {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_Feature, PPC_FeatureQPX}, // (RFEBB 1) - 1316 {AliasPatternCond_K_Imm, (uint32_t)1}, // (RLDCL g8rc:$rA, g8rc:$rS, gprc:$rB, 0) - 1317 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (RLDCL_rec g8rc:$rA, g8rc:$rS, gprc:$rB, 0) - 1321 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (RLDICL g8rc:$rA, g8rc:$rS, u6imm:$n, 0) - 1325 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (RLDICL g8rc:$rA, g8rc:$rS, 0, u6imm:$n) - 1329 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (RLDICL_32_64 g8rc:$rA, gprc:$rS, u6imm:$n, 0) - 1332 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (RLDICL_32_64 g8rc:$rA, gprc:$rS, 0, u6imm:$n) - 1336 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (RLDICL_rec g8rc:$rA, g8rc:$rS, u6imm:$n, 0) - 1339 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (RLDICL_rec g8rc:$rA, g8rc:$rS, 0, u6imm:$n) - 1343 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (RLWINM gprc:$rA, gprc:$rS, u5imm:$n, 0, 31) - 1346 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWINM gprc:$rA, gprc:$rS, 0, u5imm:$n, 31) - 1351 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWINM8 g8rc:$rA, g8rc:$rS, u5imm:$n, 0, 31) - 1356 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWINM8 g8rc:$rA, g8rc:$rS, 0, u5imm:$n, 31) - 1361 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWINM8_rec g8rc:$rA, g8rc:$rS, u5imm:$n, 0, 31) - 1366 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWINM8_rec g8rc:$rA, g8rc:$rS, 0, u5imm:$n, 31) - 1371 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWINM_rec gprc:$rA, gprc:$rS, u5imm:$n, 0, 31) - 1376 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWINM_rec gprc:$rA, gprc:$rS, 0, u5imm:$n, 31) - 1381 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWNM gprc:$rA, gprc:$rS, gprc:$rB, 0, 31) - 1386 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWNM8 g8rc:$rA, g8rc:$rS, g8rc:$rB, 0, 31) - 1391 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWNM8_rec g8rc:$rA, g8rc:$rS, g8rc:$rB, 0, 31) - 1396 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (RLWNM_rec gprc:$rA, gprc:$rS, gprc:$rB, 0, 31) - 1401 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Imm, (uint32_t)31}, // (SC 0) - 1406 {AliasPatternCond_K_Imm, (uint32_t)0}, // (SUBF gprc:$rA, gprc:$rC, gprc:$rB) - 1407 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (SUBF8 g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1410 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (SUBF8_rec g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1413 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (SUBFC gprc:$rA, gprc:$rC, gprc:$rB) - 1416 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (SUBFC8 g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1419 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (SUBFC8_rec g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1422 {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (SUBFC_rec gprc:$rA, gprc:$rC, gprc:$rB) - 1425 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (SUBF_rec gprc:$rA, gprc:$rC, gprc:$rB) - 1428 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (SYNC 0) - 1431 {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_NegFeature, PPC_FeatureMSYNC}, // (SYNC 1) - 1433 {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_NegFeature, PPC_FeatureMSYNC}, // (SYNC 2) - 1435 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_NegFeature, PPC_FeatureMSYNC}, // (TD 16, g8rc:$rA, g8rc:$rB) - 1437 {AliasPatternCond_K_Imm, (uint32_t)16}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TD 4, g8rc:$rA, g8rc:$rB) - 1440 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TD 8, g8rc:$rA, g8rc:$rB) - 1443 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TD 24, g8rc:$rA, g8rc:$rB) - 1446 {AliasPatternCond_K_Imm, (uint32_t)24}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TD 2, g8rc:$rA, g8rc:$rB) - 1449 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TD 1, g8rc:$rA, g8rc:$rB) - 1452 {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TD 31, g8rc:$rA, g8rc:$rB) - 1455 {AliasPatternCond_K_Imm, (uint32_t)31}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TDI 16, g8rc:$rA, s16imm:$imm) - 1458 {AliasPatternCond_K_Imm, (uint32_t)16}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TDI 4, g8rc:$rA, s16imm:$imm) - 1460 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TDI 8, g8rc:$rA, s16imm:$imm) - 1462 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TDI 24, g8rc:$rA, s16imm:$imm) - 1464 {AliasPatternCond_K_Imm, (uint32_t)24}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TDI 2, g8rc:$rA, s16imm:$imm) - 1466 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TDI 1, g8rc:$rA, s16imm:$imm) - 1468 {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TDI 31, g8rc:$rA, s16imm:$imm) - 1470 {AliasPatternCond_K_Imm, (uint32_t)31}, {AliasPatternCond_K_RegClass, PPC_G8RCRegClassID}, // (TEND 0) - 1472 {AliasPatternCond_K_Imm, (uint32_t)0}, // (TEND 1) - 1473 {AliasPatternCond_K_Imm, (uint32_t)1}, // (TLBIE R0, gprc:$RB) - 1474 {AliasPatternCond_K_Reg, PPC_R0}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TLBRE2 gprc:$RS, gprc:$A, 0) - 1476 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Feature, PPC_FeaturePPC4xx}, // (TLBRE2 gprc:$RS, gprc:$A, 1) - 1480 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_Feature, PPC_FeaturePPC4xx}, // (TLBWE2 gprc:$RS, gprc:$A, 0) - 1484 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Feature, PPC_FeaturePPC4xx}, // (TLBWE2 gprc:$RS, gprc:$A, 1) - 1488 {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_Feature, PPC_FeaturePPC4xx}, // (TSR 0) - 1492 {AliasPatternCond_K_Imm, (uint32_t)0}, // (TSR 1) - 1493 {AliasPatternCond_K_Imm, (uint32_t)1}, // (TW 31, R0, R0) - 1494 {AliasPatternCond_K_Imm, (uint32_t)31}, {AliasPatternCond_K_Reg, PPC_R0}, {AliasPatternCond_K_Reg, PPC_R0}, // (TW 16, gprc:$rA, gprc:$rB) - 1497 {AliasPatternCond_K_Imm, (uint32_t)16}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TW 4, gprc:$rA, gprc:$rB) - 1500 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TW 8, gprc:$rA, gprc:$rB) - 1503 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TW 24, gprc:$rA, gprc:$rB) - 1506 {AliasPatternCond_K_Imm, (uint32_t)24}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TW 2, gprc:$rA, gprc:$rB) - 1509 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TW 1, gprc:$rA, gprc:$rB) - 1512 {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TW 31, gprc:$rA, gprc:$rB) - 1515 {AliasPatternCond_K_Imm, (uint32_t)31}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TWI 16, gprc:$rA, s16imm:$imm) - 1518 {AliasPatternCond_K_Imm, (uint32_t)16}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TWI 4, gprc:$rA, s16imm:$imm) - 1520 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TWI 8, gprc:$rA, s16imm:$imm) - 1522 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TWI 24, gprc:$rA, s16imm:$imm) - 1524 {AliasPatternCond_K_Imm, (uint32_t)24}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TWI 2, gprc:$rA, s16imm:$imm) - 1526 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TWI 1, gprc:$rA, s16imm:$imm) - 1528 {AliasPatternCond_K_Imm, (uint32_t)1}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (TWI 31, gprc:$rA, s16imm:$imm) - 1530 {AliasPatternCond_K_Imm, (uint32_t)31}, {AliasPatternCond_K_RegClass, PPC_GPRCRegClassID}, // (VNOR vrrc:$vD, vrrc:$vA, vrrc:$vA) - 1532 {AliasPatternCond_K_RegClass, PPC_VRRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VRRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (VOR vrrc:$vD, vrrc:$vA, vrrc:$vA) - 1535 {AliasPatternCond_K_RegClass, PPC_VRRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VRRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (WAIT 0) - 1538 {AliasPatternCond_K_Imm, (uint32_t)0}, // (WAIT 1) - 1539 {AliasPatternCond_K_Imm, (uint32_t)1}, // (WAIT 2) - 1540 {AliasPatternCond_K_Imm, (uint32_t)2}, // (XORI R0, R0, 0) - 1541 {AliasPatternCond_K_Reg, PPC_R0}, {AliasPatternCond_K_Reg, PPC_R0}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (XORI8 X0, X0, 0) - 1544 {AliasPatternCond_K_Reg, PPC_X0}, {AliasPatternCond_K_Reg, PPC_X0}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (XVCPSGNDP vsrc:$XT, vsrc:$XB, vsrc:$XB) - 1547 {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (XVCPSGNSP vsrc:$XT, vsrc:$XB, vsrc:$XB) - 1550 {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 0) - 1553 {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 3) - 1560 {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 0) - 1567 {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 3) - 1571 {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)3}, // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 2) - 1575 {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_TiedReg, 1}, {AliasPatternCond_K_Imm, (uint32_t)2}, // (XXPERMDIs vsrc:$XT, vsfrc:$XB, 0) - 1579 {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSFRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (XXPERMDIs vsrc:$XT, vsfrc:$XB, 3) - 1585 {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSFRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_OrNegFeature, PPC_AIXOS}, {AliasPatternCond_K_OrFeature, PPC_FeatureModernAIXAs}, {AliasPatternCond_K_EndOrFeatures, 0}, // (XXPERMDIs vsrc:$XT, vsfrc:$XB, 2) - 1591 {AliasPatternCond_K_RegClass, PPC_VSRCRegClassID}, {AliasPatternCond_K_RegClass, PPC_VSFRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)2}, // (gBC 12, crbitrc:$bi, condbrtarget:$dst) - 1594 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBC 4, crbitrc:$bi, condbrtarget:$dst) - 1596 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBC 14, crbitrc:$bi, condbrtarget:$dst) - 1598 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBC 6, crbitrc:$bi, condbrtarget:$dst) - 1600 {AliasPatternCond_K_Imm, (uint32_t)6}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBC 15, crbitrc:$bi, condbrtarget:$dst) - 1602 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBC 7, crbitrc:$bi, condbrtarget:$dst) - 1604 {AliasPatternCond_K_Imm, (uint32_t)7}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBC 8, crbitrc:$bi, condbrtarget:$dst) - 1606 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBC 0, crbitrc:$bi, condbrtarget:$dst) - 1608 {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBC 10, crbitrc:$bi, condbrtarget:$dst) - 1610 {AliasPatternCond_K_Imm, (uint32_t)10}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBC 2, crbitrc:$bi, condbrtarget:$dst) - 1612 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBC 20, CR0LT, condbrtarget:$dst) - 1614 {AliasPatternCond_K_Imm, (uint32_t)20}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCA 12, crbitrc:$bi, abscondbrtarget:$dst) - 1616 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCA 4, crbitrc:$bi, abscondbrtarget:$dst) - 1618 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCA 14, crbitrc:$bi, abscondbrtarget:$dst) - 1620 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCA 6, crbitrc:$bi, abscondbrtarget:$dst) - 1622 {AliasPatternCond_K_Imm, (uint32_t)6}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCA 15, crbitrc:$bi, abscondbrtarget:$dst) - 1624 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCA 7, crbitrc:$bi, abscondbrtarget:$dst) - 1626 {AliasPatternCond_K_Imm, (uint32_t)7}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCA 8, crbitrc:$bi, abscondbrtarget:$dst) - 1628 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCA 0, crbitrc:$bi, abscondbrtarget:$dst) - 1630 {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCA 10, crbitrc:$bi, abscondbrtarget:$dst) - 1632 {AliasPatternCond_K_Imm, (uint32_t)10}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCA 2, crbitrc:$bi, abscondbrtarget:$dst) - 1634 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCA 20, CR0LT, abscondbrtarget:$dst) - 1636 {AliasPatternCond_K_Imm, (uint32_t)20}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCAat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1638 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCAat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1641 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCAat 18, 0, CR0LT, abscondbrtarget:$dst) - 1644 {AliasPatternCond_K_Imm, (uint32_t)18}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCAat 16, 0, CR0LT, abscondbrtarget:$dst) - 1647 {AliasPatternCond_K_Imm, (uint32_t)16}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCAat 27, 3, CR0LT, abscondbrtarget:$dst) - 1650 {AliasPatternCond_K_Imm, (uint32_t)27}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCAat 25, 3, CR0LT, abscondbrtarget:$dst) - 1653 {AliasPatternCond_K_Imm, (uint32_t)25}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCAat 26, 2, CR0LT, abscondbrtarget:$dst) - 1656 {AliasPatternCond_K_Imm, (uint32_t)26}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCAat 24, 2, CR0LT, abscondbrtarget:$dst) - 1659 {AliasPatternCond_K_Imm, (uint32_t)24}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCCTR 12, crbitrc:$bi, 0) - 1662 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTR 4, crbitrc:$bi, 0) - 1665 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTR 14, crbitrc:$bi, 0) - 1668 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTR 6, crbitrc:$bi, 0) - 1671 {AliasPatternCond_K_Imm, (uint32_t)6}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTR 15, crbitrc:$bi, 0) - 1674 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTR 7, crbitrc:$bi, 0) - 1677 {AliasPatternCond_K_Imm, (uint32_t)7}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTR 20, CR0LT, 0) - 1680 {AliasPatternCond_K_Imm, (uint32_t)20}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTRL 12, crbitrc:$bi, 0) - 1683 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTRL 4, crbitrc:$bi, 0) - 1686 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTRL 14, crbitrc:$bi, 0) - 1689 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTRL 6, crbitrc:$bi, 0) - 1692 {AliasPatternCond_K_Imm, (uint32_t)6}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTRL 15, crbitrc:$bi, 0) - 1695 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTRL 7, crbitrc:$bi, 0) - 1698 {AliasPatternCond_K_Imm, (uint32_t)7}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCCTRL 20, CR0LT, 0) - 1701 {AliasPatternCond_K_Imm, (uint32_t)20}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCL 12, crbitrc:$bi, condbrtarget:$dst) - 1704 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCL 4, crbitrc:$bi, condbrtarget:$dst) - 1706 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCL 14, crbitrc:$bi, condbrtarget:$dst) - 1708 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCL 6, crbitrc:$bi, condbrtarget:$dst) - 1710 {AliasPatternCond_K_Imm, (uint32_t)6}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCL 15, crbitrc:$bi, condbrtarget:$dst) - 1712 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCL 7, crbitrc:$bi, condbrtarget:$dst) - 1714 {AliasPatternCond_K_Imm, (uint32_t)7}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCL 8, crbitrc:$bi, condbrtarget:$dst) - 1716 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCL 0, crbitrc:$bi, condbrtarget:$dst) - 1718 {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCL 10, crbitrc:$bi, condbrtarget:$dst) - 1720 {AliasPatternCond_K_Imm, (uint32_t)10}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCL 2, crbitrc:$bi, condbrtarget:$dst) - 1722 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCL 20, CR0LT, condbrtarget:$dst) - 1724 {AliasPatternCond_K_Imm, (uint32_t)20}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLA 12, crbitrc:$bi, abscondbrtarget:$dst) - 1726 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLA 4, crbitrc:$bi, abscondbrtarget:$dst) - 1728 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLA 14, crbitrc:$bi, abscondbrtarget:$dst) - 1730 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLA 6, crbitrc:$bi, abscondbrtarget:$dst) - 1732 {AliasPatternCond_K_Imm, (uint32_t)6}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLA 15, crbitrc:$bi, abscondbrtarget:$dst) - 1734 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLA 7, crbitrc:$bi, abscondbrtarget:$dst) - 1736 {AliasPatternCond_K_Imm, (uint32_t)7}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLA 8, crbitrc:$bi, abscondbrtarget:$dst) - 1738 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLA 0, crbitrc:$bi, abscondbrtarget:$dst) - 1740 {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLA 10, crbitrc:$bi, abscondbrtarget:$dst) - 1742 {AliasPatternCond_K_Imm, (uint32_t)10}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLA 2, crbitrc:$bi, abscondbrtarget:$dst) - 1744 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLA 20, CR0LT, abscondbrtarget:$dst) - 1746 {AliasPatternCond_K_Imm, (uint32_t)20}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLAat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1748 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLAat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1751 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLAat 18, 0, CR0LT, abscondbrtarget:$dst) - 1754 {AliasPatternCond_K_Imm, (uint32_t)18}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLAat 16, 0, CR0LT, abscondbrtarget:$dst) - 1757 {AliasPatternCond_K_Imm, (uint32_t)16}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLAat 27, 3, CR0LT, abscondbrtarget:$dst) - 1760 {AliasPatternCond_K_Imm, (uint32_t)27}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLAat 25, 3, CR0LT, abscondbrtarget:$dst) - 1763 {AliasPatternCond_K_Imm, (uint32_t)25}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLAat 26, 2, CR0LT, abscondbrtarget:$dst) - 1766 {AliasPatternCond_K_Imm, (uint32_t)26}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLAat 24, 2, CR0LT, abscondbrtarget:$dst) - 1769 {AliasPatternCond_K_Imm, (uint32_t)24}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLR 18, CR0LT, 0) - 1772 {AliasPatternCond_K_Imm, (uint32_t)18}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 16, CR0LT, 0) - 1775 {AliasPatternCond_K_Imm, (uint32_t)16}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 27, CR0LT, 0) - 1778 {AliasPatternCond_K_Imm, (uint32_t)27}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 25, CR0LT, 0) - 1781 {AliasPatternCond_K_Imm, (uint32_t)25}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 26, CR0LT, 0) - 1784 {AliasPatternCond_K_Imm, (uint32_t)26}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 24, CR0LT, 0) - 1787 {AliasPatternCond_K_Imm, (uint32_t)24}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 12, crbitrc:$bi, 0) - 1790 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 4, crbitrc:$bi, 0) - 1793 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 14, crbitrc:$bi, 0) - 1796 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 6, crbitrc:$bi, 0) - 1799 {AliasPatternCond_K_Imm, (uint32_t)6}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 15, crbitrc:$bi, 0) - 1802 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 7, crbitrc:$bi, 0) - 1805 {AliasPatternCond_K_Imm, (uint32_t)7}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 8, crbitrc:$bi, 0) - 1808 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 0, crbitrc:$bi, 0) - 1811 {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 10, crbitrc:$bi, 0) - 1814 {AliasPatternCond_K_Imm, (uint32_t)10}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 2, crbitrc:$bi, 0) - 1817 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLR 20, CR0LT, 0) - 1820 {AliasPatternCond_K_Imm, (uint32_t)20}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 18, CR0LT, 0) - 1823 {AliasPatternCond_K_Imm, (uint32_t)18}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 16, CR0LT, 0) - 1826 {AliasPatternCond_K_Imm, (uint32_t)16}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 27, CR0LT, 0) - 1829 {AliasPatternCond_K_Imm, (uint32_t)27}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 25, CR0LT, 0) - 1832 {AliasPatternCond_K_Imm, (uint32_t)25}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 26, CR0LT, 0) - 1835 {AliasPatternCond_K_Imm, (uint32_t)26}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 24, CR0LT, 0) - 1838 {AliasPatternCond_K_Imm, (uint32_t)24}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 12, crbitrc:$bi, 0) - 1841 {AliasPatternCond_K_Imm, (uint32_t)12}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 4, crbitrc:$bi, 0) - 1844 {AliasPatternCond_K_Imm, (uint32_t)4}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 14, crbitrc:$bi, 0) - 1847 {AliasPatternCond_K_Imm, (uint32_t)14}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 6, crbitrc:$bi, 0) - 1850 {AliasPatternCond_K_Imm, (uint32_t)6}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 15, crbitrc:$bi, 0) - 1853 {AliasPatternCond_K_Imm, (uint32_t)15}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 7, crbitrc:$bi, 0) - 1856 {AliasPatternCond_K_Imm, (uint32_t)7}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 8, crbitrc:$bi, 0) - 1859 {AliasPatternCond_K_Imm, (uint32_t)8}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 0, crbitrc:$bi, 0) - 1862 {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 10, crbitrc:$bi, 0) - 1865 {AliasPatternCond_K_Imm, (uint32_t)10}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 2, crbitrc:$bi, 0) - 1868 {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLRL 20, CR0LT, 0) - 1871 {AliasPatternCond_K_Imm, (uint32_t)20}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {AliasPatternCond_K_Imm, (uint32_t)0}, // (gBCLat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1874 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1877 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCLat 18, 0, CR0LT, condbrtarget:$dst) - 1880 {AliasPatternCond_K_Imm, (uint32_t)18}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLat 16, 0, CR0LT, condbrtarget:$dst) - 1883 {AliasPatternCond_K_Imm, (uint32_t)16}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLat 27, 3, CR0LT, condbrtarget:$dst) - 1886 {AliasPatternCond_K_Imm, (uint32_t)27}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLat 25, 3, CR0LT, condbrtarget:$dst) - 1889 {AliasPatternCond_K_Imm, (uint32_t)25}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLat 26, 2, CR0LT, condbrtarget:$dst) - 1892 {AliasPatternCond_K_Imm, (uint32_t)26}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCLat 24, 2, CR0LT, condbrtarget:$dst) - 1895 {AliasPatternCond_K_Imm, (uint32_t)24}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1898 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1901 {AliasPatternCond_K_Ignore, 0}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_RegClass, PPC_CRBITRCRegClassID}, // (gBCat 18, 0, CR0LT, condbrtarget:$dst) - 1904 {AliasPatternCond_K_Imm, (uint32_t)18}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCat 16, 0, CR0LT, condbrtarget:$dst) - 1907 {AliasPatternCond_K_Imm, (uint32_t)16}, {AliasPatternCond_K_Imm, (uint32_t)0}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCat 27, 3, CR0LT, condbrtarget:$dst) - 1910 {AliasPatternCond_K_Imm, (uint32_t)27}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCat 25, 3, CR0LT, condbrtarget:$dst) - 1913 {AliasPatternCond_K_Imm, (uint32_t)25}, {AliasPatternCond_K_Imm, (uint32_t)3}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCat 26, 2, CR0LT, condbrtarget:$dst) - 1916 {AliasPatternCond_K_Imm, (uint32_t)26}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_Reg, PPC_CR0LT}, // (gBCat 24, 2, CR0LT, condbrtarget:$dst) - 1919 {AliasPatternCond_K_Imm, (uint32_t)24}, {AliasPatternCond_K_Imm, (uint32_t)2}, {AliasPatternCond_K_Reg, PPC_CR0LT}, {0}, }; static const char AsmStrings[] = /* 0 */ "li $\x01, $\xFF\x03\x01\0" /* 12 */ "lis $\x01, $\xFF\x03\x01\0" /* 25 */ "lnia $\x01\0" /* 33 */ "blt $\x02, $\xFF\x03\x02\0" /* 46 */ "blt $\xFF\x03\x02\0" /* 55 */ "blt- $\x02, $\xFF\x03\x02\0" /* 69 */ "blt- $\xFF\x03\x02\0" /* 79 */ "blt+ $\x02, $\xFF\x03\x02\0" /* 93 */ "blt+ $\xFF\x03\x02\0" /* 103 */ "bgt $\x02, $\xFF\x03\x02\0" /* 116 */ "bgt $\xFF\x03\x02\0" /* 125 */ "bgt- $\x02, $\xFF\x03\x02\0" /* 139 */ "bgt- $\xFF\x03\x02\0" /* 149 */ "bgt+ $\x02, $\xFF\x03\x02\0" /* 163 */ "bgt+ $\xFF\x03\x02\0" /* 173 */ "beq $\x02, $\xFF\x03\x02\0" /* 186 */ "beq $\xFF\x03\x02\0" /* 195 */ "beq- $\x02, $\xFF\x03\x02\0" /* 209 */ "beq- $\xFF\x03\x02\0" /* 219 */ "beq+ $\x02, $\xFF\x03\x02\0" /* 233 */ "beq+ $\xFF\x03\x02\0" /* 243 */ "bne $\x02, $\xFF\x03\x02\0" /* 256 */ "bne $\xFF\x03\x02\0" /* 265 */ "bne- $\x02, $\xFF\x03\x02\0" /* 279 */ "bne- $\xFF\x03\x02\0" /* 289 */ "bne+ $\x02, $\xFF\x03\x02\0" /* 303 */ "bne+ $\xFF\x03\x02\0" /* 313 */ "blta $\x02, $\xFF\x03\x03\0" /* 327 */ "blta $\xFF\x03\x03\0" /* 337 */ "blta- $\x02, $\xFF\x03\x03\0" /* 352 */ "blta- $\xFF\x03\x03\0" /* 363 */ "blta+ $\x02, $\xFF\x03\x03\0" /* 378 */ "blta+ $\xFF\x03\x03\0" /* 389 */ "bgta $\x02, $\xFF\x03\x03\0" /* 403 */ "bgta $\xFF\x03\x03\0" /* 413 */ "bgta- $\x02, $\xFF\x03\x03\0" /* 428 */ "bgta- $\xFF\x03\x03\0" /* 439 */ "bgta+ $\x02, $\xFF\x03\x03\0" /* 454 */ "bgta+ $\xFF\x03\x03\0" /* 465 */ "beqa $\x02, $\xFF\x03\x03\0" /* 479 */ "beqa $\xFF\x03\x03\0" /* 489 */ "beqa- $\x02, $\xFF\x03\x03\0" /* 504 */ "beqa- $\xFF\x03\x03\0" /* 515 */ "beqa+ $\x02, $\xFF\x03\x03\0" /* 530 */ "beqa+ $\xFF\x03\x03\0" /* 541 */ "bnea $\x02, $\xFF\x03\x03\0" /* 555 */ "bnea $\xFF\x03\x03\0" /* 565 */ "bnea- $\x02, $\xFF\x03\x03\0" /* 580 */ "bnea- $\xFF\x03\x03\0" /* 591 */ "bnea+ $\x02, $\xFF\x03\x03\0" /* 606 */ "bnea+ $\xFF\x03\x03\0" /* 617 */ "bltctr $\x02\0" /* 627 */ "bltctr\0" /* 634 */ "bltctr- $\x02\0" /* 645 */ "bltctr-\0" /* 653 */ "bltctr+ $\x02\0" /* 664 */ "bltctr+\0" /* 672 */ "bgtctr $\x02\0" /* 682 */ "bgtctr\0" /* 689 */ "bgtctr- $\x02\0" /* 700 */ "bgtctr-\0" /* 708 */ "bgtctr+ $\x02\0" /* 719 */ "bgtctr+\0" /* 727 */ "beqctr $\x02\0" /* 737 */ "beqctr\0" /* 744 */ "beqctr- $\x02\0" /* 755 */ "beqctr-\0" /* 763 */ "beqctr+ $\x02\0" /* 774 */ "beqctr+\0" /* 782 */ "bnectr $\x02\0" /* 792 */ "bnectr\0" /* 799 */ "bnectr- $\x02\0" /* 810 */ "bnectr-\0" /* 818 */ "bnectr+ $\x02\0" /* 829 */ "bnectr+\0" /* 837 */ "bltctrl $\x02\0" /* 848 */ "bltctrl\0" /* 856 */ "bltctrl- $\x02\0" /* 868 */ "bltctrl-\0" /* 877 */ "bltctrl+ $\x02\0" /* 889 */ "bltctrl+\0" /* 898 */ "bgtctrl $\x02\0" /* 909 */ "bgtctrl\0" /* 917 */ "bgtctrl- $\x02\0" /* 929 */ "bgtctrl-\0" /* 938 */ "bgtctrl+ $\x02\0" /* 950 */ "bgtctrl+\0" /* 959 */ "beqctrl $\x02\0" /* 970 */ "beqctrl\0" /* 978 */ "beqctrl- $\x02\0" /* 990 */ "beqctrl-\0" /* 999 */ "beqctrl+ $\x02\0" /* 1011 */ "beqctrl+\0" /* 1020 */ "bnectrl $\x02\0" /* 1031 */ "bnectrl\0" /* 1039 */ "bnectrl- $\x02\0" /* 1051 */ "bnectrl-\0" /* 1060 */ "bnectrl+ $\x02\0" /* 1072 */ "bnectrl+\0" /* 1081 */ "bltl $\x02, $\xFF\x03\x02\0" /* 1095 */ "bltl $\xFF\x03\x02\0" /* 1105 */ "bltl- $\x02, $\xFF\x03\x02\0" /* 1120 */ "bltl- $\xFF\x03\x02\0" /* 1131 */ "bltl+ $\x02, $\xFF\x03\x02\0" /* 1146 */ "bltl+ $\xFF\x03\x02\0" /* 1157 */ "bgtl $\x02, $\xFF\x03\x02\0" /* 1171 */ "bgtl $\xFF\x03\x02\0" /* 1181 */ "bgtl- $\x02, $\xFF\x03\x02\0" /* 1196 */ "bgtl- $\xFF\x03\x02\0" /* 1207 */ "bgtl+ $\x02, $\xFF\x03\x02\0" /* 1222 */ "bgtl+ $\xFF\x03\x02\0" /* 1233 */ "beql $\x02, $\xFF\x03\x02\0" /* 1247 */ "beql $\xFF\x03\x02\0" /* 1257 */ "beql- $\x02, $\xFF\x03\x02\0" /* 1272 */ "beql- $\xFF\x03\x02\0" /* 1283 */ "beql+ $\x02, $\xFF\x03\x02\0" /* 1298 */ "beql+ $\xFF\x03\x02\0" /* 1309 */ "bnel $\x02, $\xFF\x03\x02\0" /* 1323 */ "bnel $\xFF\x03\x02\0" /* 1333 */ "bnel- $\x02, $\xFF\x03\x02\0" /* 1348 */ "bnel- $\xFF\x03\x02\0" /* 1359 */ "bnel+ $\x02, $\xFF\x03\x02\0" /* 1374 */ "bnel+ $\xFF\x03\x02\0" /* 1385 */ "bltla $\x02, $\xFF\x03\x03\0" /* 1400 */ "bltla $\xFF\x03\x03\0" /* 1411 */ "bltla- $\x02, $\xFF\x03\x03\0" /* 1427 */ "bltla- $\xFF\x03\x03\0" /* 1439 */ "bltla+ $\x02, $\xFF\x03\x03\0" /* 1455 */ "bltla+ $\xFF\x03\x03\0" /* 1467 */ "bgtla $\x02, $\xFF\x03\x03\0" /* 1482 */ "bgtla $\xFF\x03\x03\0" /* 1493 */ "bgtla- $\x02, $\xFF\x03\x03\0" /* 1509 */ "bgtla- $\xFF\x03\x03\0" /* 1521 */ "bgtla+ $\x02, $\xFF\x03\x03\0" /* 1537 */ "bgtla+ $\xFF\x03\x03\0" /* 1549 */ "beqla $\x02, $\xFF\x03\x03\0" /* 1564 */ "beqla $\xFF\x03\x03\0" /* 1575 */ "beqla- $\x02, $\xFF\x03\x03\0" /* 1591 */ "beqla- $\xFF\x03\x03\0" /* 1603 */ "beqla+ $\x02, $\xFF\x03\x03\0" /* 1619 */ "beqla+ $\xFF\x03\x03\0" /* 1631 */ "bnela $\x02, $\xFF\x03\x03\0" /* 1646 */ "bnela $\xFF\x03\x03\0" /* 1657 */ "bnela- $\x02, $\xFF\x03\x03\0" /* 1673 */ "bnela- $\xFF\x03\x03\0" /* 1685 */ "bnela+ $\x02, $\xFF\x03\x03\0" /* 1701 */ "bnela+ $\xFF\x03\x03\0" /* 1713 */ "bltlr $\x02\0" /* 1722 */ "bltlr\0" /* 1728 */ "bltlr- $\x02\0" /* 1738 */ "bltlr-\0" /* 1745 */ "bltlr+ $\x02\0" /* 1755 */ "bltlr+\0" /* 1762 */ "bgtlr $\x02\0" /* 1771 */ "bgtlr\0" /* 1777 */ "bgtlr- $\x02\0" /* 1787 */ "bgtlr-\0" /* 1794 */ "bgtlr+ $\x02\0" /* 1804 */ "bgtlr+\0" /* 1811 */ "beqlr $\x02\0" /* 1820 */ "beqlr\0" /* 1826 */ "beqlr- $\x02\0" /* 1836 */ "beqlr-\0" /* 1843 */ "beqlr+ $\x02\0" /* 1853 */ "beqlr+\0" /* 1860 */ "bnelr $\x02\0" /* 1869 */ "bnelr\0" /* 1875 */ "bnelr- $\x02\0" /* 1885 */ "bnelr-\0" /* 1892 */ "bnelr+ $\x02\0" /* 1902 */ "bnelr+\0" /* 1909 */ "bltlrl $\x02\0" /* 1919 */ "bltlrl\0" /* 1926 */ "bltlrl- $\x02\0" /* 1937 */ "bltlrl-\0" /* 1945 */ "bltlrl+ $\x02\0" /* 1956 */ "bltlrl+\0" /* 1964 */ "bgtlrl $\x02\0" /* 1974 */ "bgtlrl\0" /* 1981 */ "bgtlrl- $\x02\0" /* 1992 */ "bgtlrl-\0" /* 2000 */ "bgtlrl+ $\x02\0" /* 2011 */ "bgtlrl+\0" /* 2019 */ "beqlrl $\x02\0" /* 2029 */ "beqlrl\0" /* 2036 */ "beqlrl- $\x02\0" /* 2047 */ "beqlrl-\0" /* 2055 */ "beqlrl+ $\x02\0" /* 2066 */ "beqlrl+\0" /* 2074 */ "bnelrl $\x02\0" /* 2084 */ "bnelrl\0" /* 2091 */ "bnelrl- $\x02\0" /* 2102 */ "bnelrl-\0" /* 2110 */ "bnelrl+ $\x02\0" /* 2121 */ "bnelrl+\0" /* 2129 */ "cmpd $\x02, $\x03\0" /* 2141 */ "cmpdi $\x02, $\xFF\x03\x01\0" /* 2156 */ "cmpld $\x02, $\x03\0" /* 2169 */ "cmpldi $\x02, $\xFF\x03\x04\0" /* 2185 */ "cmplw $\x02, $\x03\0" /* 2198 */ "cmplwi $\x02, $\xFF\x03\x04\0" /* 2214 */ "cmpw $\x02, $\x03\0" /* 2226 */ "cmpwi $\x02, $\xFF\x03\x01\0" /* 2241 */ "cntlzw $\x01, $\x02\0" /* 2255 */ "cntlzw. $\x01, $\x02\0" /* 2270 */ "paste. $\x01, $\x02\0" /* 2284 */ "crset $\x01\0" /* 2293 */ "crnot $\x01, $\x02\0" /* 2306 */ "crmove $\x01, $\x02\0" /* 2320 */ "crclr $\x01\0" /* 2329 */ "isellt $\x01, $\x02, $\x03\0" /* 2347 */ "iselgt $\x01, $\x02, $\x03\0" /* 2365 */ "iseleq $\x01, $\x02, $\x03\0" /* 2383 */ "mbar\0" /* 2388 */ "mfbr0 $\x01\0" /* 2397 */ "mfbr1 $\x01\0" /* 2406 */ "mfbr2 $\x01\0" /* 2415 */ "mfbr3 $\x01\0" /* 2424 */ "mfbr4 $\x01\0" /* 2433 */ "mfbr5 $\x01\0" /* 2442 */ "mfbr6 $\x01\0" /* 2451 */ "mfbr7 $\x01\0" /* 2460 */ "mfxer $\x01\0" /* 2469 */ "mfudscr $\x01\0" /* 2480 */ "mfrtcu $\x01\0" /* 2490 */ "mfrtcl $\x01\0" /* 2500 */ "mflr $\x01\0" /* 2508 */ "mfctr $\x01\0" /* 2517 */ "mfuamr $\x01\0" /* 2527 */ "mfdscr $\x01\0" /* 2537 */ "mfdsisr $\x01\0" /* 2548 */ "mfdar $\x01\0" /* 2557 */ "mfdec $\x01\0" /* 2566 */ "mfsdr1 $\x01\0" /* 2576 */ "mfsrr0 $\x01\0" /* 2586 */ "mfsrr1 $\x01\0" /* 2596 */ "mfcfar $\x01\0" /* 2606 */ "mfamr $\x01\0" /* 2615 */ "mfpid $\x01\0" /* 2624 */ "mfasr $\x01\0" /* 2633 */ "mfpvr $\x01\0" /* 2642 */ "mfspefscr $\x01\0" /* 2655 */ "mfdbatu $\x01, 0\0" /* 2669 */ "mfdbatl $\x01, 0\0" /* 2683 */ "mfibatu $\x01, 0\0" /* 2697 */ "mfibatl $\x01, 0\0" /* 2711 */ "mfdbatu $\x01, 1\0" /* 2725 */ "mfdbatl $\x01, 1\0" /* 2739 */ "mfibatu $\x01, 1\0" /* 2753 */ "mfibatl $\x01, 1\0" /* 2767 */ "mfdbatu $\x01, 2\0" /* 2781 */ "mfdbatl $\x01, 2\0" /* 2795 */ "mfibatu $\x01, 2\0" /* 2809 */ "mfibatl $\x01, 2\0" /* 2823 */ "mfdbatu $\x01, 3\0" /* 2837 */ "mfdbatl $\x01, 3\0" /* 2851 */ "mfibatu $\x01, 3\0" /* 2865 */ "mfibatl $\x01, 3\0" /* 2879 */ "mfppr $\x01\0" /* 2888 */ "mfesr $\x01\0" /* 2897 */ "mfdear $\x01\0" /* 2907 */ "mftcr $\x01\0" /* 2916 */ "mftbhi $\x01\0" /* 2926 */ "mftblo $\x01\0" /* 2936 */ "mfsrr2 $\x01\0" /* 2946 */ "mfsrr3 $\x01\0" /* 2956 */ "mfdccr $\x01\0" /* 2966 */ "mficcr $\x01\0" /* 2976 */ "mftbu $\x01\0" /* 2985 */ "mfvrsave $\x01\0" /* 2997 */ "mffprd $\x01, $\x02\0" /* 3011 */ "mffprwz $\x01, $\x02\0" /* 3026 */ "mtcr $\x02\0" /* 3034 */ "mtbr0 $\x01\0" /* 3043 */ "mtbr1 $\x01\0" /* 3052 */ "mtbr2 $\x01\0" /* 3061 */ "mtbr3 $\x01\0" /* 3070 */ "mtbr4 $\x01\0" /* 3079 */ "mtbr5 $\x01\0" /* 3088 */ "mtbr6 $\x01\0" /* 3097 */ "mtbr7 $\x01\0" /* 3106 */ "mtfsf $\x01, $\x02\0" /* 3119 */ "mtfsfi $\xFF\x01\x05, $\xFF\x02\x06\0" /* 3137 */ "mtfsfi. $\xFF\x01\x05, $\xFF\x02\x06\0" /* 3156 */ "mtfsf. $\x01, $\x02\0" /* 3170 */ "mtmsr $\x01\0" /* 3179 */ "mtmsrd $\x01\0" /* 3189 */ "mtxer $\x02\0" /* 3198 */ "mtudscr $\x02\0" /* 3209 */ "mtlr $\x02\0" /* 3217 */ "mtctr $\x02\0" /* 3226 */ "mtuamr $\x02\0" /* 3236 */ "mtdscr $\x02\0" /* 3246 */ "mtdsisr $\x02\0" /* 3257 */ "mtdar $\x02\0" /* 3266 */ "mtdec $\x02\0" /* 3275 */ "mtsdr1 $\x02\0" /* 3285 */ "mtsrr0 $\x02\0" /* 3295 */ "mtsrr1 $\x02\0" /* 3305 */ "mtcfar $\x02\0" /* 3315 */ "mtamr $\x02\0" /* 3324 */ "mtpid $\x02\0" /* 3333 */ "mtasr $\x02\0" /* 3342 */ "mttbl $\x02\0" /* 3351 */ "mttbu $\x02\0" /* 3360 */ "mtspefscr $\x02\0" /* 3373 */ "mtdbatu 0, $\x02\0" /* 3387 */ "mtdbatl 0, $\x02\0" /* 3401 */ "mtibatu 0, $\x02\0" /* 3415 */ "mtibatl 0, $\x02\0" /* 3429 */ "mtdbatu 1, $\x02\0" /* 3443 */ "mtdbatl 1, $\x02\0" /* 3457 */ "mtibatu 1, $\x02\0" /* 3471 */ "mtibatl 1, $\x02\0" /* 3485 */ "mtdbatu 2, $\x02\0" /* 3499 */ "mtdbatl 2, $\x02\0" /* 3513 */ "mtibatu 2, $\x02\0" /* 3527 */ "mtibatl 2, $\x02\0" /* 3541 */ "mtdbatu 3, $\x02\0" /* 3555 */ "mtdbatl 3, $\x02\0" /* 3569 */ "mtibatu 3, $\x02\0" /* 3583 */ "mtibatl 3, $\x02\0" /* 3597 */ "mtppr $\x02\0" /* 3606 */ "mtesr $\x02\0" /* 3615 */ "mtdear $\x02\0" /* 3625 */ "mttcr $\x02\0" /* 3634 */ "mttbhi $\x02\0" /* 3644 */ "mttblo $\x02\0" /* 3654 */ "mtsrr2 $\x02\0" /* 3664 */ "mtsrr3 $\x02\0" /* 3674 */ "mtdccr $\x02\0" /* 3684 */ "mticcr $\x02\0" /* 3694 */ "mtudscr $\x01\0" /* 3705 */ "mtvrsave $\x01\0" /* 3717 */ "mtfprd $\x01, $\x02\0" /* 3731 */ "mtfprwa $\x01, $\x02\0" /* 3746 */ "mtfprwz $\x01, $\x02\0" /* 3761 */ "not $\x01, $\x02\0" /* 3772 */ "not. $\x01, $\x02\0" /* 3784 */ "mr $\x01, $\x02\0" /* 3794 */ "mr. $\x01, $\x02\0" /* 3805 */ "nop\0" /* 3809 */ "qvfclr $\x01\0" /* 3819 */ "qvfand $\x01, $\x02, $\x03\0" /* 3837 */ "qvfandc $\x01, $\x02, $\x03\0" /* 3856 */ "qvfctfb $\x01, $\x02\0" /* 3871 */ "qvfxor $\x01, $\x02, $\x03\0" /* 3889 */ "qvfor $\x01, $\x02, $\x03\0" /* 3906 */ "qvfnor $\x01, $\x02, $\x03\0" /* 3924 */ "qvfequ $\x01, $\x02, $\x03\0" /* 3942 */ "qvfnot $\x01, $\x02\0" /* 3956 */ "qvforc $\x01, $\x02, $\x03\0" /* 3974 */ "qvfnand $\x01, $\x02, $\x03\0" /* 3993 */ "qvfset $\x01\0" /* 4003 */ "rfebb\0" /* 4009 */ "rotld $\x01, $\x02, $\x03\0" /* 4026 */ "rotld. $\x01, $\x02, $\x03\0" /* 4044 */ "rotldi $\x01, $\x02, $\xFF\x03\x07\0" /* 4064 */ "clrldi $\x01, $\x02, $\xFF\x04\x07\0" /* 4084 */ "rotldi. $\x01, $\x02, $\xFF\x03\x07\0" /* 4105 */ "clrldi. $\x01, $\x02, $\xFF\x04\x07\0" /* 4126 */ "rotlwi $\x01, $\x02, $\xFF\x03\x08\0" /* 4146 */ "clrlwi $\x01, $\x02, $\xFF\x04\x08\0" /* 4166 */ "rotlwi. $\x01, $\x02, $\xFF\x03\x08\0" /* 4187 */ "clrlwi. $\x01, $\x02, $\xFF\x04\x08\0" /* 4208 */ "rotlw $\x01, $\x02, $\x03\0" /* 4225 */ "rotlw. $\x01, $\x02, $\x03\0" /* 4243 */ "sc\0" /* 4246 */ "sub $\x01, $\x03, $\x02\0" /* 4261 */ "sub. $\x01, $\x03, $\x02\0" /* 4277 */ "subc $\x01, $\x03, $\x02\0" /* 4293 */ "subc. $\x01, $\x03, $\x02\0" /* 4310 */ "sync\0" /* 4315 */ "lwsync\0" /* 4322 */ "ptesync\0" /* 4330 */ "tdlt $\x02, $\x03\0" /* 4342 */ "tdeq $\x02, $\x03\0" /* 4354 */ "tdgt $\x02, $\x03\0" /* 4366 */ "tdne $\x02, $\x03\0" /* 4378 */ "tdllt $\x02, $\x03\0" /* 4391 */ "tdlgt $\x02, $\x03\0" /* 4404 */ "tdu $\x02, $\x03\0" /* 4415 */ "tdlti $\x02, $\xFF\x03\x01\0" /* 4430 */ "tdeqi $\x02, $\xFF\x03\x01\0" /* 4445 */ "tdgti $\x02, $\xFF\x03\x01\0" /* 4460 */ "tdnei $\x02, $\xFF\x03\x01\0" /* 4475 */ "tdllti $\x02, $\xFF\x03\x01\0" /* 4491 */ "tdlgti $\x02, $\xFF\x03\x01\0" /* 4507 */ "tdui $\x02, $\xFF\x03\x01\0" /* 4521 */ "tend.\0" /* 4527 */ "tendall.\0" /* 4536 */ "tlbie $\x02\0" /* 4545 */ "tlbrehi $\x01, $\x02\0" /* 4560 */ "tlbrelo $\x01, $\x02\0" /* 4575 */ "tlbwehi $\x01, $\x02\0" /* 4590 */ "tlbwelo $\x01, $\x02\0" /* 4605 */ "tsuspend.\0" /* 4615 */ "tresume.\0" /* 4624 */ "trap\0" /* 4629 */ "twlt $\x02, $\x03\0" /* 4641 */ "tweq $\x02, $\x03\0" /* 4653 */ "twgt $\x02, $\x03\0" /* 4665 */ "twne $\x02, $\x03\0" /* 4677 */ "twllt $\x02, $\x03\0" /* 4690 */ "twlgt $\x02, $\x03\0" /* 4703 */ "twu $\x02, $\x03\0" /* 4714 */ "twlti $\x02, $\xFF\x03\x01\0" /* 4729 */ "tweqi $\x02, $\xFF\x03\x01\0" /* 4744 */ "twgti $\x02, $\xFF\x03\x01\0" /* 4759 */ "twnei $\x02, $\xFF\x03\x01\0" /* 4774 */ "twllti $\x02, $\xFF\x03\x01\0" /* 4790 */ "twlgti $\x02, $\xFF\x03\x01\0" /* 4806 */ "twui $\x02, $\xFF\x03\x01\0" /* 4820 */ "vnot $\x01, $\x02\0" /* 4832 */ "vmr $\x01, $\x02\0" /* 4843 */ "wait\0" /* 4848 */ "waitrsv\0" /* 4856 */ "waitimpl\0" /* 4865 */ "xnop\0" /* 4870 */ "xvmovdp $\x01, $\x02\0" /* 4885 */ "xvmovsp $\x01, $\x02\0" /* 4900 */ "xxspltd $\x01, $\x02, 0\0" /* 4918 */ "xxspltd $\x01, $\x02, 1\0" /* 4936 */ "xxmrghd $\x01, $\x02, $\x03\0" /* 4955 */ "xxmrgld $\x01, $\x02, $\x03\0" /* 4974 */ "xxswapd $\x01, $\x02\0" /* 4989 */ "bt $\x02, $\xFF\x03\x02\0" /* 5001 */ "bf $\x02, $\xFF\x03\x02\0" /* 5013 */ "bt- $\x02, $\xFF\x03\x02\0" /* 5026 */ "bf- $\x02, $\xFF\x03\x02\0" /* 5039 */ "bt+ $\x02, $\xFF\x03\x02\0" /* 5052 */ "bf+ $\x02, $\xFF\x03\x02\0" /* 5065 */ "bdnzt $\x02, $\xFF\x03\x02\0" /* 5080 */ "bdnzf $\x02, $\xFF\x03\x02\0" /* 5095 */ "bdzt $\x02, $\xFF\x03\x02\0" /* 5109 */ "bdzf $\x02, $\xFF\x03\x02\0" /* 5123 */ "b $\xFF\x03\x02\0" /* 5130 */ "bta $\x02, $\xFF\x03\x03\0" /* 5143 */ "bfa $\x02, $\xFF\x03\x03\0" /* 5156 */ "bta- $\x02, $\xFF\x03\x03\0" /* 5170 */ "bfa- $\x02, $\xFF\x03\x03\0" /* 5184 */ "bta+ $\x02, $\xFF\x03\x03\0" /* 5198 */ "bfa+ $\x02, $\xFF\x03\x03\0" /* 5212 */ "bdnzta $\x02, $\xFF\x03\x03\0" /* 5228 */ "bdnzfa $\x02, $\xFF\x03\x03\0" /* 5244 */ "bdzta $\x02, $\xFF\x03\x03\0" /* 5259 */ "bdzfa $\x02, $\xFF\x03\x03\0" /* 5274 */ "ba $\xFF\x03\x03\0" /* 5282 */ "bca+ $\xFF\x01\x08, $\x03, $\xFF\x04\x02\0" /* 5302 */ "bca- $\xFF\x01\x08, $\x03, $\xFF\x04\x02\0" /* 5322 */ "bdz $\xFF\x04\x03\0" /* 5331 */ "bdnz $\xFF\x04\x03\0" /* 5341 */ "bdz+ $\xFF\x04\x03\0" /* 5351 */ "bdnz+ $\xFF\x04\x03\0" /* 5362 */ "bdz- $\xFF\x04\x03\0" /* 5372 */ "bdnz- $\xFF\x04\x03\0" /* 5383 */ "btctr $\x02\0" /* 5392 */ "bfctr $\x02\0" /* 5401 */ "btctr- $\x02\0" /* 5411 */ "bfctr- $\x02\0" /* 5421 */ "btctr+ $\x02\0" /* 5431 */ "bfctr+ $\x02\0" /* 5441 */ "bctr\0" /* 5446 */ "btctrl $\x02\0" /* 5456 */ "bfctrl $\x02\0" /* 5466 */ "btctrl- $\x02\0" /* 5477 */ "bfctrl- $\x02\0" /* 5488 */ "btctrl+ $\x02\0" /* 5499 */ "bfctrl+ $\x02\0" /* 5510 */ "bctrl\0" /* 5516 */ "btl $\x02, $\xFF\x03\x02\0" /* 5529 */ "bfl $\x02, $\xFF\x03\x02\0" /* 5542 */ "btl- $\x02, $\xFF\x03\x02\0" /* 5556 */ "bfl- $\x02, $\xFF\x03\x02\0" /* 5570 */ "btl+ $\x02, $\xFF\x03\x02\0" /* 5584 */ "bfl+ $\x02, $\xFF\x03\x02\0" /* 5598 */ "bdnztl $\x02, $\xFF\x03\x02\0" /* 5614 */ "bdnzfl $\x02, $\xFF\x03\x02\0" /* 5630 */ "bdztl $\x02, $\xFF\x03\x02\0" /* 5645 */ "bdzfl $\x02, $\xFF\x03\x02\0" /* 5660 */ "bl $\xFF\x03\x02\0" /* 5668 */ "btla $\x02, $\xFF\x03\x03\0" /* 5682 */ "bfla $\x02, $\xFF\x03\x03\0" /* 5696 */ "btla- $\x02, $\xFF\x03\x03\0" /* 5711 */ "bfla- $\x02, $\xFF\x03\x03\0" /* 5726 */ "btla+ $\x02, $\xFF\x03\x03\0" /* 5741 */ "bfla+ $\x02, $\xFF\x03\x03\0" /* 5756 */ "bdnztla $\x02, $\xFF\x03\x03\0" /* 5773 */ "bdnzfla $\x02, $\xFF\x03\x03\0" /* 5790 */ "bdztla $\x02, $\xFF\x03\x03\0" /* 5806 */ "bdzfla $\x02, $\xFF\x03\x03\0" /* 5822 */ "bla $\xFF\x03\x03\0" /* 5831 */ "bcla+ $\xFF\x01\x08, $\x03, $\xFF\x04\x02\0" /* 5852 */ "bcla- $\xFF\x01\x08, $\x03, $\xFF\x04\x02\0" /* 5873 */ "bdzla $\xFF\x04\x03\0" /* 5884 */ "bdnzla $\xFF\x04\x03\0" /* 5896 */ "bdzla+ $\xFF\x04\x03\0" /* 5908 */ "bdnzla+ $\xFF\x04\x03\0" /* 5921 */ "bdzla- $\xFF\x04\x03\0" /* 5933 */ "bdnzla- $\xFF\x04\x03\0" /* 5946 */ "bdzlr\0" /* 5952 */ "bdnzlr\0" /* 5959 */ "bdzlr+\0" /* 5966 */ "bdnzlr+\0" /* 5974 */ "bdzlr-\0" /* 5981 */ "bdnzlr-\0" /* 5989 */ "btlr $\x02\0" /* 5997 */ "bflr $\x02\0" /* 6005 */ "btlr- $\x02\0" /* 6014 */ "bflr- $\x02\0" /* 6023 */ "btlr+ $\x02\0" /* 6032 */ "bflr+ $\x02\0" /* 6041 */ "bdnztlr $\x02\0" /* 6052 */ "bdnzflr $\x02\0" /* 6063 */ "bdztlr $\x02\0" /* 6073 */ "bdzflr $\x02\0" /* 6083 */ "blr\0" /* 6087 */ "bdzlrl\0" /* 6094 */ "bdnzlrl\0" /* 6102 */ "bdzlrl+\0" /* 6110 */ "bdnzlrl+\0" /* 6119 */ "bdzlrl-\0" /* 6127 */ "bdnzlrl-\0" /* 6136 */ "btlrl $\x02\0" /* 6145 */ "bflrl $\x02\0" /* 6154 */ "btlrl- $\x02\0" /* 6164 */ "bflrl- $\x02\0" /* 6174 */ "btlrl+ $\x02\0" /* 6184 */ "bflrl+ $\x02\0" /* 6194 */ "bdnztlrl $\x02\0" /* 6206 */ "bdnzflrl $\x02\0" /* 6218 */ "bdztlrl $\x02\0" /* 6229 */ "bdzflrl $\x02\0" /* 6240 */ "blrl\0" /* 6245 */ "bcl+ $\xFF\x01\x08, $\x03, $\xFF\x04\x02\0" /* 6265 */ "bcl- $\xFF\x01\x08, $\x03, $\xFF\x04\x02\0" /* 6285 */ "bdzl $\xFF\x04\x02\0" /* 6295 */ "bdnzl $\xFF\x04\x02\0" /* 6306 */ "bdzl+ $\xFF\x04\x02\0" /* 6317 */ "bdnzl+ $\xFF\x04\x02\0" /* 6329 */ "bdzl- $\xFF\x04\x02\0" /* 6340 */ "bdnzl- $\xFF\x04\x02\0" /* 6352 */ "bc+ $\xFF\x01\x08, $\x03, $\xFF\x04\x02\0" /* 6371 */ "bc- $\xFF\x01\x08, $\x03, $\xFF\x04\x02\0" /* 6390 */ "bdz $\xFF\x04\x02\0" /* 6399 */ "bdnz $\xFF\x04\x02\0" /* 6409 */ "bdz+ $\xFF\x04\x02\0" /* 6419 */ "bdnz+ $\xFF\x04\x02\0" /* 6430 */ "bdz- $\xFF\x04\x02\0" /* 6440 */ "bdnz- $\xFF\x04\x02\0" ; #ifndef NDEBUG //static struct SortCheck { // SortCheck(ArrayRef OpToPatterns) { // assert(std::is_sorted( // OpToPatterns.begin(), OpToPatterns.end(), // [](const PatternsForOpcode &L, const //PatternsForOpcode &R) { // return L.Opcode < R.Opcode; // }) && // "tablegen failed to sort opcode patterns"); // } //} sortCheckVar(OpToPatterns); #endif AliasMatchingData M = { OpToPatterns, Patterns, Conds, AsmStrings, NULL, }; const char *AsmString = matchAliasPatterns(MI, &M); if (!AsmString) return false; unsigned I = 0; while (AsmString[I] != ' ' && AsmString[I] != '\t' && AsmString[I] != '$' && AsmString[I] != '\0') ++I; char *substr = cs_mem_malloc(I+1); memcpy(substr, AsmString, I); substr[I] = '\0'; SStream_concat0(OS, substr); cs_mem_free(substr); if (AsmString[I] != '\0') { if (AsmString[I] == ' ' || AsmString[I] == '\t') { SStream_concat1(OS, ' '); ++I; } do { if (AsmString[I] == '$') { ++I; if (AsmString[I] == (char)0xff) { ++I; int OpIdx = AsmString[I++] - 1; int PrintMethodIdx = AsmString[I++] - 1; printCustomAliasOperand(MI, Address, OpIdx, PrintMethodIdx, OS); } else printOperand(MI, ((unsigned)AsmString[I++]) - 1, OS); } else { SStream_concat1(OS, AsmString[I++]); } } while (AsmString[I] != '\0'); } return true; #else return false; #endif // CAPSTONE_DIET } #ifndef CAPSTONE_DIET static void printCustomAliasOperand( MCInst *MI, uint64_t Address, unsigned OpIdx, unsigned PrintMethodIdx, SStream *OS) { switch (PrintMethodIdx) { default: assert(0 && "Unknown PrintMethod kind"); break; case 0: printS16ImmOperand(MI, OpIdx, OS); break; case 1: printBranchOperand(MI, Address, OpIdx, OS); break; case 2: printAbsBranchOperand(MI, OpIdx, OS); break; case 3: printU16ImmOperand(MI, OpIdx, OS); break; case 4: printU3ImmOperand(MI, OpIdx, OS); break; case 5: printU4ImmOperand(MI, OpIdx, OS); break; case 6: printU6ImmOperand(MI, OpIdx, OS); break; case 7: printU5ImmOperand(MI, OpIdx, OS); break; } } #endif // CAPSTONE_DIET #endif // PRINT_ALIAS_INSTR