test_cases:
  -
    input:
      bytes: [ 0x83, 0x04, 0x38, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "mrs x3, ID_AA64ZFR0_EL1"

  -
    input:
      bytes: [ 0x03, 0x12, 0x38, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "mrs x3, ZCR_EL1"

  -
    input:
      bytes: [ 0x03, 0x12, 0x3c, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "mrs x3, ZCR_EL2"

  -
    input:
      bytes: [ 0x03, 0x12, 0x3e, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "mrs x3, ZCR_EL3"

  -
    input:
      bytes: [ 0x03, 0x12, 0x3d, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "mrs x3, ZCR_EL12"

  -
    input:
      bytes: [ 0x03, 0x12, 0x18, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "msr ZCR_EL1, x3"

  -
    input:
      bytes: [ 0x03, 0x12, 0x1c, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "msr ZCR_EL2, x3"

  -
    input:
      bytes: [ 0x03, 0x12, 0x1e, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "msr ZCR_EL3, x3"

  -
    input:
      bytes: [ 0x03, 0x12, 0x1d, 0xd5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "msr ZCR_EL12, x3"