test_cases: - input: bytes: [ 0x40, 0xef, 0xb1, 0x09, 0x50, 0xef, 0xb1, 0x09, 0x60, 0xef, 0xb1, 0x09, 0x40, 0xff, 0xb1, 0x0d, 0x40, 0xef, 0xf2, 0x09, 0x50, 0xef, 0xf2, 0x09, 0x60, 0xef, 0xf2, 0x09, 0x40, 0xff, 0xf2, 0x0d, 0x40, 0xff, 0xb1, 0x09, 0x40, 0xff, 0xf2, 0x09, 0xd8, 0xef, 0x68, 0x28, 0x50, 0xef, 0xa1, 0x0b, 0x60, 0xef, 0xa1, 0x0b, 0x50, 0xef, 0xe2, 0x0b, 0x60, 0xef, 0xe2, 0x0b, 0x92, 0xef, 0x43, 0xbc, 0x50, 0xff, 0xa1, 0x0b, 0x60, 0xff, 0xa1, 0x0b, 0x50, 0xff, 0xe2, 0x0b, 0x60, 0xff, 0xe2, 0x0b, 0xc0, 0xef, 0xa1, 0x0c, 0xd0, 0xef, 0xa1, 0x0c, 0xe0, 0xef, 0xa1, 0x0c, 0xc0, 0xff, 0xa1, 0x0c, 0xd0, 0xff, 0xa1, 0x0c, 0xe0, 0xff, 0xa1, 0x0c, 0xc0, 0xef, 0xa1, 0x0e, 0xd0, 0xef, 0xa1, 0x0d, 0xe0, 0xef, 0xa1, 0x0d, 0x97, 0xef, 0x49, 0x2b ] arch: "CS_ARCH_ARM" options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_THUMB" ] expected: insns: - asm_text: "vmul.i8 d16, d16, d17" - asm_text: "vmul.i16 d16, d16, d17" - asm_text: "vmul.i32 d16, d16, d17" - asm_text: "vmul.f32 d16, d16, d17" - asm_text: "vmul.i8 q8, q8, q9" - asm_text: "vmul.i16 q8, q8, q9" - asm_text: "vmul.i32 q8, q8, q9" - asm_text: "vmul.f32 q8, q8, q9" - asm_text: "vmul.p8 d16, d16, d17" - asm_text: "vmul.p8 q8, q8, q9" - asm_text: "vmul.i16 d18, d8, d0[3]" - asm_text: "vqdmulh.s16 d16, d16, d17" - asm_text: "vqdmulh.s32 d16, d16, d17" - asm_text: "vqdmulh.s16 q8, q8, q9" - asm_text: "vqdmulh.s32 q8, q8, q9" - asm_text: "vqdmulh.s16 d11, d2, d3[0]" - asm_text: "vqrdmulh.s16 d16, d16, d17" - asm_text: "vqrdmulh.s32 d16, d16, d17" - asm_text: "vqrdmulh.s16 q8, q8, q9" - asm_text: "vqrdmulh.s32 q8, q8, q9" - asm_text: "vmull.s8 q8, d16, d17" - asm_text: "vmull.s16 q8, d16, d17" - asm_text: "vmull.s32 q8, d16, d17" - asm_text: "vmull.u8 q8, d16, d17" - asm_text: "vmull.u16 q8, d16, d17" - asm_text: "vmull.u32 q8, d16, d17" - asm_text: "vmull.p8 q8, d16, d17" - asm_text: "vqdmull.s16 q8, d16, d17" - asm_text: "vqdmull.s32 q8, d16, d17" - asm_text: "vqdmull.s16 q1, d7, d1[1]"