test_cases:
  -
    input:
      bytes: [ 0xf1, 0xef, 0xa0, 0x03, 0xf1, 0xef, 0xa0, 0x05, 0xf2, 0xef, 0xe0, 0x03, 0xf2, 0xef, 0xe0, 0x07, 0xf1, 0xef, 0xa0, 0x06, 0xf2, 0xef, 0xe0, 0x0c, 0xf2, 0xff, 0xa0, 0x10, 0xf6, 0xff, 0xa0, 0x10, 0xfa, 0xff, 0xa0, 0x10, 0xf2, 0xff, 0xe0, 0x20, 0xf6, 0xff, 0xe0, 0x20, 0xfa, 0xff, 0xe0, 0x20, 0xf2, 0xff, 0x20, 0x11, 0xf6, 0xff, 0x20, 0x11, 0xf2, 0xff, 0x60, 0x21, 0xf6, 0xff, 0x60, 0x21, 0xfa, 0xff, 0x60, 0x21, 0xf2, 0xff, 0xa0, 0x11, 0xf6, 0xff, 0xa0, 0x11, 0xf2, 0xff, 0xe0, 0x21, 0xf6, 0xff, 0xe0, 0x21, 0xfa, 0xff, 0xe0, 0x21 ]
      arch: "CS_ARCH_ARM"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_THUMB" ]
    expected:
      insns:
        -
          asm_text: "vext.8 d16, d17, d16, #3"
        -
          asm_text: "vext.8 d16, d17, d16, #5"
        -
          asm_text: "vext.8 q8, q9, q8, #3"
        -
          asm_text: "vext.8 q8, q9, q8, #7"
        -
          asm_text: "vext.16 d16, d17, d16, #3"
        -
          asm_text: "vext.32 q8, q9, q8, #3"
        -
          asm_text: "vtrn.8 d17, d16"
        -
          asm_text: "vtrn.16 d17, d16"
        -
          asm_text: "vtrn.32 d17, d16"
        -
          asm_text: "vtrn.8 q9, q8"
        -
          asm_text: "vtrn.16 q9, q8"
        -
          asm_text: "vtrn.32 q9, q8"
        -
          asm_text: "vuzp.8 d17, d16"
        -
          asm_text: "vuzp.16 d17, d16"
        -
          asm_text: "vuzp.8 q9, q8"
        -
          asm_text: "vuzp.16 q9, q8"
        -
          asm_text: "vuzp.32 q9, q8"
        -
          asm_text: "vzip.8 d17, d16"
        -
          asm_text: "vzip.16 d17, d16"
        -
          asm_text: "vzip.8 q9, q8"
        -
          asm_text: "vzip.16 q9, q8"
        -
          asm_text: "vzip.32 q9, q8"