mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
321 lines
7.7 KiB
YAML
321 lines
7.7 KiB
YAML
test_cases:
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input:
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bytes: [ 0x00, 0x30, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtn z0.b, { z0.h, z1.h }"
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input:
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bytes: [ 0xc0, 0x33, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "fcvtn z0.b, { z30.h, z31.h }"
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input:
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bytes: [ 0x1f, 0x30, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "fcvtn z31.b, { z0.h, z1.h }"
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input:
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bytes: [ 0xdf, 0x33, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtn z31.b, { z30.h, z31.h }"
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input:
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bytes: [ 0x00, 0x34, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnb z0.b, { z0.s, z1.s }"
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-
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input:
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bytes: [ 0xc0, 0x37, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnb z0.b, { z30.s, z31.s }"
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-
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input:
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bytes: [ 0x1f, 0x34, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "fcvtnb z31.b, { z0.s, z1.s }"
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input:
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bytes: [ 0xdf, 0x37, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "fcvtnb z31.b, { z30.s, z31.s }"
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input:
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bytes: [ 0x00, 0x38, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "bfcvtn z0.b, { z0.h, z1.h }"
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input:
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bytes: [ 0xc0, 0x3b, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "bfcvtn z0.b, { z30.h, z31.h }"
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input:
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bytes: [ 0x1f, 0x38, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "bfcvtn z31.b, { z0.h, z1.h }"
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input:
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bytes: [ 0xdf, 0x3b, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "bfcvtn z31.b, { z30.h, z31.h }"
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input:
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bytes: [ 0x00, 0x3c, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnt z0.b, { z0.s, z1.s }"
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input:
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bytes: [ 0xc0, 0x3f, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "fcvtnt z0.b, { z30.s, z31.s }"
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input:
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bytes: [ 0x1f, 0x3c, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "fcvtnt z31.b, { z0.s, z1.s }"
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input:
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bytes: [ 0xdf, 0x3f, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
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expected:
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insns:
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asm_text: "fcvtnt z31.b, { z30.s, z31.s }"
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-
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input:
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bytes: [ 0x00, 0x30, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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asm_text: "fcvtn z0.b, { z0.h, z1.h }"
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-
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input:
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bytes: [ 0xc0, 0x33, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtn z0.b, { z30.h, z31.h }"
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-
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input:
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bytes: [ 0x1f, 0x30, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtn z31.b, { z0.h, z1.h }"
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-
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input:
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bytes: [ 0xdf, 0x33, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtn z31.b, { z30.h, z31.h }"
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-
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input:
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bytes: [ 0x00, 0x34, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnb z0.b, { z0.s, z1.s }"
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-
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input:
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bytes: [ 0xc0, 0x37, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnb z0.b, { z30.s, z31.s }"
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-
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input:
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bytes: [ 0x1f, 0x34, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnb z31.b, { z0.s, z1.s }"
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-
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input:
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bytes: [ 0xdf, 0x37, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnb z31.b, { z30.s, z31.s }"
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-
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input:
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bytes: [ 0x00, 0x38, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "bfcvtn z0.b, { z0.h, z1.h }"
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-
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input:
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bytes: [ 0xc0, 0x3b, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "bfcvtn z0.b, { z30.h, z31.h }"
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-
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input:
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bytes: [ 0x1f, 0x38, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "bfcvtn z31.b, { z0.h, z1.h }"
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-
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input:
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bytes: [ 0xdf, 0x3b, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "bfcvtn z31.b, { z30.h, z31.h }"
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-
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input:
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bytes: [ 0x00, 0x3c, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnt z0.b, { z0.s, z1.s }"
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-
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input:
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bytes: [ 0xc0, 0x3f, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnt z0.b, { z30.s, z31.s }"
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-
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input:
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bytes: [ 0x1f, 0x3c, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnt z31.b, { z0.s, z1.s }"
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-
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input:
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bytes: [ 0xdf, 0x3f, 0x0a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
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expected:
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insns:
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-
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asm_text: "fcvtnt z31.b, { z30.s, z31.s }"
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