mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
481 lines
12 KiB
YAML
481 lines
12 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0x00, 0x00, 0x80, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0h.s[w12, 0]}, p0/z, [x0, x0, lsl #2]"
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-
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input:
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bytes: [ 0x45, 0x55, 0x95, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1h.s[w14, 1]}, p5/z, [x10, x21, lsl #2]"
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-
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input:
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bytes: [ 0xa7, 0x6d, 0x88, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1h.s[w15, 3]}, p3/z, [x13, x8, lsl #2]"
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-
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input:
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bytes: [ 0xef, 0x7f, 0x9f, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za3h.s[w15, 3]}, p7/z, [sp]"
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-
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input:
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bytes: [ 0x25, 0x0e, 0x90, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1h.s[w12, 1]}, p3/z, [x17, x16, lsl #2]"
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-
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input:
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bytes: [ 0x21, 0x04, 0x9e, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0h.s[w12, 1]}, p1/z, [x1, x30, lsl #2]"
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-
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input:
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bytes: [ 0x68, 0x56, 0x94, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za2h.s[w14, 0]}, p5/z, [x19, x20, lsl #2]"
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input:
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bytes: [ 0x80, 0x19, 0x82, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0h.s[w12, 0]}, p6/z, [x12, x2, lsl #2]"
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-
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input:
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bytes: [ 0x21, 0x48, 0x9a, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0h.s[w14, 1]}, p2/z, [x1, x26, lsl #2]"
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-
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input:
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bytes: [ 0xcd, 0x0a, 0x9e, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za3h.s[w12, 1]}, p2/z, [x22, x30, lsl #2]"
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-
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input:
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bytes: [ 0x22, 0x75, 0x81, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0h.s[w15, 2]}, p5/z, [x9, x1, lsl #2]"
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-
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input:
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bytes: [ 0x87, 0x29, 0x8b, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1h.s[w13, 3]}, p2/z, [x12, x11, lsl #2]"
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-
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input:
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bytes: [ 0x00, 0x00, 0x80, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0h.s[w12, 0]}, p0/z, [x0, x0, lsl #2]"
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-
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input:
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bytes: [ 0x45, 0x55, 0x95, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1h.s[w14, 1]}, p5/z, [x10, x21, lsl #2]"
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-
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input:
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bytes: [ 0xa7, 0x6d, 0x88, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1h.s[w15, 3]}, p3/z, [x13, x8, lsl #2]"
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-
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input:
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bytes: [ 0xef, 0x7f, 0x9f, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za3h.s[w15, 3]}, p7/z, [sp]"
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-
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input:
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bytes: [ 0x25, 0x0e, 0x90, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1h.s[w12, 1]}, p3/z, [x17, x16, lsl #2]"
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-
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input:
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bytes: [ 0x21, 0x04, 0x9e, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0h.s[w12, 1]}, p1/z, [x1, x30, lsl #2]"
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-
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input:
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bytes: [ 0x68, 0x56, 0x94, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za2h.s[w14, 0]}, p5/z, [x19, x20, lsl #2]"
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-
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input:
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bytes: [ 0x80, 0x19, 0x82, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0h.s[w12, 0]}, p6/z, [x12, x2, lsl #2]"
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-
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input:
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bytes: [ 0x21, 0x48, 0x9a, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0h.s[w14, 1]}, p2/z, [x1, x26, lsl #2]"
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-
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input:
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bytes: [ 0xcd, 0x0a, 0x9e, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za3h.s[w12, 1]}, p2/z, [x22, x30, lsl #2]"
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-
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input:
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bytes: [ 0x22, 0x75, 0x81, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0h.s[w15, 2]}, p5/z, [x9, x1, lsl #2]"
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-
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input:
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bytes: [ 0x87, 0x29, 0x8b, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1h.s[w13, 3]}, p2/z, [x12, x11, lsl #2]"
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-
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input:
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bytes: [ 0x00, 0x80, 0x80, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0v.s[w12, 0]}, p0/z, [x0, x0, lsl #2]"
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-
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input:
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bytes: [ 0x45, 0xd5, 0x95, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1v.s[w14, 1]}, p5/z, [x10, x21, lsl #2]"
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-
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input:
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bytes: [ 0xa7, 0xed, 0x88, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1v.s[w15, 3]}, p3/z, [x13, x8, lsl #2]"
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-
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input:
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bytes: [ 0xef, 0xff, 0x9f, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za3v.s[w15, 3]}, p7/z, [sp]"
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-
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input:
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bytes: [ 0x25, 0x8e, 0x90, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1v.s[w12, 1]}, p3/z, [x17, x16, lsl #2]"
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-
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input:
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bytes: [ 0x21, 0x84, 0x9e, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0v.s[w12, 1]}, p1/z, [x1, x30, lsl #2]"
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-
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input:
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bytes: [ 0x68, 0xd6, 0x94, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za2v.s[w14, 0]}, p5/z, [x19, x20, lsl #2]"
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-
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input:
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bytes: [ 0x80, 0x99, 0x82, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0v.s[w12, 0]}, p6/z, [x12, x2, lsl #2]"
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-
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input:
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bytes: [ 0x21, 0xc8, 0x9a, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0v.s[w14, 1]}, p2/z, [x1, x26, lsl #2]"
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-
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input:
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bytes: [ 0xcd, 0x8a, 0x9e, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za3v.s[w12, 1]}, p2/z, [x22, x30, lsl #2]"
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-
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input:
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bytes: [ 0x22, 0xf5, 0x81, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0v.s[w15, 2]}, p5/z, [x9, x1, lsl #2]"
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-
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input:
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bytes: [ 0x87, 0xa9, 0x8b, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1v.s[w13, 3]}, p2/z, [x12, x11, lsl #2]"
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-
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input:
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bytes: [ 0x00, 0x80, 0x80, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0v.s[w12, 0]}, p0/z, [x0, x0, lsl #2]"
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-
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input:
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bytes: [ 0x45, 0xd5, 0x95, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1v.s[w14, 1]}, p5/z, [x10, x21, lsl #2]"
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-
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input:
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bytes: [ 0xa7, 0xed, 0x88, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1v.s[w15, 3]}, p3/z, [x13, x8, lsl #2]"
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-
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input:
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bytes: [ 0xef, 0xff, 0x9f, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za3v.s[w15, 3]}, p7/z, [sp]"
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-
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input:
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bytes: [ 0x25, 0x8e, 0x90, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1v.s[w12, 1]}, p3/z, [x17, x16, lsl #2]"
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-
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input:
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bytes: [ 0x21, 0x84, 0x9e, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0v.s[w12, 1]}, p1/z, [x1, x30, lsl #2]"
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-
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input:
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bytes: [ 0x68, 0xd6, 0x94, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za2v.s[w14, 0]}, p5/z, [x19, x20, lsl #2]"
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-
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input:
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bytes: [ 0x80, 0x99, 0x82, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0v.s[w12, 0]}, p6/z, [x12, x2, lsl #2]"
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-
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input:
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bytes: [ 0x21, 0xc8, 0x9a, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0v.s[w14, 1]}, p2/z, [x1, x26, lsl #2]"
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-
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input:
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bytes: [ 0xcd, 0x8a, 0x9e, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za3v.s[w12, 1]}, p2/z, [x22, x30, lsl #2]"
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-
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input:
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bytes: [ 0x22, 0xf5, 0x81, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za0v.s[w15, 2]}, p5/z, [x9, x1, lsl #2]"
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-
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input:
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bytes: [ 0x87, 0xa9, 0x8b, 0xe0 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ld1w {za1v.s[w13, 3]}, p2/z, [x12, x11, lsl #2]"
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