mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
121 lines
2.8 KiB
YAML
121 lines
2.8 KiB
YAML
test_cases:
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input:
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bytes: [ 0x00, 0x00, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ldr za[w12, 0], [x0]"
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input:
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bytes: [ 0x45, 0x41, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "ldr za[w14, 5], [x10, #5, mul vl]"
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input:
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bytes: [ 0xa7, 0x61, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "ldr za[w15, 7], [x13, #7, mul vl]"
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input:
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bytes: [ 0xef, 0x63, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "ldr za[w15, 15], [sp, #15, mul vl]"
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input:
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bytes: [ 0x25, 0x02, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "ldr za[w12, 5], [x17, #5, mul vl]"
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input:
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bytes: [ 0x21, 0x00, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "ldr za[w12, 1], [x1, #1, mul vl]"
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input:
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bytes: [ 0x68, 0x42, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "ldr za[w14, 8], [x19, #8, mul vl]"
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input:
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bytes: [ 0x80, 0x01, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "ldr za[w12, 0], [x12]"
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input:
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bytes: [ 0x21, 0x40, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "ldr za[w14, 1], [x1, #1, mul vl]"
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input:
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bytes: [ 0xcd, 0x02, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "ldr za[w12, 13], [x22, #13, mul vl]"
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input:
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bytes: [ 0x22, 0x61, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "ldr za[w15, 2], [x9, #2, mul vl]"
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input:
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bytes: [ 0x87, 0x21, 0x00, 0xe1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "ldr za[w13, 7], [x12, #7, mul vl]"
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