mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
1681 lines
43 KiB
YAML
1681 lines
43 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0x00, 0x0c, 0x60, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 0:1], z0.h, z0.h"
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-
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input:
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bytes: [ 0x45, 0x4d, 0x65, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w10, 10:11], z10.h, z5.h"
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-
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input:
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bytes: [ 0xa7, 0x6d, 0x68, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w11, 14:15], z13.h, z8.h"
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-
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input:
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bytes: [ 0xe7, 0x6f, 0x6f, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w11, 14:15], z31.h, z15.h"
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-
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input:
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bytes: [ 0x25, 0x0e, 0x60, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 10:11], z17.h, z0.h"
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-
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input:
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bytes: [ 0x21, 0x0c, 0x6e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 2:3], z1.h, z14.h"
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-
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input:
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bytes: [ 0x60, 0x4e, 0x64, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w10, 0:1], z19.h, z4.h"
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-
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input:
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bytes: [ 0x80, 0x0d, 0x62, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 0:1], z12.h, z2.h"
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-
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input:
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bytes: [ 0x21, 0x4c, 0x6a, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w10, 2:3], z1.h, z10.h"
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-
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input:
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bytes: [ 0xc5, 0x0e, 0x6e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 10:11], z22.h, z14.h"
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-
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input:
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bytes: [ 0x22, 0x6d, 0x61, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w11, 4:5], z9.h, z1.h"
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-
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input:
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bytes: [ 0x87, 0x2d, 0x6b, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w9, 14:15], z12.h, z11.h"
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-
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input:
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bytes: [ 0x00, 0x10, 0xc0, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 0:1], z0.h, z0.h[0]"
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-
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input:
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bytes: [ 0x45, 0x55, 0xc5, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w10, 10:11], z10.h, z5.h[1]"
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-
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input:
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bytes: [ 0xa7, 0xfd, 0xc8, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w11, 14:15], z13.h, z8.h[7]"
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-
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input:
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bytes: [ 0xe7, 0xff, 0xcf, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w11, 14:15], z31.h, z15.h[7]"
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-
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input:
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bytes: [ 0x25, 0x1e, 0xc0, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 10:11], z17.h, z0.h[3]"
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-
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input:
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bytes: [ 0x21, 0x94, 0xce, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 2:3], z1.h, z14.h[5]"
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-
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input:
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bytes: [ 0x60, 0x56, 0xc4, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w10, 0:1], z19.h, z4.h[1]"
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-
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input:
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bytes: [ 0x80, 0x19, 0xc2, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 0:1], z12.h, z2.h[2]"
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-
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input:
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bytes: [ 0x21, 0xd8, 0xca, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w10, 2:3], z1.h, z10.h[6]"
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-
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input:
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bytes: [ 0xc5, 0x1a, 0xce, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 10:11], z22.h, z14.h[2]"
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-
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input:
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bytes: [ 0x22, 0xf5, 0xc1, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w11, 4:5], z9.h, z1.h[5]"
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-
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input:
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bytes: [ 0x87, 0xb9, 0xcb, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w9, 14:15], z12.h, z11.h[6]"
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-
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input:
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bytes: [ 0x00, 0x08, 0x60, 0xc1 ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h"
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-
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input:
|
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bytes: [ 0x00, 0x08, 0x60, 0xc1 ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
|
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insns:
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-
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asm_text: "smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h"
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|
|
-
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input:
|
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bytes: [ 0x41, 0x49, 0x65, 0xc1 ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
|
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insns:
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-
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asm_text: "smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h"
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|
|
-
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|
input:
|
|
bytes: [ 0x41, 0x49, 0x65, 0xc1 ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
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insns:
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-
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asm_text: "smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h"
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|
|
-
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|
input:
|
|
bytes: [ 0xa3, 0x69, 0x68, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h"
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|
-
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input:
|
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bytes: [ 0xa3, 0x69, 0x68, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h"
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|
|
-
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input:
|
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bytes: [ 0xe3, 0x6b, 0x6f, 0xc1 ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "smlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h"
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|
|
|
-
|
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input:
|
|
bytes: [ 0xe3, 0x6b, 0x6f, 0xc1 ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h"
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|
|
-
|
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input:
|
|
bytes: [ 0x21, 0x0a, 0x60, 0xc1 ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
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expected:
|
|
insns:
|
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-
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asm_text: "smlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h"
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|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x0a, 0x60, 0xc1 ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x08, 0x6e, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
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|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x08, 0x6e, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0x4a, 0x64, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0x4a, 0x64, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x09, 0x62, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x09, 0x62, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x48, 0x6a, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x48, 0x6a, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc1, 0x0a, 0x6e, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc1, 0x0a, 0x6e, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x22, 0x69, 0x61, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x22, 0x69, 0x61, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x29, 0x6b, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x29, 0x6b, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x10, 0xd0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x10, 0xd0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x45, 0x55, 0xd5, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x45, 0x55, 0xd5, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x87, 0x7d, 0xd8, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x87, 0x7d, 0xd8, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc7, 0x7f, 0xdf, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc7, 0x7f, 0xdf, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x05, 0x1e, 0xd0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x05, 0x1e, 0xd0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x14, 0xde, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x14, 0xde, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0x56, 0xd4, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0x56, 0xd4, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x19, 0xd2, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x19, 0xd2, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x58, 0xda, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x58, 0xda, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc5, 0x1a, 0xde, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc5, 0x1a, 0xde, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x02, 0x75, 0xd1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x02, 0x75, 0xd1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x87, 0x39, 0xdb, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x87, 0x39, 0xdb, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x08, 0xe0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x08, 0xe0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x41, 0x49, 0xf4, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x41, 0x49, 0xf4, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x69, 0xe8, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x69, 0xe8, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc3, 0x6b, 0xfe, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc3, 0x6b, 0xfe, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x0a, 0xf0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x0a, 0xf0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x08, 0xfe, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x08, 0xfe, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0x4a, 0xf4, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0x4a, 0xf4, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x09, 0xe2, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x09, 0xe2, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x48, 0xfa, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x48, 0xfa, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc1, 0x0a, 0xfe, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc1, 0x0a, 0xfe, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x02, 0x69, 0xe0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x02, 0x69, 0xe0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x29, 0xea, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x29, 0xea, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x08, 0x70, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x08, 0x70, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x41, 0x49, 0x75, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z10.h - z13.h }, z5.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x41, 0x49, 0x75, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z10.h - z13.h }, z5.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xa3, 0x69, 0x78, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z13.h - z16.h }, z8.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xa3, 0x69, 0x78, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z13.h - z16.h }, z8.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe3, 0x6b, 0x7f, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe3, 0x6b, 0x7f, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x0a, 0x70, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z17.h - z20.h }, z0.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x0a, 0x70, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z17.h - z20.h }, z0.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x08, 0x7e, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z1.h - z4.h }, z14.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x08, 0x7e, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z1.h - z4.h }, z14.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0x4a, 0x74, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx4], { z19.h - z22.h }, z4.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0x4a, 0x74, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx4], { z19.h - z22.h }, z4.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x09, 0x72, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z12.h - z15.h }, z2.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x09, 0x72, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z12.h - z15.h }, z2.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x48, 0x7a, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z1.h - z4.h }, z10.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x21, 0x48, 0x7a, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z1.h - z4.h }, z10.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc1, 0x0a, 0x7e, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z22.h - z25.h }, z14.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc1, 0x0a, 0x7e, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z22.h - z25.h }, z14.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x22, 0x69, 0x71, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx4], { z9.h - z12.h }, z1.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x22, 0x69, 0x71, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx4], { z9.h - z12.h }, z1.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x29, 0x7b, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx4], { z12.h - z15.h }, z11.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x29, 0x7b, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx4], { z12.h - z15.h }, z11.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x90, 0xd0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x90, 0xd0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x05, 0xd5, 0xd5, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z8.h - z11.h }, z5.h[3]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x05, 0xd5, 0xd5, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z8.h - z11.h }, z5.h[3]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x87, 0xfd, 0xd8, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z12.h - z15.h }, z8.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x87, 0xfd, 0xd8, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z12.h - z15.h }, z8.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x87, 0xff, 0xdf, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z28.h - z31.h }, z15.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x87, 0xff, 0xdf, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z28.h - z31.h }, z15.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x05, 0x9e, 0xd0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z16.h - z19.h }, z0.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x05, 0x9e, 0xd0, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z16.h - z19.h }, z0.h[7]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x94, 0xde, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z0.h - z3.h }, z14.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x94, 0xde, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z0.h - z3.h }, z14.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xd6, 0xd4, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx4], { z16.h - z19.h }, z4.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xd6, 0xd4, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx4], { z16.h - z19.h }, z4.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x99, 0xd2, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z12.h - z15.h }, z2.h[4]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x99, 0xd2, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z12.h - z15.h }, z2.h[4]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0xd8, 0xda, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z0.h - z3.h }, z10.h[4]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0xd8, 0xda, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z0.h - z3.h }, z10.h[4]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x85, 0x9a, 0xde, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z20.h - z23.h }, z14.h[5]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x85, 0x9a, 0xde, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z20.h - z23.h }, z14.h[5]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x02, 0xf5, 0xd1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx4], { z8.h - z11.h }, z1.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x02, 0xf5, 0xd1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx4], { z8.h - z11.h }, z1.h[2]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x87, 0xb9, 0xdb, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx4], { z12.h - z15.h }, z11.h[5]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x87, 0xb9, 0xdb, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx4], { z12.h - z15.h }, z11.h[5]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x08, 0xe1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x08, 0xe1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x49, 0xf5, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z8.h - z11.h }, { z20.h - z23.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x49, 0xf5, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z8.h - z11.h }, { z20.h - z23.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x69, 0xe9, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x69, 0xe9, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x6b, 0xfd, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x6b, 0xfd, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 6:7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x0a, 0xf1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z16.h - z19.h }, { z16.h - z19.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x0a, 0xf1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z16.h - z19.h }, { z16.h - z19.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x08, 0xfd, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z0.h - z3.h }, { z28.h - z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x08, 0xfd, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z0.h - z3.h }, { z28.h - z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x4a, 0xf5, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx4], { z16.h - z19.h }, { z20.h - z23.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x4a, 0xf5, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 0:1, vgx4], { z16.h - z19.h }, { z20.h - z23.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x09, 0xe1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z12.h - z15.h }, { z0.h - z3.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0x09, 0xe1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 0:1, vgx4], { z12.h - z15.h }, { z0.h - z3.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x48, 0xf9, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z0.h - z3.h }, { z24.h - z27.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x01, 0x48, 0xf9, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w10, 2:3, vgx4], { z0.h - z3.h }, { z24.h - z27.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x81, 0x0a, 0xfd, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z20.h - z23.h }, { z28.h - z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x81, 0x0a, 0xfd, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w8, 2:3, vgx4], { z20.h - z23.h }, { z28.h - z31.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x02, 0x69, 0xe1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx4], { z8.h - z11.h }, { z0.h - z3.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x02, 0x69, 0xe1, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w11, 4:5, vgx4], { z8.h - z11.h }, { z0.h - z3.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x29, 0xe9, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x83, 0x29, 0xe9, 0xc1 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "smlal za.s[w9, 6:7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }"
|