mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
241 lines
6.2 KiB
YAML
241 lines
6.2 KiB
YAML
test_cases:
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input:
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bytes: [ 0x28, 0x80, 0x50, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "usvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]"
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input:
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bytes: [ 0x28, 0x80, 0x50, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]"
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-
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input:
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bytes: [ 0x2d, 0xc5, 0x55, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "usvdot za.s[w10, 5, vgx4], { z8.b - z11.b }, z5.b[1]"
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input:
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bytes: [ 0x2d, 0xc5, 0x55, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w10, 5, vgx4], { z8.b - z11.b }, z5.b[1]"
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input:
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bytes: [ 0xaf, 0xed, 0x58, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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-
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asm_text: "usvdot za.s[w11, 7, vgx4], { z12.b - z15.b }, z8.b[3]"
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input:
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bytes: [ 0xaf, 0xed, 0x58, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w11, 7, vgx4], { z12.b - z15.b }, z8.b[3]"
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input:
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bytes: [ 0xaf, 0xef, 0x5f, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w11, 7, vgx4], { z28.b - z31.b }, z15.b[3]"
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input:
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bytes: [ 0xaf, 0xef, 0x5f, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w11, 7, vgx4], { z28.b - z31.b }, z15.b[3]"
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input:
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bytes: [ 0x2d, 0x8e, 0x50, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w8, 5, vgx4], { z16.b - z19.b }, z0.b[3]"
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input:
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bytes: [ 0x2d, 0x8e, 0x50, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w8, 5, vgx4], { z16.b - z19.b }, z0.b[3]"
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input:
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bytes: [ 0x29, 0x84, 0x5e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w8, 1, vgx4], { z0.b - z3.b }, z14.b[1]"
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input:
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bytes: [ 0x29, 0x84, 0x5e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w8, 1, vgx4], { z0.b - z3.b }, z14.b[1]"
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input:
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bytes: [ 0x28, 0xc6, 0x54, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w10, 0, vgx4], { z16.b - z19.b }, z4.b[1]"
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input:
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bytes: [ 0x28, 0xc6, 0x54, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w10, 0, vgx4], { z16.b - z19.b }, z4.b[1]"
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input:
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bytes: [ 0xa8, 0x89, 0x52, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w8, 0, vgx4], { z12.b - z15.b }, z2.b[2]"
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input:
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bytes: [ 0xa8, 0x89, 0x52, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w8, 0, vgx4], { z12.b - z15.b }, z2.b[2]"
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input:
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bytes: [ 0x29, 0xc8, 0x5a, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w10, 1, vgx4], { z0.b - z3.b }, z10.b[2]"
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input:
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bytes: [ 0x29, 0xc8, 0x5a, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w10, 1, vgx4], { z0.b - z3.b }, z10.b[2]"
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input:
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bytes: [ 0xad, 0x8a, 0x5e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w8, 5, vgx4], { z20.b - z23.b }, z14.b[2]"
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input:
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bytes: [ 0xad, 0x8a, 0x5e, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w8, 5, vgx4], { z20.b - z23.b }, z14.b[2]"
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input:
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bytes: [ 0x2a, 0xe5, 0x51, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w11, 2, vgx4], { z8.b - z11.b }, z1.b[1]"
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input:
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bytes: [ 0x2a, 0xe5, 0x51, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w11, 2, vgx4], { z8.b - z11.b }, z1.b[1]"
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input:
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bytes: [ 0xaf, 0xa9, 0x5b, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w9, 7, vgx4], { z12.b - z15.b }, z11.b[2]"
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input:
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bytes: [ 0xaf, 0xa9, 0x5b, 0xc1 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
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expected:
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insns:
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asm_text: "usvdot za.s[w9, 7, vgx4], { z12.b - z15.b }, z11.b[2]"
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