mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
81 lines
1.8 KiB
YAML
81 lines
1.8 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0xe0, 0x3f, 0x1a, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "andv b0, p7, z31.b"
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-
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input:
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bytes: [ 0xe0, 0x3f, 0x5a, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "andv h0, p7, z31.h"
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-
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input:
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bytes: [ 0xe0, 0x3f, 0x9a, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "andv s0, p7, z31.s"
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input:
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bytes: [ 0xe0, 0x3f, 0xda, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "andv d0, p7, z31.d"
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input:
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bytes: [ 0xe0, 0x3f, 0x1a, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "andv b0, p7, z31.b"
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-
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input:
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bytes: [ 0xe0, 0x3f, 0x5a, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "andv h0, p7, z31.h"
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-
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input:
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bytes: [ 0xe0, 0x3f, 0x9a, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "andv s0, p7, z31.s"
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-
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input:
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bytes: [ 0xe0, 0x3f, 0xda, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "andv d0, p7, z31.d"
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