mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
541 lines
12 KiB
YAML
541 lines
12 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0x00, 0x80, 0x5a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.h, p0/m, z0.h, #0.5"
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-
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input:
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bytes: [ 0x00, 0x80, 0x5a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.h, p0/m, z0.h, #0.5"
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-
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input:
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bytes: [ 0x00, 0x80, 0x9a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.s, p0/m, z0.s, #0.5"
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-
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input:
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bytes: [ 0x00, 0x80, 0xda, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.d, p0/m, z0.d, #0.5"
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-
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input:
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bytes: [ 0x3f, 0x9c, 0x5a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z31.h, p7/m, z31.h, #2.0"
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-
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input:
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bytes: [ 0x3f, 0x9c, 0x9a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z31.s, p7/m, z31.s, #2.0"
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-
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input:
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bytes: [ 0x3f, 0x9c, 0xda, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z31.d, p7/m, z31.d, #2.0"
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-
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input:
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bytes: [ 0x00, 0x20, 0x20, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.h, z0.h, z0.h[0]"
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-
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input:
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bytes: [ 0x00, 0x20, 0xa0, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.s, z0.s, z0.s[0]"
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-
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input:
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bytes: [ 0x00, 0x20, 0xe0, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.d, z0.d, z0.d[0]"
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-
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input:
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bytes: [ 0xff, 0x23, 0x7f, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z31.h, z31.h, z7.h[7]"
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-
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input:
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bytes: [ 0xff, 0x23, 0xbf, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z31.s, z31.s, z7.s[3]"
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-
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input:
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bytes: [ 0xff, 0x23, 0xff, 0x64 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z31.d, z31.d, z15.d[1]"
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-
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input:
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bytes: [ 0xe0, 0x9f, 0x42, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.h, p7/m, z0.h, z31.h"
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-
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input:
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bytes: [ 0xe0, 0x9f, 0x82, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.s, p7/m, z0.s, z31.s"
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-
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input:
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bytes: [ 0xe0, 0x9f, 0xc2, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.d, p7/m, z0.d, z31.d"
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-
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input:
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bytes: [ 0x20, 0x08, 0x5f, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.h, z1.h, z31.h"
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-
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input:
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bytes: [ 0x20, 0x08, 0x9f, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.s, z1.s, z31.s"
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-
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input:
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bytes: [ 0x20, 0x08, 0xdf, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.d, z1.d, z31.d"
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-
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input:
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bytes: [ 0xdf, 0x3c, 0xd0, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "movprfx z31.d, p7/z, z6.d"
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-
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input:
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bytes: [ 0x3f, 0x9c, 0xda, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z31.d, p7/m, z31.d, #2.0"
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-
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input:
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bytes: [ 0xdf, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "movprfx z31, z6"
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-
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input:
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bytes: [ 0x3f, 0x9c, 0xda, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z31.d, p7/m, z31.d, #2.0"
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-
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input:
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bytes: [ 0xe0, 0x3c, 0xd0, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0.d, p7/z, z7.d"
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-
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input:
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bytes: [ 0xe0, 0x9f, 0xc2, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "fmul z0.d, p7/m, z0.d, z31.d"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0xe0, 0x9f, 0xc2, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
|
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insns:
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-
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asm_text: "fmul z0.d, p7/m, z0.d, z31.d"
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|
|
-
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input:
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bytes: [ 0x00, 0x80, 0x5a, 0x65 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
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expected:
|
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insns:
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-
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asm_text: "fmul z0.h, p0/m, z0.h, #0.5"
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|
|
-
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input:
|
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bytes: [ 0x00, 0x80, 0x5a, 0x65 ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
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expected:
|
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insns:
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-
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asm_text: "fmul z0.h, p0/m, z0.h, #0.5"
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|
|
-
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input:
|
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bytes: [ 0x00, 0x80, 0x9a, 0x65 ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
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expected:
|
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insns:
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-
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asm_text: "fmul z0.s, p0/m, z0.s, #0.5"
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|
-
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input:
|
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bytes: [ 0x00, 0x80, 0xda, 0x65 ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
|
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insns:
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-
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asm_text: "fmul z0.d, p0/m, z0.d, #0.5"
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-
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input:
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bytes: [ 0x3f, 0x9c, 0x5a, 0x65 ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
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expected:
|
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insns:
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-
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asm_text: "fmul z31.h, p7/m, z31.h, #2.0"
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-
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input:
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bytes: [ 0x3f, 0x9c, 0x9a, 0x65 ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
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expected:
|
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insns:
|
|
-
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asm_text: "fmul z31.s, p7/m, z31.s, #2.0"
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|
|
-
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input:
|
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bytes: [ 0x3f, 0x9c, 0xda, 0x65 ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
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expected:
|
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insns:
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-
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asm_text: "fmul z31.d, p7/m, z31.d, #2.0"
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|
|
-
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input:
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bytes: [ 0x00, 0x20, 0x20, 0x64 ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
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insns:
|
|
-
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asm_text: "fmul z0.h, z0.h, z0.h[0]"
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|
|
-
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input:
|
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bytes: [ 0x00, 0x20, 0xa0, 0x64 ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
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asm_text: "fmul z0.s, z0.s, z0.s[0]"
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|
|
|
-
|
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input:
|
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bytes: [ 0x00, 0x20, 0xe0, 0x64 ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
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asm_text: "fmul z0.d, z0.d, z0.d[0]"
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|
|
|
-
|
|
input:
|
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bytes: [ 0xff, 0x23, 0x7f, 0x64 ]
|
|
arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z31.h, z31.h, z7.h[7]"
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|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x23, 0xbf, 0x64 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z31.s, z31.s, z7.s[3]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x23, 0xff, 0x64 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z31.d, z31.d, z15.d[1]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0x9f, 0x42, 0x65 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z0.h, p7/m, z0.h, z31.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0x9f, 0x82, 0x65 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z0.s, p7/m, z0.s, z31.s"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0x9f, 0xc2, 0x65 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z0.d, p7/m, z0.d, z31.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0x08, 0x5f, 0x65 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z0.h, z1.h, z31.h"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0x08, 0x9f, 0x65 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z0.s, z1.s, z31.s"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0x08, 0xdf, 0x65 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z0.d, z1.d, z31.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xdf, 0x3c, 0xd0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "movprfx z31.d, p7/z, z6.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x3f, 0x9c, 0xda, 0x65 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z31.d, p7/m, z31.d, #2.0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xdf, 0xbc, 0x20, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "movprfx z31, z6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x3f, 0x9c, 0xda, 0x65 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z31.d, p7/m, z31.d, #2.0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0x3c, 0xd0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "movprfx z0.d, p7/z, z7.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0x9f, 0xc2, 0x65 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z0.d, p7/m, z0.d, z31.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "movprfx z0, z7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0x9f, 0xc2, 0x65 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "fmul z0.d, p7/m, z0.d, z31.d"
|