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XenonRecomp/thirdparty/capstone/tests/MC/AArch64/SVE/incd.s.yaml
Sajid 0f9a53f75a Initial Commit
2024-09-07 18:15:29 +06:00

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test_cases:
-
input:
bytes: [ 0xe0, 0xc3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd z0.d"
-
input:
bytes: [ 0xe0, 0xc3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd z0.d"
-
input:
bytes: [ 0xe0, 0xc3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd z0.d"
-
input:
bytes: [ 0xe0, 0xc3, 0xff, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd z0.d, all, mul #16"
-
input:
bytes: [ 0xe0, 0xe3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0"
-
input:
bytes: [ 0xe0, 0xe3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0"
-
input:
bytes: [ 0xe0, 0xe3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0"
-
input:
bytes: [ 0xe0, 0xe3, 0xff, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, all, mul #16"
-
input:
bytes: [ 0x00, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, pow2"
-
input:
bytes: [ 0x20, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl1"
-
input:
bytes: [ 0x40, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl2"
-
input:
bytes: [ 0x60, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl3"
-
input:
bytes: [ 0x80, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl4"
-
input:
bytes: [ 0xa0, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl5"
-
input:
bytes: [ 0xc0, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl6"
-
input:
bytes: [ 0xe0, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl7"
-
input:
bytes: [ 0x00, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl8"
-
input:
bytes: [ 0x20, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl16"
-
input:
bytes: [ 0x40, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl32"
-
input:
bytes: [ 0x60, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl64"
-
input:
bytes: [ 0x80, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl128"
-
input:
bytes: [ 0xa0, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, vl256"
-
input:
bytes: [ 0xc0, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, #14"
-
input:
bytes: [ 0x80, 0xe3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd x0, #28"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0xe0, 0xc3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd z0.d"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0xe0, 0xc3, 0xff, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd z0.d, all, mul #16"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0xe0, 0xc3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "incd z0.d"
-
input:
bytes: [ 0xe0, 0xc3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd z0.d"
-
input:
bytes: [ 0xe0, 0xc3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd z0.d"
-
input:
bytes: [ 0xe0, 0xc3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd z0.d"
-
input:
bytes: [ 0xe0, 0xc3, 0xff, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd z0.d, all, mul #16"
-
input:
bytes: [ 0xe0, 0xe3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0"
-
input:
bytes: [ 0xe0, 0xe3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0"
-
input:
bytes: [ 0xe0, 0xe3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0"
-
input:
bytes: [ 0xe0, 0xe3, 0xff, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, all, mul #16"
-
input:
bytes: [ 0x00, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, pow2"
-
input:
bytes: [ 0x20, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl1"
-
input:
bytes: [ 0x40, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl2"
-
input:
bytes: [ 0x60, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl3"
-
input:
bytes: [ 0x80, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl4"
-
input:
bytes: [ 0xa0, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl5"
-
input:
bytes: [ 0xc0, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl6"
-
input:
bytes: [ 0xe0, 0xe0, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl7"
-
input:
bytes: [ 0x00, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl8"
-
input:
bytes: [ 0x20, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl16"
-
input:
bytes: [ 0x40, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl32"
-
input:
bytes: [ 0x60, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl64"
-
input:
bytes: [ 0x80, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl128"
-
input:
bytes: [ 0xa0, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, vl256"
-
input:
bytes: [ 0xc0, 0xe1, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, #14"
-
input:
bytes: [ 0x80, 0xe3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd x0, #28"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0xe0, 0xc3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd z0.d"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0xe0, 0xc3, 0xff, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd z0.d, all, mul #16"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0xe0, 0xc3, 0xf0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "incd z0.d"
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