XenonRecomp/thirdparty/capstone/tests/MC/AArch64/SVE/lsrr.s.yaml

test_cases:
  -
    input:
      bytes: [ 0x00, 0x80, 0x15, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "lsrr z0.b, p0/m, z0.b, z0.b"

  -
    input:
      bytes: [ 0x00, 0x80, 0x55, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "lsrr z0.h, p0/m, z0.h, z0.h"

  -
    input:
      bytes: [ 0x00, 0x80, 0x95, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "lsrr z0.s, p0/m, z0.s, z0.s"

  -
    input:
      bytes: [ 0x00, 0x80, 0xd5, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "lsrr z0.d, p0/m, z0.d, z0.d"

  -
    input:
      bytes: [ 0xe5, 0x20, 0xd0, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "movprfx z5.d, p0/z, z7.d"

  -
    input:
      bytes: [ 0x05, 0x80, 0xd5, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "lsrr z5.d, p0/m, z5.d, z0.d"

  -
    input:
      bytes: [ 0xe5, 0xbc, 0x20, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "movprfx z5, z7"

  -
    input:
      bytes: [ 0x05, 0x80, 0xd5, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "lsrr z5.d, p0/m, z5.d, z0.d"

  -
    input:
      bytes: [ 0x00, 0x80, 0x15, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "lsrr z0.b, p0/m, z0.b, z0.b"

  -
    input:
      bytes: [ 0x00, 0x80, 0x55, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "lsrr z0.h, p0/m, z0.h, z0.h"

  -
    input:
      bytes: [ 0x00, 0x80, 0x95, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "lsrr z0.s, p0/m, z0.s, z0.s"

  -
    input:
      bytes: [ 0x00, 0x80, 0xd5, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "lsrr z0.d, p0/m, z0.d, z0.d"

  -
    input:
      bytes: [ 0xe5, 0x20, 0xd0, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "movprfx z5.d, p0/z, z7.d"

  -
    input:
      bytes: [ 0x05, 0x80, 0xd5, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "lsrr z5.d, p0/m, z5.d, z0.d"

  -
    input:
      bytes: [ 0xe5, 0xbc, 0x20, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "movprfx z5, z7"

  -
    input:
      bytes: [ 0x05, 0x80, 0xd5, 0x04 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "lsrr z5.d, p0/m, z5.d, z0.d"