mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
161 lines
3.6 KiB
YAML
161 lines
3.6 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0x20, 0x00, 0x9f, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.s, z1.b, z31.b"
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-
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input:
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bytes: [ 0x20, 0x00, 0xdf, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.d, z1.h, z31.h"
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-
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input:
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bytes: [ 0x20, 0x00, 0xbf, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.s, z1.b, z7.b[3]"
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-
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input:
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bytes: [ 0x20, 0x00, 0xff, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.d, z1.h, z15.h[1]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x00, 0xdf, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.d, z1.h, z31.h"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x00, 0xff, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.d, z1.h, z15.h[1]"
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-
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input:
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bytes: [ 0x20, 0x00, 0x9f, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.s, z1.b, z31.b"
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-
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input:
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bytes: [ 0x20, 0x00, 0xdf, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.d, z1.h, z31.h"
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-
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input:
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bytes: [ 0x20, 0x00, 0xbf, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.s, z1.b, z7.b[3]"
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-
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input:
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bytes: [ 0x20, 0x00, 0xff, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.d, z1.h, z15.h[1]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x00, 0xdf, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.d, z1.h, z31.h"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x00, 0xff, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "sdot z0.d, z1.h, z15.h[1]"
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