mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
201 lines
4.6 KiB
YAML
201 lines
4.6 KiB
YAML
test_cases:
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input:
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bytes: [ 0x10, 0x42, 0x00, 0x25 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mov p0.b, p0/m, p0.b"
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-
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input:
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bytes: [ 0xff, 0x7f, 0x0f, 0x25 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mov p15.b, p15/m, p15.b"
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-
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input:
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bytes: [ 0xff, 0xff, 0x3f, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mov z31.b, p15/m, z31.b"
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input:
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bytes: [ 0xff, 0xff, 0x7f, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mov z31.h, p15/m, z31.h"
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input:
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bytes: [ 0xff, 0xff, 0xbf, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mov z31.s, p15/m, z31.s"
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input:
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bytes: [ 0xff, 0xff, 0xff, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "mov z31.d, p15/m, z31.d"
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-
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input:
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bytes: [ 0xb7, 0xed, 0xa8, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "sel z23.s, p11, z13.s, z8.s"
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input:
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bytes: [ 0xb7, 0xed, 0xe8, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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asm_text: "sel z23.d, p11, z13.d, z8.d"
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input:
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bytes: [ 0xb7, 0xed, 0x68, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "sel z23.h, p11, z13.h, z8.h"
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input:
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bytes: [ 0xb7, 0xed, 0x28, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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asm_text: "sel z23.b, p11, z13.b, z8.b"
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input:
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bytes: [ 0x10, 0x42, 0x00, 0x25 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "mov p0.b, p0/m, p0.b"
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input:
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bytes: [ 0xff, 0x7f, 0x0f, 0x25 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "mov p15.b, p15/m, p15.b"
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input:
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bytes: [ 0xff, 0xff, 0x3f, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "mov z31.b, p15/m, z31.b"
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input:
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bytes: [ 0xff, 0xff, 0x7f, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "mov z31.h, p15/m, z31.h"
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-
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input:
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bytes: [ 0xff, 0xff, 0xbf, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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asm_text: "mov z31.s, p15/m, z31.s"
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input:
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bytes: [ 0xff, 0xff, 0xff, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "mov z31.d, p15/m, z31.d"
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input:
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bytes: [ 0xb7, 0xed, 0xa8, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "sel z23.s, p11, z13.s, z8.s"
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input:
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bytes: [ 0xb7, 0xed, 0xe8, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "sel z23.d, p11, z13.d, z8.d"
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input:
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bytes: [ 0xb7, 0xed, 0x68, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "sel z23.h, p11, z13.h, z8.h"
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-
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input:
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bytes: [ 0xb7, 0xed, 0x28, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "sel z23.b, p11, z13.b, z8.b"
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