mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
1021 lines
22 KiB
YAML
1021 lines
22 KiB
YAML
test_cases:
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xff, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, all, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xef, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0, all, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf0, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0, pow2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf0, 0xef, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0, pow2, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xc3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xc3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xc3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xc3, 0xef, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d, all, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d, pow2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xef, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d, pow2, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, pow2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl3"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl4"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xa0, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl5"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc0, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl32"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl64"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl128"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xa0, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl256"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc0, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #14"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #15"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #17"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #18"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #19"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #20"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xa0, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #21"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc0, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #22"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #23"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #24"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #25"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #26"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #27"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #28"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "movprfx z0, z7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xc3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "movprfx z0, z7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xef, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d, pow2, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "movprfx z0, z7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d, pow2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xff, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, all, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf3, 0xef, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0, all, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf0, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0, pow2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf0, 0xef, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, w0, pow2, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xc3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xc3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xc3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xc3, 0xef, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d, all, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d, pow2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xef, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d, pow2, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, pow2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl3"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl4"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xa0, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl5"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc0, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf0, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl32"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl64"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl128"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xa0, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, vl256"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc0, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #14"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf1, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #15"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #17"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #18"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #19"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #20"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xa0, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #21"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xc0, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #22"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xf2, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #23"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #24"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x20, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #25"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x40, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #26"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x60, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #27"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x80, 0xf3, 0xf0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd x0, #28"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "movprfx z0, z7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xc3, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "movprfx z0, z7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xef, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d, pow2, mul #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "movprfx z0, z7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xe0, 0x04 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "sqincd z0.d, pow2"
|