XenonRecomp/thirdparty/capstone/tests/MC/AArch64/SVE/st1w-sve-only.s.yaml

test_cases:
  -
    input:
      bytes: [ 0x00, 0x80, 0x40, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.s }, p0, [x0, z0.s, uxtw]"

  -
    input:
      bytes: [ 0x00, 0xc0, 0x40, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.s }, p0, [x0, z0.s, sxtw]"

  -
    input:
      bytes: [ 0x00, 0x80, 0x00, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.d }, p0, [x0, z0.d, uxtw]"

  -
    input:
      bytes: [ 0x00, 0xc0, 0x00, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.d }, p0, [x0, z0.d, sxtw]"

  -
    input:
      bytes: [ 0x00, 0x80, 0x60, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.s }, p0, [x0, z0.s, uxtw #2]"

  -
    input:
      bytes: [ 0x00, 0xc0, 0x60, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.s }, p0, [x0, z0.s, sxtw #2]"

  -
    input:
      bytes: [ 0x00, 0x80, 0x20, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.d }, p0, [x0, z0.d, uxtw #2]"

  -
    input:
      bytes: [ 0x00, 0xc0, 0x20, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.d }, p0, [x0, z0.d, sxtw #2]"

  -
    input:
      bytes: [ 0x00, 0xa0, 0x00, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.d }, p0, [x0, z0.d]"

  -
    input:
      bytes: [ 0x00, 0xa0, 0x20, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.d }, p0, [x0, z0.d, lsl #2]"

  -
    input:
      bytes: [ 0xff, 0xbf, 0x7f, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z31.s }, p7, [z31.s, #124]"

  -
    input:
      bytes: [ 0xff, 0xbf, 0x5f, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z31.d }, p7, [z31.d, #124]"

  -
    input:
      bytes: [ 0x00, 0xbc, 0x60, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.s }, p7, [z0.s]"

  -
    input:
      bytes: [ 0x00, 0xbc, 0x60, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.s }, p7, [z0.s]"

  -
    input:
      bytes: [ 0x00, 0xbc, 0x40, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.d }, p7, [z0.d]"

  -
    input:
      bytes: [ 0x00, 0xbc, 0x40, 0xe5 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
    expected:
      insns:
        -
          asm_text: "st1w { z0.d }, p7, [z0.d]"