mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
121 lines
2.7 KiB
YAML
121 lines
2.7 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0x00, 0xa0, 0xd5, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "uxtw z0.d, p0/m, z0.d"
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-
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input:
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bytes: [ 0xff, 0xbf, 0xd5, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "uxtw z31.d, p7/m, z31.d"
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input:
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bytes: [ 0xc4, 0x3c, 0xd0, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "movprfx z4.d, p7/z, z6.d"
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input:
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bytes: [ 0xe4, 0xbf, 0xd5, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "uxtw z4.d, p7/m, z31.d"
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input:
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bytes: [ 0xc4, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "movprfx z4, z6"
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-
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input:
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bytes: [ 0xe4, 0xbf, 0xd5, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "uxtw z4.d, p7/m, z31.d"
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-
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input:
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bytes: [ 0x00, 0xa0, 0xd5, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "uxtw z0.d, p0/m, z0.d"
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-
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input:
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bytes: [ 0xff, 0xbf, 0xd5, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "uxtw z31.d, p7/m, z31.d"
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-
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input:
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bytes: [ 0xc4, 0x3c, 0xd0, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "movprfx z4.d, p7/z, z6.d"
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-
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input:
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bytes: [ 0xe4, 0xbf, 0xd5, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "uxtw z4.d, p7/m, z31.d"
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-
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input:
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bytes: [ 0xc4, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "movprfx z4, z6"
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input:
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bytes: [ 0xe4, 0xbf, 0xd5, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "uxtw z4.d, p7/m, z31.d"
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