mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
121 lines
2.7 KiB
YAML
121 lines
2.7 KiB
YAML
test_cases:
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x34, 0x2f, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z0.b, z0.h, #1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x37, 0x28, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z31.b, z31.h, #8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x34, 0x3f, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z0.h, z0.s, #1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x37, 0x30, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z31.h, z31.s, #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x34, 0x7f, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z0.s, z0.d, #1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x37, 0x60, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z31.s, z31.d, #32"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x34, 0x2f, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z0.b, z0.h, #1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x37, 0x28, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z31.b, z31.h, #8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x34, 0x3f, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z0.h, z0.s, #1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x37, 0x30, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z31.h, z31.s, #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x34, 0x7f, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z0.s, z0.d, #1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x37, 0x60, 0x45 ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "uqshrnt z31.s, z31.d, #32"
|