mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-04 08:12:05 +00:00
271 lines
6.0 KiB
YAML
271 lines
6.0 KiB
YAML
test_cases:
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input:
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bytes: [ 0xc2, 0x42, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssbs" ]
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expected:
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insns:
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-
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asm_text: "mrs x2, SSBS"
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input:
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bytes: [ 0xc3, 0x42, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssbs" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, x3"
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input:
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bytes: [ 0x3f, 0x41, 0x03, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssbs" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, #1"
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input:
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bytes: [ 0xc2, 0x42, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "mrs x2, SSBS"
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input:
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bytes: [ 0xc3, 0x42, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, x3"
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input:
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bytes: [ 0x3f, 0x41, 0x03, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, #1"
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-
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input:
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bytes: [ 0xc2, 0x42, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
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expected:
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insns:
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-
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asm_text: "mrs x2, SSBS"
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-
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input:
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bytes: [ 0xc3, 0x42, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, x3"
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-
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input:
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bytes: [ 0x3f, 0x41, 0x03, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, #1"
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input:
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bytes: [ 0xc2, 0x42, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
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expected:
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insns:
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-
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asm_text: "mrs x2, SSBS"
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-
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input:
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bytes: [ 0xc3, 0x42, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, x3"
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-
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input:
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bytes: [ 0x3f, 0x41, 0x03, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a65ae" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, #1"
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input:
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bytes: [ 0xc2, 0x42, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
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expected:
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insns:
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-
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asm_text: "mrs x2, SSBS"
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input:
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bytes: [ 0xc3, 0x42, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, x3"
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input:
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bytes: [ 0x3f, 0x41, 0x03, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, #1"
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input:
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bytes: [ 0xc2, 0x42, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76ae" ]
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expected:
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insns:
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-
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asm_text: "mrs x2, SSBS"
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input:
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bytes: [ 0xc3, 0x42, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76ae" ]
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expected:
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insns:
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asm_text: "msr SSBS, x3"
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input:
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bytes: [ 0x3f, 0x41, 0x03, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "cortex-a76ae" ]
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expected:
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insns:
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asm_text: "msr SSBS, #1"
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input:
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bytes: [ 0xc2, 0x42, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
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expected:
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insns:
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asm_text: "mrs x2, SSBS"
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input:
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bytes: [ 0xc3, 0x42, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, x3"
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-
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input:
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bytes: [ 0x3f, 0x41, 0x03, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-e1" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, #1"
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-
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input:
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bytes: [ 0xc2, 0x42, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
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expected:
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insns:
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-
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asm_text: "mrs x2, SSBS"
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input:
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bytes: [ 0xc3, 0x42, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, x3"
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-
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input:
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bytes: [ 0x3f, 0x41, 0x03, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n1" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, #1"
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input:
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bytes: [ 0xc2, 0x42, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
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expected:
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insns:
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asm_text: "mrs x2, SSBS"
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input:
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bytes: [ 0xc3, 0x42, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, x3"
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-
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input:
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bytes: [ 0x3f, 0x41, 0x03, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "neoverse-n2" ]
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expected:
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insns:
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-
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asm_text: "msr SSBS, #1"
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