mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-04 08:12:05 +00:00
1281 lines
30 KiB
YAML
1281 lines
30 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0x00, 0xc0, 0x40, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1r { v0.16b }, [x0]"
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-
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input:
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bytes: [ 0xef, 0xc5, 0x40, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1r { v15.8h }, [x15]"
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-
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input:
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bytes: [ 0xff, 0xcb, 0x40, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1r { v31.4s }, [sp]"
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-
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input:
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bytes: [ 0x00, 0xcc, 0x40, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1r { v0.2d }, [x0]"
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-
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input:
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bytes: [ 0x00, 0xc0, 0x40, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1r { v0.8b }, [x0]"
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-
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input:
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bytes: [ 0xef, 0xc5, 0x40, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1r { v15.4h }, [x15]"
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-
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input:
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bytes: [ 0xff, 0xcb, 0x40, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1r { v31.2s }, [sp]"
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-
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input:
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bytes: [ 0x00, 0xcc, 0x40, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1r { v0.1d }, [x0]"
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-
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input:
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bytes: [ 0x00, 0xc0, 0x60, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld2r { v0.16b, v1.16b }, [x0]"
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-
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input:
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bytes: [ 0xef, 0xc5, 0x60, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld2r { v15.8h, v16.8h }, [x15]"
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-
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input:
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bytes: [ 0xff, 0xcb, 0x60, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld2r { v31.4s, v0.4s }, [sp]"
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-
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input:
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bytes: [ 0x00, 0xcc, 0x60, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld2r { v0.2d, v1.2d }, [x0]"
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-
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input:
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bytes: [ 0x00, 0xc0, 0x60, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld2r { v0.8b, v1.8b }, [x0]"
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-
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input:
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bytes: [ 0xef, 0xc5, 0x60, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld2r { v15.4h, v16.4h }, [x15]"
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-
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input:
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bytes: [ 0xff, 0xcb, 0x60, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld2r { v31.2s, v0.2s }, [sp]"
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-
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input:
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bytes: [ 0xff, 0xcf, 0x60, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld2r { v31.1d, v0.1d }, [sp]"
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-
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input:
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bytes: [ 0x00, 0xe0, 0x40, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld3r { v0.16b, v1.16b, v2.16b }, [x0]"
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-
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input:
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bytes: [ 0xef, 0xe5, 0x40, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld3r { v15.8h, v16.8h, v17.8h }, [x15]"
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-
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input:
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bytes: [ 0xff, 0xeb, 0x40, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld3r { v31.4s, v0.4s, v1.4s }, [sp]"
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-
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input:
|
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bytes: [ 0x00, 0xec, 0x40, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld3r { v0.2d, v1.2d, v2.2d }, [x0]"
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-
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input:
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bytes: [ 0x00, 0xe0, 0x40, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld3r { v0.8b, v1.8b, v2.8b }, [x0]"
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-
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input:
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bytes: [ 0xef, 0xe5, 0x40, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld3r { v15.4h, v16.4h, v17.4h }, [x15]"
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-
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input:
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bytes: [ 0xff, 0xeb, 0x40, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld3r { v31.2s, v0.2s, v1.2s }, [sp]"
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-
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input:
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bytes: [ 0xff, 0xef, 0x40, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld3r { v31.1d, v0.1d, v1.1d }, [sp]"
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-
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input:
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bytes: [ 0x00, 0xe0, 0x60, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
|
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insns:
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-
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asm_text: "ld4r { v0.16b, v1.16b, v2.16b, v3.16b }, [x0]"
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|
|
-
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input:
|
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bytes: [ 0xef, 0xe5, 0x60, 0x4d ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
|
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insns:
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-
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asm_text: "ld4r { v15.8h, v16.8h, v17.8h, v18.8h }, [x15]"
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|
|
-
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input:
|
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bytes: [ 0xff, 0xeb, 0x60, 0x4d ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
|
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insns:
|
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-
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asm_text: "ld4r { v31.4s, v0.4s, v1.4s, v2.4s }, [sp]"
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|
|
-
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input:
|
|
bytes: [ 0x00, 0xec, 0x60, 0x4d ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
|
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insns:
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-
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asm_text: "ld4r { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]"
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|
|
-
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input:
|
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bytes: [ 0x00, 0xe0, 0x60, 0x0d ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
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expected:
|
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insns:
|
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-
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asm_text: "ld4r { v0.8b, v1.8b, v2.8b, v3.8b }, [x0]"
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|
|
-
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input:
|
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bytes: [ 0xef, 0xe5, 0x60, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
|
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insns:
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-
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asm_text: "ld4r { v15.4h, v16.4h, v17.4h, v18.4h }, [x15]"
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|
|
-
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input:
|
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bytes: [ 0xff, 0xeb, 0x60, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld4r { v31.2s, v0.2s, v1.2s, v2.2s }, [sp]"
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|
|
-
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input:
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bytes: [ 0xff, 0xef, 0x60, 0x0d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld4r { v31.1d, v0.1d, v1.1d, v2.1d }, [sp]"
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|
|
-
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input:
|
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bytes: [ 0x00, 0x04, 0x40, 0x4d ]
|
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1 { v0.b }[9], [x0]"
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|
-
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input:
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bytes: [ 0xef, 0x59, 0x40, 0x4d ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1 { v15.h }[7], [x15]"
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|
-
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input:
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bytes: [ 0xff, 0x93, 0x40, 0x4d ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
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expected:
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insns:
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-
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asm_text: "ld1 { v31.s }[3], [sp]"
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-
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input:
|
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bytes: [ 0x00, 0x84, 0x40, 0x4d ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
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expected:
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insns:
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-
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asm_text: "ld1 { v0.d }[1], [x0]"
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|
-
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input:
|
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bytes: [ 0x00, 0x04, 0x60, 0x4d ]
|
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arch: "CS_ARCH_AARCH64"
|
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
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asm_text: "ld2 { v0.b, v1.b }[9], [x0]"
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|
|
|
-
|
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input:
|
|
bytes: [ 0xef, 0x59, 0x60, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2 { v15.h, v16.h }[7], [x15]"
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|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x93, 0x60, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2 { v31.s, v0.s }[3], [sp]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x84, 0x60, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2 { v0.d, v1.d }[1], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x24, 0x40, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3 { v0.b, v1.b, v2.b }[9], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x79, 0x40, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3 { v15.h, v16.h, v17.h }[7], [x15]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xb3, 0x40, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3 { v31.s, v0.s, v1.s }[3], [sp]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xa4, 0x40, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3 { v0.d, v1.d, v2.d }[1], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x24, 0x60, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x79, 0x60, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4 { v15.h, v16.h, v17.h, v18.h }[7], [x15]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xb3, 0x60, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4 { v31.s, v0.s, v1.s, v2.s }[3], [sp]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xa4, 0x60, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x04, 0x00, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st1 { v0.b }[9], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x59, 0x00, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st1 { v15.h }[7], [x15]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x93, 0x00, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st1 { v31.s }[3], [sp]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x84, 0x00, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st1 { v0.d }[1], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x04, 0x20, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st2 { v0.b, v1.b }[9], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x59, 0x20, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st2 { v15.h, v16.h }[7], [x15]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x93, 0x20, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st2 { v31.s, v0.s }[3], [sp]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x84, 0x20, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st2 { v0.d, v1.d }[1], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x24, 0x00, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st3 { v0.b, v1.b, v2.b }[9], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x79, 0x00, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st3 { v15.h, v16.h, v17.h }[7], [x15]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xb3, 0x00, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st3 { v31.s, v0.s, v1.s }[3], [sp]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xa4, 0x00, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st3 { v0.d, v1.d, v2.d }[1], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x24, 0x20, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x79, 0x20, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st4 { v15.h, v16.h, v17.h, v18.h }[7], [x15]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xb3, 0x20, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st4 { v31.s, v0.s, v1.s, v2.s }[3], [sp]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xa4, 0x20, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st4 { v0.d, v1.d, v2.d, v3.d }[1], [x0]"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xdf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1r { v0.16b }, [x0], #1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0xc5, 0xdf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1r { v15.8h }, [x15], #2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xcb, 0xdf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1r { v31.4s }, [sp], #4"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xcc, 0xdf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1r { v0.2d }, [x0], #8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xc0, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1r { v0.8b }, [x0], x0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0xc5, 0xc1, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1r { v15.4h }, [x15], x1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xcb, 0xc2, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1r { v31.2s }, [sp], x2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xcc, 0xc3, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1r { v0.1d }, [x0], x3"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2r { v0.16b, v1.16b }, [x0], #2"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0xc5, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2r { v15.8h, v16.8h }, [x15], #4"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xcb, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2r { v31.4s, v0.4s }, [sp], #8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xcc, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2r { v0.2d, v1.2d }, [x0], #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xc0, 0xe6, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2r { v0.8b, v1.8b }, [x0], x6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0xc5, 0xe7, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2r { v15.4h, v16.4h }, [x15], x7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xcb, 0xe9, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2r { v31.2s, v0.2s }, [sp], x9"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x1f, 0xcc, 0xe5, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2r { v31.1d, v0.1d }, [x0], x5"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xe0, 0xc9, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3r { v0.16b, v1.16b, v2.16b }, [x0], x9"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0xe5, 0xc6, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3r { v15.8h, v16.8h, v17.8h }, [x15], x6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xeb, 0xc7, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3r { v31.4s, v0.4s, v1.4s }, [sp], x7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xec, 0xc5, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3r { v0.2d, v1.2d, v2.2d }, [x0], x5"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xe0, 0xdf, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0xe5, 0xdf, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3r { v15.4h, v16.4h, v17.4h }, [x15], #6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xeb, 0xdf, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3r { v31.2s, v0.2s, v1.2s }, [sp], #12"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xef, 0xdf, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3r { v31.1d, v0.1d, v1.1d }, [sp], #24"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xe0, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4r { v0.16b, v1.16b, v2.16b, v3.16b }, [x0], #4"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0xe5, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4r { v15.8h, v16.8h, v17.8h, v18.8h }, [x15], #8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xeb, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4r { v31.4s, v0.4s, v1.4s, v2.4s }, [sp], #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xec, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4r { v0.2d, v1.2d, v2.2d, v3.2d }, [x0], #32"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xe0, 0xe5, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4r { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x5"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0xe5, 0xe9, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4r { v15.4h, v16.4h, v17.4h, v18.4h }, [x15], x9"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xeb, 0xfe, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4r { v31.2s, v0.2s, v1.2s, v2.2s }, [sp], x30"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xef, 0xe7, 0x0d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4r { v31.1d, v0.1d, v1.1d, v2.1d }, [sp], x7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x04, 0xdf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1 { v0.b }[9], [x0], #1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x59, 0xc9, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1 { v15.h }[7], [x15], x9"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x93, 0xc6, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1 { v31.s }[3], [sp], x6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x84, 0xdf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld1 { v0.d }[1], [x0], #8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x04, 0xe3, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2 { v0.b, v1.b }[9], [x0], x3"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x59, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2 { v15.h, v16.h }[7], [x15], #4"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x93, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2 { v31.s, v0.s }[3], [sp], #8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x84, 0xe0, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld2 { v0.d, v1.d }[1], [x0], x0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x24, 0xdf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3 { v0.b, v1.b, v2.b }[9], [x0], #3"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x79, 0xdf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3 { v15.h, v16.h, v17.h }[7], [x15], #6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xb3, 0xc3, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3 { v31.s, v0.s, v1.s }[3], [sp], x3"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xa4, 0xc6, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld3 { v0.d, v1.d, v2.d }[1], [x0], x6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x24, 0xe5, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x79, 0xe7, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4 { v15.h, v16.h, v17.h, v18.h }[7], [x15], x7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xb3, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4 { v31.s, v0.s, v1.s, v2.s }[3], [sp], #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xa4, 0xff, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x04, 0x9f, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st1 { v0.b }[9], [x0], #1"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x59, 0x89, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st1 { v15.h }[7], [x15], x9"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x93, 0x86, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st1 { v31.s }[3], [sp], x6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x84, 0x9f, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st1 { v0.d }[1], [x0], #8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x04, 0xa3, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st2 { v0.b, v1.b }[9], [x0], x3"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x59, 0xbf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st2 { v15.h, v16.h }[7], [x15], #4"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0x93, 0xbf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st2 { v31.s, v0.s }[3], [sp], #8"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x84, 0xa0, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st2 { v0.d, v1.d }[1], [x0], x0"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x24, 0x9f, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st3 { v0.b, v1.b, v2.b }[9], [x0], #3"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x79, 0x9f, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st3 { v15.h, v16.h, v17.h }[7], [x15], #6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xb3, 0x83, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st3 { v31.s, v0.s, v1.s }[3], [sp], x3"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xa4, 0x86, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st3 { v0.d, v1.d, v2.d }[1], [x0], x6"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0x24, 0xa5, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xef, 0x79, 0xa7, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st4 { v15.h, v16.h, v17.h, v18.h }[7], [x15], x7"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0xff, 0xb3, 0xbf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st4 { v31.s, v0.s, v1.s, v2.s }[3], [sp], #16"
|
|
|
|
-
|
|
input:
|
|
bytes: [ 0x00, 0xa4, 0xbf, 0x4d ]
|
|
arch: "CS_ARCH_AARCH64"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "arm64", "neon" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "st4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32"
|