mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-04 08:12:05 +00:00
290 lines
6.7 KiB
YAML
290 lines
6.7 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0xe6, 0x00, 0x10, 0x49 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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-
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asm_text: "add $t1, $a2, $a3"
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-
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input:
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bytes: [ 0x26, 0x11, 0x67, 0x45 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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-
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asm_text: "addi $t1, $a2, 17767"
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input:
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bytes: [ 0x26, 0x31, 0x67, 0xc5 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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-
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asm_text: "addiu $t1, $a2, -15001"
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input:
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bytes: [ 0x26, 0x11, 0x67, 0x45 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "addi $t1, $a2, 17767"
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-
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input:
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bytes: [ 0x26, 0x31, 0x67, 0xc5 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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-
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asm_text: "addiu $t1, $a2, -15001"
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-
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input:
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bytes: [ 0xe6, 0x00, 0x50, 0x49 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "addu $t1, $a2, $a3"
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-
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input:
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bytes: [ 0xe6, 0x00, 0x90, 0x49 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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-
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asm_text: "sub $t1, $a2, $a3"
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-
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input:
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bytes: [ 0xa3, 0x00, 0xd0, 0x21 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "subu $a0, $v1, $a1"
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input:
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bytes: [ 0xe0, 0x00, 0x90, 0x31 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "sub $a2, $zero, $a3"
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input:
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bytes: [ 0xe0, 0x00, 0xd0, 0x31 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "subu $a2, $zero, $a3"
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-
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input:
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bytes: [ 0x08, 0x00, 0x50, 0x39 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "addu $a3, $t0, $zero"
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input:
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bytes: [ 0xa3, 0x00, 0x50, 0x1b ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "slt $v1, $v1, $a1"
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input:
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bytes: [ 0x63, 0x90, 0x67, 0x00 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "slti $v1, $v1, 103"
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input:
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bytes: [ 0x63, 0x90, 0x67, 0x00 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "slti $v1, $v1, 103"
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input:
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bytes: [ 0x63, 0xb0, 0x67, 0x00 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "sltiu $v1, $v1, 103"
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input:
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bytes: [ 0xa3, 0x00, 0x90, 0x1b ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "sltu $v1, $v1, $a1"
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input:
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bytes: [ 0xa9, 0x41, 0x67, 0x45 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "lui $t1, 17767"
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input:
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bytes: [ 0xe6, 0x00, 0x50, 0x4a ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "and $t1, $a2, $a3"
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input:
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bytes: [ 0x26, 0xd1, 0x67, 0x45 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "andi $t1, $a2, 17767"
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input:
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bytes: [ 0x26, 0xd1, 0x67, 0x45 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "andi $t1, $a2, 17767"
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input:
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bytes: [ 0xa4, 0x00, 0x90, 0x1a ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "or $v1, $a0, $a1"
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input:
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bytes: [ 0x26, 0x51, 0x67, 0x45 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "ori $t1, $a2, 17767"
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input:
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bytes: [ 0xa3, 0x00, 0x10, 0x1b ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "xor $v1, $v1, $a1"
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input:
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bytes: [ 0x26, 0x71, 0x67, 0x45 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "xori $t1, $a2, 17767"
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input:
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bytes: [ 0x26, 0x71, 0x67, 0x45 ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "xori $t1, $a2, 17767"
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input:
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bytes: [ 0xe6, 0x00, 0xd0, 0x4a ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "nor $t1, $a2, $a3"
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input:
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bytes: [ 0x08, 0x00, 0xd0, 0x3a ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "not $a3, $t0"
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input:
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bytes: [ 0xe6, 0x00, 0x10, 0x4a ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "mul $t1, $a2, $a3"
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input:
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bytes: [ 0xe9, 0x00, 0x3c, 0x8b ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "mult $t1, $a3"
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input:
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bytes: [ 0xe9, 0x00, 0x3c, 0x9b ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "multu $t1, $a3"
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input:
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bytes: [ 0xe9, 0x00, 0x3c, 0xab ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "div $zero, $t1, $a3"
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input:
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bytes: [ 0xe9, 0x00, 0x3c, 0xbb ]
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arch: "CS_ARCH_MIPS"
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options: [ "CS_MODE_MIPS32", "CS_MODE_MICRO" ]
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expected:
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insns:
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asm_text: "divu $zero, $t1, $a3"
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