mirror of
https://github.com/hedge-dev/XenonRecomp.git
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56 lines
1.2 KiB
YAML
56 lines
1.2 KiB
YAML
test_cases:
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input:
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bytes: [ 0x13, 0x04, 0xa8, 0x7a ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64" ]
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expected:
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insns:
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-
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asm_text: "addi s0, a6, 0x7aa"
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input:
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bytes: [ 0x1b, 0x8e, 0xaa, 0x2a ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64" ]
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expected:
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insns:
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-
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asm_text: "addiw t3, s5, 0x2aa"
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input:
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bytes: [ 0x2f, 0xbe, 0xaa, 0x0a ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64" ]
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expected:
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insns:
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asm_text: "amoswap.d.rl t3, a0, (s5)"
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input:
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bytes: [ 0x3b, 0x00, 0x31, 0x02 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64" ]
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expected:
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insns:
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-
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asm_text: "mulw zero, sp, gp"
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input:
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bytes: [ 0x53, 0xa0, 0x31, 0xd0 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64" ]
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expected:
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insns:
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-
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asm_text: "fcvt.s.lu ft0, gp, rdn"
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input:
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bytes: [ 0x53, 0x81, 0x01, 0xf2 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64" ]
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expected:
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insns:
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-
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asm_text: "fmv.d.x ft2, gp"
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