mirror of
https://github.com/hedge-dev/XenonRecomp.git
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50 lines
1.5 KiB
YAML
50 lines
1.5 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0x8d, 0x4c, 0x32, 0x08, 0x01, 0xd8, 0x81, 0xc6, 0x34, 0x12, 0x00, 0x00, 0x00, 0x91, 0x92 ]
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arch: "CS_ARCH_X86"
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options: [ CS_MODE_32, CS_OPT_SKIPDATA ]
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address: 0x1000
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expected:
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insns:
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-
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asm_text: "lea ecx, [edx + esi + 8]"
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asm_text: "add eax, ebx"
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asm_text: "add esi, 0x1234"
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asm_text: ".byte 0x00"
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asm_text: "xchg ecx, eax"
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asm_text: "xchg edx, eax"
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input:
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bytes: [ 0xed, 0x00, 0x00, 0x00, 0x00, 0x1a, 0x5a, 0x0f, 0x1f, 0xff, 0xc2, 0x09, 0x80, 0x00, 0x00, 0x00, 0x07, 0xf7, 0xeb, 0x2a, 0xff, 0xff, 0x7f, 0x57, 0xe3, 0x01, 0xff, 0xff, 0x7f, 0x57, 0xeb, 0x00, 0xf0, 0x00, 0x00, 0x24, 0xb2, 0x4f, 0x00, 0x78 ]
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arch: "CS_ARCH_ARM"
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options: [ CS_MODE_ARM, CS_OPT_SKIPDATA ]
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address: 0x1000
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expected:
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insns:
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asm_text: "andeq r0, r0, sp, ror #1"
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asm_text: "svceq #0x5a1a00"
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asm_text: "stmibeq r2, {r0, r1, r2, r3, r4, r8, r9, r10, r11, r12, sp, lr, pc} ^"
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asm_text: "andeq r0, r0, r0, lsl #1"
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asm_text: "bhs 0xffafec34"
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asm_text: ".byte 0xff, 0xff, 0x7f, 0x57"
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asm_text: ".byte 0xe3, 0x01, 0xff, 0xff"
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asm_text: "rsceq r5, r11, pc, ror r7"
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asm_text: "strhs r0, [r0], #-0xf0"
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asm_text: "stmdavc r0, {r1, r4, r5, r7, r8, r9, r10, r11, lr}"
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