mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-10 09:35:06 +00:00
39 lines
1.8 KiB
C#
39 lines
1.8 KiB
C#
# CS_ARCH_AARCH64, 0, None
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0x00,0x90,0x11,0xd5 == msr BRBCR_EL1, x0
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0x01,0x90,0x31,0xd5 == mrs x1, BRBCR_EL1
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0x02,0x90,0x15,0xd5 == msr BRBCR_EL12, x2
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0x03,0x90,0x35,0xd5 == mrs x3, BRBCR_EL12
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0x04,0x90,0x14,0xd5 == msr BRBCR_EL2, x4
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0x05,0x90,0x34,0xd5 == mrs x5, BRBCR_EL2
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0x26,0x90,0x11,0xd5 == msr BRBFCR_EL1, x6
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0x27,0x90,0x31,0xd5 == mrs x7, BRBFCR_EL1
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0x08,0x92,0x11,0xd5 == expect failure: BRBIDR0_EL1 is RO
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0x09,0x92,0x31,0xd5 == msr S2_1_C9_C2_0, x8
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0x0a,0x91,0x11,0xd5 == msr BRBINFINJ_EL1, x10
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0x0b,0x91,0x31,0xd5 == mrs x11, BRBINFINJ_EL1
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0x2c,0x91,0x11,0xd5 == msr BRBSRCINJ_EL1, x12
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0x2d,0x91,0x31,0xd5 == mrs x13, BRBSRCINJ_EL1
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0x4e,0x91,0x11,0xd5 == msr BRBTGTINJ_EL1, x14
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0x4f,0x91,0x31,0xd5 == mrs x15, BRBTGTINJ_EL1
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0x50,0x90,0x11,0xd5 == msr BRBTS_EL1, x16
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0x51,0x90,0x31,0xd5 == mrs x17, BRBTS_EL1
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0x12,0x80,0x11,0xd5 == expect failure: BRBINF0_EL1 is RO
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0x13,0x80,0x31,0xd5 == msr S2_1_C8_C0_0, x18
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0x14,0x81,0x11,0xd5 == expect failure: BRBINF1_EL1 is RO
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0x15,0x81,0x31,0xd5 == msr S2_1_C8_C1_0, x20
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0x16,0x82,0x11,0xd5 == expect failure: BRBINF2_EL1 is RO
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0x17,0x82,0x31,0xd5 == msr S2_1_C8_C2_0, x22
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0x38,0x84,0x11,0xd5 == expect failure: BRBSRC4_EL1 is RO
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0x39,0x84,0x31,0xd5 == msr S2_1_C8_C4_1, x24
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0x3a,0x88,0x11,0xd5 == expect failure: BRBSRC8_EL1 is RO
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0x3b,0x88,0x31,0xd5 == msr S2_1_C8_C8_1, x26
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0xbc,0x80,0x11,0xd5 == expect failure: BRBSRC16_EL1 is RO
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0xbd,0x80,0x31,0xd5 == msr S2_1_C8_C0_5, x28
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0x40,0x8a,0x11,0xd5 == expect failure: BRBTGT10_EL1 is RO
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0x41,0x8a,0x31,0xd5 == msr S2_1_C8_C10_2, x0
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0xc2,0x85,0x11,0xd5 == expect failure: BRBTGT21_EL1 is RO
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0xc3,0x85,0x31,0xd5 == msr S2_1_C8_C5_6, x2
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0xc4,0x8f,0x11,0xd5 == expect failure: BRBTGT31_EL1 is RO
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0xc5,0x8f,0x31,0xd5 == msr S2_1_C8_C15_6, x4
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