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https://github.com/hedge-dev/XenonRecomp.git
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21 lines
582 B
YAML
21 lines
582 B
YAML
test_cases:
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-
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input:
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bytes: [ 0x03, 0x10, 0x82, 0xe0, 0x03, 0x10, 0x42, 0xe0, 0x03, 0x10, 0x22, 0xe0, 0x03, 0x10, 0x82, 0xe1, 0x03, 0x10, 0x02, 0xe0, 0x03, 0x10, 0xc2, 0xe1 ]
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arch: "CS_ARCH_ARM"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_ARM" ]
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expected:
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insns:
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asm_text: "add r1, r2, r3"
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asm_text: "sub r1, r2, r3"
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asm_text: "eor r1, r2, r3"
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asm_text: "orr r1, r2, r3"
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asm_text: "and r1, r2, r3"
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asm_text: "bic r1, r2, r3"
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